1//===-- VOPCInstructions.td - Vector Instruction Definitions --------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Encodings 11//===----------------------------------------------------------------------===// 12 13class VOPCe <bits<8> op> : Enc32 { 14 bits<9> src0; 15 bits<8> src1; 16 17 let Inst{8-0} = src0; 18 let Inst{16-9} = src1; 19 let Inst{24-17} = op; 20 let Inst{31-25} = 0x3e; 21} 22 23class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> { 24 bits<8> src1; 25 26 let Inst{8-0} = 0xf9; // sdwa 27 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 28 let Inst{24-17} = op; 29 let Inst{31-25} = 0x3e; // encoding 30} 31 32class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> { 33 bits<9> src1; 34 35 let Inst{8-0} = 0xf9; // sdwa 36 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 37 let Inst{24-17} = op; 38 let Inst{31-25} = 0x3e; // encoding 39 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr 40} 41 42 43//===----------------------------------------------------------------------===// 44// VOPC classes 45//===----------------------------------------------------------------------===// 46 47// VOPC instructions are a special case because for the 32-bit 48// encoding, we want to display the implicit vcc write as if it were 49// an explicit $dst. 50class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> : 51 VOPProfile <[i1, vt0, vt1, untyped]> { 52 // We want to exclude instructions with 64bit operands 53 let HasExtDPP = getHasVOP3DPP<DstVT, Src0VT, Src1VT, Src2VT>.ret; 54 let Asm32 = "$src0, $src1"; 55 56 let AsmDPP = !if (HasModifiers, 57 "$src0_modifiers, $src1_modifiers " 58 "$dpp_ctrl$row_mask$bank_mask$bound_ctrl", 59 "$src0, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl"); 60 let AsmDPP8 = "$src0, $src1 $dpp8$fi"; 61 let AsmDPP16 = AsmDPP#"$fi"; 62 let InsDPP = getInsDPP<VOPDstOperand<Src0DPP>, Src0DPP, Src1DPP, Src2DPP, 63 NumSrcArgs, HasModifiers, Src0ModDPP, Src1ModDPP, 64 Src2ModDPP>.ret; 65 let InsDPP16 = getInsDPP16<VOPDstOperand<Src0DPP>, Src0DPP, Src1DPP, Src2DPP, 66 NumSrcArgs, HasModifiers, Src0ModDPP, Src1ModDPP, 67 Src2ModDPP>.ret; 68 let InsDPP8 = getInsDPP8<VOPDstOperand<Src0DPP>, Src0DPP, Src1DPP, Src2DPP, 69 NumSrcArgs, HasModifiers, Src0ModDPP, Src1ModDPP, 70 Src2ModDPP>.ret; 71 72 // The destination for 32-bit encoding is implicit. 73 let HasDst32 = 0; 74 // VOPC disallows dst_sel and dst_unused as they have no effect on destination 75 let EmitDstSel = 0; 76 let Outs64 = (outs VOPDstS64orS32:$sdst); 77 let OutsVOP3DPP = Outs64; 78 let OutsVOP3DPP8 = Outs64; 79 let InsVOP3DPP = getInsVOP3DPP<InsVOP3Base, Src0VOP3DPP, NumSrcArgs>.ret; 80 let InsVOP3DPP16 = getInsVOP3DPP16<InsVOP3Base, Src0VOP3DPP, NumSrcArgs>.ret; 81 let InsVOP3DPP8 = getInsVOP3DPP8<InsVOP3Base, Src0VOP3DPP, NumSrcArgs>.ret; 82 list<SchedReadWrite> Schedule = sched; 83} 84 85class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0, 86 ValueType vt1 = vt0> : 87 VOPC_Profile<sched, vt0, vt1> { 88 let Outs64 = (outs ); 89 let OutsVOP3DPP = Outs64; 90 let OutsVOP3DPP8 = Outs64; 91 let OutsSDWA = (outs ); 92 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 93 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 94 src0_sel:$src0_sel, src1_sel:$src1_sel); 95 let Asm64 = !if(isFloatType<Src0VT>.ret, "$src0_modifiers, $src1_modifiers$clamp", 96 "$src0, $src1"); 97 let AsmVOP3DPPBase = Asm64; 98 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 99 let EmitDst = 0; 100} 101 102class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[], 103 bit DefVcc = 1> : 104 InstSI<(outs), P.Ins32, "", pattern>, 105 VOP <opName>, 106 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> { 107 108 let isPseudo = 1; 109 let isCodeGenOnly = 1; 110 let UseNamedOperandTable = 1; 111 112 string Mnemonic = opName; 113 string AsmOperands = P.Asm32; 114 115 let Size = 4; 116 let mayLoad = 0; 117 let mayStore = 0; 118 let hasSideEffects = 0; 119 120 let ReadsModeReg = isFloatType<P.Src0VT>.ret; 121 122 let VALU = 1; 123 let VOPC = 1; 124 let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]); 125 let Defs = !if(DefVcc, [VCC], []); 126 127 VOPProfile Pfl = P; 128} 129 130class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily, string asm_name = ps.PseudoInstr> : 131 InstSI <ps.OutOperandList, ps.InOperandList, asm_name # " " # ps.AsmOperands, []>, 132 SIMCInstr <ps.PseudoInstr, EncodingFamily> { 133 134 let VALU = 1; 135 let VOPC = 1; 136 let isPseudo = 0; 137 let isCodeGenOnly = 0; 138 139 let Constraints = ps.Constraints; 140 let DisableEncoding = ps.DisableEncoding; 141 142 // copy relevant pseudo op flags 143 let SubtargetPredicate = ps.SubtargetPredicate; 144 let AsmMatchConverter = ps.AsmMatchConverter; 145 let Constraints = ps.Constraints; 146 let DisableEncoding = ps.DisableEncoding; 147 let TSFlags = ps.TSFlags; 148 let UseNamedOperandTable = ps.UseNamedOperandTable; 149 let Uses = ps.Uses; 150 let Defs = ps.Defs; 151 let SchedRW = ps.SchedRW; 152 let mayLoad = ps.mayLoad; 153 let mayStore = ps.mayStore; 154} 155 156class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> : 157 VOP_SDWA_Pseudo <OpName, P, pattern> { 158 let AsmMatchConverter = "cvtSdwaVOPC"; 159} 160 161// This class is used only with VOPC instructions. Use $sdst for out operand 162class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, 163 string Asm32 = ps.Pfl.Asm32, string real_name = ps.OpName, 164 VOPProfile p = ps.Pfl> : 165 InstAlias <real_name#" "#Asm32, (inst)>, PredicateControl { 166 167 field bit isCompare; 168 field bit isCommutable; 169 170 let ResultInst = 171 !if (p.HasDst32, 172 !if (!eq(p.NumSrcArgs, 0), 173 // 1 dst, 0 src 174 (inst p.DstRC:$sdst), 175 !if (!eq(p.NumSrcArgs, 1), 176 // 1 dst, 1 src 177 (inst p.DstRC:$sdst, p.Src0RC32:$src0), 178 !if (!eq(p.NumSrcArgs, 2), 179 // 1 dst, 2 src 180 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1), 181 // else - unreachable 182 (inst)))), 183 // else 184 !if (!eq(p.NumSrcArgs, 2), 185 // 0 dst, 2 src 186 (inst p.Src0RC32:$src0, p.Src1RC32:$src1), 187 !if (!eq(p.NumSrcArgs, 1), 188 // 0 dst, 1 src 189 (inst p.Src0RC32:$src1), 190 // else 191 // 0 dst, 0 src 192 (inst)))); 193 194 let AsmVariantName = AMDGPUAsmVariants.Default; 195 let SubtargetPredicate = AssemblerPredicate; 196} 197 198multiclass VOPCInstAliases <string old_name, string Arch, string real_name = old_name> { 199 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"), 200 !cast<Instruction>(real_name#"_e32_"#Arch), 201 !cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32, 202 real_name>; 203 let WaveSizePredicate = isWave32 in { 204 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"), 205 !cast<Instruction>(real_name#"_e32_"#Arch), 206 "vcc_lo, "#!cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32, 207 real_name>; 208 } 209 let WaveSizePredicate = isWave64 in { 210 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"), 211 !cast<Instruction>(real_name#"_e32_"#Arch), 212 "vcc, "#!cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32, 213 real_name>; 214 } 215} 216 217multiclass VOPCXInstAliases <string old_name, string Arch, string real_name = old_name> { 218 def : VOPCInstAlias <!cast<VOP3_Pseudo>(old_name#"_e64"), 219 !cast<Instruction>(real_name#"_e32_"#Arch), 220 !cast<VOP3_Pseudo>(old_name#"_e64").Pfl.Asm32, 221 real_name>; 222} 223 224class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies { 225 list<dag> ret = !if(P.HasModifiers, 226 [(set i1:$sdst, 227 (setcc (P.Src0VT 228 !if(P.HasOMod, 229 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod), 230 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))), 231 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)), 232 cond))], 233 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]); 234} 235 236class VCMPXNoSDstTable <bit has_sdst, string Name> { 237 bit HasSDst = has_sdst; 238 string NoSDstOp = Name; 239} 240 241class VCMPVCMPXTable <string Name> { 242 bit IsVCMPX = 0; 243 string VCMPOp = Name; 244} 245 246multiclass VOPC_Pseudos <string opName, 247 VOPC_Profile P, 248 SDPatternOperator cond = COND_NULL, 249 string revOp = opName, 250 bit DefExec = 0> { 251 252 def _e32 : VOPC_Pseudo <opName, P>, 253 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>, 254 VCMPXNoSDstTable<1, opName#"_e32">, 255 VCMPVCMPXTable<opName#"_e32"> { 256 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 257 let SchedRW = P.Schedule; 258 let isConvergent = DefExec; 259 let isCompare = 1; 260 let isCommutable = 1; 261 } 262 263 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>, 264 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>, 265 VCMPXNoSDstTable<1, opName#"_e64">, 266 VCMPVCMPXTable<opName#"_e64"> { 267 let Defs = !if(DefExec, [EXEC], []); 268 let SchedRW = P.Schedule; 269 let isCompare = 1; 270 let isCommutable = 1; 271 } 272 273 foreach _ = BoolToList<P.HasExtSDWA>.ret in 274 def _sdwa : VOPC_SDWA_Pseudo <opName, P> { 275 let Defs = !if(DefExec, [EXEC], []); 276 let SchedRW = P.Schedule; 277 let isConvergent = DefExec; 278 let isCompare = 1; 279 } 280 281 let SubtargetPredicate = isGFX11Plus in { 282 if P.HasExtDPP then 283 def _e32_dpp : VOP_DPP_Pseudo<opName, P> { 284 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 285 let SchedRW = P.Schedule; 286 let isConvergent = DefExec; 287 let isCompare = 1; 288 let VOPC = 1; 289 let Constraints = ""; 290 } 291 if P.HasExtVOP3DPP then 292 def _e64_dpp : VOP3_DPP_Pseudo<opName, P> { 293 let Defs = !if(DefExec, [EXEC], []); 294 let SchedRW = P.Schedule; 295 let isCompare = 1; 296 let Constraints = !if(P.NumSrcArgs, P.TieRegDPP # " = $sdst", ""); 297 } 298 } // end SubtargetPredicate = isGFX11Plus 299 300} 301 302let SubtargetPredicate = HasSdstCMPX in { 303multiclass VOPCX_Pseudos <string opName, 304 VOPC_Profile P, VOPC_Profile P_NoSDst, 305 SDPatternOperator cond = COND_NULL, 306 string revOp = opName> : 307 VOPC_Pseudos <opName, P, cond, revOp, 1> { 308 309 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 310 Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>, 311 VCMPXNoSDstTable<0, opName#"_e32">, 312 VCMPVCMPXTable<!subst("v_cmpx", "v_cmp", opName#"_e32")> { 313 let Defs = [EXEC]; 314 let SchedRW = P_NoSDst.Schedule; 315 let isConvergent = 1; 316 let isCompare = 1; 317 let isCommutable = 1; 318 let SubtargetPredicate = HasNoSdstCMPX; 319 let IsVCMPX = 1; 320 } 321 322 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 323 Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>, 324 VCMPXNoSDstTable<0, opName#"_e64">, 325 VCMPVCMPXTable<!subst("v_cmpx", "v_cmp", opName#"_e64")> { 326 let Defs = [EXEC]; 327 let SchedRW = P_NoSDst.Schedule; 328 let isCompare = 1; 329 let isCommutable = 1; 330 let SubtargetPredicate = HasNoSdstCMPX; 331 let IsVCMPX = 1; 332 } 333 334 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 335 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 336 let Defs = [EXEC]; 337 let SchedRW = P_NoSDst.Schedule; 338 let isConvergent = 1; 339 let isCompare = 1; 340 let SubtargetPredicate = HasNoSdstCMPX; 341 } 342 343 let SubtargetPredicate = isGFX11Plus in { 344 if P.HasExtDPP then 345 def _nosdst_e32_dpp : VOP_DPP_Pseudo<opName#"_nosdst", P_NoSDst> { 346 let Defs = [EXEC]; 347 let SchedRW = P_NoSDst.Schedule; 348 let isConvergent = 1; 349 let isCompare = 1; 350 let VOPC = 1; 351 let Constraints = ""; 352 } 353 if P.HasExtVOP3DPP then 354 def _nosdst_e64_dpp : VOP3_DPP_Pseudo<opName#"_nosdst", P_NoSDst> { 355 let Defs = [EXEC]; 356 let SchedRW = P_NoSDst.Schedule; 357 let isCompare = 1; 358 let Constraints = ""; 359 } 360 } // end SubtargetPredicate = isGFX11Plus 361} 362} // End SubtargetPredicate = HasSdstCMPX 363 364def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>; 365def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>; 366def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>; 367def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>; 368def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>; 369def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>; 370 371def VOPC_F16_F16 : VOPC_NoSdst_Profile<[Write32Bit], f16>; 372def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>; 373def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>; 374def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>; 375def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>; 376def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>; 377 378multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL, 379 string revOp = opName> : 380 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>; 381 382multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 383 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>; 384 385multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 386 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>; 387 388multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 389 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>; 390 391multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 392 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>; 393 394multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 395 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>; 396 397multiclass VOPCX_F16 <string opName, string revOp = opName> : 398 VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>; 399 400multiclass VOPCX_F32 <string opName, string revOp = opName> : 401 VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>; 402 403multiclass VOPCX_F64 <string opName, string revOp = opName> : 404 VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>; 405 406multiclass VOPCX_I16 <string opName, string revOp = opName> : 407 VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>; 408 409multiclass VOPCX_I32 <string opName, string revOp = opName> : 410 VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>; 411 412multiclass VOPCX_I64 <string opName, string revOp = opName> : 413 VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>; 414 415 416//===----------------------------------------------------------------------===// 417// Compare instructions 418//===----------------------------------------------------------------------===// 419 420defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">; 421defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">; 422defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>; 423defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">; 424defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>; 425defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>; 426defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>; 427defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>; 428defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>; 429defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">; 430defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>; 431defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">; 432defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>; 433defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>; 434defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>; 435defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">; 436 437defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">; 438defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">; 439defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">; 440defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">; 441defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">; 442defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">; 443defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">; 444defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">; 445defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">; 446defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">; 447defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">; 448defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">; 449defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">; 450defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">; 451defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">; 452defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">; 453 454defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">; 455defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">; 456defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>; 457defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">; 458defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>; 459defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>; 460defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>; 461defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>; 462defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>; 463defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">; 464defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>; 465defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">; 466defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>; 467defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>; 468defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>; 469defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">; 470 471defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">; 472defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">; 473defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">; 474defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">; 475defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">; 476defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">; 477defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">; 478defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">; 479defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">; 480defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">; 481defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">; 482defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">; 483defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">; 484defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">; 485defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">; 486defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">; 487 488let SubtargetPredicate = isGFX6GFX7 in { 489 490defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">; 491defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">; 492defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">; 493defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">; 494defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">; 495defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">; 496defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">; 497defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">; 498defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">; 499defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">; 500defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">; 501defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">; 502defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">; 503defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">; 504defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">; 505defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">; 506 507defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">; 508defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">; 509defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">; 510defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">; 511defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">; 512defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">; 513defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">; 514defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">; 515defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">; 516defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">; 517defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">; 518defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">; 519defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">; 520defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">; 521defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">; 522defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">; 523 524defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">; 525defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">; 526defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">; 527defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">; 528defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">; 529defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">; 530defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">; 531defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">; 532defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">; 533defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">; 534defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">; 535defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">; 536defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">; 537defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">; 538defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">; 539defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">; 540 541defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">; 542defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">; 543defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">; 544defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">; 545defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">; 546defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">; 547defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">; 548defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">; 549defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">; 550defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">; 551defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">; 552defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">; 553defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">; 554defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">; 555defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">; 556defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">; 557 558} // End SubtargetPredicate = isGFX6GFX7 559 560let SubtargetPredicate = Has16BitInsts in { 561 562defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">; 563defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">; 564defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>; 565defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">; 566defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>; 567defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>; 568defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>; 569defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>; 570defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>; 571defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">; 572defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>; 573defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">; 574defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>; 575defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>; 576defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>; 577defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">; 578 579defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">; 580defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">; 581defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">; 582defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">; 583defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">; 584defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">; 585defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">; 586defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">; 587defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">; 588defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">; 589defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">; 590defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">; 591defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">; 592defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">; 593defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">; 594defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">; 595 596defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">; 597defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">; 598defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">; 599defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">; 600defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>; 601defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">; 602defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>; 603defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">; 604 605defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">; 606defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">; 607defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>; 608defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">; 609defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>; 610defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>; 611defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>; 612defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">; 613 614defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">; 615defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">; 616defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">; 617defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">; 618defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">; 619defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">; 620defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">; 621defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">; 622defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">; 623 624defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">; 625defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">; 626defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">; 627defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">; 628defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">; 629defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">; 630defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">; 631 632} // End SubtargetPredicate = Has16BitInsts 633 634defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">; 635defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">; 636defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">; 637defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">; 638defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>; 639defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">; 640defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>; 641defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">; 642 643defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">; 644defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">; 645defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">; 646defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">; 647defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">; 648defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">; 649defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">; 650defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">; 651 652defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">; 653defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">; 654defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">; 655defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">; 656defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>; 657defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">; 658defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>; 659defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">; 660 661defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">; 662defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">; 663defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">; 664defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">; 665defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">; 666defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">; 667defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">; 668defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">; 669 670defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">; 671defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">; 672defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>; 673defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">; 674defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>; 675defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>; 676defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>; 677defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">; 678 679defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">; 680defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">; 681defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">; 682defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">; 683defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">; 684defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">; 685defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">; 686defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">; 687 688defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">; 689defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">; 690defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>; 691defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">; 692defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>; 693defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>; 694defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>; 695defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">; 696 697defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">; 698defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">; 699defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">; 700defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">; 701defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">; 702defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">; 703defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">; 704defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">; 705 706//===----------------------------------------------------------------------===// 707// Class instructions 708//===----------------------------------------------------------------------===// 709 710class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> : 711 VOPC_Profile<sched, vt, i32> { 712 let AsmDPP = "$src0_modifiers, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl"; 713 let AsmDPP16 = AsmDPP#"$fi"; 714 let InsDPP = (ins VGPR_32:$old, FPVRegInputMods:$src0_modifiers, VGPR_32:$src0, VGPR_32:$src1, dpp_ctrl:$dpp_ctrl, row_mask:$row_mask, bank_mask:$bank_mask, bound_ctrl:$bound_ctrl); 715 let InsDPP16 = !con(InsDPP, (ins FI:$fi)); 716 // DPP8 forbids modifiers and can inherit from VOPC_Profile 717 718 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1); 719 dag InsPartVOP3DPP = (ins Src0Mod:$src0_modifiers, VGPRSrc_32:$src0, VGPRSrc_32:$src1); 720 let InsVOP3Base = !con(InsPartVOP3DPP, !if(HasOpSel, (ins op_sel0:$op_sel), 721 (ins))); 722 let Asm64 = "$sdst, $src0_modifiers, $src1"; 723 let AsmVOP3DPPBase = Asm64; 724 725 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 726 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 727 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel); 728 729 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel"; 730 let HasSrc1Mods = 0; 731 let HasClamp = 0; 732 let HasOMod = 0; 733} 734 735class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt> : 736 VOPC_Class_Profile<sched, vt> { 737 let Outs64 = (outs ); 738 let OutsSDWA = (outs ); 739 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 740 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 741 src0_sel:$src0_sel, src1_sel:$src1_sel); 742 let Asm64 = "$src0_modifiers, $src1"; 743 let AsmVOP3DPPBase = Asm64; 744 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 745 let EmitDst = 0; 746} 747 748class getVOPCClassPat64 <VOPProfile P> { 749 list<dag> ret = 750 [(set i1:$sdst, 751 (AMDGPUfp_class 752 (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers)), 753 P.Src1VT:$src1))]; 754} 755 756// Special case for class instructions which only have modifiers on 757// the 1st source operand. 758multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec, 759 bit DefVcc = 1> { 760 def _e32 : VOPC_Pseudo <opName, p>, 761 VCMPXNoSDstTable<1, opName#"_e32"> { 762 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 763 !if(DefVcc, [VCC], [])); 764 let SchedRW = p.Schedule; 765 let isConvergent = DefExec; 766 } 767 768 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret>, 769 VCMPXNoSDstTable<1, opName#"_e64"> { 770 let Defs = !if(DefExec, [EXEC], []); 771 let SchedRW = p.Schedule; 772 } 773 774 foreach _ = BoolToList<p.HasExtSDWA>.ret in 775 def _sdwa : VOPC_SDWA_Pseudo <opName, p> { 776 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 777 !if(DefVcc, [VCC], [])); 778 let SchedRW = p.Schedule; 779 let isConvergent = DefExec; 780 } 781 782 let SubtargetPredicate = isGFX11Plus in { 783 if p.HasExtDPP then 784 def _e32_dpp : VOP_DPP_Pseudo<opName, p> { 785 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 786 !if(DefVcc, [VCC], [])); 787 let SchedRW = p.Schedule; 788 let isConvergent = DefExec; 789 let VOPC = 1; 790 let Constraints = ""; 791 } 792 if p.HasExtVOP3DPP then 793 def _e64_dpp : VOP3_DPP_Pseudo<opName, p> { 794 let Defs = !if(DefExec, [EXEC], []); 795 let SchedRW = p.Schedule; 796 let Constraints = !if(p.NumSrcArgs, p.TieRegDPP # " = $sdst", ""); 797 } 798 } // end SubtargetPredicate = isGFX11Plus 799} 800 801let SubtargetPredicate = HasSdstCMPX in { 802multiclass VOPCX_Class_Pseudos <string opName, 803 VOPC_Profile P, 804 VOPC_Profile P_NoSDst> : 805 VOPC_Class_Pseudos <opName, P, 1, 1> { 806 807 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 808 VCMPXNoSDstTable<0, opName#"_e32"> { 809 let Defs = [EXEC]; 810 let SchedRW = P_NoSDst.Schedule; 811 let isConvergent = 1; 812 let SubtargetPredicate = HasNoSdstCMPX; 813 } 814 815 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 816 VCMPXNoSDstTable<0, opName#"_e64"> { 817 let Defs = [EXEC]; 818 let SchedRW = P_NoSDst.Schedule; 819 let SubtargetPredicate = HasNoSdstCMPX; 820 } 821 822 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 823 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 824 let Defs = [EXEC]; 825 let SchedRW = P_NoSDst.Schedule; 826 let isConvergent = 1; 827 let SubtargetPredicate = HasNoSdstCMPX; 828 } 829 830 let SubtargetPredicate = isGFX11Plus in { 831 if P.HasExtDPP then 832 def _nosdst_e32_dpp : VOP_DPP_Pseudo<opName#"_nosdst", P_NoSDst> { 833 let Defs = [EXEC]; 834 let SchedRW = P_NoSDst.Schedule; 835 let isConvergent = 1; 836 let VOPC = 1; 837 let Constraints = ""; 838 } 839 if P.HasExtVOP3DPP then 840 def _nosdst_e64_dpp : VOP3_DPP_Pseudo<opName#"_nosdst", P_NoSDst> { 841 let Defs = [EXEC]; 842 let SchedRW = P_NoSDst.Schedule; 843 let Constraints = ""; 844 } 845 } // end SubtargetPredicate = isGFX11Plus 846} 847} // End SubtargetPredicate = HasSdstCMPX 848 849def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>; 850def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>; 851def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>; 852 853def VOPC_F16_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f16>; 854def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>; 855def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>; 856 857multiclass VOPC_CLASS_F16 <string opName> : 858 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>; 859 860multiclass VOPCX_CLASS_F16 <string opName> : 861 VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I32, VOPC_F16_I32>; 862 863multiclass VOPC_CLASS_F32 <string opName> : 864 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>; 865 866multiclass VOPCX_CLASS_F32 <string opName> : 867 VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>; 868 869multiclass VOPC_CLASS_F64 <string opName> : 870 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>; 871 872multiclass VOPCX_CLASS_F64 <string opName> : 873 VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>; 874 875// cmp_class ignores the FP mode and faithfully reports the unmodified 876// source value. 877let ReadsModeReg = 0, mayRaiseFPException = 0 in { 878defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">; 879defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">; 880defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">; 881defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">; 882 883let SubtargetPredicate = Has16BitInsts in { 884defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">; 885defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">; 886} 887} // End ReadsModeReg = 0, mayRaiseFPException = 0 888 889//===----------------------------------------------------------------------===// 890// V_ICMPIntrinsic Pattern. 891//===----------------------------------------------------------------------===// 892 893// We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith() 894// complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place. 895multiclass ICMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> { 896 let WaveSizePredicate = isWave64 in 897 def : GCNPat < 898 (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 899 (i64 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_64)) 900 >; 901 902 let WaveSizePredicate = isWave32 in 903 def : GCNPat < 904 (i32 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 905 (i32 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_32)) 906 >; 907} 908 909defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>; 910defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>; 911defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>; 912defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>; 913defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>; 914defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>; 915defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>; 916defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>; 917defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>; 918defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>; 919 920defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>; 921defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>; 922defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>; 923defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>; 924defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>; 925defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>; 926defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>; 927defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>; 928defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>; 929defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>; 930 931defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>; 932defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>; 933defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>; 934defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>; 935defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>; 936defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>; 937defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>; 938defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>; 939defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>; 940defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>; 941 942multiclass FCMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> { 943 let WaveSizePredicate = isWave64 in 944 def : GCNPat < 945 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 946 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 947 (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 948 DSTCLAMP.NONE), SReg_64)) 949 >; 950 951 let WaveSizePredicate = isWave32 in 952 def : GCNPat < 953 (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 954 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 955 (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 956 DSTCLAMP.NONE), SReg_32)) 957 >; 958} 959 960defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>; 961defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>; 962defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>; 963defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>; 964defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>; 965defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>; 966 967defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>; 968defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>; 969defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>; 970defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>; 971defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>; 972defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>; 973 974defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>; 975defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>; 976defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>; 977defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>; 978defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>; 979defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>; 980 981 982defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>; 983defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>; 984defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>; 985defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>; 986defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>; 987defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>; 988 989defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>; 990defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>; 991defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>; 992defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>; 993defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>; 994defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>; 995 996defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>; 997defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>; 998defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>; 999defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>; 1000defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>; 1001defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>; 1002 1003//===----------------------------------------------------------------------===// 1004// DPP Encodings 1005//===----------------------------------------------------------------------===// 1006 1007// VOPC32 1008 1009class VOPC_DPPe_Common<bits<8> op> : Enc64 { 1010 bits<8> src1; 1011 let Inst{16-9} = src1; 1012 let Inst{24-17} = op; 1013 let Inst{31-25} = 0x3e; 1014} 1015 1016class VOPC_DPP_Base<bits<8> op, string OpName, VOPProfile P> 1017 : VOP_DPP_Base<OpName, P, P.InsDPP16, " " #P.AsmDPP16>, 1018 VOPC_DPPe_Common<op> { 1019 bits<2> src0_modifiers; 1020 bits<8> src0; 1021 bits<2> src1_modifiers; 1022 bits<9> dpp_ctrl; 1023 bits<1> bound_ctrl; 1024 bits<4> bank_mask; 1025 bits<4> row_mask; 1026 bit fi; 1027 1028 let Inst{8-0} = 0xfa; 1029 1030 let Inst{39-32} = !if (P.HasSrc0, src0{7-0}, 0); 1031 let Inst{48-40} = dpp_ctrl; 1032 let Inst{50} = fi; 1033 let Inst{51} = bound_ctrl; 1034 let Inst{52} = !if (P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg 1035 let Inst{53} = !if (P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs 1036 let Inst{54} = !if (P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg 1037 let Inst{55} = !if (P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs 1038 let Inst{59-56} = bank_mask; 1039 let Inst{63-60} = row_mask; 1040 1041 let AsmMatchConverter = "cvtDPP"; 1042 let VOPC = 1; 1043} 1044 1045class VOPC_DPP8_Base<bits<8> op, string OpName, VOPProfile P> 1046 : VOP_DPP8_Base<OpName, P, P.InsDPP8, " " #P.AsmDPP8>, 1047 VOPC_DPPe_Common<op> { 1048 bits<8> src0; 1049 bits<24> dpp8; 1050 bits<9> fi; 1051 1052 let Inst{8-0} = fi; 1053 1054 let Inst{39-32} = !if (P.HasSrc0, src0{7-0}, 0); 1055 let Inst{63-40} = dpp8{23-0}; 1056 1057 let AsmMatchConverter = "cvtDPP8"; 1058 let VOPC = 1; 1059} 1060 1061class VOPC_DPP16<bits<8> op, VOP_DPP_Pseudo ps, string opName = ps.OpName> 1062 : VOPC_DPP_Base<op, opName, ps.Pfl> { 1063 let AssemblerPredicate = HasDPP16; 1064 let SubtargetPredicate = HasDPP16; 1065 let hasSideEffects = ps.hasSideEffects; 1066 let Defs = ps.Defs; 1067 let SchedRW = ps.SchedRW; 1068 let Uses = ps.Uses; 1069 let OtherPredicates = ps.OtherPredicates; 1070 let Constraints = ps.Constraints; 1071 let AsmMatchConverter = "cvtVOPCNoDstDPP"; 1072} 1073 1074class VOPC_DPP16_SIMC<bits<8> op, VOP_DPP_Pseudo ps, int subtarget, 1075 string opName = ps.OpName> 1076 : VOPC_DPP16<op, ps, opName>, SIMCInstr<ps.PseudoInstr, subtarget>; 1077 1078class VOPC_DPP8<bits<8> op, VOPC_Pseudo ps, string opName = ps.OpName> 1079 : VOPC_DPP8_Base<op, opName, ps.Pfl> { 1080 // Note ps is the non-dpp pseudo 1081 let hasSideEffects = ps.hasSideEffects; 1082 let Defs = ps.Defs; 1083 let SchedRW = ps.SchedRW; 1084 let Uses = ps.Uses; 1085 let OtherPredicates = ps.OtherPredicates; 1086 let Constraints = ""; 1087 let AsmMatchConverter = "cvtVOPCNoDstDPP8"; 1088} 1089 1090// VOPC64 1091 1092class VOPC64_DPP_Base<bits<10> op, string OpName, VOPProfile P> 1093 : VOP3_DPP_Base<OpName, P, 1>, VOP3_DPPe_Common<op, P> { 1094 Instruction Opcode = !cast<Instruction>(NAME); 1095 1096 bits<8> src0; 1097 bits<9> dpp_ctrl; 1098 bits<1> bound_ctrl; 1099 bits<4> bank_mask; 1100 bits<4> row_mask; 1101 bit fi; 1102 1103 let Inst{40-32} = 0xfa; 1104 let Inst{71-64} = !if(P.HasSrc0, src0{7-0}, 0); 1105 let Inst{80-72} = dpp_ctrl; 1106 let Inst{82} = fi; 1107 let Inst{83} = bound_ctrl; 1108 // Inst{87-84} ignored by hw 1109 let Inst{91-88} = bank_mask; 1110 let Inst{95-92} = row_mask; 1111} 1112 1113class VOPC64_DPP16<bits<10> op, VOP_DPP_Pseudo ps, string opName = ps.OpName> 1114 : VOPC64_DPP_Base<op, opName, ps.Pfl> { 1115 let AssemblerPredicate = HasDPP16; 1116 let SubtargetPredicate = HasDPP16; 1117 let hasSideEffects = ps.hasSideEffects; 1118 let Defs = ps.Defs; 1119 let SchedRW = ps.SchedRW; 1120 let Uses = ps.Uses; 1121 let OtherPredicates = ps.OtherPredicates; 1122 let Constraints = ps.Constraints; 1123} 1124 1125class VOPC64_DPP16_Dst<bits<10> op, VOP_DPP_Pseudo ps, 1126 string opName = ps.OpName> 1127 : VOPC64_DPP16<op, ps, opName> { 1128 bits<8> sdst; 1129 let Inst{7-0} = sdst; 1130} 1131 1132class VOPC64_DPP16_NoDst<bits<10> op, VOP_DPP_Pseudo ps, 1133 string opName = ps.OpName> 1134 : VOPC64_DPP16<op, ps, opName> { 1135 let Inst{7-0} = ? ; 1136 let AsmMatchConverter = "cvtVOPC64NoDstDPP"; 1137} 1138 1139class VOPC64_DPP8_Base<bits<10> op, string OpName, VOPProfile P> 1140 : VOP3_DPP8_Base<OpName, P>, VOP3_DPPe_Common<op, P> { 1141 Instruction Opcode = !cast<Instruction>(NAME); 1142 1143 bits<8> src0; 1144 bits<24> dpp8; 1145 bits<9> fi; 1146 1147 let Inst{40-32} = fi; 1148 let Inst{71-64} = !if(P.HasSrc0, src0{7-0}, 0); 1149 let Inst{95-72} = dpp8{23-0}; 1150} 1151 1152class VOPC64_DPP8<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName> 1153 : VOPC64_DPP8_Base<op, opName, ps.Pfl> { 1154 // Note ps is the non-dpp pseudo 1155 let hasSideEffects = ps.hasSideEffects; 1156 let Defs = ps.Defs; 1157 let SchedRW = ps.SchedRW; 1158 let Uses = ps.Uses; 1159 let OtherPredicates = ps.OtherPredicates; 1160} 1161 1162class VOPC64_DPP8_Dst<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName> 1163 : VOPC64_DPP8<op, ps, opName> { 1164 bits<8> sdst; 1165 let Inst{7-0} = sdst; 1166 let Constraints = "$old = $sdst"; 1167} 1168 1169class VOPC64_DPP8_NoDst<bits<10> op, VOP_Pseudo ps, string opName = ps.OpName> 1170 : VOPC64_DPP8<op, ps, opName> { 1171 let Inst{7-0} = ? ; 1172 let AsmMatchConverter = "cvtVOPC64NoDstDPP8"; 1173 let Constraints = ""; 1174} 1175 1176//===----------------------------------------------------------------------===// 1177// Target-specific instruction encodings. 1178//===----------------------------------------------------------------------===// 1179 1180//===----------------------------------------------------------------------===// 1181// GFX11. 1182//===----------------------------------------------------------------------===// 1183 1184let AssemblerPredicate = isGFX11Only in { 1185 multiclass VOPC_Real_gfx11<bits<9> op> { 1186 defvar ps32 = !cast<VOPC_Pseudo>(NAME#"_e32"); 1187 defvar ps64 = !cast<VOP3_Pseudo>(NAME#"_e64"); 1188 let DecoderNamespace = "GFX11" in { 1189 def _e32_gfx11 : VOPC_Real<ps32, SIEncodingFamily.GFX11>, 1190 VOPCe<op{7-0}>; 1191 def _e64_gfx11 : VOP3_Real<ps64, SIEncodingFamily.GFX11>, 1192 VOP3a_gfx11<{0, op}, ps64.Pfl> { 1193 // Encoding used for VOPC instructions encoded as VOP3 differs from 1194 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1195 bits<8> sdst; 1196 let Inst{7-0} = sdst; 1197 } 1198 } // End DecoderNamespace = "GFX11" 1199 1200 defm : VOPCInstAliases<NAME, "gfx11">; 1201 1202 foreach _ = BoolToList<ps32.Pfl.HasExtDPP>.ret in { 1203 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_e32" #"_dpp"); 1204 defvar AsmDPP = ps32.Pfl.AsmDPP16; 1205 let DecoderNamespace = "DPPGFX11" in { 1206 def _e32_dpp_gfx11 : VOPC_DPP16_SIMC<op{7-0}, psDPP, 1207 SIEncodingFamily.GFX11>; 1208 def _e32_dpp_w32_gfx11 : VOPC_DPP16<op{7-0}, psDPP> { 1209 let AsmString = psDPP.OpName # " vcc_lo, " # AsmDPP; 1210 let isAsmParserOnly = 1; 1211 let WaveSizePredicate = isWave32; 1212 } 1213 def _e32_dpp_w64_gfx11 : VOPC_DPP16<op{7-0}, psDPP> { 1214 let AsmString = psDPP.OpName # " vcc, " # AsmDPP; 1215 let isAsmParserOnly = 1; 1216 let WaveSizePredicate = isWave64; 1217 } 1218 } 1219 defvar AsmDPP8 = ps32.Pfl.AsmDPP8; 1220 let DecoderNamespace = "DPP8GFX11" in { 1221 def _e32_dpp8_gfx11 : VOPC_DPP8<op{7-0}, ps32>; 1222 def _e32_dpp8_w32_gfx11 : VOPC_DPP8<op{7-0}, ps32> { 1223 let AsmString = ps32.OpName # " vcc_lo, " # AsmDPP8; 1224 let isAsmParserOnly = 1; 1225 let WaveSizePredicate = isWave32; 1226 } 1227 def _e32_dpp8_w64_gfx11 : VOPC_DPP8<op{7-0}, ps32> { 1228 let AsmString = ps32.OpName # " vcc, " # AsmDPP8; 1229 let isAsmParserOnly = 1; 1230 let WaveSizePredicate = isWave64; 1231 } 1232 } 1233 } 1234 foreach _ = BoolToList<ps64.Pfl.HasExtVOP3DPP>.ret in { 1235 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_e64" #"_dpp"); 1236 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16; 1237 let DecoderNamespace = "DPPGFX11" in { 1238 def _e64_dpp_gfx11 : VOPC64_DPP16_Dst<{0, op}, psDPP>, 1239 SIMCInstr<psDPP.PseudoInstr, SIEncodingFamily.GFX11>; 1240 def _e64_dpp_w32_gfx11 : VOPC64_DPP16_Dst<{0, op}, psDPP> { 1241 let AsmString = psDPP.OpName # " vcc_lo, " # AsmDPP; 1242 let isAsmParserOnly = 1; 1243 let WaveSizePredicate = isWave32; 1244 } 1245 def _e64_dpp_w64_gfx11 : VOPC64_DPP16_Dst<{0, op}, psDPP> { 1246 let AsmString = psDPP.OpName # " vcc, " # AsmDPP; 1247 let isAsmParserOnly = 1; 1248 let WaveSizePredicate = isWave64; 1249 } 1250 } 1251 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8; 1252 let DecoderNamespace = "DPP8GFX11" in { 1253 def _e64_dpp8_gfx11 : VOPC64_DPP8_Dst<{0, op}, ps64>; 1254 def _e64_dpp8_w32_gfx11 : VOPC64_DPP8_Dst<{0, op}, ps64> { 1255 let AsmString = ps32.OpName # " vcc_lo, " # AsmDPP8; 1256 let isAsmParserOnly = 1; 1257 let WaveSizePredicate = isWave32; 1258 } 1259 def _e64_dpp8_w64_gfx11 : VOPC64_DPP8_Dst<{0, op}, ps64> { 1260 let AsmString = ps32.OpName # " vcc, " # AsmDPP8; 1261 let isAsmParserOnly = 1; 1262 let WaveSizePredicate = isWave64; 1263 } 1264 } 1265 } 1266 1267 } 1268 1269 multiclass VOPC_Real_with_name_gfx11<bits<9> op, string OpName, 1270 string asm_name> { 1271 defvar ps32 = !cast<VOPC_Pseudo>(OpName#"_e32"); 1272 defvar ps64 = !cast<VOP3_Pseudo>(OpName#"_e64"); 1273 let DecoderNamespace = "GFX11" in { 1274 def _e32_gfx11 : 1275 // 32 and 64 bit forms of the instruction have _e32 and _e64 1276 // respectively appended to their assembly mnemonic. 1277 // _e64 is printed as part of the VOPDstS64orS32 operand, whereas 1278 // the destination-less 32bit forms add it to the asmString here. 1279 VOPC_Real<ps32, SIEncodingFamily.GFX11, asm_name#"_e32">, 1280 VOPCe<op{7-0}>, 1281 MnemonicAlias<ps32.Mnemonic, asm_name>, Requires<[isGFX11Plus]>; 1282 def _e64_gfx11 : 1283 VOP3_Real<ps64, SIEncodingFamily.GFX11, asm_name>, 1284 VOP3a_gfx11<{0, op}, ps64.Pfl>, 1285 MnemonicAlias<ps64.Mnemonic, asm_name>, Requires<[isGFX11Plus]> { 1286 // Encoding used for VOPC instructions encoded as VOP3 differs from 1287 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1288 bits<8> sdst; 1289 let Inst{7-0} = sdst; 1290 } 1291 } // End DecoderNamespace = "GFX11" 1292 1293 defm : VOPCInstAliases<OpName, "gfx11", NAME>; 1294 1295 foreach _ = BoolToList<ps32.Pfl.HasExtDPP>.ret in { 1296 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName #"_e32" #"_dpp"); 1297 defvar AsmDPP = ps32.Pfl.AsmDPP16; 1298 let DecoderNamespace = "DPPGFX11" in { 1299 def _e32_dpp_gfx11 : VOPC_DPP16_SIMC<op{7-0}, psDPP, 1300 SIEncodingFamily.GFX11, asm_name>; 1301 def _e32_dpp_w32_gfx11 1302 : VOPC_DPP16<op{7-0}, psDPP, asm_name> { 1303 let AsmString = asm_name # " vcc_lo, " # AsmDPP; 1304 let isAsmParserOnly = 1; 1305 let WaveSizePredicate = isWave32; 1306 } 1307 def _e32_dpp_w64_gfx11 1308 : VOPC_DPP16<op{7-0}, psDPP, asm_name> { 1309 let AsmString = asm_name # " vcc, " # AsmDPP; 1310 let isAsmParserOnly = 1; 1311 let WaveSizePredicate = isWave64; 1312 } 1313 } 1314 defvar AsmDPP8 = ps32.Pfl.AsmDPP8; 1315 let DecoderNamespace = "DPP8GFX11" in { 1316 def _e32_dpp8_gfx11 : VOPC_DPP8<op{7-0}, ps32, asm_name>; 1317 def _e32_dpp8_w32_gfx11 1318 : VOPC_DPP8<op{7-0}, ps32, asm_name> { 1319 let AsmString = asm_name # " vcc_lo, " # AsmDPP8; 1320 let isAsmParserOnly = 1; 1321 let WaveSizePredicate = isWave32; 1322 } 1323 def _e32_dpp8_w64_gfx11 1324 : VOPC_DPP8<op{7-0}, ps32, asm_name> { 1325 let AsmString = asm_name # " vcc, " # AsmDPP8; 1326 let isAsmParserOnly = 1; 1327 let WaveSizePredicate = isWave64; 1328 } 1329 } 1330 } 1331 1332 foreach _ = BoolToList<ps64.Pfl.HasExtVOP3DPP>.ret in { 1333 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName #"_e64" #"_dpp"); 1334 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16; 1335 let DecoderNamespace = "DPPGFX11" in { 1336 def _e64_dpp_gfx11 : VOPC64_DPP16_Dst<{0, op}, psDPP, asm_name>, 1337 SIMCInstr<psDPP.PseudoInstr, SIEncodingFamily.GFX11>; 1338 def _e64_dpp_w32_gfx11 1339 : VOPC64_DPP16_Dst<{0, op}, psDPP, asm_name> { 1340 let AsmString = asm_name # " vcc_lo, " # AsmDPP; 1341 let isAsmParserOnly = 1; 1342 let WaveSizePredicate = isWave32; 1343 } 1344 def _e64_dpp_w64_gfx11 1345 : VOPC64_DPP16_Dst<{0, op}, psDPP, asm_name> { 1346 let AsmString = asm_name # " vcc, " # AsmDPP; 1347 let isAsmParserOnly = 1; 1348 let WaveSizePredicate = isWave64; 1349 } 1350 } 1351 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8; 1352 let DecoderNamespace = "DPP8GFX11" in { 1353 def _e64_dpp8_gfx11 : VOPC64_DPP8_Dst<{0, op}, ps64, asm_name>; 1354 def _e64_dpp8_w32_gfx11 1355 : VOPC64_DPP8_Dst<{0, op}, ps64, asm_name> { 1356 let AsmString = asm_name # " vcc_lo, " # AsmDPP8; 1357 let isAsmParserOnly = 1; 1358 let WaveSizePredicate = isWave32; 1359 } 1360 def _e64_dpp8_w64_gfx11 1361 : VOPC64_DPP8_Dst<{0, op}, ps64, asm_name> { 1362 let AsmString = asm_name # " vcc, " # AsmDPP8; 1363 let isAsmParserOnly = 1; 1364 let WaveSizePredicate = isWave64; 1365 } 1366 } 1367 } 1368 1369 } 1370 1371 multiclass VOPCX_Real_gfx11<bits<9> op> { 1372 defvar ps32 = !cast<VOPC_Pseudo>(NAME#"_nosdst_e32"); 1373 defvar ps64 = !cast<VOP3_Pseudo>(NAME#"_nosdst_e64"); 1374 let DecoderNamespace = "GFX11" in { 1375 def _e32_gfx11 : 1376 VOPC_Real<ps32, SIEncodingFamily.GFX11>, 1377 VOPCe<op{7-0}> { 1378 let AsmString = !subst("_nosdst", "", ps32.PseudoInstr) 1379 # " " # ps32.AsmOperands; 1380 } 1381 def _e64_gfx11 : 1382 VOP3_Real<ps64, SIEncodingFamily.GFX11>, 1383 VOP3a_gfx11<{0, op}, ps64.Pfl> { 1384 let Inst{7-0} = ?; // sdst 1385 let AsmString = !subst("_nosdst", "", ps64.Mnemonic) 1386 # "{_e64} " # ps64.AsmOperands; 1387 } 1388 } // End DecoderNamespace = "GFX11" 1389 1390 defm : VOPCXInstAliases<NAME, "gfx11">; 1391 1392 foreach _ = BoolToList<ps32.Pfl.HasExtDPP>.ret in { 1393 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_nosdst_e32" #"_dpp"); 1394 defvar AsmDPP = ps32.Pfl.AsmDPP16; 1395 let DecoderNamespace = "DPPGFX11" in { 1396 def _e32_dpp_gfx11 1397 : VOPC_DPP16_SIMC<op{7-0}, psDPP, SIEncodingFamily.GFX11> { 1398 let AsmString = !subst("_nosdst", "", psDPP.OpName) # " " # AsmDPP; 1399 } 1400 } 1401 defvar AsmDPP8 = ps32.Pfl.AsmDPP8; 1402 let DecoderNamespace = "DPP8GFX11" in { 1403 def _e32_dpp8_gfx11 : VOPC_DPP8<op{7-0}, ps32> { 1404 let AsmString = !subst("_nosdst", "", ps32.OpName) # " " # AsmDPP8; 1405 } 1406 } 1407 } 1408 1409 foreach _ = BoolToList<ps64.Pfl.HasExtVOP3DPP>.ret in { 1410 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_nosdst_e64" #"_dpp"); 1411 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16; 1412 let DecoderNamespace = "DPPGFX11" in { 1413 def _e64_dpp_gfx11 1414 : VOPC64_DPP16_NoDst<{0, op}, psDPP>, 1415 SIMCInstr<psDPP.PseudoInstr, SIEncodingFamily.GFX11> { 1416 let AsmString = !subst("_nosdst", "", psDPP.OpName) 1417 # "{_e64_dpp} " # AsmDPP; 1418 } 1419 } 1420 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8; 1421 let DecoderNamespace = "DPP8GFX11" in { 1422 def _e64_dpp8_gfx11 : VOPC64_DPP8_NoDst<{0, op}, ps64> { 1423 let AsmString = !subst("_nosdst", "", ps64.OpName) 1424 # "{_e64_dpp} " # AsmDPP8; 1425 } 1426 } 1427 } 1428 } 1429 1430 multiclass VOPCX_Real_with_name_gfx11<bits<9> op, string OpName, 1431 string asm_name> { 1432 defvar ps32 = !cast<VOPC_Pseudo>(OpName#"_nosdst_e32"); 1433 defvar ps64 = !cast<VOP3_Pseudo>(OpName#"_nosdst_e64"); 1434 let DecoderNamespace = "GFX11" in { 1435 def _e32_gfx11 1436 : VOPC_Real<ps32, SIEncodingFamily.GFX11, asm_name>, 1437 MnemonicAlias<!subst("_nosdst", "", ps32.Mnemonic), asm_name>, 1438 Requires<[isGFX11Plus]>, 1439 VOPCe<op{7-0}> { 1440 let AsmString = asm_name # "{_e32} " # ps32.AsmOperands; 1441 } 1442 def _e64_gfx11 1443 : VOP3_Real<ps64, SIEncodingFamily.GFX11, asm_name>, 1444 MnemonicAlias<!subst("_nosdst", "", ps64.Mnemonic), asm_name>, 1445 Requires<[isGFX11Plus]>, 1446 VOP3a_gfx11<{0, op}, ps64.Pfl> { 1447 let Inst{7-0} = ? ; // sdst 1448 let AsmString = asm_name # "{_e64} " # ps64.AsmOperands; 1449 } 1450 } // End DecoderNamespace = "GFX11" 1451 1452 defm : VOPCXInstAliases<OpName, "gfx11", NAME>; 1453 1454 foreach _ = BoolToList<ps32.Pfl.HasExtDPP>.ret in { 1455 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName#"_nosdst_e32"#"_dpp"); 1456 let DecoderNamespace = "DPPGFX11" in { 1457 def _e32_dpp_gfx11 : VOPC_DPP16_SIMC<op{7-0}, psDPP, 1458 SIEncodingFamily.GFX11, asm_name>; 1459 } 1460 let DecoderNamespace = "DPP8GFX11" in { 1461 def _e32_dpp8_gfx11 : VOPC_DPP8<op{7-0}, ps32, asm_name>; 1462 } 1463 } 1464 foreach _ = BoolToList<ps64.Pfl.HasExtVOP3DPP>.ret in { 1465 defvar psDPP = !cast<VOP_DPP_Pseudo>(OpName#"_nosdst_e64"#"_dpp"); 1466 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16; 1467 let DecoderNamespace = "DPPGFX11" in { 1468 def _e64_dpp_gfx11 1469 : VOPC64_DPP16_NoDst<{0, op}, psDPP, asm_name>, 1470 SIMCInstr<psDPP.PseudoInstr, SIEncodingFamily.GFX11> { 1471 let AsmString = asm_name # "{_e64_dpp} " # AsmDPP; 1472 } 1473 } 1474 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8; 1475 let DecoderNamespace = "DPP8GFX11" in { 1476 def _e64_dpp8_gfx11 : VOPC64_DPP8_NoDst<{0, op}, ps64, asm_name> { 1477 let AsmString = asm_name # "{_e64_dpp} " # AsmDPP8; 1478 } 1479 } 1480 } 1481 1482 } 1483} // End AssemblerPredicate = isGFX11Only 1484 1485defm V_CMP_F_F16 : VOPC_Real_gfx11<0x000>; 1486defm V_CMP_LT_F16 : VOPC_Real_gfx11<0x001>; 1487defm V_CMP_EQ_F16 : VOPC_Real_gfx11<0x002>; 1488defm V_CMP_LE_F16 : VOPC_Real_gfx11<0x003>; 1489defm V_CMP_GT_F16 : VOPC_Real_gfx11<0x004>; 1490defm V_CMP_LG_F16 : VOPC_Real_gfx11<0x005>; 1491defm V_CMP_GE_F16 : VOPC_Real_gfx11<0x006>; 1492defm V_CMP_O_F16 : VOPC_Real_gfx11<0x007>; 1493defm V_CMP_U_F16 : VOPC_Real_gfx11<0x008>; 1494defm V_CMP_NGE_F16 : VOPC_Real_gfx11<0x009>; 1495defm V_CMP_NLG_F16 : VOPC_Real_gfx11<0x00a>; 1496defm V_CMP_NGT_F16 : VOPC_Real_gfx11<0x00b>; 1497defm V_CMP_NLE_F16 : VOPC_Real_gfx11<0x00c>; 1498defm V_CMP_NEQ_F16 : VOPC_Real_gfx11<0x00d>; 1499defm V_CMP_NLT_F16 : VOPC_Real_gfx11<0x00e>; 1500defm V_CMP_T_F16 : VOPC_Real_with_name_gfx11<0x00f, "V_CMP_TRU_F16", "v_cmp_t_f16">; 1501defm V_CMP_F_F32 : VOPC_Real_gfx11<0x010>; 1502defm V_CMP_LT_F32 : VOPC_Real_gfx11<0x011>; 1503defm V_CMP_EQ_F32 : VOPC_Real_gfx11<0x012>; 1504defm V_CMP_LE_F32 : VOPC_Real_gfx11<0x013>; 1505defm V_CMP_GT_F32 : VOPC_Real_gfx11<0x014>; 1506defm V_CMP_LG_F32 : VOPC_Real_gfx11<0x015>; 1507defm V_CMP_GE_F32 : VOPC_Real_gfx11<0x016>; 1508defm V_CMP_O_F32 : VOPC_Real_gfx11<0x017>; 1509defm V_CMP_U_F32 : VOPC_Real_gfx11<0x018>; 1510defm V_CMP_NGE_F32 : VOPC_Real_gfx11<0x019>; 1511defm V_CMP_NLG_F32 : VOPC_Real_gfx11<0x01a>; 1512defm V_CMP_NGT_F32 : VOPC_Real_gfx11<0x01b>; 1513defm V_CMP_NLE_F32 : VOPC_Real_gfx11<0x01c>; 1514defm V_CMP_NEQ_F32 : VOPC_Real_gfx11<0x01d>; 1515defm V_CMP_NLT_F32 : VOPC_Real_gfx11<0x01e>; 1516defm V_CMP_T_F32 : VOPC_Real_with_name_gfx11<0x01f, "V_CMP_TRU_F32", "v_cmp_t_f32">; 1517defm V_CMP_T_F64 : VOPC_Real_with_name_gfx11<0x02f, "V_CMP_TRU_F64", "v_cmp_t_f64">; 1518defm V_CMP_LT_I16 : VOPC_Real_gfx11<0x031>; 1519defm V_CMP_EQ_I16 : VOPC_Real_gfx11<0x032>; 1520defm V_CMP_LE_I16 : VOPC_Real_gfx11<0x033>; 1521defm V_CMP_GT_I16 : VOPC_Real_gfx11<0x034>; 1522defm V_CMP_NE_I16 : VOPC_Real_gfx11<0x035>; 1523defm V_CMP_GE_I16 : VOPC_Real_gfx11<0x036>; 1524defm V_CMP_LT_U16 : VOPC_Real_gfx11<0x039>; 1525defm V_CMP_EQ_U16 : VOPC_Real_gfx11<0x03a>; 1526defm V_CMP_LE_U16 : VOPC_Real_gfx11<0x03b>; 1527defm V_CMP_GT_U16 : VOPC_Real_gfx11<0x03c>; 1528defm V_CMP_NE_U16 : VOPC_Real_gfx11<0x03d>; 1529defm V_CMP_GE_U16 : VOPC_Real_gfx11<0x03e>; 1530defm V_CMP_F_I32 : VOPC_Real_gfx11<0x040>; 1531defm V_CMP_LT_I32 : VOPC_Real_gfx11<0x041>; 1532defm V_CMP_EQ_I32 : VOPC_Real_gfx11<0x042>; 1533defm V_CMP_LE_I32 : VOPC_Real_gfx11<0x043>; 1534defm V_CMP_GT_I32 : VOPC_Real_gfx11<0x044>; 1535defm V_CMP_NE_I32 : VOPC_Real_gfx11<0x045>; 1536defm V_CMP_GE_I32 : VOPC_Real_gfx11<0x046>; 1537defm V_CMP_T_I32 : VOPC_Real_gfx11<0x047>; 1538defm V_CMP_F_U32 : VOPC_Real_gfx11<0x048>; 1539defm V_CMP_LT_U32 : VOPC_Real_gfx11<0x049>; 1540defm V_CMP_EQ_U32 : VOPC_Real_gfx11<0x04a>; 1541defm V_CMP_LE_U32 : VOPC_Real_gfx11<0x04b>; 1542defm V_CMP_GT_U32 : VOPC_Real_gfx11<0x04c>; 1543defm V_CMP_NE_U32 : VOPC_Real_gfx11<0x04d>; 1544defm V_CMP_GE_U32 : VOPC_Real_gfx11<0x04e>; 1545defm V_CMP_T_U32 : VOPC_Real_gfx11<0x04f>; 1546 1547defm V_CMP_F_I64 : VOPC_Real_gfx11<0x050>; 1548defm V_CMP_LT_I64 : VOPC_Real_gfx11<0x051>; 1549defm V_CMP_EQ_I64 : VOPC_Real_gfx11<0x052>; 1550defm V_CMP_LE_I64 : VOPC_Real_gfx11<0x053>; 1551defm V_CMP_GT_I64 : VOPC_Real_gfx11<0x054>; 1552defm V_CMP_NE_I64 : VOPC_Real_gfx11<0x055>; 1553defm V_CMP_GE_I64 : VOPC_Real_gfx11<0x056>; 1554defm V_CMP_T_I64 : VOPC_Real_gfx11<0x057>; 1555defm V_CMP_F_U64 : VOPC_Real_gfx11<0x058>; 1556defm V_CMP_LT_U64 : VOPC_Real_gfx11<0x059>; 1557defm V_CMP_EQ_U64 : VOPC_Real_gfx11<0x05a>; 1558defm V_CMP_LE_U64 : VOPC_Real_gfx11<0x05b>; 1559defm V_CMP_GT_U64 : VOPC_Real_gfx11<0x05c>; 1560defm V_CMP_NE_U64 : VOPC_Real_gfx11<0x05d>; 1561defm V_CMP_GE_U64 : VOPC_Real_gfx11<0x05e>; 1562defm V_CMP_T_U64 : VOPC_Real_gfx11<0x05f>; 1563 1564defm V_CMP_CLASS_F16 : VOPC_Real_gfx11<0x07d>; 1565defm V_CMP_CLASS_F32 : VOPC_Real_gfx11<0x07e>; 1566defm V_CMP_CLASS_F64 : VOPC_Real_gfx11<0x07f>; 1567 1568defm V_CMPX_F_F16 : VOPCX_Real_gfx11<0x080>; 1569defm V_CMPX_LT_F16 : VOPCX_Real_gfx11<0x081>; 1570defm V_CMPX_EQ_F16 : VOPCX_Real_gfx11<0x082>; 1571defm V_CMPX_LE_F16 : VOPCX_Real_gfx11<0x083>; 1572defm V_CMPX_GT_F16 : VOPCX_Real_gfx11<0x084>; 1573defm V_CMPX_LG_F16 : VOPCX_Real_gfx11<0x085>; 1574defm V_CMPX_GE_F16 : VOPCX_Real_gfx11<0x086>; 1575defm V_CMPX_O_F16 : VOPCX_Real_gfx11<0x087>; 1576defm V_CMPX_U_F16 : VOPCX_Real_gfx11<0x088>; 1577defm V_CMPX_NGE_F16 : VOPCX_Real_gfx11<0x089>; 1578defm V_CMPX_NLG_F16 : VOPCX_Real_gfx11<0x08a>; 1579defm V_CMPX_NGT_F16 : VOPCX_Real_gfx11<0x08b>; 1580defm V_CMPX_NLE_F16 : VOPCX_Real_gfx11<0x08c>; 1581defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx11<0x08d>; 1582defm V_CMPX_NLT_F16 : VOPCX_Real_gfx11<0x08e>; 1583defm V_CMPX_T_F16 : VOPCX_Real_with_name_gfx11<0x08f, "V_CMPX_TRU_F16", "v_cmpx_t_f16">; 1584defm V_CMPX_F_F32 : VOPCX_Real_gfx11<0x090>; 1585defm V_CMPX_LT_F32 : VOPCX_Real_gfx11<0x091>; 1586defm V_CMPX_EQ_F32 : VOPCX_Real_gfx11<0x092>; 1587defm V_CMPX_LE_F32 : VOPCX_Real_gfx11<0x093>; 1588defm V_CMPX_GT_F32 : VOPCX_Real_gfx11<0x094>; 1589defm V_CMPX_LG_F32 : VOPCX_Real_gfx11<0x095>; 1590defm V_CMPX_GE_F32 : VOPCX_Real_gfx11<0x096>; 1591defm V_CMPX_O_F32 : VOPCX_Real_gfx11<0x097>; 1592defm V_CMPX_U_F32 : VOPCX_Real_gfx11<0x098>; 1593defm V_CMPX_NGE_F32 : VOPCX_Real_gfx11<0x099>; 1594defm V_CMPX_NLG_F32 : VOPCX_Real_gfx11<0x09a>; 1595defm V_CMPX_NGT_F32 : VOPCX_Real_gfx11<0x09b>; 1596defm V_CMPX_NLE_F32 : VOPCX_Real_gfx11<0x09c>; 1597defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx11<0x09d>; 1598defm V_CMPX_NLT_F32 : VOPCX_Real_gfx11<0x09e>; 1599defm V_CMPX_T_F32 : VOPCX_Real_with_name_gfx11<0x09f, "V_CMPX_TRU_F32", "v_cmpx_t_f32">; 1600 1601defm V_CMPX_F_F64 : VOPCX_Real_gfx11<0x0a0>; 1602defm V_CMPX_LT_F64 : VOPCX_Real_gfx11<0x0a1>; 1603defm V_CMPX_EQ_F64 : VOPCX_Real_gfx11<0x0a2>; 1604defm V_CMPX_LE_F64 : VOPCX_Real_gfx11<0x0a3>; 1605defm V_CMPX_GT_F64 : VOPCX_Real_gfx11<0x0a4>; 1606defm V_CMPX_LG_F64 : VOPCX_Real_gfx11<0x0a5>; 1607defm V_CMPX_GE_F64 : VOPCX_Real_gfx11<0x0a6>; 1608defm V_CMPX_O_F64 : VOPCX_Real_gfx11<0x0a7>; 1609defm V_CMPX_U_F64 : VOPCX_Real_gfx11<0x0a8>; 1610defm V_CMPX_NGE_F64 : VOPCX_Real_gfx11<0x0a9>; 1611defm V_CMPX_NLG_F64 : VOPCX_Real_gfx11<0x0aa>; 1612defm V_CMPX_NGT_F64 : VOPCX_Real_gfx11<0x0ab>; 1613defm V_CMPX_NLE_F64 : VOPCX_Real_gfx11<0x0ac>; 1614defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx11<0x0ad>; 1615defm V_CMPX_NLT_F64 : VOPCX_Real_gfx11<0x0ae>; 1616defm V_CMPX_T_F64 : VOPCX_Real_with_name_gfx11<0x0af, "V_CMPX_TRU_F64", "v_cmpx_t_f64">; 1617 1618defm V_CMPX_LT_I16 : VOPCX_Real_gfx11<0x0b1>; 1619defm V_CMPX_EQ_I16 : VOPCX_Real_gfx11<0x0b2>; 1620defm V_CMPX_LE_I16 : VOPCX_Real_gfx11<0x0b3>; 1621defm V_CMPX_GT_I16 : VOPCX_Real_gfx11<0x0b4>; 1622defm V_CMPX_NE_I16 : VOPCX_Real_gfx11<0x0b5>; 1623defm V_CMPX_GE_I16 : VOPCX_Real_gfx11<0x0b6>; 1624defm V_CMPX_LT_U16 : VOPCX_Real_gfx11<0x0b9>; 1625defm V_CMPX_EQ_U16 : VOPCX_Real_gfx11<0x0ba>; 1626defm V_CMPX_LE_U16 : VOPCX_Real_gfx11<0x0bb>; 1627defm V_CMPX_GT_U16 : VOPCX_Real_gfx11<0x0bc>; 1628defm V_CMPX_NE_U16 : VOPCX_Real_gfx11<0x0bd>; 1629defm V_CMPX_GE_U16 : VOPCX_Real_gfx11<0x0be>; 1630defm V_CMPX_F_I32 : VOPCX_Real_gfx11<0x0c0>; 1631defm V_CMPX_LT_I32 : VOPCX_Real_gfx11<0x0c1>; 1632defm V_CMPX_EQ_I32 : VOPCX_Real_gfx11<0x0c2>; 1633defm V_CMPX_LE_I32 : VOPCX_Real_gfx11<0x0c3>; 1634defm V_CMPX_GT_I32 : VOPCX_Real_gfx11<0x0c4>; 1635defm V_CMPX_NE_I32 : VOPCX_Real_gfx11<0x0c5>; 1636defm V_CMPX_GE_I32 : VOPCX_Real_gfx11<0x0c6>; 1637defm V_CMPX_T_I32 : VOPCX_Real_gfx11<0x0c7>; 1638defm V_CMPX_F_U32 : VOPCX_Real_gfx11<0x0c8>; 1639defm V_CMPX_LT_U32 : VOPCX_Real_gfx11<0x0c9>; 1640defm V_CMPX_EQ_U32 : VOPCX_Real_gfx11<0x0ca>; 1641defm V_CMPX_LE_U32 : VOPCX_Real_gfx11<0x0cb>; 1642defm V_CMPX_GT_U32 : VOPCX_Real_gfx11<0x0cc>; 1643defm V_CMPX_NE_U32 : VOPCX_Real_gfx11<0x0cd>; 1644defm V_CMPX_GE_U32 : VOPCX_Real_gfx11<0x0ce>; 1645defm V_CMPX_T_U32 : VOPCX_Real_gfx11<0x0cf>; 1646 1647defm V_CMPX_F_I64 : VOPCX_Real_gfx11<0x0d0>; 1648defm V_CMPX_LT_I64 : VOPCX_Real_gfx11<0x0d1>; 1649defm V_CMPX_EQ_I64 : VOPCX_Real_gfx11<0x0d2>; 1650defm V_CMPX_LE_I64 : VOPCX_Real_gfx11<0x0d3>; 1651defm V_CMPX_GT_I64 : VOPCX_Real_gfx11<0x0d4>; 1652defm V_CMPX_NE_I64 : VOPCX_Real_gfx11<0x0d5>; 1653defm V_CMPX_GE_I64 : VOPCX_Real_gfx11<0x0d6>; 1654defm V_CMPX_T_I64 : VOPCX_Real_gfx11<0x0d7>; 1655defm V_CMPX_F_U64 : VOPCX_Real_gfx11<0x0d8>; 1656defm V_CMPX_LT_U64 : VOPCX_Real_gfx11<0x0d9>; 1657defm V_CMPX_EQ_U64 : VOPCX_Real_gfx11<0x0da>; 1658defm V_CMPX_LE_U64 : VOPCX_Real_gfx11<0x0db>; 1659defm V_CMPX_GT_U64 : VOPCX_Real_gfx11<0x0dc>; 1660defm V_CMPX_NE_U64 : VOPCX_Real_gfx11<0x0dd>; 1661defm V_CMPX_GE_U64 : VOPCX_Real_gfx11<0x0de>; 1662defm V_CMPX_T_U64 : VOPCX_Real_gfx11<0x0df>; 1663defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx11<0x0fd>; 1664defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx11<0x0fe>; 1665defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx11<0x0ff>; 1666 1667//===----------------------------------------------------------------------===// 1668// GFX10. 1669//===----------------------------------------------------------------------===// 1670 1671let AssemblerPredicate = isGFX10Only in { 1672 multiclass VOPC_Real_gfx10<bits<9> op> { 1673 let DecoderNamespace = "GFX10" in { 1674 def _e32_gfx10 : 1675 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>, 1676 VOPCe<op{7-0}>; 1677 def _e64_gfx10 : 1678 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>, 1679 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1680 // Encoding used for VOPC instructions encoded as VOP3 differs from 1681 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1682 bits<8> sdst; 1683 let Inst{7-0} = sdst; 1684 } 1685 } // End DecoderNamespace = "GFX10" 1686 1687 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 1688 def _sdwa_gfx10 : 1689 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1690 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1691 1692 defm : VOPCInstAliases<NAME, "gfx10">; 1693 } 1694 1695 multiclass VOPCX_Real_gfx10<bits<9> op> { 1696 let DecoderNamespace = "GFX10" in { 1697 def _e32_gfx10 : 1698 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>, 1699 VOPCe<op{7-0}> { 1700 let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr) 1701 # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands; 1702 } 1703 1704 def _e64_gfx10 : 1705 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>, 1706 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> { 1707 let Inst{7-0} = ?; // sdst 1708 let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic) 1709 # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands; 1710 } 1711 } // End DecoderNamespace = "GFX10" 1712 1713 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9>.ret in 1714 def _sdwa_gfx10 : 1715 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>, 1716 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> { 1717 let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic) 1718 # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9; 1719 } 1720 1721 defm : VOPCXInstAliases<NAME, "gfx10">; 1722 } 1723} // End AssemblerPredicate = isGFX10Only 1724 1725defm V_CMP_LT_I16 : VOPC_Real_gfx10<0x089>; 1726defm V_CMP_EQ_I16 : VOPC_Real_gfx10<0x08a>; 1727defm V_CMP_LE_I16 : VOPC_Real_gfx10<0x08b>; 1728defm V_CMP_GT_I16 : VOPC_Real_gfx10<0x08c>; 1729defm V_CMP_NE_I16 : VOPC_Real_gfx10<0x08d>; 1730defm V_CMP_GE_I16 : VOPC_Real_gfx10<0x08e>; 1731defm V_CMP_CLASS_F16 : VOPC_Real_gfx10<0x08f>; 1732defm V_CMPX_LT_I16 : VOPCX_Real_gfx10<0x099>; 1733defm V_CMPX_EQ_I16 : VOPCX_Real_gfx10<0x09a>; 1734defm V_CMPX_LE_I16 : VOPCX_Real_gfx10<0x09b>; 1735defm V_CMPX_GT_I16 : VOPCX_Real_gfx10<0x09c>; 1736defm V_CMPX_NE_I16 : VOPCX_Real_gfx10<0x09d>; 1737defm V_CMPX_GE_I16 : VOPCX_Real_gfx10<0x09e>; 1738defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>; 1739defm V_CMP_LT_U16 : VOPC_Real_gfx10<0x0a9>; 1740defm V_CMP_EQ_U16 : VOPC_Real_gfx10<0x0aa>; 1741defm V_CMP_LE_U16 : VOPC_Real_gfx10<0x0ab>; 1742defm V_CMP_GT_U16 : VOPC_Real_gfx10<0x0ac>; 1743defm V_CMP_NE_U16 : VOPC_Real_gfx10<0x0ad>; 1744defm V_CMP_GE_U16 : VOPC_Real_gfx10<0x0ae>; 1745defm V_CMPX_LT_U16 : VOPCX_Real_gfx10<0x0b9>; 1746defm V_CMPX_EQ_U16 : VOPCX_Real_gfx10<0x0ba>; 1747defm V_CMPX_LE_U16 : VOPCX_Real_gfx10<0x0bb>; 1748defm V_CMPX_GT_U16 : VOPCX_Real_gfx10<0x0bc>; 1749defm V_CMPX_NE_U16 : VOPCX_Real_gfx10<0x0bd>; 1750defm V_CMPX_GE_U16 : VOPCX_Real_gfx10<0x0be>; 1751defm V_CMP_F_F16 : VOPC_Real_gfx10<0x0c8>; 1752defm V_CMP_LT_F16 : VOPC_Real_gfx10<0x0c9>; 1753defm V_CMP_EQ_F16 : VOPC_Real_gfx10<0x0ca>; 1754defm V_CMP_LE_F16 : VOPC_Real_gfx10<0x0cb>; 1755defm V_CMP_GT_F16 : VOPC_Real_gfx10<0x0cc>; 1756defm V_CMP_LG_F16 : VOPC_Real_gfx10<0x0cd>; 1757defm V_CMP_GE_F16 : VOPC_Real_gfx10<0x0ce>; 1758defm V_CMP_O_F16 : VOPC_Real_gfx10<0x0cf>; 1759defm V_CMPX_F_F16 : VOPCX_Real_gfx10<0x0d8>; 1760defm V_CMPX_LT_F16 : VOPCX_Real_gfx10<0x0d9>; 1761defm V_CMPX_EQ_F16 : VOPCX_Real_gfx10<0x0da>; 1762defm V_CMPX_LE_F16 : VOPCX_Real_gfx10<0x0db>; 1763defm V_CMPX_GT_F16 : VOPCX_Real_gfx10<0x0dc>; 1764defm V_CMPX_LG_F16 : VOPCX_Real_gfx10<0x0dd>; 1765defm V_CMPX_GE_F16 : VOPCX_Real_gfx10<0x0de>; 1766defm V_CMPX_O_F16 : VOPCX_Real_gfx10<0x0df>; 1767defm V_CMP_U_F16 : VOPC_Real_gfx10<0x0e8>; 1768defm V_CMP_NGE_F16 : VOPC_Real_gfx10<0x0e9>; 1769defm V_CMP_NLG_F16 : VOPC_Real_gfx10<0x0ea>; 1770defm V_CMP_NGT_F16 : VOPC_Real_gfx10<0x0eb>; 1771defm V_CMP_NLE_F16 : VOPC_Real_gfx10<0x0ec>; 1772defm V_CMP_NEQ_F16 : VOPC_Real_gfx10<0x0ed>; 1773defm V_CMP_NLT_F16 : VOPC_Real_gfx10<0x0ee>; 1774defm V_CMP_TRU_F16 : VOPC_Real_gfx10<0x0ef>; 1775defm V_CMPX_U_F16 : VOPCX_Real_gfx10<0x0f8>; 1776defm V_CMPX_NGE_F16 : VOPCX_Real_gfx10<0x0f9>; 1777defm V_CMPX_NLG_F16 : VOPCX_Real_gfx10<0x0fa>; 1778defm V_CMPX_NGT_F16 : VOPCX_Real_gfx10<0x0fb>; 1779defm V_CMPX_NLE_F16 : VOPCX_Real_gfx10<0x0fc>; 1780defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx10<0x0fd>; 1781defm V_CMPX_NLT_F16 : VOPCX_Real_gfx10<0x0fe>; 1782defm V_CMPX_TRU_F16 : VOPCX_Real_gfx10<0x0ff>; 1783 1784//===----------------------------------------------------------------------===// 1785// GFX6, GFX7, GFX10. 1786//===----------------------------------------------------------------------===// 1787 1788let AssemblerPredicate = isGFX6GFX7 in { 1789 multiclass VOPC_Real_gfx6_gfx7<bits<9> op> { 1790 let DecoderNamespace = "GFX6GFX7" in { 1791 def _e32_gfx6_gfx7 : 1792 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 1793 VOPCe<op{7-0}>; 1794 def _e64_gfx6_gfx7 : 1795 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 1796 VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1797 // Encoding used for VOPC instructions encoded as VOP3 differs from 1798 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1799 bits<8> sdst; 1800 let Inst{7-0} = sdst; 1801 } 1802 } // End DecoderNamespace = "GFX6GFX7" 1803 1804 defm : VOPCInstAliases<NAME, "gfx6_gfx7">; 1805 } 1806} // End AssemblerPredicate = isGFX6GFX7 1807 1808multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> : 1809 VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>; 1810 1811multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> : 1812 VOPC_Real_gfx6_gfx7<op>; 1813 1814multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> : 1815 VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>; 1816 1817multiclass VOPC_Real_gfx6_gfx7_gfx10_gfx11<bits<9> op> : 1818 VOPC_Real_gfx6_gfx7_gfx10<op>, VOPC_Real_gfx11<op>; 1819 1820multiclass VOPCX_Real_gfx6_gfx7_gfx10_gfx11<bits<9> op> : 1821 VOPCX_Real_gfx6_gfx7_gfx10<op>, VOPCX_Real_gfx11<op>; 1822 1823defm V_CMP_F_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x000>; 1824defm V_CMP_LT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x001>; 1825defm V_CMP_EQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x002>; 1826defm V_CMP_LE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x003>; 1827defm V_CMP_GT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x004>; 1828defm V_CMP_LG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x005>; 1829defm V_CMP_GE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x006>; 1830defm V_CMP_O_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x007>; 1831defm V_CMP_U_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x008>; 1832defm V_CMP_NGE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x009>; 1833defm V_CMP_NLG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00a>; 1834defm V_CMP_NGT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00b>; 1835defm V_CMP_NLE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00c>; 1836defm V_CMP_NEQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00d>; 1837defm V_CMP_NLT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00e>; 1838defm V_CMP_TRU_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00f>; 1839defm V_CMPX_F_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x010>; 1840defm V_CMPX_LT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x011>; 1841defm V_CMPX_EQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x012>; 1842defm V_CMPX_LE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x013>; 1843defm V_CMPX_GT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x014>; 1844defm V_CMPX_LG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x015>; 1845defm V_CMPX_GE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x016>; 1846defm V_CMPX_O_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x017>; 1847defm V_CMPX_U_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x018>; 1848defm V_CMPX_NGE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x019>; 1849defm V_CMPX_NLG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>; 1850defm V_CMPX_NGT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>; 1851defm V_CMPX_NLE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>; 1852defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>; 1853defm V_CMPX_NLT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>; 1854defm V_CMPX_TRU_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>; 1855defm V_CMP_F_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x020>; 1856defm V_CMP_LT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x021>; 1857defm V_CMP_EQ_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x022>; 1858defm V_CMP_LE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x023>; 1859defm V_CMP_GT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x024>; 1860defm V_CMP_LG_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x025>; 1861defm V_CMP_GE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x026>; 1862defm V_CMP_O_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x027>; 1863defm V_CMP_U_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x028>; 1864defm V_CMP_NGE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x029>; 1865defm V_CMP_NLG_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x02a>; 1866defm V_CMP_NGT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x02b>; 1867defm V_CMP_NLE_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x02c>; 1868defm V_CMP_NEQ_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x02d>; 1869defm V_CMP_NLT_F64 : VOPC_Real_gfx6_gfx7_gfx10_gfx11<0x02e>; 1870defm V_CMP_TRU_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02f>; 1871defm V_CMPX_F_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x030>; 1872defm V_CMPX_LT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x031>; 1873defm V_CMPX_EQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x032>; 1874defm V_CMPX_LE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x033>; 1875defm V_CMPX_GT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x034>; 1876defm V_CMPX_LG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x035>; 1877defm V_CMPX_GE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x036>; 1878defm V_CMPX_O_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x037>; 1879defm V_CMPX_U_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x038>; 1880defm V_CMPX_NGE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x039>; 1881defm V_CMPX_NLG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>; 1882defm V_CMPX_NGT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>; 1883defm V_CMPX_NLE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>; 1884defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>; 1885defm V_CMPX_NLT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>; 1886defm V_CMPX_TRU_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>; 1887defm V_CMPS_F_F32 : VOPC_Real_gfx6_gfx7<0x040>; 1888defm V_CMPS_LT_F32 : VOPC_Real_gfx6_gfx7<0x041>; 1889defm V_CMPS_EQ_F32 : VOPC_Real_gfx6_gfx7<0x042>; 1890defm V_CMPS_LE_F32 : VOPC_Real_gfx6_gfx7<0x043>; 1891defm V_CMPS_GT_F32 : VOPC_Real_gfx6_gfx7<0x044>; 1892defm V_CMPS_LG_F32 : VOPC_Real_gfx6_gfx7<0x045>; 1893defm V_CMPS_GE_F32 : VOPC_Real_gfx6_gfx7<0x046>; 1894defm V_CMPS_O_F32 : VOPC_Real_gfx6_gfx7<0x047>; 1895defm V_CMPS_U_F32 : VOPC_Real_gfx6_gfx7<0x048>; 1896defm V_CMPS_NGE_F32 : VOPC_Real_gfx6_gfx7<0x049>; 1897defm V_CMPS_NLG_F32 : VOPC_Real_gfx6_gfx7<0x04a>; 1898defm V_CMPS_NGT_F32 : VOPC_Real_gfx6_gfx7<0x04b>; 1899defm V_CMPS_NLE_F32 : VOPC_Real_gfx6_gfx7<0x04c>; 1900defm V_CMPS_NEQ_F32 : VOPC_Real_gfx6_gfx7<0x04d>; 1901defm V_CMPS_NLT_F32 : VOPC_Real_gfx6_gfx7<0x04e>; 1902defm V_CMPS_TRU_F32 : VOPC_Real_gfx6_gfx7<0x04f>; 1903defm V_CMPSX_F_F32 : VOPCX_Real_gfx6_gfx7<0x050>; 1904defm V_CMPSX_LT_F32 : VOPCX_Real_gfx6_gfx7<0x051>; 1905defm V_CMPSX_EQ_F32 : VOPCX_Real_gfx6_gfx7<0x052>; 1906defm V_CMPSX_LE_F32 : VOPCX_Real_gfx6_gfx7<0x053>; 1907defm V_CMPSX_GT_F32 : VOPCX_Real_gfx6_gfx7<0x054>; 1908defm V_CMPSX_LG_F32 : VOPCX_Real_gfx6_gfx7<0x055>; 1909defm V_CMPSX_GE_F32 : VOPCX_Real_gfx6_gfx7<0x056>; 1910defm V_CMPSX_O_F32 : VOPCX_Real_gfx6_gfx7<0x057>; 1911defm V_CMPSX_U_F32 : VOPCX_Real_gfx6_gfx7<0x058>; 1912defm V_CMPSX_NGE_F32 : VOPCX_Real_gfx6_gfx7<0x059>; 1913defm V_CMPSX_NLG_F32 : VOPCX_Real_gfx6_gfx7<0x05a>; 1914defm V_CMPSX_NGT_F32 : VOPCX_Real_gfx6_gfx7<0x05b>; 1915defm V_CMPSX_NLE_F32 : VOPCX_Real_gfx6_gfx7<0x05c>; 1916defm V_CMPSX_NEQ_F32 : VOPCX_Real_gfx6_gfx7<0x05d>; 1917defm V_CMPSX_NLT_F32 : VOPCX_Real_gfx6_gfx7<0x05e>; 1918defm V_CMPSX_TRU_F32 : VOPCX_Real_gfx6_gfx7<0x05f>; 1919defm V_CMPS_F_F64 : VOPC_Real_gfx6_gfx7<0x060>; 1920defm V_CMPS_LT_F64 : VOPC_Real_gfx6_gfx7<0x061>; 1921defm V_CMPS_EQ_F64 : VOPC_Real_gfx6_gfx7<0x062>; 1922defm V_CMPS_LE_F64 : VOPC_Real_gfx6_gfx7<0x063>; 1923defm V_CMPS_GT_F64 : VOPC_Real_gfx6_gfx7<0x064>; 1924defm V_CMPS_LG_F64 : VOPC_Real_gfx6_gfx7<0x065>; 1925defm V_CMPS_GE_F64 : VOPC_Real_gfx6_gfx7<0x066>; 1926defm V_CMPS_O_F64 : VOPC_Real_gfx6_gfx7<0x067>; 1927defm V_CMPS_U_F64 : VOPC_Real_gfx6_gfx7<0x068>; 1928defm V_CMPS_NGE_F64 : VOPC_Real_gfx6_gfx7<0x069>; 1929defm V_CMPS_NLG_F64 : VOPC_Real_gfx6_gfx7<0x06a>; 1930defm V_CMPS_NGT_F64 : VOPC_Real_gfx6_gfx7<0x06b>; 1931defm V_CMPS_NLE_F64 : VOPC_Real_gfx6_gfx7<0x06c>; 1932defm V_CMPS_NEQ_F64 : VOPC_Real_gfx6_gfx7<0x06d>; 1933defm V_CMPS_NLT_F64 : VOPC_Real_gfx6_gfx7<0x06e>; 1934defm V_CMPS_TRU_F64 : VOPC_Real_gfx6_gfx7<0x06f>; 1935defm V_CMPSX_F_F64 : VOPCX_Real_gfx6_gfx7<0x070>; 1936defm V_CMPSX_LT_F64 : VOPCX_Real_gfx6_gfx7<0x071>; 1937defm V_CMPSX_EQ_F64 : VOPCX_Real_gfx6_gfx7<0x072>; 1938defm V_CMPSX_LE_F64 : VOPCX_Real_gfx6_gfx7<0x073>; 1939defm V_CMPSX_GT_F64 : VOPCX_Real_gfx6_gfx7<0x074>; 1940defm V_CMPSX_LG_F64 : VOPCX_Real_gfx6_gfx7<0x075>; 1941defm V_CMPSX_GE_F64 : VOPCX_Real_gfx6_gfx7<0x076>; 1942defm V_CMPSX_O_F64 : VOPCX_Real_gfx6_gfx7<0x077>; 1943defm V_CMPSX_U_F64 : VOPCX_Real_gfx6_gfx7<0x078>; 1944defm V_CMPSX_NGE_F64 : VOPCX_Real_gfx6_gfx7<0x079>; 1945defm V_CMPSX_NLG_F64 : VOPCX_Real_gfx6_gfx7<0x07a>; 1946defm V_CMPSX_NGT_F64 : VOPCX_Real_gfx6_gfx7<0x07b>; 1947defm V_CMPSX_NLE_F64 : VOPCX_Real_gfx6_gfx7<0x07c>; 1948defm V_CMPSX_NEQ_F64 : VOPCX_Real_gfx6_gfx7<0x07d>; 1949defm V_CMPSX_NLT_F64 : VOPCX_Real_gfx6_gfx7<0x07e>; 1950defm V_CMPSX_TRU_F64 : VOPCX_Real_gfx6_gfx7<0x07f>; 1951defm V_CMP_F_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x080>; 1952defm V_CMP_LT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x081>; 1953defm V_CMP_EQ_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x082>; 1954defm V_CMP_LE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x083>; 1955defm V_CMP_GT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x084>; 1956defm V_CMP_NE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x085>; 1957defm V_CMP_GE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x086>; 1958defm V_CMP_T_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x087>; 1959defm V_CMP_CLASS_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x088>; 1960defm V_CMPX_F_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x090>; 1961defm V_CMPX_LT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x091>; 1962defm V_CMPX_EQ_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x092>; 1963defm V_CMPX_LE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x093>; 1964defm V_CMPX_GT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x094>; 1965defm V_CMPX_NE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x095>; 1966defm V_CMPX_GE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x096>; 1967defm V_CMPX_T_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x097>; 1968defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>; 1969defm V_CMP_F_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>; 1970defm V_CMP_LT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>; 1971defm V_CMP_EQ_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>; 1972defm V_CMP_LE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>; 1973defm V_CMP_GT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>; 1974defm V_CMP_NE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>; 1975defm V_CMP_GE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>; 1976defm V_CMP_T_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>; 1977defm V_CMP_CLASS_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>; 1978defm V_CMPX_F_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>; 1979defm V_CMPX_LT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>; 1980defm V_CMPX_EQ_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>; 1981defm V_CMPX_LE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>; 1982defm V_CMPX_GT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>; 1983defm V_CMPX_NE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>; 1984defm V_CMPX_GE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>; 1985defm V_CMPX_T_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>; 1986defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>; 1987defm V_CMP_F_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>; 1988defm V_CMP_LT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>; 1989defm V_CMP_EQ_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>; 1990defm V_CMP_LE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>; 1991defm V_CMP_GT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>; 1992defm V_CMP_NE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>; 1993defm V_CMP_GE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>; 1994defm V_CMP_T_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>; 1995defm V_CMPX_F_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>; 1996defm V_CMPX_LT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>; 1997defm V_CMPX_EQ_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>; 1998defm V_CMPX_LE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>; 1999defm V_CMPX_GT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>; 2000defm V_CMPX_NE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>; 2001defm V_CMPX_GE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>; 2002defm V_CMPX_T_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>; 2003defm V_CMP_F_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>; 2004defm V_CMP_LT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>; 2005defm V_CMP_EQ_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>; 2006defm V_CMP_LE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>; 2007defm V_CMP_GT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>; 2008defm V_CMP_NE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>; 2009defm V_CMP_GE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>; 2010defm V_CMP_T_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>; 2011defm V_CMPX_F_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>; 2012defm V_CMPX_LT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>; 2013defm V_CMPX_EQ_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>; 2014defm V_CMPX_LE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>; 2015defm V_CMPX_GT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>; 2016defm V_CMPX_NE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>; 2017defm V_CMPX_GE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>; 2018defm V_CMPX_T_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>; 2019 2020//===----------------------------------------------------------------------===// 2021// GFX8, GFX9 (VI). 2022//===----------------------------------------------------------------------===// 2023 2024multiclass VOPC_Real_vi <bits<10> op> { 2025 let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in { 2026 def _e32_vi : 2027 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 2028 VOPCe<op{7-0}>; 2029 2030 def _e64_vi : 2031 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, 2032 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 2033 // Encoding used for VOPC instructions encoded as VOP3 2034 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst 2035 bits<8> sdst; 2036 let Inst{7-0} = sdst; 2037 } 2038 } 2039 2040 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA>.ret in 2041 def _sdwa_vi : 2042 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 2043 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 2044 2045 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 2046 def _sdwa_gfx9 : 2047 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 2048 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 2049 2050 let AssemblerPredicate = isGFX8GFX9 in { 2051 defm : VOPCInstAliases<NAME, "vi">; 2052 } 2053} 2054 2055defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>; 2056defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>; 2057defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>; 2058defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>; 2059defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>; 2060defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>; 2061 2062defm V_CMP_F_F16 : VOPC_Real_vi <0x20>; 2063defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>; 2064defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>; 2065defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>; 2066defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>; 2067defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>; 2068defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>; 2069defm V_CMP_O_F16 : VOPC_Real_vi <0x27>; 2070defm V_CMP_U_F16 : VOPC_Real_vi <0x28>; 2071defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>; 2072defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>; 2073defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>; 2074defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>; 2075defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>; 2076defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>; 2077defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>; 2078 2079defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>; 2080defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>; 2081defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>; 2082defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>; 2083defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>; 2084defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>; 2085defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>; 2086defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>; 2087defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>; 2088defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>; 2089defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>; 2090defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>; 2091defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>; 2092defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>; 2093defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>; 2094defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>; 2095 2096defm V_CMP_F_F32 : VOPC_Real_vi <0x40>; 2097defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>; 2098defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>; 2099defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>; 2100defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>; 2101defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>; 2102defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>; 2103defm V_CMP_O_F32 : VOPC_Real_vi <0x47>; 2104defm V_CMP_U_F32 : VOPC_Real_vi <0x48>; 2105defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>; 2106defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>; 2107defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>; 2108defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>; 2109defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>; 2110defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>; 2111defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>; 2112 2113defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>; 2114defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>; 2115defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>; 2116defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>; 2117defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>; 2118defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>; 2119defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>; 2120defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>; 2121defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>; 2122defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>; 2123defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>; 2124defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>; 2125defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>; 2126defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>; 2127defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>; 2128defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>; 2129 2130defm V_CMP_F_F64 : VOPC_Real_vi <0x60>; 2131defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>; 2132defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>; 2133defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>; 2134defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>; 2135defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>; 2136defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>; 2137defm V_CMP_O_F64 : VOPC_Real_vi <0x67>; 2138defm V_CMP_U_F64 : VOPC_Real_vi <0x68>; 2139defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>; 2140defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>; 2141defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>; 2142defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>; 2143defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>; 2144defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>; 2145defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>; 2146 2147defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>; 2148defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>; 2149defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>; 2150defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>; 2151defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>; 2152defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>; 2153defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>; 2154defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>; 2155defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>; 2156defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>; 2157defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>; 2158defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>; 2159defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>; 2160defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>; 2161defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>; 2162defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>; 2163 2164defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>; 2165defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>; 2166defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>; 2167defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>; 2168defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>; 2169defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>; 2170defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>; 2171defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>; 2172 2173defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>; 2174defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>; 2175defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>; 2176defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>; 2177defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>; 2178defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>; 2179defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>; 2180defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>; 2181 2182defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>; 2183defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>; 2184defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>; 2185defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>; 2186defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>; 2187defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>; 2188defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>; 2189defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>; 2190 2191defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>; 2192defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>; 2193defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>; 2194defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>; 2195defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>; 2196defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>; 2197defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>; 2198defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>; 2199 2200defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>; 2201defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>; 2202defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>; 2203defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>; 2204defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>; 2205defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>; 2206defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>; 2207defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>; 2208 2209defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>; 2210defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>; 2211defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>; 2212defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>; 2213defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>; 2214defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>; 2215defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>; 2216defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>; 2217 2218defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>; 2219defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>; 2220defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>; 2221defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>; 2222defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>; 2223defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>; 2224defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>; 2225defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>; 2226 2227defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>; 2228defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>; 2229defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>; 2230defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>; 2231defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>; 2232defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>; 2233defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>; 2234defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>; 2235 2236defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>; 2237defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>; 2238defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>; 2239defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>; 2240defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>; 2241defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>; 2242defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>; 2243defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>; 2244 2245defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>; 2246defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>; 2247defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>; 2248defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>; 2249defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>; 2250defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>; 2251defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>; 2252defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>; 2253 2254defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>; 2255defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>; 2256defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>; 2257defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>; 2258defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>; 2259defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>; 2260defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>; 2261defm V_CMP_T_U64 : VOPC_Real_vi <0xef>; 2262 2263defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>; 2264defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>; 2265defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>; 2266defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>; 2267defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>; 2268defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>; 2269defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>; 2270defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>; 2271