1//===-- VOPCInstructions.td - Vector Instruction Definitions --------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Encodings 11//===----------------------------------------------------------------------===// 12 13class VOPCe <bits<8> op> : Enc32 { 14 bits<9> src0; 15 bits<8> src1; 16 17 let Inst{8-0} = src0; 18 let Inst{16-9} = src1; 19 let Inst{24-17} = op; 20 let Inst{31-25} = 0x3e; 21} 22 23class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> { 24 bits<8> src1; 25 26 let Inst{8-0} = 0xf9; // sdwa 27 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 28 let Inst{24-17} = op; 29 let Inst{31-25} = 0x3e; // encoding 30} 31 32class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> { 33 bits<9> src1; 34 35 let Inst{8-0} = 0xf9; // sdwa 36 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 37 let Inst{24-17} = op; 38 let Inst{31-25} = 0x3e; // encoding 39 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr 40} 41 42 43//===----------------------------------------------------------------------===// 44// VOPC classes 45//===----------------------------------------------------------------------===// 46 47// VOPC instructions are a special case because for the 32-bit 48// encoding, we want to display the implicit vcc write as if it were 49// an explicit $dst. 50class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> : 51 VOPProfile <[i1, vt0, vt1, untyped]> { 52 let Asm32 = "$src0, $src1"; 53 // The destination for 32-bit encoding is implicit. 54 let HasDst32 = 0; 55 // VOPC disallows dst_sel and dst_unused as they have no effect on destination 56 let EmitDstSel = 0; 57 let Outs64 = (outs VOPDstS64orS32:$sdst); 58 list<SchedReadWrite> Schedule = sched; 59} 60 61class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0, 62 ValueType vt1 = vt0> : 63 VOPC_Profile<sched, vt0, vt1> { 64 let Outs64 = (outs ); 65 let OutsSDWA = (outs ); 66 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 67 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 68 src0_sel:$src0_sel, src1_sel:$src1_sel); 69 let Asm64 = !if(isFloatType<Src0VT>.ret, "$src0_modifiers, $src1_modifiers$clamp", 70 "$src0, $src1"); 71 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 72 let EmitDst = 0; 73} 74 75class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[], 76 bit DefVcc = 1> : 77 InstSI<(outs), P.Ins32, "", pattern>, 78 VOP <opName>, 79 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> { 80 81 let isPseudo = 1; 82 let isCodeGenOnly = 1; 83 let UseNamedOperandTable = 1; 84 85 string Mnemonic = opName; 86 string AsmOperands = P.Asm32; 87 88 let Size = 4; 89 let mayLoad = 0; 90 let mayStore = 0; 91 let hasSideEffects = 0; 92 93 let ReadsModeReg = isFloatType<P.Src0VT>.ret; 94 95 let VALU = 1; 96 let VOPC = 1; 97 let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]); 98 let Defs = !if(DefVcc, [VCC], []); 99 100 VOPProfile Pfl = P; 101} 102 103class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> : 104 InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>, 105 SIMCInstr <ps.PseudoInstr, EncodingFamily> { 106 107 let isPseudo = 0; 108 let isCodeGenOnly = 0; 109 110 let Constraints = ps.Constraints; 111 let DisableEncoding = ps.DisableEncoding; 112 113 // copy relevant pseudo op flags 114 let SubtargetPredicate = ps.SubtargetPredicate; 115 let AsmMatchConverter = ps.AsmMatchConverter; 116 let Constraints = ps.Constraints; 117 let DisableEncoding = ps.DisableEncoding; 118 let TSFlags = ps.TSFlags; 119 let UseNamedOperandTable = ps.UseNamedOperandTable; 120 let Uses = ps.Uses; 121 let Defs = ps.Defs; 122 let SchedRW = ps.SchedRW; 123} 124 125class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> : 126 VOP_SDWA_Pseudo <OpName, P, pattern> { 127 let AsmMatchConverter = "cvtSdwaVOPC"; 128} 129 130// This class is used only with VOPC instructions. Use $sdst for out operand 131class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, 132 string Asm32 = ps.Pfl.Asm32, VOPProfile p = ps.Pfl> : 133 InstAlias <ps.OpName#" "#Asm32, (inst)>, PredicateControl { 134 135 field bit isCompare; 136 field bit isCommutable; 137 138 let ResultInst = 139 !if (p.HasDst32, 140 !if (!eq(p.NumSrcArgs, 0), 141 // 1 dst, 0 src 142 (inst p.DstRC:$sdst), 143 !if (!eq(p.NumSrcArgs, 1), 144 // 1 dst, 1 src 145 (inst p.DstRC:$sdst, p.Src0RC32:$src0), 146 !if (!eq(p.NumSrcArgs, 2), 147 // 1 dst, 2 src 148 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1), 149 // else - unreachable 150 (inst)))), 151 // else 152 !if (!eq(p.NumSrcArgs, 2), 153 // 0 dst, 2 src 154 (inst p.Src0RC32:$src0, p.Src1RC32:$src1), 155 !if (!eq(p.NumSrcArgs, 1), 156 // 0 dst, 1 src 157 (inst p.Src0RC32:$src1), 158 // else 159 // 0 dst, 0 src 160 (inst)))); 161 162 let AsmVariantName = AMDGPUAsmVariants.Default; 163 let SubtargetPredicate = AssemblerPredicate; 164} 165 166multiclass VOPCInstAliases <string OpName, string Arch> { 167 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 168 !cast<Instruction>(OpName#"_e32_"#Arch)>; 169 let WaveSizePredicate = isWave32 in { 170 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 171 !cast<Instruction>(OpName#"_e32_"#Arch), 172 "vcc_lo, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 173 } 174 let WaveSizePredicate = isWave64 in { 175 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 176 !cast<Instruction>(OpName#"_e32_"#Arch), 177 "vcc, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 178 } 179} 180 181multiclass VOPCXInstAliases <string OpName, string Arch> { 182 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 183 !cast<Instruction>(OpName#"_e32_"#Arch)>; 184} 185 186 187class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies { 188 list<dag> ret = !if(P.HasModifiers, 189 [(set i1:$sdst, 190 (setcc (P.Src0VT 191 !if(P.HasOMod, 192 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod), 193 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))), 194 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)), 195 cond))], 196 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]); 197} 198 199class VCMPXNoSDstTable <bit has_sdst, string Name> { 200 bit HasSDst = has_sdst; 201 string NoSDstOp = Name; 202} 203 204multiclass VOPC_Pseudos <string opName, 205 VOPC_Profile P, 206 SDPatternOperator cond = COND_NULL, 207 string revOp = opName, 208 bit DefExec = 0> { 209 210 def _e32 : VOPC_Pseudo <opName, P>, 211 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>, 212 VCMPXNoSDstTable<1, opName#"_e32"> { 213 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 214 let SchedRW = P.Schedule; 215 let isConvergent = DefExec; 216 let isCompare = 1; 217 let isCommutable = 1; 218 } 219 220 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>, 221 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>, 222 VCMPXNoSDstTable<1, opName#"_e64"> { 223 let Defs = !if(DefExec, [EXEC], []); 224 let SchedRW = P.Schedule; 225 let isCompare = 1; 226 let isCommutable = 1; 227 } 228 229 foreach _ = BoolToList<P.HasExtSDWA>.ret in 230 def _sdwa : VOPC_SDWA_Pseudo <opName, P> { 231 let Defs = !if(DefExec, [EXEC], []); 232 let SchedRW = P.Schedule; 233 let isConvergent = DefExec; 234 let isCompare = 1; 235 } 236} 237 238let SubtargetPredicate = HasSdstCMPX in { 239multiclass VOPCX_Pseudos <string opName, 240 VOPC_Profile P, VOPC_Profile P_NoSDst, 241 SDPatternOperator cond = COND_NULL, 242 string revOp = opName> : 243 VOPC_Pseudos <opName, P, cond, revOp, 1> { 244 245 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 246 Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>, 247 VCMPXNoSDstTable<0, opName#"_e32"> { 248 let Defs = [EXEC]; 249 let SchedRW = P_NoSDst.Schedule; 250 let isConvergent = 1; 251 let isCompare = 1; 252 let isCommutable = 1; 253 let SubtargetPredicate = HasNoSdstCMPX; 254 } 255 256 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 257 Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>, 258 VCMPXNoSDstTable<0, opName#"_e64"> { 259 let Defs = [EXEC]; 260 let SchedRW = P_NoSDst.Schedule; 261 let isCompare = 1; 262 let isCommutable = 1; 263 let SubtargetPredicate = HasNoSdstCMPX; 264 } 265 266 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 267 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 268 let Defs = [EXEC]; 269 let SchedRW = P_NoSDst.Schedule; 270 let isConvergent = 1; 271 let isCompare = 1; 272 let SubtargetPredicate = HasNoSdstCMPX; 273 } 274} 275} // End SubtargetPredicate = HasSdstCMPX 276 277def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>; 278def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>; 279def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>; 280def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>; 281def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>; 282def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>; 283 284def VOPC_F16_F16 : VOPC_NoSdst_Profile<[Write32Bit], f16>; 285def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>; 286def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>; 287def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>; 288def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>; 289def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>; 290 291multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL, 292 string revOp = opName> : 293 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>; 294 295multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 296 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>; 297 298multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 299 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>; 300 301multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 302 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>; 303 304multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 305 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>; 306 307multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 308 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>; 309 310multiclass VOPCX_F16 <string opName, string revOp = opName> : 311 VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>; 312 313multiclass VOPCX_F32 <string opName, string revOp = opName> : 314 VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>; 315 316multiclass VOPCX_F64 <string opName, string revOp = opName> : 317 VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>; 318 319multiclass VOPCX_I16 <string opName, string revOp = opName> : 320 VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>; 321 322multiclass VOPCX_I32 <string opName, string revOp = opName> : 323 VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>; 324 325multiclass VOPCX_I64 <string opName, string revOp = opName> : 326 VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>; 327 328 329//===----------------------------------------------------------------------===// 330// Compare instructions 331//===----------------------------------------------------------------------===// 332 333defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">; 334defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">; 335defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>; 336defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">; 337defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>; 338defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>; 339defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>; 340defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>; 341defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>; 342defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">; 343defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>; 344defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">; 345defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>; 346defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>; 347defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>; 348defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">; 349 350defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">; 351defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">; 352defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">; 353defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">; 354defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">; 355defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">; 356defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">; 357defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">; 358defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">; 359defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">; 360defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">; 361defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">; 362defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">; 363defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">; 364defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">; 365defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">; 366 367defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">; 368defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">; 369defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>; 370defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">; 371defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>; 372defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>; 373defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>; 374defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>; 375defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>; 376defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">; 377defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>; 378defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">; 379defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>; 380defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>; 381defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>; 382defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">; 383 384defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">; 385defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">; 386defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">; 387defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">; 388defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">; 389defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">; 390defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">; 391defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">; 392defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">; 393defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">; 394defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">; 395defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">; 396defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">; 397defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">; 398defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">; 399defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">; 400 401let SubtargetPredicate = isGFX6GFX7 in { 402 403defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">; 404defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">; 405defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">; 406defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">; 407defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">; 408defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">; 409defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">; 410defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">; 411defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">; 412defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">; 413defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">; 414defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">; 415defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">; 416defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">; 417defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">; 418defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">; 419 420defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">; 421defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">; 422defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">; 423defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">; 424defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">; 425defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">; 426defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">; 427defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">; 428defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">; 429defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">; 430defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">; 431defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">; 432defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">; 433defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">; 434defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">; 435defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">; 436 437defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">; 438defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">; 439defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">; 440defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">; 441defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">; 442defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">; 443defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">; 444defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">; 445defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">; 446defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">; 447defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">; 448defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">; 449defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">; 450defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">; 451defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">; 452defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">; 453 454defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">; 455defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">; 456defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">; 457defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">; 458defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">; 459defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">; 460defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">; 461defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">; 462defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">; 463defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">; 464defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">; 465defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">; 466defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">; 467defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">; 468defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">; 469defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">; 470 471} // End SubtargetPredicate = isGFX6GFX7 472 473let SubtargetPredicate = Has16BitInsts in { 474 475defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">; 476defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">; 477defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>; 478defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">; 479defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>; 480defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>; 481defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>; 482defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>; 483defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>; 484defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">; 485defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>; 486defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">; 487defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>; 488defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>; 489defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>; 490defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">; 491 492defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">; 493defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">; 494defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">; 495defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">; 496defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">; 497defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">; 498defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">; 499defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">; 500defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">; 501defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">; 502defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">; 503defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">; 504defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">; 505defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">; 506defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">; 507defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">; 508 509defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">; 510defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">; 511defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">; 512defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">; 513defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>; 514defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">; 515defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>; 516defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">; 517 518defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">; 519defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">; 520defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>; 521defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">; 522defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>; 523defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>; 524defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>; 525defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">; 526 527defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">; 528defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">; 529defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">; 530defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">; 531defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">; 532defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">; 533defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">; 534defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">; 535defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">; 536 537defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">; 538defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">; 539defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">; 540defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">; 541defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">; 542defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">; 543defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">; 544 545} // End SubtargetPredicate = Has16BitInsts 546 547defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">; 548defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">; 549defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">; 550defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">; 551defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>; 552defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">; 553defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>; 554defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">; 555 556defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">; 557defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">; 558defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">; 559defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">; 560defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">; 561defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">; 562defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">; 563defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">; 564 565defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">; 566defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">; 567defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">; 568defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">; 569defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>; 570defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">; 571defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>; 572defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">; 573 574defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">; 575defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">; 576defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">; 577defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">; 578defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">; 579defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">; 580defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">; 581defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">; 582 583defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">; 584defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">; 585defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>; 586defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">; 587defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>; 588defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>; 589defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>; 590defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">; 591 592defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">; 593defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">; 594defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">; 595defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">; 596defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">; 597defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">; 598defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">; 599defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">; 600 601defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">; 602defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">; 603defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>; 604defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">; 605defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>; 606defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>; 607defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>; 608defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">; 609 610defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">; 611defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">; 612defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">; 613defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">; 614defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">; 615defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">; 616defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">; 617defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">; 618 619//===----------------------------------------------------------------------===// 620// Class instructions 621//===----------------------------------------------------------------------===// 622 623class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> : 624 VOPC_Profile<sched, vt, i32> { 625 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1); 626 let Asm64 = "$sdst, $src0_modifiers, $src1"; 627 628 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 629 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 630 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel); 631 632 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel"; 633 let HasSrc1Mods = 0; 634 let HasClamp = 0; 635 let HasOMod = 0; 636} 637 638class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt> : 639 VOPC_Class_Profile<sched, vt> { 640 let Outs64 = (outs ); 641 let OutsSDWA = (outs ); 642 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 643 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 644 src0_sel:$src0_sel, src1_sel:$src1_sel); 645 let Asm64 = "$src0_modifiers, $src1"; 646 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 647 let EmitDst = 0; 648} 649 650class getVOPCClassPat64 <VOPProfile P> { 651 list<dag> ret = 652 [(set i1:$sdst, 653 (AMDGPUfp_class 654 (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers)), 655 P.Src1VT:$src1))]; 656} 657 658// Special case for class instructions which only have modifiers on 659// the 1st source operand. 660multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec, 661 bit DefVcc = 1> { 662 def _e32 : VOPC_Pseudo <opName, p>, 663 VCMPXNoSDstTable<1, opName#"_e32"> { 664 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 665 !if(DefVcc, [VCC], [])); 666 let SchedRW = p.Schedule; 667 let isConvergent = DefExec; 668 } 669 670 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret>, 671 VCMPXNoSDstTable<1, opName#"_e64"> { 672 let Defs = !if(DefExec, [EXEC], []); 673 let SchedRW = p.Schedule; 674 } 675 676 foreach _ = BoolToList<p.HasExtSDWA>.ret in 677 def _sdwa : VOPC_SDWA_Pseudo <opName, p> { 678 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 679 !if(DefVcc, [VCC], [])); 680 let SchedRW = p.Schedule; 681 let isConvergent = DefExec; 682 } 683} 684 685let SubtargetPredicate = HasSdstCMPX in { 686multiclass VOPCX_Class_Pseudos <string opName, 687 VOPC_Profile P, 688 VOPC_Profile P_NoSDst> : 689 VOPC_Class_Pseudos <opName, P, 1, 1> { 690 691 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 692 VCMPXNoSDstTable<0, opName#"_e32"> { 693 let Defs = [EXEC]; 694 let SchedRW = P_NoSDst.Schedule; 695 let isConvergent = 1; 696 let SubtargetPredicate = HasNoSdstCMPX; 697 } 698 699 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 700 VCMPXNoSDstTable<0, opName#"_e64"> { 701 let Defs = [EXEC]; 702 let SchedRW = P_NoSDst.Schedule; 703 let SubtargetPredicate = HasNoSdstCMPX; 704 } 705 706 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 707 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 708 let Defs = [EXEC]; 709 let SchedRW = P_NoSDst.Schedule; 710 let isConvergent = 1; 711 let SubtargetPredicate = HasNoSdstCMPX; 712 } 713} 714} // End SubtargetPredicate = HasSdstCMPX 715 716def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>; 717def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>; 718def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>; 719 720def VOPC_F16_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f16>; 721def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>; 722def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>; 723 724multiclass VOPC_CLASS_F16 <string opName> : 725 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>; 726 727multiclass VOPCX_CLASS_F16 <string opName> : 728 VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I32, VOPC_F16_I32>; 729 730multiclass VOPC_CLASS_F32 <string opName> : 731 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>; 732 733multiclass VOPCX_CLASS_F32 <string opName> : 734 VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>; 735 736multiclass VOPC_CLASS_F64 <string opName> : 737 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>; 738 739multiclass VOPCX_CLASS_F64 <string opName> : 740 VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>; 741 742// cmp_class ignores the FP mode and faithfully reports the unmodified 743// source value. 744let ReadsModeReg = 0, mayRaiseFPException = 0 in { 745defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">; 746defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">; 747defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">; 748defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">; 749 750let SubtargetPredicate = Has16BitInsts in { 751defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">; 752defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">; 753} 754} // End ReadsModeReg = 0, mayRaiseFPException = 0 755 756//===----------------------------------------------------------------------===// 757// V_ICMPIntrinsic Pattern. 758//===----------------------------------------------------------------------===// 759 760// We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith() 761// complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place. 762multiclass ICMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> { 763 let WaveSizePredicate = isWave64 in 764 def : GCNPat < 765 (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 766 (i64 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_64)) 767 >; 768 769 let WaveSizePredicate = isWave32 in 770 def : GCNPat < 771 (i32 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 772 (i32 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_32)) 773 >; 774} 775 776defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>; 777defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>; 778defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>; 779defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>; 780defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>; 781defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>; 782defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>; 783defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>; 784defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>; 785defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>; 786 787defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>; 788defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>; 789defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>; 790defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>; 791defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>; 792defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>; 793defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>; 794defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>; 795defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>; 796defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>; 797 798defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>; 799defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>; 800defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>; 801defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>; 802defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>; 803defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>; 804defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>; 805defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>; 806defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>; 807defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>; 808 809multiclass FCMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> { 810 let WaveSizePredicate = isWave64 in 811 def : GCNPat < 812 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 813 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 814 (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 815 DSTCLAMP.NONE), SReg_64)) 816 >; 817 818 let WaveSizePredicate = isWave32 in 819 def : GCNPat < 820 (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 821 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 822 (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 823 DSTCLAMP.NONE), SReg_32)) 824 >; 825} 826 827defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>; 828defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>; 829defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>; 830defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>; 831defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>; 832defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>; 833 834defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>; 835defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>; 836defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>; 837defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>; 838defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>; 839defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>; 840 841defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>; 842defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>; 843defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>; 844defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>; 845defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>; 846defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>; 847 848 849defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>; 850defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>; 851defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>; 852defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>; 853defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>; 854defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>; 855 856defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>; 857defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>; 858defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>; 859defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>; 860defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>; 861defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>; 862 863defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>; 864defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>; 865defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>; 866defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>; 867defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>; 868defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>; 869 870//===----------------------------------------------------------------------===// 871// Target-specific instruction encodings. 872//===----------------------------------------------------------------------===// 873 874//===----------------------------------------------------------------------===// 875// GFX10. 876//===----------------------------------------------------------------------===// 877 878let AssemblerPredicate = isGFX10Plus in { 879 multiclass VOPC_Real_gfx10<bits<9> op> { 880 let DecoderNamespace = "GFX10" in { 881 def _e32_gfx10 : 882 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>, 883 VOPCe<op{7-0}>; 884 def _e64_gfx10 : 885 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>, 886 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 887 // Encoding used for VOPC instructions encoded as VOP3 differs from 888 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 889 bits<8> sdst; 890 let Inst{7-0} = sdst; 891 } 892 } // End DecoderNamespace = "GFX10" 893 894 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 895 def _sdwa_gfx10 : 896 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 897 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 898 899 defm : VOPCInstAliases<NAME, "gfx10">; 900 } 901 902 multiclass VOPCX_Real_gfx10<bits<9> op> { 903 let DecoderNamespace = "GFX10" in { 904 def _e32_gfx10 : 905 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>, 906 VOPCe<op{7-0}> { 907 let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr) 908 # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands; 909 } 910 911 def _e64_gfx10 : 912 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>, 913 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> { 914 let Inst{7-0} = ?; // sdst 915 let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic) 916 # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands; 917 } 918 } // End DecoderNamespace = "GFX10" 919 920 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9>.ret in 921 def _sdwa_gfx10 : 922 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>, 923 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> { 924 let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic) 925 # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9; 926 } 927 928 defm : VOPCXInstAliases<NAME, "gfx10">; 929 } 930} // End AssemblerPredicate = isGFX10Plus 931 932defm V_CMP_LT_I16 : VOPC_Real_gfx10<0x089>; 933defm V_CMP_EQ_I16 : VOPC_Real_gfx10<0x08a>; 934defm V_CMP_LE_I16 : VOPC_Real_gfx10<0x08b>; 935defm V_CMP_GT_I16 : VOPC_Real_gfx10<0x08c>; 936defm V_CMP_NE_I16 : VOPC_Real_gfx10<0x08d>; 937defm V_CMP_GE_I16 : VOPC_Real_gfx10<0x08e>; 938defm V_CMP_CLASS_F16 : VOPC_Real_gfx10<0x08f>; 939defm V_CMPX_LT_I16 : VOPCX_Real_gfx10<0x099>; 940defm V_CMPX_EQ_I16 : VOPCX_Real_gfx10<0x09a>; 941defm V_CMPX_LE_I16 : VOPCX_Real_gfx10<0x09b>; 942defm V_CMPX_GT_I16 : VOPCX_Real_gfx10<0x09c>; 943defm V_CMPX_NE_I16 : VOPCX_Real_gfx10<0x09d>; 944defm V_CMPX_GE_I16 : VOPCX_Real_gfx10<0x09e>; 945defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>; 946defm V_CMP_LT_U16 : VOPC_Real_gfx10<0x0a9>; 947defm V_CMP_EQ_U16 : VOPC_Real_gfx10<0x0aa>; 948defm V_CMP_LE_U16 : VOPC_Real_gfx10<0x0ab>; 949defm V_CMP_GT_U16 : VOPC_Real_gfx10<0x0ac>; 950defm V_CMP_NE_U16 : VOPC_Real_gfx10<0x0ad>; 951defm V_CMP_GE_U16 : VOPC_Real_gfx10<0x0ae>; 952defm V_CMPX_LT_U16 : VOPCX_Real_gfx10<0x0b9>; 953defm V_CMPX_EQ_U16 : VOPCX_Real_gfx10<0x0ba>; 954defm V_CMPX_LE_U16 : VOPCX_Real_gfx10<0x0bb>; 955defm V_CMPX_GT_U16 : VOPCX_Real_gfx10<0x0bc>; 956defm V_CMPX_NE_U16 : VOPCX_Real_gfx10<0x0bd>; 957defm V_CMPX_GE_U16 : VOPCX_Real_gfx10<0x0be>; 958defm V_CMP_F_F16 : VOPC_Real_gfx10<0x0c8>; 959defm V_CMP_LT_F16 : VOPC_Real_gfx10<0x0c9>; 960defm V_CMP_EQ_F16 : VOPC_Real_gfx10<0x0ca>; 961defm V_CMP_LE_F16 : VOPC_Real_gfx10<0x0cb>; 962defm V_CMP_GT_F16 : VOPC_Real_gfx10<0x0cc>; 963defm V_CMP_LG_F16 : VOPC_Real_gfx10<0x0cd>; 964defm V_CMP_GE_F16 : VOPC_Real_gfx10<0x0ce>; 965defm V_CMP_O_F16 : VOPC_Real_gfx10<0x0cf>; 966defm V_CMPX_F_F16 : VOPCX_Real_gfx10<0x0d8>; 967defm V_CMPX_LT_F16 : VOPCX_Real_gfx10<0x0d9>; 968defm V_CMPX_EQ_F16 : VOPCX_Real_gfx10<0x0da>; 969defm V_CMPX_LE_F16 : VOPCX_Real_gfx10<0x0db>; 970defm V_CMPX_GT_F16 : VOPCX_Real_gfx10<0x0dc>; 971defm V_CMPX_LG_F16 : VOPCX_Real_gfx10<0x0dd>; 972defm V_CMPX_GE_F16 : VOPCX_Real_gfx10<0x0de>; 973defm V_CMPX_O_F16 : VOPCX_Real_gfx10<0x0df>; 974defm V_CMP_U_F16 : VOPC_Real_gfx10<0x0e8>; 975defm V_CMP_NGE_F16 : VOPC_Real_gfx10<0x0e9>; 976defm V_CMP_NLG_F16 : VOPC_Real_gfx10<0x0ea>; 977defm V_CMP_NGT_F16 : VOPC_Real_gfx10<0x0eb>; 978defm V_CMP_NLE_F16 : VOPC_Real_gfx10<0x0ec>; 979defm V_CMP_NEQ_F16 : VOPC_Real_gfx10<0x0ed>; 980defm V_CMP_NLT_F16 : VOPC_Real_gfx10<0x0ee>; 981defm V_CMP_TRU_F16 : VOPC_Real_gfx10<0x0ef>; 982defm V_CMPX_U_F16 : VOPCX_Real_gfx10<0x0f8>; 983defm V_CMPX_NGE_F16 : VOPCX_Real_gfx10<0x0f9>; 984defm V_CMPX_NLG_F16 : VOPCX_Real_gfx10<0x0fa>; 985defm V_CMPX_NGT_F16 : VOPCX_Real_gfx10<0x0fb>; 986defm V_CMPX_NLE_F16 : VOPCX_Real_gfx10<0x0fc>; 987defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx10<0x0fd>; 988defm V_CMPX_NLT_F16 : VOPCX_Real_gfx10<0x0fe>; 989defm V_CMPX_TRU_F16 : VOPCX_Real_gfx10<0x0ff>; 990 991//===----------------------------------------------------------------------===// 992// GFX6, GFX7, GFX10. 993//===----------------------------------------------------------------------===// 994 995let AssemblerPredicate = isGFX6GFX7 in { 996 multiclass VOPC_Real_gfx6_gfx7<bits<9> op> { 997 let DecoderNamespace = "GFX6GFX7" in { 998 def _e32_gfx6_gfx7 : 999 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 1000 VOPCe<op{7-0}>; 1001 def _e64_gfx6_gfx7 : 1002 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 1003 VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1004 // Encoding used for VOPC instructions encoded as VOP3 differs from 1005 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1006 bits<8> sdst; 1007 let Inst{7-0} = sdst; 1008 } 1009 } // End DecoderNamespace = "GFX6GFX7" 1010 1011 defm : VOPCInstAliases<NAME, "gfx6_gfx7">; 1012 } 1013} // End AssemblerPredicate = isGFX6GFX7 1014 1015multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> : 1016 VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>; 1017 1018multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> : 1019 VOPC_Real_gfx6_gfx7<op>; 1020 1021multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> : 1022 VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>; 1023 1024defm V_CMP_F_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x000>; 1025defm V_CMP_LT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x001>; 1026defm V_CMP_EQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x002>; 1027defm V_CMP_LE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x003>; 1028defm V_CMP_GT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x004>; 1029defm V_CMP_LG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x005>; 1030defm V_CMP_GE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x006>; 1031defm V_CMP_O_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x007>; 1032defm V_CMP_U_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x008>; 1033defm V_CMP_NGE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x009>; 1034defm V_CMP_NLG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00a>; 1035defm V_CMP_NGT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00b>; 1036defm V_CMP_NLE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00c>; 1037defm V_CMP_NEQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00d>; 1038defm V_CMP_NLT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00e>; 1039defm V_CMP_TRU_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00f>; 1040defm V_CMPX_F_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x010>; 1041defm V_CMPX_LT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x011>; 1042defm V_CMPX_EQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x012>; 1043defm V_CMPX_LE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x013>; 1044defm V_CMPX_GT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x014>; 1045defm V_CMPX_LG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x015>; 1046defm V_CMPX_GE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x016>; 1047defm V_CMPX_O_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x017>; 1048defm V_CMPX_U_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x018>; 1049defm V_CMPX_NGE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x019>; 1050defm V_CMPX_NLG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>; 1051defm V_CMPX_NGT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>; 1052defm V_CMPX_NLE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>; 1053defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>; 1054defm V_CMPX_NLT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>; 1055defm V_CMPX_TRU_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>; 1056defm V_CMP_F_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x020>; 1057defm V_CMP_LT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x021>; 1058defm V_CMP_EQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x022>; 1059defm V_CMP_LE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x023>; 1060defm V_CMP_GT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x024>; 1061defm V_CMP_LG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x025>; 1062defm V_CMP_GE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x026>; 1063defm V_CMP_O_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x027>; 1064defm V_CMP_U_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x028>; 1065defm V_CMP_NGE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x029>; 1066defm V_CMP_NLG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02a>; 1067defm V_CMP_NGT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02b>; 1068defm V_CMP_NLE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02c>; 1069defm V_CMP_NEQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02d>; 1070defm V_CMP_NLT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02e>; 1071defm V_CMP_TRU_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02f>; 1072defm V_CMPX_F_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x030>; 1073defm V_CMPX_LT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x031>; 1074defm V_CMPX_EQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x032>; 1075defm V_CMPX_LE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x033>; 1076defm V_CMPX_GT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x034>; 1077defm V_CMPX_LG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x035>; 1078defm V_CMPX_GE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x036>; 1079defm V_CMPX_O_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x037>; 1080defm V_CMPX_U_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x038>; 1081defm V_CMPX_NGE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x039>; 1082defm V_CMPX_NLG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>; 1083defm V_CMPX_NGT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>; 1084defm V_CMPX_NLE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>; 1085defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>; 1086defm V_CMPX_NLT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>; 1087defm V_CMPX_TRU_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>; 1088defm V_CMPS_F_F32 : VOPC_Real_gfx6_gfx7<0x040>; 1089defm V_CMPS_LT_F32 : VOPC_Real_gfx6_gfx7<0x041>; 1090defm V_CMPS_EQ_F32 : VOPC_Real_gfx6_gfx7<0x042>; 1091defm V_CMPS_LE_F32 : VOPC_Real_gfx6_gfx7<0x043>; 1092defm V_CMPS_GT_F32 : VOPC_Real_gfx6_gfx7<0x044>; 1093defm V_CMPS_LG_F32 : VOPC_Real_gfx6_gfx7<0x045>; 1094defm V_CMPS_GE_F32 : VOPC_Real_gfx6_gfx7<0x046>; 1095defm V_CMPS_O_F32 : VOPC_Real_gfx6_gfx7<0x047>; 1096defm V_CMPS_U_F32 : VOPC_Real_gfx6_gfx7<0x048>; 1097defm V_CMPS_NGE_F32 : VOPC_Real_gfx6_gfx7<0x049>; 1098defm V_CMPS_NLG_F32 : VOPC_Real_gfx6_gfx7<0x04a>; 1099defm V_CMPS_NGT_F32 : VOPC_Real_gfx6_gfx7<0x04b>; 1100defm V_CMPS_NLE_F32 : VOPC_Real_gfx6_gfx7<0x04c>; 1101defm V_CMPS_NEQ_F32 : VOPC_Real_gfx6_gfx7<0x04d>; 1102defm V_CMPS_NLT_F32 : VOPC_Real_gfx6_gfx7<0x04e>; 1103defm V_CMPS_TRU_F32 : VOPC_Real_gfx6_gfx7<0x04f>; 1104defm V_CMPSX_F_F32 : VOPCX_Real_gfx6_gfx7<0x050>; 1105defm V_CMPSX_LT_F32 : VOPCX_Real_gfx6_gfx7<0x051>; 1106defm V_CMPSX_EQ_F32 : VOPCX_Real_gfx6_gfx7<0x052>; 1107defm V_CMPSX_LE_F32 : VOPCX_Real_gfx6_gfx7<0x053>; 1108defm V_CMPSX_GT_F32 : VOPCX_Real_gfx6_gfx7<0x054>; 1109defm V_CMPSX_LG_F32 : VOPCX_Real_gfx6_gfx7<0x055>; 1110defm V_CMPSX_GE_F32 : VOPCX_Real_gfx6_gfx7<0x056>; 1111defm V_CMPSX_O_F32 : VOPCX_Real_gfx6_gfx7<0x057>; 1112defm V_CMPSX_U_F32 : VOPCX_Real_gfx6_gfx7<0x058>; 1113defm V_CMPSX_NGE_F32 : VOPCX_Real_gfx6_gfx7<0x059>; 1114defm V_CMPSX_NLG_F32 : VOPCX_Real_gfx6_gfx7<0x05a>; 1115defm V_CMPSX_NGT_F32 : VOPCX_Real_gfx6_gfx7<0x05b>; 1116defm V_CMPSX_NLE_F32 : VOPCX_Real_gfx6_gfx7<0x05c>; 1117defm V_CMPSX_NEQ_F32 : VOPCX_Real_gfx6_gfx7<0x05d>; 1118defm V_CMPSX_NLT_F32 : VOPCX_Real_gfx6_gfx7<0x05e>; 1119defm V_CMPSX_TRU_F32 : VOPCX_Real_gfx6_gfx7<0x05f>; 1120defm V_CMPS_F_F64 : VOPC_Real_gfx6_gfx7<0x060>; 1121defm V_CMPS_LT_F64 : VOPC_Real_gfx6_gfx7<0x061>; 1122defm V_CMPS_EQ_F64 : VOPC_Real_gfx6_gfx7<0x062>; 1123defm V_CMPS_LE_F64 : VOPC_Real_gfx6_gfx7<0x063>; 1124defm V_CMPS_GT_F64 : VOPC_Real_gfx6_gfx7<0x064>; 1125defm V_CMPS_LG_F64 : VOPC_Real_gfx6_gfx7<0x065>; 1126defm V_CMPS_GE_F64 : VOPC_Real_gfx6_gfx7<0x066>; 1127defm V_CMPS_O_F64 : VOPC_Real_gfx6_gfx7<0x067>; 1128defm V_CMPS_U_F64 : VOPC_Real_gfx6_gfx7<0x068>; 1129defm V_CMPS_NGE_F64 : VOPC_Real_gfx6_gfx7<0x069>; 1130defm V_CMPS_NLG_F64 : VOPC_Real_gfx6_gfx7<0x06a>; 1131defm V_CMPS_NGT_F64 : VOPC_Real_gfx6_gfx7<0x06b>; 1132defm V_CMPS_NLE_F64 : VOPC_Real_gfx6_gfx7<0x06c>; 1133defm V_CMPS_NEQ_F64 : VOPC_Real_gfx6_gfx7<0x06d>; 1134defm V_CMPS_NLT_F64 : VOPC_Real_gfx6_gfx7<0x06e>; 1135defm V_CMPS_TRU_F64 : VOPC_Real_gfx6_gfx7<0x06f>; 1136defm V_CMPSX_F_F64 : VOPCX_Real_gfx6_gfx7<0x070>; 1137defm V_CMPSX_LT_F64 : VOPCX_Real_gfx6_gfx7<0x071>; 1138defm V_CMPSX_EQ_F64 : VOPCX_Real_gfx6_gfx7<0x072>; 1139defm V_CMPSX_LE_F64 : VOPCX_Real_gfx6_gfx7<0x073>; 1140defm V_CMPSX_GT_F64 : VOPCX_Real_gfx6_gfx7<0x074>; 1141defm V_CMPSX_LG_F64 : VOPCX_Real_gfx6_gfx7<0x075>; 1142defm V_CMPSX_GE_F64 : VOPCX_Real_gfx6_gfx7<0x076>; 1143defm V_CMPSX_O_F64 : VOPCX_Real_gfx6_gfx7<0x077>; 1144defm V_CMPSX_U_F64 : VOPCX_Real_gfx6_gfx7<0x078>; 1145defm V_CMPSX_NGE_F64 : VOPCX_Real_gfx6_gfx7<0x079>; 1146defm V_CMPSX_NLG_F64 : VOPCX_Real_gfx6_gfx7<0x07a>; 1147defm V_CMPSX_NGT_F64 : VOPCX_Real_gfx6_gfx7<0x07b>; 1148defm V_CMPSX_NLE_F64 : VOPCX_Real_gfx6_gfx7<0x07c>; 1149defm V_CMPSX_NEQ_F64 : VOPCX_Real_gfx6_gfx7<0x07d>; 1150defm V_CMPSX_NLT_F64 : VOPCX_Real_gfx6_gfx7<0x07e>; 1151defm V_CMPSX_TRU_F64 : VOPCX_Real_gfx6_gfx7<0x07f>; 1152defm V_CMP_F_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x080>; 1153defm V_CMP_LT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x081>; 1154defm V_CMP_EQ_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x082>; 1155defm V_CMP_LE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x083>; 1156defm V_CMP_GT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x084>; 1157defm V_CMP_NE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x085>; 1158defm V_CMP_GE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x086>; 1159defm V_CMP_T_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x087>; 1160defm V_CMP_CLASS_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x088>; 1161defm V_CMPX_F_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x090>; 1162defm V_CMPX_LT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x091>; 1163defm V_CMPX_EQ_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x092>; 1164defm V_CMPX_LE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x093>; 1165defm V_CMPX_GT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x094>; 1166defm V_CMPX_NE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x095>; 1167defm V_CMPX_GE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x096>; 1168defm V_CMPX_T_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x097>; 1169defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>; 1170defm V_CMP_F_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>; 1171defm V_CMP_LT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>; 1172defm V_CMP_EQ_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>; 1173defm V_CMP_LE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>; 1174defm V_CMP_GT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>; 1175defm V_CMP_NE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>; 1176defm V_CMP_GE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>; 1177defm V_CMP_T_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>; 1178defm V_CMP_CLASS_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>; 1179defm V_CMPX_F_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>; 1180defm V_CMPX_LT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>; 1181defm V_CMPX_EQ_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>; 1182defm V_CMPX_LE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>; 1183defm V_CMPX_GT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>; 1184defm V_CMPX_NE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>; 1185defm V_CMPX_GE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>; 1186defm V_CMPX_T_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>; 1187defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>; 1188defm V_CMP_F_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>; 1189defm V_CMP_LT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>; 1190defm V_CMP_EQ_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>; 1191defm V_CMP_LE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>; 1192defm V_CMP_GT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>; 1193defm V_CMP_NE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>; 1194defm V_CMP_GE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>; 1195defm V_CMP_T_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>; 1196defm V_CMPX_F_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>; 1197defm V_CMPX_LT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>; 1198defm V_CMPX_EQ_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>; 1199defm V_CMPX_LE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>; 1200defm V_CMPX_GT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>; 1201defm V_CMPX_NE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>; 1202defm V_CMPX_GE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>; 1203defm V_CMPX_T_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>; 1204defm V_CMP_F_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>; 1205defm V_CMP_LT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>; 1206defm V_CMP_EQ_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>; 1207defm V_CMP_LE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>; 1208defm V_CMP_GT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>; 1209defm V_CMP_NE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>; 1210defm V_CMP_GE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>; 1211defm V_CMP_T_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>; 1212defm V_CMPX_F_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>; 1213defm V_CMPX_LT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>; 1214defm V_CMPX_EQ_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>; 1215defm V_CMPX_LE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>; 1216defm V_CMPX_GT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>; 1217defm V_CMPX_NE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>; 1218defm V_CMPX_GE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>; 1219defm V_CMPX_T_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>; 1220 1221//===----------------------------------------------------------------------===// 1222// GFX8, GFX9 (VI). 1223//===----------------------------------------------------------------------===// 1224 1225multiclass VOPC_Real_vi <bits<10> op> { 1226 let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in { 1227 def _e32_vi : 1228 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 1229 VOPCe<op{7-0}>; 1230 1231 def _e64_vi : 1232 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, 1233 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1234 // Encoding used for VOPC instructions encoded as VOP3 1235 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst 1236 bits<8> sdst; 1237 let Inst{7-0} = sdst; 1238 } 1239 } 1240 1241 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA>.ret in 1242 def _sdwa_vi : 1243 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1244 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1245 1246 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 1247 def _sdwa_gfx9 : 1248 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1249 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1250 1251 let AssemblerPredicate = isGFX8GFX9 in { 1252 defm : VOPCInstAliases<NAME, "vi">; 1253 } 1254} 1255 1256defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>; 1257defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>; 1258defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>; 1259defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>; 1260defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>; 1261defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>; 1262 1263defm V_CMP_F_F16 : VOPC_Real_vi <0x20>; 1264defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>; 1265defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>; 1266defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>; 1267defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>; 1268defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>; 1269defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>; 1270defm V_CMP_O_F16 : VOPC_Real_vi <0x27>; 1271defm V_CMP_U_F16 : VOPC_Real_vi <0x28>; 1272defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>; 1273defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>; 1274defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>; 1275defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>; 1276defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>; 1277defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>; 1278defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>; 1279 1280defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>; 1281defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>; 1282defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>; 1283defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>; 1284defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>; 1285defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>; 1286defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>; 1287defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>; 1288defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>; 1289defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>; 1290defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>; 1291defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>; 1292defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>; 1293defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>; 1294defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>; 1295defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>; 1296 1297defm V_CMP_F_F32 : VOPC_Real_vi <0x40>; 1298defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>; 1299defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>; 1300defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>; 1301defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>; 1302defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>; 1303defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>; 1304defm V_CMP_O_F32 : VOPC_Real_vi <0x47>; 1305defm V_CMP_U_F32 : VOPC_Real_vi <0x48>; 1306defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>; 1307defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>; 1308defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>; 1309defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>; 1310defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>; 1311defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>; 1312defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>; 1313 1314defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>; 1315defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>; 1316defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>; 1317defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>; 1318defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>; 1319defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>; 1320defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>; 1321defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>; 1322defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>; 1323defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>; 1324defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>; 1325defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>; 1326defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>; 1327defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>; 1328defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>; 1329defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>; 1330 1331defm V_CMP_F_F64 : VOPC_Real_vi <0x60>; 1332defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>; 1333defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>; 1334defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>; 1335defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>; 1336defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>; 1337defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>; 1338defm V_CMP_O_F64 : VOPC_Real_vi <0x67>; 1339defm V_CMP_U_F64 : VOPC_Real_vi <0x68>; 1340defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>; 1341defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>; 1342defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>; 1343defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>; 1344defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>; 1345defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>; 1346defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>; 1347 1348defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>; 1349defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>; 1350defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>; 1351defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>; 1352defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>; 1353defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>; 1354defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>; 1355defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>; 1356defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>; 1357defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>; 1358defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>; 1359defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>; 1360defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>; 1361defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>; 1362defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>; 1363defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>; 1364 1365defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>; 1366defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>; 1367defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>; 1368defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>; 1369defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>; 1370defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>; 1371defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>; 1372defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>; 1373 1374defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>; 1375defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>; 1376defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>; 1377defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>; 1378defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>; 1379defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>; 1380defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>; 1381defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>; 1382 1383defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>; 1384defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>; 1385defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>; 1386defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>; 1387defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>; 1388defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>; 1389defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>; 1390defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>; 1391 1392defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>; 1393defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>; 1394defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>; 1395defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>; 1396defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>; 1397defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>; 1398defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>; 1399defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>; 1400 1401defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>; 1402defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>; 1403defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>; 1404defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>; 1405defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>; 1406defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>; 1407defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>; 1408defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>; 1409 1410defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>; 1411defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>; 1412defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>; 1413defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>; 1414defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>; 1415defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>; 1416defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>; 1417defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>; 1418 1419defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>; 1420defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>; 1421defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>; 1422defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>; 1423defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>; 1424defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>; 1425defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>; 1426defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>; 1427 1428defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>; 1429defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>; 1430defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>; 1431defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>; 1432defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>; 1433defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>; 1434defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>; 1435defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>; 1436 1437defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>; 1438defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>; 1439defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>; 1440defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>; 1441defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>; 1442defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>; 1443defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>; 1444defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>; 1445 1446defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>; 1447defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>; 1448defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>; 1449defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>; 1450defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>; 1451defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>; 1452defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>; 1453defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>; 1454 1455defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>; 1456defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>; 1457defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>; 1458defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>; 1459defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>; 1460defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>; 1461defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>; 1462defm V_CMP_T_U64 : VOPC_Real_vi <0xef>; 1463 1464defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>; 1465defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>; 1466defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>; 1467defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>; 1468defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>; 1469defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>; 1470defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>; 1471defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>; 1472