1 //===-- AMDGPUBaseInfo.h - Top level definitions for AMDGPU -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUBASEINFO_H
11 #define LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUBASEINFO_H
12 
13 #include "AMDKernelCodeT.h"
14 #include "llvm/IR/CallingConv.h"
15 
16 namespace llvm {
17 
18 class FeatureBitset;
19 class Function;
20 class GlobalValue;
21 class MCContext;
22 class MCInstrDesc;
23 class MCRegisterInfo;
24 class MCSection;
25 class MCSubtargetInfo;
26 
27 namespace AMDGPU {
28 
29 struct IsaVersion {
30   unsigned Major;
31   unsigned Minor;
32   unsigned Stepping;
33 };
34 
35 IsaVersion getIsaVersion(const FeatureBitset &Features);
36 void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header,
37                                const FeatureBitset &Features);
38 MCSection *getHSATextSection(MCContext &Ctx);
39 
40 MCSection *getHSADataGlobalAgentSection(MCContext &Ctx);
41 
42 MCSection *getHSADataGlobalProgramSection(MCContext &Ctx);
43 
44 MCSection *getHSARodataReadonlyAgentSection(MCContext &Ctx);
45 
46 bool isGroupSegment(const GlobalValue *GV);
47 bool isGlobalSegment(const GlobalValue *GV);
48 bool isReadOnlySegment(const GlobalValue *GV);
49 
50 /// \returns Integer value requested using \p F's \p Name attribute.
51 ///
52 /// \returns \p Default if attribute is not present.
53 ///
54 /// \returns \p Default and emits error if requested value cannot be converted
55 /// to integer.
56 int getIntegerAttribute(const Function &F, StringRef Name, int Default);
57 
58 /// \returns A pair of integer values requested using \p F's \p Name attribute
59 /// in "first[,second]" format ("second" is optional unless \p OnlyFirstRequired
60 /// is false).
61 ///
62 /// \returns \p Default if attribute is not present.
63 ///
64 /// \returns \p Default and emits error if one of the requested values cannot be
65 /// converted to integer, or \p OnlyFirstRequired is false and "second" value is
66 /// not present.
67 std::pair<int, int> getIntegerPairAttribute(const Function &F,
68                                             StringRef Name,
69                                             std::pair<int, int> Default,
70                                             bool OnlyFirstRequired = false);
71 
72 unsigned getInitialPSInputAddr(const Function &F);
73 
74 bool isShader(CallingConv::ID cc);
75 bool isCompute(CallingConv::ID cc);
76 
77 bool isSI(const MCSubtargetInfo &STI);
78 bool isCI(const MCSubtargetInfo &STI);
79 bool isVI(const MCSubtargetInfo &STI);
80 
81 /// If \p Reg is a pseudo reg, return the correct hardware register given
82 /// \p STI otherwise return \p Reg.
83 unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI);
84 
85 /// \brief Can this operand also contain immediate values?
86 bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo);
87 
88 /// \brief Is this floating-point operand?
89 bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo);
90 
91 /// \brief Does this opearnd support only inlinable literals?
92 bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo);
93 
94 /// \brief Get size of register operand
95 unsigned getRegOperandSize(const MCRegisterInfo *MRI, const MCInstrDesc &Desc,
96                            unsigned OpNo);
97 
98 /// \brief Is this literal inlinable
99 bool isInlinableLiteral64(int64_t Literal, bool IsVI);
100 bool isInlinableLiteral32(int32_t Literal, bool IsVI);
101 
102 } // end namespace AMDGPU
103 } // end namespace llvm
104 
105 #endif
106