1 //===-- AMDGPUAsmUtils.cpp - AsmParser/InstPrinter common -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 #include "AMDGPUAsmUtils.h"
9 #include "AMDGPUBaseInfo.h"
10 #include "SIDefines.h"
11 
12 namespace llvm {
13 namespace AMDGPU {
14 
15 namespace DepCtr {
16 
17 // NOLINTBEGIN
18 const CustomOperandVal DepCtrInfo[] = {
19   // Name               max dflt offset width  constraint
20   {{"depctr_hold_cnt"},  1,   1,    7,    1,   isGFX10_BEncoding},
21   {{"depctr_sa_sdst"},   1,   1,    0,    1},
22   {{"depctr_va_vdst"},  15,  15,   12,    4},
23   {{"depctr_va_sdst"},   7,   7,    9,    3},
24   {{"depctr_va_ssrc"},   1,   1,    8,    1},
25   {{"depctr_va_vcc"},    1,   1,    1,    1},
26   {{"depctr_vm_vsrc"},   7,   7,    2,    3},
27 };
28 // NOLINTEND
29 
30 const int DEP_CTR_SIZE =
31     static_cast<int>(sizeof(DepCtrInfo) / sizeof(CustomOperandVal));
32 
33 } // namespace DepCtr
34 
35 namespace SendMsg {
36 
37 // Disable lint checking for this block since it makes the table unreadable.
38 // NOLINTBEGIN
39 const CustomOperand<const MCSubtargetInfo &> Msg[] = {
40   {{""}},
41   {{"MSG_INTERRUPT"},           ID_INTERRUPT},
42   {{"MSG_GS"},                  ID_GS},
43   {{"MSG_GS_DONE"},             ID_GS_DONE},
44   {{"MSG_SAVEWAVE"},            ID_SAVEWAVE,            isGFX8Plus},
45   {{"MSG_STALL_WAVE_GEN"},      ID_STALL_WAVE_GEN,      isGFX9Plus},
46   {{"MSG_HALT_WAVES"},          ID_HALT_WAVES,          isGFX9Plus},
47   {{"MSG_ORDERED_PS_DONE"},     ID_ORDERED_PS_DONE,     isGFX9Plus},
48   {{"MSG_EARLY_PRIM_DEALLOC"},  ID_EARLY_PRIM_DEALLOC,  isGFX9},
49   {{"MSG_GS_ALLOC_REQ"},        ID_GS_ALLOC_REQ,        isGFX9Plus},
50   {{"MSG_GET_DOORBELL"},        ID_GET_DOORBELL,        isGFX9Plus},
51   {{"MSG_GET_DDID"},            ID_GET_DDID,            isGFX10Plus},
52   {{""}},
53   {{""}},
54   {{""}},
55   {{"MSG_SYSMSG"},              ID_SYSMSG},
56 };
57 // NOLINTEND
58 
59 const int MSG_SIZE = static_cast<int>(
60     sizeof(Msg) / sizeof(CustomOperand<const MCSubtargetInfo &>));
61 
62 // These two must be in sync with llvm::AMDGPU::SendMsg::Op enum members, see SIDefines.h.
63 const char *const OpSysSymbolic[OP_SYS_LAST_] = {
64   nullptr,
65   "SYSMSG_OP_ECC_ERR_INTERRUPT",
66   "SYSMSG_OP_REG_RD",
67   "SYSMSG_OP_HOST_TRAP_ACK",
68   "SYSMSG_OP_TTRACE_PC"
69 };
70 
71 const char *const OpGsSymbolic[OP_GS_LAST_] = {
72   "GS_OP_NOP",
73   "GS_OP_CUT",
74   "GS_OP_EMIT",
75   "GS_OP_EMIT_CUT"
76 };
77 
78 } // namespace SendMsg
79 
80 namespace Hwreg {
81 
82 // Disable lint checking for this block since it makes the table unreadable.
83 // NOLINTBEGIN
84 const CustomOperand<const MCSubtargetInfo &> Opr[] = {
85   {{""}},
86   {{"HW_REG_MODE"},          ID_MODE},
87   {{"HW_REG_STATUS"},        ID_STATUS},
88   {{"HW_REG_TRAPSTS"},       ID_TRAPSTS},
89   {{"HW_REG_HW_ID"},         ID_HW_ID,       isNotGFX10Plus},
90   {{"HW_REG_GPR_ALLOC"},     ID_GPR_ALLOC},
91   {{"HW_REG_LDS_ALLOC"},     ID_LDS_ALLOC},
92   {{"HW_REG_IB_STS"},        ID_IB_STS},
93   {{""}},
94   {{""}},
95   {{""}},
96   {{""}},
97   {{""}},
98   {{""}},
99   {{""}},
100   {{"HW_REG_SH_MEM_BASES"},  ID_MEM_BASES,   isGFX9Plus},
101   {{"HW_REG_TBA_LO"},        ID_TBA_LO,      isGFX9_GFX10},
102   {{"HW_REG_TBA_HI"},        ID_TBA_HI,      isGFX9_GFX10},
103   {{"HW_REG_TMA_LO"},        ID_TMA_LO,      isGFX9_GFX10},
104   {{"HW_REG_TMA_HI"},        ID_TMA_HI,      isGFX9_GFX10},
105   {{"HW_REG_FLAT_SCR_LO"},   ID_FLAT_SCR_LO, isGFX10Plus},
106   {{"HW_REG_FLAT_SCR_HI"},   ID_FLAT_SCR_HI, isGFX10Plus},
107   {{"HW_REG_XNACK_MASK"},    ID_XNACK_MASK,  isGFX10Before1030},
108   {{"HW_REG_HW_ID1"},        ID_HW_ID1,      isGFX10Plus},
109   {{"HW_REG_HW_ID2"},        ID_HW_ID2,      isGFX10Plus},
110   {{"HW_REG_POPS_PACKER"},   ID_POPS_PACKER, isGFX10},
111   {{""}},
112   {{""}},
113   {{""}},
114   {{"HW_REG_SHADER_CYCLES"}, ID_SHADER_CYCLES, isGFX10_BEncoding},
115 
116   // GFX940 specific registers
117   {{"HW_REG_XCC_ID"},                 ID_XCC_ID,                 isGFX940},
118   {{"HW_REG_SQ_PERF_SNAPSHOT_DATA"},  ID_SQ_PERF_SNAPSHOT_DATA,  isGFX940},
119   {{"HW_REG_SQ_PERF_SNAPSHOT_DATA1"}, ID_SQ_PERF_SNAPSHOT_DATA1, isGFX940},
120   {{"HW_REG_SQ_PERF_SNAPSHOT_PC_LO"}, ID_SQ_PERF_SNAPSHOT_PC_LO, isGFX940},
121   {{"HW_REG_SQ_PERF_SNAPSHOT_PC_HI"}, ID_SQ_PERF_SNAPSHOT_PC_HI, isGFX940},
122 
123   // Aliases
124   {{"HW_REG_HW_ID"},                  ID_HW_ID1,                 isGFX10},
125 };
126 // NOLINTEND
127 
128 const int OPR_SIZE = static_cast<int>(
129     sizeof(Opr) / sizeof(CustomOperand<const MCSubtargetInfo &>));
130 
131 } // namespace Hwreg
132 
133 namespace MTBUFFormat {
134 
135 StringLiteral const DfmtSymbolic[] = {
136   "BUF_DATA_FORMAT_INVALID",
137   "BUF_DATA_FORMAT_8",
138   "BUF_DATA_FORMAT_16",
139   "BUF_DATA_FORMAT_8_8",
140   "BUF_DATA_FORMAT_32",
141   "BUF_DATA_FORMAT_16_16",
142   "BUF_DATA_FORMAT_10_11_11",
143   "BUF_DATA_FORMAT_11_11_10",
144   "BUF_DATA_FORMAT_10_10_10_2",
145   "BUF_DATA_FORMAT_2_10_10_10",
146   "BUF_DATA_FORMAT_8_8_8_8",
147   "BUF_DATA_FORMAT_32_32",
148   "BUF_DATA_FORMAT_16_16_16_16",
149   "BUF_DATA_FORMAT_32_32_32",
150   "BUF_DATA_FORMAT_32_32_32_32",
151   "BUF_DATA_FORMAT_RESERVED_15"
152 };
153 
154 StringLiteral const NfmtSymbolicGFX10[] = {
155   "BUF_NUM_FORMAT_UNORM",
156   "BUF_NUM_FORMAT_SNORM",
157   "BUF_NUM_FORMAT_USCALED",
158   "BUF_NUM_FORMAT_SSCALED",
159   "BUF_NUM_FORMAT_UINT",
160   "BUF_NUM_FORMAT_SINT",
161   "",
162   "BUF_NUM_FORMAT_FLOAT"
163 };
164 
165 StringLiteral const NfmtSymbolicSICI[] = {
166   "BUF_NUM_FORMAT_UNORM",
167   "BUF_NUM_FORMAT_SNORM",
168   "BUF_NUM_FORMAT_USCALED",
169   "BUF_NUM_FORMAT_SSCALED",
170   "BUF_NUM_FORMAT_UINT",
171   "BUF_NUM_FORMAT_SINT",
172   "BUF_NUM_FORMAT_SNORM_OGL",
173   "BUF_NUM_FORMAT_FLOAT"
174 };
175 
176 StringLiteral const NfmtSymbolicVI[] = {    // VI and GFX9
177   "BUF_NUM_FORMAT_UNORM",
178   "BUF_NUM_FORMAT_SNORM",
179   "BUF_NUM_FORMAT_USCALED",
180   "BUF_NUM_FORMAT_SSCALED",
181   "BUF_NUM_FORMAT_UINT",
182   "BUF_NUM_FORMAT_SINT",
183   "BUF_NUM_FORMAT_RESERVED_6",
184   "BUF_NUM_FORMAT_FLOAT"
185 };
186 
187 StringLiteral const UfmtSymbolic[] = {
188   "BUF_FMT_INVALID",
189 
190   "BUF_FMT_8_UNORM",
191   "BUF_FMT_8_SNORM",
192   "BUF_FMT_8_USCALED",
193   "BUF_FMT_8_SSCALED",
194   "BUF_FMT_8_UINT",
195   "BUF_FMT_8_SINT",
196 
197   "BUF_FMT_16_UNORM",
198   "BUF_FMT_16_SNORM",
199   "BUF_FMT_16_USCALED",
200   "BUF_FMT_16_SSCALED",
201   "BUF_FMT_16_UINT",
202   "BUF_FMT_16_SINT",
203   "BUF_FMT_16_FLOAT",
204 
205   "BUF_FMT_8_8_UNORM",
206   "BUF_FMT_8_8_SNORM",
207   "BUF_FMT_8_8_USCALED",
208   "BUF_FMT_8_8_SSCALED",
209   "BUF_FMT_8_8_UINT",
210   "BUF_FMT_8_8_SINT",
211 
212   "BUF_FMT_32_UINT",
213   "BUF_FMT_32_SINT",
214   "BUF_FMT_32_FLOAT",
215 
216   "BUF_FMT_16_16_UNORM",
217   "BUF_FMT_16_16_SNORM",
218   "BUF_FMT_16_16_USCALED",
219   "BUF_FMT_16_16_SSCALED",
220   "BUF_FMT_16_16_UINT",
221   "BUF_FMT_16_16_SINT",
222   "BUF_FMT_16_16_FLOAT",
223 
224   "BUF_FMT_10_11_11_UNORM",
225   "BUF_FMT_10_11_11_SNORM",
226   "BUF_FMT_10_11_11_USCALED",
227   "BUF_FMT_10_11_11_SSCALED",
228   "BUF_FMT_10_11_11_UINT",
229   "BUF_FMT_10_11_11_SINT",
230   "BUF_FMT_10_11_11_FLOAT",
231 
232   "BUF_FMT_11_11_10_UNORM",
233   "BUF_FMT_11_11_10_SNORM",
234   "BUF_FMT_11_11_10_USCALED",
235   "BUF_FMT_11_11_10_SSCALED",
236   "BUF_FMT_11_11_10_UINT",
237   "BUF_FMT_11_11_10_SINT",
238   "BUF_FMT_11_11_10_FLOAT",
239 
240   "BUF_FMT_10_10_10_2_UNORM",
241   "BUF_FMT_10_10_10_2_SNORM",
242   "BUF_FMT_10_10_10_2_USCALED",
243   "BUF_FMT_10_10_10_2_SSCALED",
244   "BUF_FMT_10_10_10_2_UINT",
245   "BUF_FMT_10_10_10_2_SINT",
246 
247   "BUF_FMT_2_10_10_10_UNORM",
248   "BUF_FMT_2_10_10_10_SNORM",
249   "BUF_FMT_2_10_10_10_USCALED",
250   "BUF_FMT_2_10_10_10_SSCALED",
251   "BUF_FMT_2_10_10_10_UINT",
252   "BUF_FMT_2_10_10_10_SINT",
253 
254   "BUF_FMT_8_8_8_8_UNORM",
255   "BUF_FMT_8_8_8_8_SNORM",
256   "BUF_FMT_8_8_8_8_USCALED",
257   "BUF_FMT_8_8_8_8_SSCALED",
258   "BUF_FMT_8_8_8_8_UINT",
259   "BUF_FMT_8_8_8_8_SINT",
260 
261   "BUF_FMT_32_32_UINT",
262   "BUF_FMT_32_32_SINT",
263   "BUF_FMT_32_32_FLOAT",
264 
265   "BUF_FMT_16_16_16_16_UNORM",
266   "BUF_FMT_16_16_16_16_SNORM",
267   "BUF_FMT_16_16_16_16_USCALED",
268   "BUF_FMT_16_16_16_16_SSCALED",
269   "BUF_FMT_16_16_16_16_UINT",
270   "BUF_FMT_16_16_16_16_SINT",
271   "BUF_FMT_16_16_16_16_FLOAT",
272 
273   "BUF_FMT_32_32_32_UINT",
274   "BUF_FMT_32_32_32_SINT",
275   "BUF_FMT_32_32_32_FLOAT",
276   "BUF_FMT_32_32_32_32_UINT",
277   "BUF_FMT_32_32_32_32_SINT",
278   "BUF_FMT_32_32_32_32_FLOAT"
279 };
280 
281 unsigned const DfmtNfmt2UFmt[] = {
282   DFMT_INVALID     | (NFMT_UNORM   << NFMT_SHIFT),
283 
284   DFMT_8           | (NFMT_UNORM   << NFMT_SHIFT),
285   DFMT_8           | (NFMT_SNORM   << NFMT_SHIFT),
286   DFMT_8           | (NFMT_USCALED << NFMT_SHIFT),
287   DFMT_8           | (NFMT_SSCALED << NFMT_SHIFT),
288   DFMT_8           | (NFMT_UINT    << NFMT_SHIFT),
289   DFMT_8           | (NFMT_SINT    << NFMT_SHIFT),
290 
291   DFMT_16          | (NFMT_UNORM   << NFMT_SHIFT),
292   DFMT_16          | (NFMT_SNORM   << NFMT_SHIFT),
293   DFMT_16          | (NFMT_USCALED << NFMT_SHIFT),
294   DFMT_16          | (NFMT_SSCALED << NFMT_SHIFT),
295   DFMT_16          | (NFMT_UINT    << NFMT_SHIFT),
296   DFMT_16          | (NFMT_SINT    << NFMT_SHIFT),
297   DFMT_16          | (NFMT_FLOAT   << NFMT_SHIFT),
298 
299   DFMT_8_8         | (NFMT_UNORM   << NFMT_SHIFT),
300   DFMT_8_8         | (NFMT_SNORM   << NFMT_SHIFT),
301   DFMT_8_8         | (NFMT_USCALED << NFMT_SHIFT),
302   DFMT_8_8         | (NFMT_SSCALED << NFMT_SHIFT),
303   DFMT_8_8         | (NFMT_UINT    << NFMT_SHIFT),
304   DFMT_8_8         | (NFMT_SINT    << NFMT_SHIFT),
305 
306   DFMT_32          | (NFMT_UINT    << NFMT_SHIFT),
307   DFMT_32          | (NFMT_SINT    << NFMT_SHIFT),
308   DFMT_32          | (NFMT_FLOAT   << NFMT_SHIFT),
309 
310   DFMT_16_16       | (NFMT_UNORM   << NFMT_SHIFT),
311   DFMT_16_16       | (NFMT_SNORM   << NFMT_SHIFT),
312   DFMT_16_16       | (NFMT_USCALED << NFMT_SHIFT),
313   DFMT_16_16       | (NFMT_SSCALED << NFMT_SHIFT),
314   DFMT_16_16       | (NFMT_UINT    << NFMT_SHIFT),
315   DFMT_16_16       | (NFMT_SINT    << NFMT_SHIFT),
316   DFMT_16_16       | (NFMT_FLOAT   << NFMT_SHIFT),
317 
318   DFMT_10_11_11    | (NFMT_UNORM   << NFMT_SHIFT),
319   DFMT_10_11_11    | (NFMT_SNORM   << NFMT_SHIFT),
320   DFMT_10_11_11    | (NFMT_USCALED << NFMT_SHIFT),
321   DFMT_10_11_11    | (NFMT_SSCALED << NFMT_SHIFT),
322   DFMT_10_11_11    | (NFMT_UINT    << NFMT_SHIFT),
323   DFMT_10_11_11    | (NFMT_SINT    << NFMT_SHIFT),
324   DFMT_10_11_11    | (NFMT_FLOAT   << NFMT_SHIFT),
325 
326   DFMT_11_11_10    | (NFMT_UNORM   << NFMT_SHIFT),
327   DFMT_11_11_10    | (NFMT_SNORM   << NFMT_SHIFT),
328   DFMT_11_11_10    | (NFMT_USCALED << NFMT_SHIFT),
329   DFMT_11_11_10    | (NFMT_SSCALED << NFMT_SHIFT),
330   DFMT_11_11_10    | (NFMT_UINT    << NFMT_SHIFT),
331   DFMT_11_11_10    | (NFMT_SINT    << NFMT_SHIFT),
332   DFMT_11_11_10    | (NFMT_FLOAT   << NFMT_SHIFT),
333 
334   DFMT_10_10_10_2  | (NFMT_UNORM   << NFMT_SHIFT),
335   DFMT_10_10_10_2  | (NFMT_SNORM   << NFMT_SHIFT),
336   DFMT_10_10_10_2  | (NFMT_USCALED << NFMT_SHIFT),
337   DFMT_10_10_10_2  | (NFMT_SSCALED << NFMT_SHIFT),
338   DFMT_10_10_10_2  | (NFMT_UINT    << NFMT_SHIFT),
339   DFMT_10_10_10_2  | (NFMT_SINT    << NFMT_SHIFT),
340 
341   DFMT_2_10_10_10  | (NFMT_UNORM   << NFMT_SHIFT),
342   DFMT_2_10_10_10  | (NFMT_SNORM   << NFMT_SHIFT),
343   DFMT_2_10_10_10  | (NFMT_USCALED << NFMT_SHIFT),
344   DFMT_2_10_10_10  | (NFMT_SSCALED << NFMT_SHIFT),
345   DFMT_2_10_10_10  | (NFMT_UINT    << NFMT_SHIFT),
346   DFMT_2_10_10_10  | (NFMT_SINT    << NFMT_SHIFT),
347 
348   DFMT_8_8_8_8     | (NFMT_UNORM   << NFMT_SHIFT),
349   DFMT_8_8_8_8     | (NFMT_SNORM   << NFMT_SHIFT),
350   DFMT_8_8_8_8     | (NFMT_USCALED << NFMT_SHIFT),
351   DFMT_8_8_8_8     | (NFMT_SSCALED << NFMT_SHIFT),
352   DFMT_8_8_8_8     | (NFMT_UINT    << NFMT_SHIFT),
353   DFMT_8_8_8_8     | (NFMT_SINT    << NFMT_SHIFT),
354 
355   DFMT_32_32       | (NFMT_UINT    << NFMT_SHIFT),
356   DFMT_32_32       | (NFMT_SINT    << NFMT_SHIFT),
357   DFMT_32_32       | (NFMT_FLOAT   << NFMT_SHIFT),
358 
359   DFMT_16_16_16_16 | (NFMT_UNORM   << NFMT_SHIFT),
360   DFMT_16_16_16_16 | (NFMT_SNORM   << NFMT_SHIFT),
361   DFMT_16_16_16_16 | (NFMT_USCALED << NFMT_SHIFT),
362   DFMT_16_16_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
363   DFMT_16_16_16_16 | (NFMT_UINT    << NFMT_SHIFT),
364   DFMT_16_16_16_16 | (NFMT_SINT    << NFMT_SHIFT),
365   DFMT_16_16_16_16 | (NFMT_FLOAT   << NFMT_SHIFT),
366 
367   DFMT_32_32_32    | (NFMT_UINT    << NFMT_SHIFT),
368   DFMT_32_32_32    | (NFMT_SINT    << NFMT_SHIFT),
369   DFMT_32_32_32    | (NFMT_FLOAT   << NFMT_SHIFT),
370   DFMT_32_32_32_32 | (NFMT_UINT    << NFMT_SHIFT),
371   DFMT_32_32_32_32 | (NFMT_SINT    << NFMT_SHIFT),
372   DFMT_32_32_32_32 | (NFMT_FLOAT   << NFMT_SHIFT)
373 };
374 
375 } // namespace MTBUFFormat
376 
377 namespace Swizzle {
378 
379 // This must be in sync with llvm::AMDGPU::Swizzle::Id enum members, see SIDefines.h.
380 const char* const IdSymbolic[] = {
381   "QUAD_PERM",
382   "BITMASK_PERM",
383   "SWAP",
384   "REVERSE",
385   "BROADCAST",
386 };
387 
388 } // namespace Swizzle
389 
390 namespace VGPRIndexMode {
391 
392 // This must be in sync with llvm::AMDGPU::VGPRIndexMode::Id enum members, see SIDefines.h.
393 const char* const IdSymbolic[] = {
394   "SRC0",
395   "SRC1",
396   "SRC2",
397   "DST",
398 };
399 
400 } // namespace VGPRIndexMode
401 
402 } // namespace AMDGPU
403 } // namespace llvm
404