1 //===-- AMDGPUAsmUtils.cpp - AsmParser/InstPrinter common -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 #include "AMDGPUAsmUtils.h"
9 #include "SIDefines.h"
10 
11 #include "llvm/ADT/StringRef.h"
12 
13 namespace llvm {
14 namespace AMDGPU {
15 namespace SendMsg {
16 
17 // This must be in sync with llvm::AMDGPU::SendMsg::Id enum members, see SIDefines.h.
18 const char *const IdSymbolic[ID_GAPS_LAST_] = {
19   nullptr,
20   "MSG_INTERRUPT",
21   "MSG_GS",
22   "MSG_GS_DONE",
23   "MSG_SAVEWAVE",
24   "MSG_STALL_WAVE_GEN",
25   "MSG_HALT_WAVES",
26   "MSG_ORDERED_PS_DONE",
27   "MSG_EARLY_PRIM_DEALLOC",
28   "MSG_GS_ALLOC_REQ",
29   "MSG_GET_DOORBELL",
30   "MSG_GET_DDID",
31   nullptr,
32   nullptr,
33   nullptr,
34   "MSG_SYSMSG"
35 };
36 
37 // These two must be in sync with llvm::AMDGPU::SendMsg::Op enum members, see SIDefines.h.
38 const char *const OpSysSymbolic[OP_SYS_LAST_] = {
39   nullptr,
40   "SYSMSG_OP_ECC_ERR_INTERRUPT",
41   "SYSMSG_OP_REG_RD",
42   "SYSMSG_OP_HOST_TRAP_ACK",
43   "SYSMSG_OP_TTRACE_PC"
44 };
45 
46 const char *const OpGsSymbolic[OP_GS_LAST_] = {
47   "GS_OP_NOP",
48   "GS_OP_CUT",
49   "GS_OP_EMIT",
50   "GS_OP_EMIT_CUT"
51 };
52 
53 } // namespace SendMsg
54 
55 namespace Hwreg {
56 
57 // This must be in sync with llvm::AMDGPU::Hwreg::ID_SYMBOLIC_FIRST_/LAST_, see SIDefines.h.
58 const char* const IdSymbolic[] = {
59   nullptr,
60   "HW_REG_MODE",
61   "HW_REG_STATUS",
62   "HW_REG_TRAPSTS",
63   "HW_REG_HW_ID",
64   "HW_REG_GPR_ALLOC",
65   "HW_REG_LDS_ALLOC",
66   "HW_REG_IB_STS",
67   nullptr,
68   nullptr,
69   nullptr,
70   nullptr,
71   nullptr,
72   nullptr,
73   nullptr,
74   "HW_REG_SH_MEM_BASES",
75   "HW_REG_TBA_LO",
76   "HW_REG_TBA_HI",
77   "HW_REG_TMA_LO",
78   "HW_REG_TMA_HI",
79   "HW_REG_FLAT_SCR_LO",
80   "HW_REG_FLAT_SCR_HI",
81   "HW_REG_XNACK_MASK",
82   "HW_REG_HW_ID1",
83   "HW_REG_HW_ID2",
84   "HW_REG_POPS_PACKER",
85   nullptr,
86   nullptr,
87   nullptr,
88   "HW_REG_SHADER_CYCLES"
89 };
90 
91 // This is gfx940 specific portion from ID_SYMBOLIC_FIRST_GFX940_ to
92 // ID_SYMBOLIC_LAST_GFX940_
93 const char* const IdSymbolicGFX940Specific[] = {
94   "HW_REG_XCC_ID",
95   "HW_REG_SQ_PERF_SNAPSHOT_DATA",
96   "HW_REG_SQ_PERF_SNAPSHOT_DATA1",
97   "HW_REG_SQ_PERF_SNAPSHOT_PC_LO",
98   "HW_REG_SQ_PERF_SNAPSHOT_PC_HI"
99 };
100 
101 } // namespace Hwreg
102 
103 namespace MTBUFFormat {
104 
105 StringLiteral const DfmtSymbolic[] = {
106   "BUF_DATA_FORMAT_INVALID",
107   "BUF_DATA_FORMAT_8",
108   "BUF_DATA_FORMAT_16",
109   "BUF_DATA_FORMAT_8_8",
110   "BUF_DATA_FORMAT_32",
111   "BUF_DATA_FORMAT_16_16",
112   "BUF_DATA_FORMAT_10_11_11",
113   "BUF_DATA_FORMAT_11_11_10",
114   "BUF_DATA_FORMAT_10_10_10_2",
115   "BUF_DATA_FORMAT_2_10_10_10",
116   "BUF_DATA_FORMAT_8_8_8_8",
117   "BUF_DATA_FORMAT_32_32",
118   "BUF_DATA_FORMAT_16_16_16_16",
119   "BUF_DATA_FORMAT_32_32_32",
120   "BUF_DATA_FORMAT_32_32_32_32",
121   "BUF_DATA_FORMAT_RESERVED_15"
122 };
123 
124 StringLiteral const NfmtSymbolicGFX10[] = {
125   "BUF_NUM_FORMAT_UNORM",
126   "BUF_NUM_FORMAT_SNORM",
127   "BUF_NUM_FORMAT_USCALED",
128   "BUF_NUM_FORMAT_SSCALED",
129   "BUF_NUM_FORMAT_UINT",
130   "BUF_NUM_FORMAT_SINT",
131   "",
132   "BUF_NUM_FORMAT_FLOAT"
133 };
134 
135 StringLiteral const NfmtSymbolicSICI[] = {
136   "BUF_NUM_FORMAT_UNORM",
137   "BUF_NUM_FORMAT_SNORM",
138   "BUF_NUM_FORMAT_USCALED",
139   "BUF_NUM_FORMAT_SSCALED",
140   "BUF_NUM_FORMAT_UINT",
141   "BUF_NUM_FORMAT_SINT",
142   "BUF_NUM_FORMAT_SNORM_OGL",
143   "BUF_NUM_FORMAT_FLOAT"
144 };
145 
146 StringLiteral const NfmtSymbolicVI[] = {    // VI and GFX9
147   "BUF_NUM_FORMAT_UNORM",
148   "BUF_NUM_FORMAT_SNORM",
149   "BUF_NUM_FORMAT_USCALED",
150   "BUF_NUM_FORMAT_SSCALED",
151   "BUF_NUM_FORMAT_UINT",
152   "BUF_NUM_FORMAT_SINT",
153   "BUF_NUM_FORMAT_RESERVED_6",
154   "BUF_NUM_FORMAT_FLOAT"
155 };
156 
157 StringLiteral const UfmtSymbolic[] = {
158   "BUF_FMT_INVALID",
159 
160   "BUF_FMT_8_UNORM",
161   "BUF_FMT_8_SNORM",
162   "BUF_FMT_8_USCALED",
163   "BUF_FMT_8_SSCALED",
164   "BUF_FMT_8_UINT",
165   "BUF_FMT_8_SINT",
166 
167   "BUF_FMT_16_UNORM",
168   "BUF_FMT_16_SNORM",
169   "BUF_FMT_16_USCALED",
170   "BUF_FMT_16_SSCALED",
171   "BUF_FMT_16_UINT",
172   "BUF_FMT_16_SINT",
173   "BUF_FMT_16_FLOAT",
174 
175   "BUF_FMT_8_8_UNORM",
176   "BUF_FMT_8_8_SNORM",
177   "BUF_FMT_8_8_USCALED",
178   "BUF_FMT_8_8_SSCALED",
179   "BUF_FMT_8_8_UINT",
180   "BUF_FMT_8_8_SINT",
181 
182   "BUF_FMT_32_UINT",
183   "BUF_FMT_32_SINT",
184   "BUF_FMT_32_FLOAT",
185 
186   "BUF_FMT_16_16_UNORM",
187   "BUF_FMT_16_16_SNORM",
188   "BUF_FMT_16_16_USCALED",
189   "BUF_FMT_16_16_SSCALED",
190   "BUF_FMT_16_16_UINT",
191   "BUF_FMT_16_16_SINT",
192   "BUF_FMT_16_16_FLOAT",
193 
194   "BUF_FMT_10_11_11_UNORM",
195   "BUF_FMT_10_11_11_SNORM",
196   "BUF_FMT_10_11_11_USCALED",
197   "BUF_FMT_10_11_11_SSCALED",
198   "BUF_FMT_10_11_11_UINT",
199   "BUF_FMT_10_11_11_SINT",
200   "BUF_FMT_10_11_11_FLOAT",
201 
202   "BUF_FMT_11_11_10_UNORM",
203   "BUF_FMT_11_11_10_SNORM",
204   "BUF_FMT_11_11_10_USCALED",
205   "BUF_FMT_11_11_10_SSCALED",
206   "BUF_FMT_11_11_10_UINT",
207   "BUF_FMT_11_11_10_SINT",
208   "BUF_FMT_11_11_10_FLOAT",
209 
210   "BUF_FMT_10_10_10_2_UNORM",
211   "BUF_FMT_10_10_10_2_SNORM",
212   "BUF_FMT_10_10_10_2_USCALED",
213   "BUF_FMT_10_10_10_2_SSCALED",
214   "BUF_FMT_10_10_10_2_UINT",
215   "BUF_FMT_10_10_10_2_SINT",
216 
217   "BUF_FMT_2_10_10_10_UNORM",
218   "BUF_FMT_2_10_10_10_SNORM",
219   "BUF_FMT_2_10_10_10_USCALED",
220   "BUF_FMT_2_10_10_10_SSCALED",
221   "BUF_FMT_2_10_10_10_UINT",
222   "BUF_FMT_2_10_10_10_SINT",
223 
224   "BUF_FMT_8_8_8_8_UNORM",
225   "BUF_FMT_8_8_8_8_SNORM",
226   "BUF_FMT_8_8_8_8_USCALED",
227   "BUF_FMT_8_8_8_8_SSCALED",
228   "BUF_FMT_8_8_8_8_UINT",
229   "BUF_FMT_8_8_8_8_SINT",
230 
231   "BUF_FMT_32_32_UINT",
232   "BUF_FMT_32_32_SINT",
233   "BUF_FMT_32_32_FLOAT",
234 
235   "BUF_FMT_16_16_16_16_UNORM",
236   "BUF_FMT_16_16_16_16_SNORM",
237   "BUF_FMT_16_16_16_16_USCALED",
238   "BUF_FMT_16_16_16_16_SSCALED",
239   "BUF_FMT_16_16_16_16_UINT",
240   "BUF_FMT_16_16_16_16_SINT",
241   "BUF_FMT_16_16_16_16_FLOAT",
242 
243   "BUF_FMT_32_32_32_UINT",
244   "BUF_FMT_32_32_32_SINT",
245   "BUF_FMT_32_32_32_FLOAT",
246   "BUF_FMT_32_32_32_32_UINT",
247   "BUF_FMT_32_32_32_32_SINT",
248   "BUF_FMT_32_32_32_32_FLOAT"
249 };
250 
251 unsigned const DfmtNfmt2UFmt[] = {
252   DFMT_INVALID     | (NFMT_UNORM   << NFMT_SHIFT),
253 
254   DFMT_8           | (NFMT_UNORM   << NFMT_SHIFT),
255   DFMT_8           | (NFMT_SNORM   << NFMT_SHIFT),
256   DFMT_8           | (NFMT_USCALED << NFMT_SHIFT),
257   DFMT_8           | (NFMT_SSCALED << NFMT_SHIFT),
258   DFMT_8           | (NFMT_UINT    << NFMT_SHIFT),
259   DFMT_8           | (NFMT_SINT    << NFMT_SHIFT),
260 
261   DFMT_16          | (NFMT_UNORM   << NFMT_SHIFT),
262   DFMT_16          | (NFMT_SNORM   << NFMT_SHIFT),
263   DFMT_16          | (NFMT_USCALED << NFMT_SHIFT),
264   DFMT_16          | (NFMT_SSCALED << NFMT_SHIFT),
265   DFMT_16          | (NFMT_UINT    << NFMT_SHIFT),
266   DFMT_16          | (NFMT_SINT    << NFMT_SHIFT),
267   DFMT_16          | (NFMT_FLOAT   << NFMT_SHIFT),
268 
269   DFMT_8_8         | (NFMT_UNORM   << NFMT_SHIFT),
270   DFMT_8_8         | (NFMT_SNORM   << NFMT_SHIFT),
271   DFMT_8_8         | (NFMT_USCALED << NFMT_SHIFT),
272   DFMT_8_8         | (NFMT_SSCALED << NFMT_SHIFT),
273   DFMT_8_8         | (NFMT_UINT    << NFMT_SHIFT),
274   DFMT_8_8         | (NFMT_SINT    << NFMT_SHIFT),
275 
276   DFMT_32          | (NFMT_UINT    << NFMT_SHIFT),
277   DFMT_32          | (NFMT_SINT    << NFMT_SHIFT),
278   DFMT_32          | (NFMT_FLOAT   << NFMT_SHIFT),
279 
280   DFMT_16_16       | (NFMT_UNORM   << NFMT_SHIFT),
281   DFMT_16_16       | (NFMT_SNORM   << NFMT_SHIFT),
282   DFMT_16_16       | (NFMT_USCALED << NFMT_SHIFT),
283   DFMT_16_16       | (NFMT_SSCALED << NFMT_SHIFT),
284   DFMT_16_16       | (NFMT_UINT    << NFMT_SHIFT),
285   DFMT_16_16       | (NFMT_SINT    << NFMT_SHIFT),
286   DFMT_16_16       | (NFMT_FLOAT   << NFMT_SHIFT),
287 
288   DFMT_10_11_11    | (NFMT_UNORM   << NFMT_SHIFT),
289   DFMT_10_11_11    | (NFMT_SNORM   << NFMT_SHIFT),
290   DFMT_10_11_11    | (NFMT_USCALED << NFMT_SHIFT),
291   DFMT_10_11_11    | (NFMT_SSCALED << NFMT_SHIFT),
292   DFMT_10_11_11    | (NFMT_UINT    << NFMT_SHIFT),
293   DFMT_10_11_11    | (NFMT_SINT    << NFMT_SHIFT),
294   DFMT_10_11_11    | (NFMT_FLOAT   << NFMT_SHIFT),
295 
296   DFMT_11_11_10    | (NFMT_UNORM   << NFMT_SHIFT),
297   DFMT_11_11_10    | (NFMT_SNORM   << NFMT_SHIFT),
298   DFMT_11_11_10    | (NFMT_USCALED << NFMT_SHIFT),
299   DFMT_11_11_10    | (NFMT_SSCALED << NFMT_SHIFT),
300   DFMT_11_11_10    | (NFMT_UINT    << NFMT_SHIFT),
301   DFMT_11_11_10    | (NFMT_SINT    << NFMT_SHIFT),
302   DFMT_11_11_10    | (NFMT_FLOAT   << NFMT_SHIFT),
303 
304   DFMT_10_10_10_2  | (NFMT_UNORM   << NFMT_SHIFT),
305   DFMT_10_10_10_2  | (NFMT_SNORM   << NFMT_SHIFT),
306   DFMT_10_10_10_2  | (NFMT_USCALED << NFMT_SHIFT),
307   DFMT_10_10_10_2  | (NFMT_SSCALED << NFMT_SHIFT),
308   DFMT_10_10_10_2  | (NFMT_UINT    << NFMT_SHIFT),
309   DFMT_10_10_10_2  | (NFMT_SINT    << NFMT_SHIFT),
310 
311   DFMT_2_10_10_10  | (NFMT_UNORM   << NFMT_SHIFT),
312   DFMT_2_10_10_10  | (NFMT_SNORM   << NFMT_SHIFT),
313   DFMT_2_10_10_10  | (NFMT_USCALED << NFMT_SHIFT),
314   DFMT_2_10_10_10  | (NFMT_SSCALED << NFMT_SHIFT),
315   DFMT_2_10_10_10  | (NFMT_UINT    << NFMT_SHIFT),
316   DFMT_2_10_10_10  | (NFMT_SINT    << NFMT_SHIFT),
317 
318   DFMT_8_8_8_8     | (NFMT_UNORM   << NFMT_SHIFT),
319   DFMT_8_8_8_8     | (NFMT_SNORM   << NFMT_SHIFT),
320   DFMT_8_8_8_8     | (NFMT_USCALED << NFMT_SHIFT),
321   DFMT_8_8_8_8     | (NFMT_SSCALED << NFMT_SHIFT),
322   DFMT_8_8_8_8     | (NFMT_UINT    << NFMT_SHIFT),
323   DFMT_8_8_8_8     | (NFMT_SINT    << NFMT_SHIFT),
324 
325   DFMT_32_32       | (NFMT_UINT    << NFMT_SHIFT),
326   DFMT_32_32       | (NFMT_SINT    << NFMT_SHIFT),
327   DFMT_32_32       | (NFMT_FLOAT   << NFMT_SHIFT),
328 
329   DFMT_16_16_16_16 | (NFMT_UNORM   << NFMT_SHIFT),
330   DFMT_16_16_16_16 | (NFMT_SNORM   << NFMT_SHIFT),
331   DFMT_16_16_16_16 | (NFMT_USCALED << NFMT_SHIFT),
332   DFMT_16_16_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
333   DFMT_16_16_16_16 | (NFMT_UINT    << NFMT_SHIFT),
334   DFMT_16_16_16_16 | (NFMT_SINT    << NFMT_SHIFT),
335   DFMT_16_16_16_16 | (NFMT_FLOAT   << NFMT_SHIFT),
336 
337   DFMT_32_32_32    | (NFMT_UINT    << NFMT_SHIFT),
338   DFMT_32_32_32    | (NFMT_SINT    << NFMT_SHIFT),
339   DFMT_32_32_32    | (NFMT_FLOAT   << NFMT_SHIFT),
340   DFMT_32_32_32_32 | (NFMT_UINT    << NFMT_SHIFT),
341   DFMT_32_32_32_32 | (NFMT_SINT    << NFMT_SHIFT),
342   DFMT_32_32_32_32 | (NFMT_FLOAT   << NFMT_SHIFT)
343 };
344 
345 } // namespace MTBUFFormat
346 
347 namespace Swizzle {
348 
349 // This must be in sync with llvm::AMDGPU::Swizzle::Id enum members, see SIDefines.h.
350 const char* const IdSymbolic[] = {
351   "QUAD_PERM",
352   "BITMASK_PERM",
353   "SWAP",
354   "REVERSE",
355   "BROADCAST",
356 };
357 
358 } // namespace Swizzle
359 
360 namespace VGPRIndexMode {
361 
362 // This must be in sync with llvm::AMDGPU::VGPRIndexMode::Id enum members, see SIDefines.h.
363 const char* const IdSymbolic[] = {
364   "SRC0",
365   "SRC1",
366   "SRC2",
367   "DST",
368 };
369 
370 } // namespace VGPRIndexMode
371 
372 } // namespace AMDGPU
373 } // namespace llvm
374