1 //===--- SIProgramInfo.h ----------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// Defines struct to track resource usage for kernels and entry functions.
11 ///
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H
16 #define LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H
17 
18 namespace llvm {
19 
20 /// Track resource usage for kernels / entry functions.
21 struct SIProgramInfo {
22     // Fields set in PGM_RSRC1 pm4 packet.
23     uint32_t VGPRBlocks = 0;
24     uint32_t SGPRBlocks = 0;
25     uint32_t Priority = 0;
26     uint32_t FloatMode = 0;
27     uint32_t Priv = 0;
28     uint32_t DX10Clamp = 0;
29     uint32_t DebugMode = 0;
30     uint32_t IEEEMode = 0;
31     uint64_t ScratchSize = 0;
32 
33     uint64_t ComputePGMRSrc1 = 0;
34 
35     // Fields set in PGM_RSRC2 pm4 packet.
36     uint32_t LDSBlocks = 0;
37     uint32_t ScratchBlocks = 0;
38 
39     uint64_t ComputePGMRSrc2 = 0;
40 
41     uint32_t NumVGPR = 0;
42     uint32_t NumSGPR = 0;
43     uint32_t LDSSize = 0;
44     bool FlatUsed = false;
45 
46     // Number of SGPRs that meets number of waves per execution unit request.
47     uint32_t NumSGPRsForWavesPerEU = 0;
48 
49     // Number of VGPRs that meets number of waves per execution unit request.
50     uint32_t NumVGPRsForWavesPerEU = 0;
51 
52     // Whether there is recursion, dynamic allocas, indirect calls or some other
53     // reason there may be statically unknown stack usage.
54     bool DynamicCallStack = false;
55 
56     // Bonus information for debugging.
57     bool VCCUsed = false;
58 
59     SIProgramInfo() = default;
60 };
61 
62 } // namespace llvm
63 
64 #endif // LLVM_LIB_TARGET_AMDGPU_SIPROGRAMINFO_H
65