1 //===-- AMDGPUTargetStreamer.h - AMDGPU Target Streamer --------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUTARGETSTREAMER_H
10 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUTARGETSTREAMER_H
11 
12 #include "Utils/AMDGPUPALMetadata.h"
13 #include "llvm/MC/MCStreamer.h"
14 
15 struct amd_kernel_code_t;
16 
17 namespace llvm {
18 
19 class DataLayout;
20 class Function;
21 class MCELFStreamer;
22 class MCSymbol;
23 class MDNode;
24 class Module;
25 class Type;
26 class formatted_raw_ostream;
27 
28 namespace AMDGPU {
29 namespace HSAMD {
30 struct Metadata;
31 }
32 } // namespace AMDGPU
33 
34 namespace amdhsa {
35 struct kernel_descriptor_t;
36 }
37 
38 class AMDGPUTargetStreamer : public MCTargetStreamer {
39   AMDGPUPALMetadata PALMetadata;
40 
41 protected:
42   MCContext &getContext() const { return Streamer.getContext(); }
43 
44 public:
45   AMDGPUTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
46 
47   AMDGPUPALMetadata *getPALMetadata() { return &PALMetadata; }
48 
49   virtual void EmitDirectiveAMDGCNTarget(StringRef Target) = 0;
50 
51   virtual void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
52                                                  uint32_t Minor) = 0;
53 
54   virtual void EmitDirectiveHSACodeObjectISA(uint32_t Major, uint32_t Minor,
55                                              uint32_t Stepping,
56                                              StringRef VendorName,
57                                              StringRef ArchName) = 0;
58 
59   virtual void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) = 0;
60 
61   virtual void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) = 0;
62 
63   virtual void emitAMDGPULDS(MCSymbol *Symbol, unsigned Size,
64                              Align Alignment) = 0;
65 
66   /// \returns True on success, false on failure.
67   virtual bool EmitISAVersion(StringRef IsaVersionString) = 0;
68 
69   /// \returns True on success, false on failure.
70   virtual bool EmitHSAMetadataV2(StringRef HSAMetadataString);
71 
72   /// \returns True on success, false on failure.
73   virtual bool EmitHSAMetadataV3(StringRef HSAMetadataString);
74 
75   /// Emit HSA Metadata
76   ///
77   /// When \p Strict is true, known metadata elements must already be
78   /// well-typed. When \p Strict is false, known types are inferred and
79   /// the \p HSAMetadata structure is updated with the correct types.
80   ///
81   /// \returns True on success, false on failure.
82   virtual bool EmitHSAMetadata(msgpack::Document &HSAMetadata, bool Strict) = 0;
83 
84   /// \returns True on success, false on failure.
85   virtual bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata) = 0;
86 
87   /// \returns True on success, false on failure.
88   virtual bool EmitCodeEnd(const MCSubtargetInfo &STI) = 0;
89 
90   virtual void EmitAmdhsaKernelDescriptor(
91       const MCSubtargetInfo &STI, StringRef KernelName,
92       const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
93       uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
94       bool ReserveXNACK) = 0;
95 
96   static StringRef getArchNameFromElfMach(unsigned ElfMach);
97   static unsigned getElfMach(StringRef GPU);
98 };
99 
100 class AMDGPUTargetAsmStreamer final : public AMDGPUTargetStreamer {
101   formatted_raw_ostream &OS;
102 public:
103   AMDGPUTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
104 
105   void finish() override;
106 
107   void EmitDirectiveAMDGCNTarget(StringRef Target) override;
108 
109   void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
110                                          uint32_t Minor) override;
111 
112   void EmitDirectiveHSACodeObjectISA(uint32_t Major, uint32_t Minor,
113                                      uint32_t Stepping, StringRef VendorName,
114                                      StringRef ArchName) override;
115 
116   void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) override;
117 
118   void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) override;
119 
120   void emitAMDGPULDS(MCSymbol *Sym, unsigned Size, Align Alignment) override;
121 
122   /// \returns True on success, false on failure.
123   bool EmitISAVersion(StringRef IsaVersionString) override;
124 
125   /// \returns True on success, false on failure.
126   bool EmitHSAMetadata(msgpack::Document &HSAMetadata, bool Strict) override;
127 
128   /// \returns True on success, false on failure.
129   bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata) override;
130 
131   /// \returns True on success, false on failure.
132   bool EmitCodeEnd(const MCSubtargetInfo &STI) override;
133 
134   void EmitAmdhsaKernelDescriptor(
135       const MCSubtargetInfo &STI, StringRef KernelName,
136       const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
137       uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
138       bool ReserveXNACK) override;
139 };
140 
141 class AMDGPUTargetELFStreamer final : public AMDGPUTargetStreamer {
142   MCStreamer &Streamer;
143   Triple::OSType Os;
144 
145   void EmitNote(StringRef Name, const MCExpr *DescSize, unsigned NoteType,
146                 function_ref<void(MCELFStreamer &)> EmitDesc);
147 
148 public:
149   AMDGPUTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI);
150 
151   MCELFStreamer &getStreamer();
152 
153   void finish() override;
154 
155   void EmitDirectiveAMDGCNTarget(StringRef Target) override;
156 
157   void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
158                                          uint32_t Minor) override;
159 
160   void EmitDirectiveHSACodeObjectISA(uint32_t Major, uint32_t Minor,
161                                      uint32_t Stepping, StringRef VendorName,
162                                      StringRef ArchName) override;
163 
164   void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) override;
165 
166   void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) override;
167 
168   void emitAMDGPULDS(MCSymbol *Sym, unsigned Size, Align Alignment) override;
169 
170   /// \returns True on success, false on failure.
171   bool EmitISAVersion(StringRef IsaVersionString) override;
172 
173   /// \returns True on success, false on failure.
174   bool EmitHSAMetadata(msgpack::Document &HSAMetadata, bool Strict) override;
175 
176   /// \returns True on success, false on failure.
177   bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata) override;
178 
179   /// \returns True on success, false on failure.
180   bool EmitCodeEnd(const MCSubtargetInfo &STI) override;
181 
182   void EmitAmdhsaKernelDescriptor(
183       const MCSubtargetInfo &STI, StringRef KernelName,
184       const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
185       uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
186       bool ReserveXNACK) override;
187 };
188 
189 }
190 #endif
191