1 //===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief CodeEmitter interface for R600 and SI codegen. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H 16 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H 17 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/Support/raw_ostream.h" 20 21 namespace llvm { 22 23 class MCInst; 24 class MCInstrInfo; 25 class MCOperand; 26 class MCSubtargetInfo; 27 class FeatureBitset; 28 29 class AMDGPUMCCodeEmitter : public MCCodeEmitter { 30 virtual void anchor(); 31 32 protected: 33 const MCInstrInfo &MCII; 34 35 AMDGPUMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {} 36 37 public: 38 39 uint64_t getBinaryCodeForInstr(const MCInst &MI, 40 SmallVectorImpl<MCFixup> &Fixups, 41 const MCSubtargetInfo &STI) const; 42 43 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 44 SmallVectorImpl<MCFixup> &Fixups, 45 const MCSubtargetInfo &STI) const { 46 return 0; 47 } 48 49 virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, 50 SmallVectorImpl<MCFixup> &Fixups, 51 const MCSubtargetInfo &STI) const { 52 return 0; 53 } 54 55 protected: 56 uint64_t computeAvailableFeatures(const FeatureBitset &FB) const; 57 void verifyInstructionPredicates(const MCInst &MI, 58 uint64_t AvailableFeatures) const; 59 }; 60 61 } // End namespace llvm 62 63 #endif 64