1 //===- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "AMDGPUMCTargetDesc.h" 11 #include "llvm/BinaryFormat/ELF.h" 12 #include "llvm/MC/MCELFObjectWriter.h" 13 #include "llvm/MC/MCExpr.h" 14 #include "llvm/MC/MCFixup.h" 15 #include "llvm/MC/MCObjectWriter.h" 16 #include "llvm/MC/MCSymbol.h" 17 #include "llvm/MC/MCValue.h" 18 #include "llvm/Support/ErrorHandling.h" 19 20 using namespace llvm; 21 22 namespace { 23 24 class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter { 25 public: 26 AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend); 27 28 protected: 29 unsigned getRelocType(MCContext &Ctx, const MCValue &Target, 30 const MCFixup &Fixup, bool IsPCRel) const override; 31 }; 32 33 34 } // end anonymous namespace 35 36 AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit, 37 uint8_t OSABI, 38 bool HasRelocationAddend) 39 : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU, 40 HasRelocationAddend) {} 41 42 unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx, 43 const MCValue &Target, 44 const MCFixup &Fixup, 45 bool IsPCRel) const { 46 if (const auto *SymA = Target.getSymA()) { 47 // SCRATCH_RSRC_DWORD[01] is a special global variable that represents 48 // the scratch buffer. 49 if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0" || 50 SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1") 51 return ELF::R_AMDGPU_ABS32_LO; 52 } 53 54 switch (Target.getAccessVariant()) { 55 default: 56 break; 57 case MCSymbolRefExpr::VK_GOTPCREL: 58 return ELF::R_AMDGPU_GOTPCREL; 59 case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO: 60 return ELF::R_AMDGPU_GOTPCREL32_LO; 61 case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI: 62 return ELF::R_AMDGPU_GOTPCREL32_HI; 63 case MCSymbolRefExpr::VK_AMDGPU_REL32_LO: 64 return ELF::R_AMDGPU_REL32_LO; 65 case MCSymbolRefExpr::VK_AMDGPU_REL32_HI: 66 return ELF::R_AMDGPU_REL32_HI; 67 case MCSymbolRefExpr::VK_AMDGPU_REL64: 68 return ELF::R_AMDGPU_REL64; 69 } 70 71 switch (Fixup.getKind()) { 72 default: break; 73 case FK_PCRel_4: 74 return ELF::R_AMDGPU_REL32; 75 case FK_Data_4: 76 case FK_SecRel_4: 77 return ELF::R_AMDGPU_ABS32; 78 case FK_Data_8: 79 return ELF::R_AMDGPU_ABS64; 80 } 81 82 llvm_unreachable("unhandled relocation type"); 83 } 84 85 std::unique_ptr<MCObjectTargetWriter> 86 llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, 87 bool HasRelocationAddend) { 88 return llvm::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI, 89 HasRelocationAddend); 90 } 91