1//===-- FLATInstructions.td - FLAT Instruction Defintions -----------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9def FLATAtomic : ComplexPattern<i64, 3, "SelectFlatAtomic", [], [SDNPWantRoot], -10>; 10def FLATOffset : ComplexPattern<i64, 3, "SelectFlatOffset<false>", [], [SDNPWantRoot], -10>; 11 12def FLATOffsetSigned : ComplexPattern<i64, 3, "SelectFlatOffset<true>", [], [SDNPWantRoot], -10>; 13def FLATSignedAtomic : ComplexPattern<i64, 3, "SelectFlatAtomicSigned", [], [SDNPWantRoot], -10>; 14 15//===----------------------------------------------------------------------===// 16// FLAT classes 17//===----------------------------------------------------------------------===// 18 19class FLAT_Pseudo<string opName, dag outs, dag ins, 20 string asmOps, list<dag> pattern=[]> : 21 InstSI<outs, ins, "", pattern>, 22 SIMCInstr<opName, SIEncodingFamily.NONE> { 23 24 let isPseudo = 1; 25 let isCodeGenOnly = 1; 26 27 let FLAT = 1; 28 29 let UseNamedOperandTable = 1; 30 let hasSideEffects = 0; 31 let SchedRW = [WriteVMEM]; 32 33 string Mnemonic = opName; 34 string AsmOperands = asmOps; 35 36 bits<1> is_flat_global = 0; 37 bits<1> is_flat_scratch = 0; 38 39 bits<1> has_vdst = 1; 40 41 // We need to distinguish having saddr and enabling saddr because 42 // saddr is only valid for scratch and global instructions. Pre-gfx9 43 // these bits were reserved, so we also don't necessarily want to 44 // set these bits to the disabled value for the original flat 45 // segment instructions. 46 bits<1> has_saddr = 0; 47 bits<1> enabled_saddr = 0; 48 bits<7> saddr_value = 0; 49 bits<1> has_vaddr = 1; 50 51 bits<1> has_data = 1; 52 bits<1> has_glc = 1; 53 bits<1> glcValue = 0; 54 bits<1> has_dlc = 1; 55 bits<1> dlcValue = 0; 56 57 let SubtargetPredicate = !if(is_flat_global, HasFlatGlobalInsts, 58 !if(is_flat_scratch, HasFlatScratchInsts, HasFlatAddressSpace)); 59 60 // TODO: M0 if it could possibly access LDS (before gfx9? only)? 61 let Uses = !if(is_flat_global, [EXEC], [EXEC, FLAT_SCR]); 62 63 // Internally, FLAT instruction are executed as both an LDS and a 64 // Buffer instruction; so, they increment both VM_CNT and LGKM_CNT 65 // and are not considered done until both have been decremented. 66 let VM_CNT = 1; 67 let LGKM_CNT = !if(!or(is_flat_global, is_flat_scratch), 0, 1); 68 69 let IsNonFlatSeg = !if(!or(is_flat_global, is_flat_scratch), 1, 0); 70} 71 72class FLAT_Real <bits<7> op, FLAT_Pseudo ps> : 73 InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>, 74 Enc64 { 75 76 let isPseudo = 0; 77 let isCodeGenOnly = 0; 78 79 // copy relevant pseudo op flags 80 let SubtargetPredicate = ps.SubtargetPredicate; 81 let AsmMatchConverter = ps.AsmMatchConverter; 82 let TSFlags = ps.TSFlags; 83 let UseNamedOperandTable = ps.UseNamedOperandTable; 84 85 // encoding fields 86 bits<8> vaddr; 87 bits<8> vdata; 88 bits<7> saddr; 89 bits<8> vdst; 90 91 bits<1> slc; 92 bits<1> glc; 93 bits<1> dlc; 94 95 // Only valid on gfx9 96 bits<1> lds = 0; // XXX - What does this actually do? 97 98 // Segment, 00=flat, 01=scratch, 10=global, 11=reserved 99 bits<2> seg = !if(ps.is_flat_global, 0b10, 100 !if(ps.is_flat_scratch, 0b01, 0)); 101 102 // Signed offset. Highest bit ignored for flat and treated as 12-bit 103 // unsigned for flat acceses. 104 bits<13> offset; 105 bits<1> nv = 0; // XXX - What does this actually do? 106 107 // We don't use tfe right now, and it was removed in gfx9. 108 bits<1> tfe = 0; 109 110 // Only valid on GFX9+ 111 let Inst{12-0} = offset; 112 let Inst{13} = lds; 113 let Inst{15-14} = seg; 114 115 let Inst{16} = !if(ps.has_glc, glc, ps.glcValue); 116 let Inst{17} = slc; 117 let Inst{24-18} = op; 118 let Inst{31-26} = 0x37; // Encoding. 119 let Inst{39-32} = !if(ps.has_vaddr, vaddr, ?); 120 let Inst{47-40} = !if(ps.has_data, vdata, ?); 121 let Inst{54-48} = !if(ps.has_saddr, !if(ps.enabled_saddr, saddr, 0x7f), 0); 122 123 // 54-48 is reserved. 124 let Inst{55} = nv; // nv on GFX9+, TFE before. 125 let Inst{63-56} = !if(ps.has_vdst, vdst, ?); 126} 127 128class GlobalSaddrTable <bit is_saddr, string Name = ""> { 129 bit IsSaddr = is_saddr; 130 string SaddrOp = Name; 131} 132 133// TODO: Is exec allowed for saddr? The disabled value 0x7f is the 134// same encoding value as exec_hi, so it isn't possible to use that if 135// saddr is 32-bit (which isn't handled here yet). 136class FLAT_Load_Pseudo <string opName, RegisterClass regClass, 137 bit HasTiedOutput = 0, 138 bit HasSaddr = 0, bit EnableSaddr = 0> : FLAT_Pseudo< 139 opName, 140 (outs regClass:$vdst), 141 !con( 142 !con( 143 !con((ins VReg_64:$vaddr), 144 !if(EnableSaddr, (ins SReg_64:$saddr), (ins))), 145 (ins flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)), 146 !if(HasTiedOutput, (ins regClass:$vdst_in), (ins))), 147 " $vdst, $vaddr"#!if(HasSaddr, !if(EnableSaddr, ", $saddr", ", off"), "")#"$offset$glc$slc$dlc"> { 148 let has_data = 0; 149 let mayLoad = 1; 150 let has_saddr = HasSaddr; 151 let enabled_saddr = EnableSaddr; 152 let PseudoInstr = opName#!if(!and(HasSaddr, EnableSaddr), "_SADDR", ""); 153 let maybeAtomic = 1; 154 155 let Constraints = !if(HasTiedOutput, "$vdst = $vdst_in", ""); 156 let DisableEncoding = !if(HasTiedOutput, "$vdst_in", ""); 157} 158 159class FLAT_Store_Pseudo <string opName, RegisterClass vdataClass, 160 bit HasSaddr = 0, bit EnableSaddr = 0> : FLAT_Pseudo< 161 opName, 162 (outs), 163 !con( 164 !con((ins VReg_64:$vaddr, vdataClass:$vdata), 165 !if(EnableSaddr, (ins SReg_64:$saddr), (ins))), 166 (ins flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)), 167 " $vaddr, $vdata"#!if(HasSaddr, !if(EnableSaddr, ", $saddr", ", off"), "")#"$offset$glc$slc$dlc"> { 168 let mayLoad = 0; 169 let mayStore = 1; 170 let has_vdst = 0; 171 let has_saddr = HasSaddr; 172 let enabled_saddr = EnableSaddr; 173 let PseudoInstr = opName#!if(!and(HasSaddr, EnableSaddr), "_SADDR", ""); 174 let maybeAtomic = 1; 175} 176 177multiclass FLAT_Global_Load_Pseudo<string opName, RegisterClass regClass, bit HasTiedInput = 0> { 178 let is_flat_global = 1 in { 179 def "" : FLAT_Load_Pseudo<opName, regClass, HasTiedInput, 1>, 180 GlobalSaddrTable<0, opName>; 181 def _SADDR : FLAT_Load_Pseudo<opName, regClass, HasTiedInput, 1, 1>, 182 GlobalSaddrTable<1, opName>; 183 } 184} 185 186multiclass FLAT_Global_Store_Pseudo<string opName, RegisterClass regClass> { 187 let is_flat_global = 1 in { 188 def "" : FLAT_Store_Pseudo<opName, regClass, 1>, 189 GlobalSaddrTable<0, opName>; 190 def _SADDR : FLAT_Store_Pseudo<opName, regClass, 1, 1>, 191 GlobalSaddrTable<1, opName>; 192 } 193} 194 195class FLAT_Scratch_Load_Pseudo <string opName, RegisterClass regClass, 196 bit EnableSaddr = 0>: FLAT_Pseudo< 197 opName, 198 (outs regClass:$vdst), 199 !if(EnableSaddr, 200 (ins SReg_32_XEXEC_HI:$saddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc), 201 (ins VGPR_32:$vaddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)), 202 " $vdst, "#!if(EnableSaddr, "off", "$vaddr")#!if(EnableSaddr, ", $saddr", ", off")#"$offset$glc$slc$dlc"> { 203 let has_data = 0; 204 let mayLoad = 1; 205 let has_saddr = 1; 206 let enabled_saddr = EnableSaddr; 207 let has_vaddr = !if(EnableSaddr, 0, 1); 208 let PseudoInstr = opName#!if(EnableSaddr, "_SADDR", ""); 209 let maybeAtomic = 1; 210} 211 212class FLAT_Scratch_Store_Pseudo <string opName, RegisterClass vdataClass, bit EnableSaddr = 0> : FLAT_Pseudo< 213 opName, 214 (outs), 215 !if(EnableSaddr, 216 (ins vdataClass:$vdata, SReg_32_XEXEC_HI:$saddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc), 217 (ins vdataClass:$vdata, VGPR_32:$vaddr, flat_offset:$offset, GLC:$glc, SLC:$slc, DLC:$dlc)), 218 " "#!if(EnableSaddr, "off", "$vaddr")#", $vdata, "#!if(EnableSaddr, "$saddr", "off")#"$offset$glc$slc$dlc"> { 219 let mayLoad = 0; 220 let mayStore = 1; 221 let has_vdst = 0; 222 let has_saddr = 1; 223 let enabled_saddr = EnableSaddr; 224 let has_vaddr = !if(EnableSaddr, 0, 1); 225 let PseudoInstr = opName#!if(EnableSaddr, "_SADDR", ""); 226 let maybeAtomic = 1; 227} 228 229multiclass FLAT_Scratch_Load_Pseudo<string opName, RegisterClass regClass> { 230 let is_flat_scratch = 1 in { 231 def "" : FLAT_Scratch_Load_Pseudo<opName, regClass>; 232 def _SADDR : FLAT_Scratch_Load_Pseudo<opName, regClass, 1>; 233 } 234} 235 236multiclass FLAT_Scratch_Store_Pseudo<string opName, RegisterClass regClass> { 237 let is_flat_scratch = 1 in { 238 def "" : FLAT_Scratch_Store_Pseudo<opName, regClass>; 239 def _SADDR : FLAT_Scratch_Store_Pseudo<opName, regClass, 1>; 240 } 241} 242 243class FLAT_AtomicNoRet_Pseudo<string opName, dag outs, dag ins, 244 string asm, list<dag> pattern = []> : 245 FLAT_Pseudo<opName, outs, ins, asm, pattern> { 246 let mayLoad = 1; 247 let mayStore = 1; 248 let has_glc = 0; 249 let glcValue = 0; 250 let has_dlc = 0; 251 let dlcValue = 0; 252 let has_vdst = 0; 253 let maybeAtomic = 1; 254} 255 256class FLAT_AtomicRet_Pseudo<string opName, dag outs, dag ins, 257 string asm, list<dag> pattern = []> 258 : FLAT_AtomicNoRet_Pseudo<opName, outs, ins, asm, pattern> { 259 let hasPostISelHook = 1; 260 let has_vdst = 1; 261 let glcValue = 1; 262 let dlcValue = 0; 263 let PseudoInstr = NAME # "_RTN"; 264} 265 266multiclass FLAT_Atomic_Pseudo< 267 string opName, 268 RegisterClass vdst_rc, 269 ValueType vt, 270 SDPatternOperator atomic = null_frag, 271 ValueType data_vt = vt, 272 RegisterClass data_rc = vdst_rc, 273 bit isFP = isFloatType<data_vt>.ret> { 274 def "" : FLAT_AtomicNoRet_Pseudo <opName, 275 (outs), 276 (ins VReg_64:$vaddr, data_rc:$vdata, flat_offset:$offset, SLC:$slc), 277 " $vaddr, $vdata$offset$slc">, 278 GlobalSaddrTable<0, opName>, 279 AtomicNoRet <opName, 0> { 280 let PseudoInstr = NAME; 281 let FPAtomic = isFP; 282 let AddedComplexity = -1; // Prefer global atomics if available 283 } 284 285 def _RTN : FLAT_AtomicRet_Pseudo <opName, 286 (outs vdst_rc:$vdst), 287 (ins VReg_64:$vaddr, data_rc:$vdata, flat_offset:$offset, SLC:$slc), 288 " $vdst, $vaddr, $vdata$offset glc$slc", 289 [(set vt:$vdst, 290 (atomic (FLATAtomic i64:$vaddr, i16:$offset, i1:$slc), data_vt:$vdata))]>, 291 GlobalSaddrTable<0, opName#"_rtn">, 292 AtomicNoRet <opName, 1>{ 293 let FPAtomic = isFP; 294 let AddedComplexity = -1; // Prefer global atomics if available 295 } 296} 297 298multiclass FLAT_Global_Atomic_Pseudo_NO_RTN< 299 string opName, 300 RegisterClass vdst_rc, 301 ValueType vt, 302 SDPatternOperator atomic = null_frag, 303 ValueType data_vt = vt, 304 RegisterClass data_rc = vdst_rc, 305 bit isFP = isFloatType<data_vt>.ret> { 306 307 def "" : FLAT_AtomicNoRet_Pseudo <opName, 308 (outs), 309 (ins VReg_64:$vaddr, data_rc:$vdata, flat_offset:$offset, SLC:$slc), 310 " $vaddr, $vdata, off$offset$slc">, 311 GlobalSaddrTable<0, opName>, 312 AtomicNoRet <opName, 0> { 313 let has_saddr = 1; 314 let PseudoInstr = NAME; 315 let FPAtomic = isFP; 316 } 317 318 def _SADDR : FLAT_AtomicNoRet_Pseudo <opName, 319 (outs), 320 (ins VReg_64:$vaddr, data_rc:$vdata, SReg_64:$saddr, flat_offset:$offset, SLC:$slc), 321 " $vaddr, $vdata, $saddr$offset$slc">, 322 GlobalSaddrTable<1, opName>, 323 AtomicNoRet <opName#"_saddr", 0> { 324 let has_saddr = 1; 325 let enabled_saddr = 1; 326 let PseudoInstr = NAME#"_SADDR"; 327 let FPAtomic = isFP; 328 } 329} 330 331multiclass FLAT_Global_Atomic_Pseudo_RTN< 332 string opName, 333 RegisterClass vdst_rc, 334 ValueType vt, 335 SDPatternOperator atomic = null_frag, 336 ValueType data_vt = vt, 337 RegisterClass data_rc = vdst_rc, 338 bit isFP = isFloatType<data_vt>.ret> { 339 340 def _RTN : FLAT_AtomicRet_Pseudo <opName, 341 (outs vdst_rc:$vdst), 342 (ins VReg_64:$vaddr, data_rc:$vdata, flat_offset:$offset, SLC:$slc), 343 " $vdst, $vaddr, $vdata, off$offset glc$slc", 344 [(set vt:$vdst, 345 (atomic (FLATSignedAtomic i64:$vaddr, i16:$offset, i1:$slc), data_vt:$vdata))]>, 346 GlobalSaddrTable<0, opName#"_rtn">, 347 AtomicNoRet <opName, 1> { 348 let has_saddr = 1; 349 let FPAtomic = isFP; 350 } 351 352 def _SADDR_RTN : FLAT_AtomicRet_Pseudo <opName, 353 (outs vdst_rc:$vdst), 354 (ins VReg_64:$vaddr, data_rc:$vdata, SReg_64:$saddr, flat_offset:$offset, SLC:$slc), 355 " $vdst, $vaddr, $vdata, $saddr$offset glc$slc">, 356 GlobalSaddrTable<1, opName#"_rtn">, 357 AtomicNoRet <opName#"_saddr", 1> { 358 let has_saddr = 1; 359 let enabled_saddr = 1; 360 let PseudoInstr = NAME#"_SADDR_RTN"; 361 let FPAtomic = isFP; 362 } 363} 364 365multiclass FLAT_Global_Atomic_Pseudo< 366 string opName, 367 RegisterClass vdst_rc, 368 ValueType vt, 369 SDPatternOperator atomic_rtn = null_frag, 370 SDPatternOperator atomic_no_rtn = null_frag, 371 ValueType data_vt = vt, 372 RegisterClass data_rc = vdst_rc> : 373 FLAT_Global_Atomic_Pseudo_NO_RTN<opName, vdst_rc, vt, atomic_no_rtn, data_vt, data_rc>, 374 FLAT_Global_Atomic_Pseudo_RTN<opName, vdst_rc, vt, atomic_rtn, data_vt, data_rc>; 375 376 377//===----------------------------------------------------------------------===// 378// Flat Instructions 379//===----------------------------------------------------------------------===// 380 381def FLAT_LOAD_UBYTE : FLAT_Load_Pseudo <"flat_load_ubyte", VGPR_32>; 382def FLAT_LOAD_SBYTE : FLAT_Load_Pseudo <"flat_load_sbyte", VGPR_32>; 383def FLAT_LOAD_USHORT : FLAT_Load_Pseudo <"flat_load_ushort", VGPR_32>; 384def FLAT_LOAD_SSHORT : FLAT_Load_Pseudo <"flat_load_sshort", VGPR_32>; 385def FLAT_LOAD_DWORD : FLAT_Load_Pseudo <"flat_load_dword", VGPR_32>; 386def FLAT_LOAD_DWORDX2 : FLAT_Load_Pseudo <"flat_load_dwordx2", VReg_64>; 387def FLAT_LOAD_DWORDX4 : FLAT_Load_Pseudo <"flat_load_dwordx4", VReg_128>; 388def FLAT_LOAD_DWORDX3 : FLAT_Load_Pseudo <"flat_load_dwordx3", VReg_96>; 389 390def FLAT_STORE_BYTE : FLAT_Store_Pseudo <"flat_store_byte", VGPR_32>; 391def FLAT_STORE_SHORT : FLAT_Store_Pseudo <"flat_store_short", VGPR_32>; 392def FLAT_STORE_DWORD : FLAT_Store_Pseudo <"flat_store_dword", VGPR_32>; 393def FLAT_STORE_DWORDX2 : FLAT_Store_Pseudo <"flat_store_dwordx2", VReg_64>; 394def FLAT_STORE_DWORDX4 : FLAT_Store_Pseudo <"flat_store_dwordx4", VReg_128>; 395def FLAT_STORE_DWORDX3 : FLAT_Store_Pseudo <"flat_store_dwordx3", VReg_96>; 396 397let SubtargetPredicate = HasD16LoadStore in { 398def FLAT_LOAD_UBYTE_D16 : FLAT_Load_Pseudo <"flat_load_ubyte_d16", VGPR_32, 1>; 399def FLAT_LOAD_UBYTE_D16_HI : FLAT_Load_Pseudo <"flat_load_ubyte_d16_hi", VGPR_32, 1>; 400def FLAT_LOAD_SBYTE_D16 : FLAT_Load_Pseudo <"flat_load_sbyte_d16", VGPR_32, 1>; 401def FLAT_LOAD_SBYTE_D16_HI : FLAT_Load_Pseudo <"flat_load_sbyte_d16_hi", VGPR_32, 1>; 402def FLAT_LOAD_SHORT_D16 : FLAT_Load_Pseudo <"flat_load_short_d16", VGPR_32, 1>; 403def FLAT_LOAD_SHORT_D16_HI : FLAT_Load_Pseudo <"flat_load_short_d16_hi", VGPR_32, 1>; 404 405def FLAT_STORE_BYTE_D16_HI : FLAT_Store_Pseudo <"flat_store_byte_d16_hi", VGPR_32>; 406def FLAT_STORE_SHORT_D16_HI : FLAT_Store_Pseudo <"flat_store_short_d16_hi", VGPR_32>; 407} 408 409defm FLAT_ATOMIC_CMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_cmpswap", 410 VGPR_32, i32, AMDGPUatomic_cmp_swap_flat_32, 411 v2i32, VReg_64>; 412 413defm FLAT_ATOMIC_CMPSWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_cmpswap_x2", 414 VReg_64, i64, AMDGPUatomic_cmp_swap_flat_64, 415 v2i64, VReg_128>; 416 417defm FLAT_ATOMIC_SWAP : FLAT_Atomic_Pseudo <"flat_atomic_swap", 418 VGPR_32, i32, atomic_swap_flat_32>; 419 420defm FLAT_ATOMIC_SWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_swap_x2", 421 VReg_64, i64, atomic_swap_flat_64>; 422 423defm FLAT_ATOMIC_ADD : FLAT_Atomic_Pseudo <"flat_atomic_add", 424 VGPR_32, i32, atomic_load_add_flat_32>; 425 426defm FLAT_ATOMIC_SUB : FLAT_Atomic_Pseudo <"flat_atomic_sub", 427 VGPR_32, i32, atomic_load_sub_flat_32>; 428 429defm FLAT_ATOMIC_SMIN : FLAT_Atomic_Pseudo <"flat_atomic_smin", 430 VGPR_32, i32, atomic_load_min_flat_32>; 431 432defm FLAT_ATOMIC_UMIN : FLAT_Atomic_Pseudo <"flat_atomic_umin", 433 VGPR_32, i32, atomic_load_umin_flat_32>; 434 435defm FLAT_ATOMIC_SMAX : FLAT_Atomic_Pseudo <"flat_atomic_smax", 436 VGPR_32, i32, atomic_load_max_flat_32>; 437 438defm FLAT_ATOMIC_UMAX : FLAT_Atomic_Pseudo <"flat_atomic_umax", 439 VGPR_32, i32, atomic_load_umax_flat_32>; 440 441defm FLAT_ATOMIC_AND : FLAT_Atomic_Pseudo <"flat_atomic_and", 442 VGPR_32, i32, atomic_load_and_flat_32>; 443 444defm FLAT_ATOMIC_OR : FLAT_Atomic_Pseudo <"flat_atomic_or", 445 VGPR_32, i32, atomic_load_or_flat_32>; 446 447defm FLAT_ATOMIC_XOR : FLAT_Atomic_Pseudo <"flat_atomic_xor", 448 VGPR_32, i32, atomic_load_xor_flat_32>; 449 450defm FLAT_ATOMIC_INC : FLAT_Atomic_Pseudo <"flat_atomic_inc", 451 VGPR_32, i32, atomic_inc_flat_32>; 452 453defm FLAT_ATOMIC_DEC : FLAT_Atomic_Pseudo <"flat_atomic_dec", 454 VGPR_32, i32, atomic_dec_flat_32>; 455 456defm FLAT_ATOMIC_ADD_X2 : FLAT_Atomic_Pseudo <"flat_atomic_add_x2", 457 VReg_64, i64, atomic_load_add_flat_64>; 458 459defm FLAT_ATOMIC_SUB_X2 : FLAT_Atomic_Pseudo <"flat_atomic_sub_x2", 460 VReg_64, i64, atomic_load_sub_flat_64>; 461 462defm FLAT_ATOMIC_SMIN_X2 : FLAT_Atomic_Pseudo <"flat_atomic_smin_x2", 463 VReg_64, i64, atomic_load_min_flat_64>; 464 465defm FLAT_ATOMIC_UMIN_X2 : FLAT_Atomic_Pseudo <"flat_atomic_umin_x2", 466 VReg_64, i64, atomic_load_umin_flat_64>; 467 468defm FLAT_ATOMIC_SMAX_X2 : FLAT_Atomic_Pseudo <"flat_atomic_smax_x2", 469 VReg_64, i64, atomic_load_max_flat_64>; 470 471defm FLAT_ATOMIC_UMAX_X2 : FLAT_Atomic_Pseudo <"flat_atomic_umax_x2", 472 VReg_64, i64, atomic_load_umax_flat_64>; 473 474defm FLAT_ATOMIC_AND_X2 : FLAT_Atomic_Pseudo <"flat_atomic_and_x2", 475 VReg_64, i64, atomic_load_and_flat_64>; 476 477defm FLAT_ATOMIC_OR_X2 : FLAT_Atomic_Pseudo <"flat_atomic_or_x2", 478 VReg_64, i64, atomic_load_or_flat_64>; 479 480defm FLAT_ATOMIC_XOR_X2 : FLAT_Atomic_Pseudo <"flat_atomic_xor_x2", 481 VReg_64, i64, atomic_load_xor_flat_64>; 482 483defm FLAT_ATOMIC_INC_X2 : FLAT_Atomic_Pseudo <"flat_atomic_inc_x2", 484 VReg_64, i64, atomic_inc_flat_64>; 485 486defm FLAT_ATOMIC_DEC_X2 : FLAT_Atomic_Pseudo <"flat_atomic_dec_x2", 487 VReg_64, i64, atomic_dec_flat_64>; 488 489// GFX7-, GFX10-only flat instructions. 490let SubtargetPredicate = isGFX7GFX10 in { 491 492defm FLAT_ATOMIC_FCMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap", 493 VGPR_32, f32, null_frag, v2f32, VReg_64>; 494 495defm FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap_x2", 496 VReg_64, f64, null_frag, v2f64, VReg_128>; 497 498defm FLAT_ATOMIC_FMIN : FLAT_Atomic_Pseudo <"flat_atomic_fmin", 499 VGPR_32, f32>; 500 501defm FLAT_ATOMIC_FMAX : FLAT_Atomic_Pseudo <"flat_atomic_fmax", 502 VGPR_32, f32>; 503 504defm FLAT_ATOMIC_FMIN_X2 : FLAT_Atomic_Pseudo <"flat_atomic_fmin_x2", 505 VReg_64, f64>; 506 507defm FLAT_ATOMIC_FMAX_X2 : FLAT_Atomic_Pseudo <"flat_atomic_fmax_x2", 508 VReg_64, f64>; 509 510} // End SubtargetPredicate = isGFX7GFX10 511 512let SubtargetPredicate = HasFlatGlobalInsts in { 513defm GLOBAL_LOAD_UBYTE : FLAT_Global_Load_Pseudo <"global_load_ubyte", VGPR_32>; 514defm GLOBAL_LOAD_SBYTE : FLAT_Global_Load_Pseudo <"global_load_sbyte", VGPR_32>; 515defm GLOBAL_LOAD_USHORT : FLAT_Global_Load_Pseudo <"global_load_ushort", VGPR_32>; 516defm GLOBAL_LOAD_SSHORT : FLAT_Global_Load_Pseudo <"global_load_sshort", VGPR_32>; 517defm GLOBAL_LOAD_DWORD : FLAT_Global_Load_Pseudo <"global_load_dword", VGPR_32>; 518defm GLOBAL_LOAD_DWORDX2 : FLAT_Global_Load_Pseudo <"global_load_dwordx2", VReg_64>; 519defm GLOBAL_LOAD_DWORDX3 : FLAT_Global_Load_Pseudo <"global_load_dwordx3", VReg_96>; 520defm GLOBAL_LOAD_DWORDX4 : FLAT_Global_Load_Pseudo <"global_load_dwordx4", VReg_128>; 521 522defm GLOBAL_LOAD_UBYTE_D16 : FLAT_Global_Load_Pseudo <"global_load_ubyte_d16", VGPR_32, 1>; 523defm GLOBAL_LOAD_UBYTE_D16_HI : FLAT_Global_Load_Pseudo <"global_load_ubyte_d16_hi", VGPR_32, 1>; 524defm GLOBAL_LOAD_SBYTE_D16 : FLAT_Global_Load_Pseudo <"global_load_sbyte_d16", VGPR_32, 1>; 525defm GLOBAL_LOAD_SBYTE_D16_HI : FLAT_Global_Load_Pseudo <"global_load_sbyte_d16_hi", VGPR_32, 1>; 526defm GLOBAL_LOAD_SHORT_D16 : FLAT_Global_Load_Pseudo <"global_load_short_d16", VGPR_32, 1>; 527defm GLOBAL_LOAD_SHORT_D16_HI : FLAT_Global_Load_Pseudo <"global_load_short_d16_hi", VGPR_32, 1>; 528 529defm GLOBAL_STORE_BYTE : FLAT_Global_Store_Pseudo <"global_store_byte", VGPR_32>; 530defm GLOBAL_STORE_SHORT : FLAT_Global_Store_Pseudo <"global_store_short", VGPR_32>; 531defm GLOBAL_STORE_DWORD : FLAT_Global_Store_Pseudo <"global_store_dword", VGPR_32>; 532defm GLOBAL_STORE_DWORDX2 : FLAT_Global_Store_Pseudo <"global_store_dwordx2", VReg_64>; 533defm GLOBAL_STORE_DWORDX3 : FLAT_Global_Store_Pseudo <"global_store_dwordx3", VReg_96>; 534defm GLOBAL_STORE_DWORDX4 : FLAT_Global_Store_Pseudo <"global_store_dwordx4", VReg_128>; 535 536defm GLOBAL_STORE_BYTE_D16_HI : FLAT_Global_Store_Pseudo <"global_store_byte_d16_hi", VGPR_32>; 537defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Global_Store_Pseudo <"global_store_short_d16_hi", VGPR_32>; 538 539let is_flat_global = 1 in { 540defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap", 541 VGPR_32, i32, AMDGPUatomic_cmp_swap_global_32, null_frag, 542 v2i32, VReg_64>; 543 544defm GLOBAL_ATOMIC_CMPSWAP_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_cmpswap_x2", 545 VReg_64, i64, AMDGPUatomic_cmp_swap_global_64, 546 null_frag, 547 v2i64, VReg_128>; 548 549defm GLOBAL_ATOMIC_SWAP : FLAT_Global_Atomic_Pseudo <"global_atomic_swap", 550 VGPR_32, i32, atomic_swap_global_32>; 551 552defm GLOBAL_ATOMIC_SWAP_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_swap_x2", 553 VReg_64, i64, atomic_swap_global_64>; 554 555defm GLOBAL_ATOMIC_ADD : FLAT_Global_Atomic_Pseudo <"global_atomic_add", 556 VGPR_32, i32, atomic_load_add_global_32>; 557 558defm GLOBAL_ATOMIC_SUB : FLAT_Global_Atomic_Pseudo <"global_atomic_sub", 559 VGPR_32, i32, atomic_load_sub_global_32>; 560 561defm GLOBAL_ATOMIC_SMIN : FLAT_Global_Atomic_Pseudo <"global_atomic_smin", 562 VGPR_32, i32, atomic_load_min_global_32>; 563 564defm GLOBAL_ATOMIC_UMIN : FLAT_Global_Atomic_Pseudo <"global_atomic_umin", 565 VGPR_32, i32, atomic_load_umin_global_32>; 566 567defm GLOBAL_ATOMIC_SMAX : FLAT_Global_Atomic_Pseudo <"global_atomic_smax", 568 VGPR_32, i32, atomic_load_max_global_32>; 569 570defm GLOBAL_ATOMIC_UMAX : FLAT_Global_Atomic_Pseudo <"global_atomic_umax", 571 VGPR_32, i32, atomic_load_umax_global_32>; 572 573defm GLOBAL_ATOMIC_AND : FLAT_Global_Atomic_Pseudo <"global_atomic_and", 574 VGPR_32, i32, atomic_load_and_global_32>; 575 576defm GLOBAL_ATOMIC_OR : FLAT_Global_Atomic_Pseudo <"global_atomic_or", 577 VGPR_32, i32, atomic_load_or_global_32>; 578 579defm GLOBAL_ATOMIC_XOR : FLAT_Global_Atomic_Pseudo <"global_atomic_xor", 580 VGPR_32, i32, atomic_load_xor_global_32>; 581 582defm GLOBAL_ATOMIC_INC : FLAT_Global_Atomic_Pseudo <"global_atomic_inc", 583 VGPR_32, i32, atomic_inc_global_32>; 584 585defm GLOBAL_ATOMIC_DEC : FLAT_Global_Atomic_Pseudo <"global_atomic_dec", 586 VGPR_32, i32, atomic_dec_global_32>; 587 588defm GLOBAL_ATOMIC_ADD_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_add_x2", 589 VReg_64, i64, atomic_load_add_global_64>; 590 591defm GLOBAL_ATOMIC_SUB_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_sub_x2", 592 VReg_64, i64, atomic_load_sub_global_64>; 593 594defm GLOBAL_ATOMIC_SMIN_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_smin_x2", 595 VReg_64, i64, atomic_load_min_global_64>; 596 597defm GLOBAL_ATOMIC_UMIN_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_umin_x2", 598 VReg_64, i64, atomic_load_umin_global_64>; 599 600defm GLOBAL_ATOMIC_SMAX_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_smax_x2", 601 VReg_64, i64, atomic_load_max_global_64>; 602 603defm GLOBAL_ATOMIC_UMAX_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_umax_x2", 604 VReg_64, i64, atomic_load_umax_global_64>; 605 606defm GLOBAL_ATOMIC_AND_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_and_x2", 607 VReg_64, i64, atomic_load_and_global_64>; 608 609defm GLOBAL_ATOMIC_OR_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_or_x2", 610 VReg_64, i64, atomic_load_or_global_64>; 611 612defm GLOBAL_ATOMIC_XOR_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_xor_x2", 613 VReg_64, i64, atomic_load_xor_global_64>; 614 615defm GLOBAL_ATOMIC_INC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_inc_x2", 616 VReg_64, i64, atomic_inc_global_64>; 617 618defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Atomic_Pseudo <"global_atomic_dec_x2", 619 VReg_64, i64, atomic_dec_global_64>; 620} // End is_flat_global = 1 621 622} // End SubtargetPredicate = HasFlatGlobalInsts 623 624 625let SubtargetPredicate = HasFlatScratchInsts in { 626defm SCRATCH_LOAD_UBYTE : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte", VGPR_32>; 627defm SCRATCH_LOAD_SBYTE : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte", VGPR_32>; 628defm SCRATCH_LOAD_USHORT : FLAT_Scratch_Load_Pseudo <"scratch_load_ushort", VGPR_32>; 629defm SCRATCH_LOAD_SSHORT : FLAT_Scratch_Load_Pseudo <"scratch_load_sshort", VGPR_32>; 630defm SCRATCH_LOAD_DWORD : FLAT_Scratch_Load_Pseudo <"scratch_load_dword", VGPR_32>; 631defm SCRATCH_LOAD_DWORDX2 : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx2", VReg_64>; 632defm SCRATCH_LOAD_DWORDX3 : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx3", VReg_96>; 633defm SCRATCH_LOAD_DWORDX4 : FLAT_Scratch_Load_Pseudo <"scratch_load_dwordx4", VReg_128>; 634 635defm SCRATCH_LOAD_UBYTE_D16 : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte_d16", VGPR_32>; 636defm SCRATCH_LOAD_UBYTE_D16_HI : FLAT_Scratch_Load_Pseudo <"scratch_load_ubyte_d16_hi", VGPR_32>; 637defm SCRATCH_LOAD_SBYTE_D16 : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte_d16", VGPR_32>; 638defm SCRATCH_LOAD_SBYTE_D16_HI : FLAT_Scratch_Load_Pseudo <"scratch_load_sbyte_d16_hi", VGPR_32>; 639defm SCRATCH_LOAD_SHORT_D16 : FLAT_Scratch_Load_Pseudo <"scratch_load_short_d16", VGPR_32>; 640defm SCRATCH_LOAD_SHORT_D16_HI : FLAT_Scratch_Load_Pseudo <"scratch_load_short_d16_hi", VGPR_32>; 641 642defm SCRATCH_STORE_BYTE : FLAT_Scratch_Store_Pseudo <"scratch_store_byte", VGPR_32>; 643defm SCRATCH_STORE_SHORT : FLAT_Scratch_Store_Pseudo <"scratch_store_short", VGPR_32>; 644defm SCRATCH_STORE_DWORD : FLAT_Scratch_Store_Pseudo <"scratch_store_dword", VGPR_32>; 645defm SCRATCH_STORE_DWORDX2 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx2", VReg_64>; 646defm SCRATCH_STORE_DWORDX3 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx3", VReg_96>; 647defm SCRATCH_STORE_DWORDX4 : FLAT_Scratch_Store_Pseudo <"scratch_store_dwordx4", VReg_128>; 648 649defm SCRATCH_STORE_BYTE_D16_HI : FLAT_Scratch_Store_Pseudo <"scratch_store_byte_d16_hi", VGPR_32>; 650defm SCRATCH_STORE_SHORT_D16_HI : FLAT_Scratch_Store_Pseudo <"scratch_store_short_d16_hi", VGPR_32>; 651 652} // End SubtargetPredicate = HasFlatScratchInsts 653 654let SubtargetPredicate = isGFX10Plus, is_flat_global = 1 in { 655 defm GLOBAL_ATOMIC_FCMPSWAP : 656 FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap", VGPR_32, f32>; 657 defm GLOBAL_ATOMIC_FMIN : 658 FLAT_Global_Atomic_Pseudo<"global_atomic_fmin", VGPR_32, f32>; 659 defm GLOBAL_ATOMIC_FMAX : 660 FLAT_Global_Atomic_Pseudo<"global_atomic_fmax", VGPR_32, f32>; 661 defm GLOBAL_ATOMIC_FCMPSWAP_X2 : 662 FLAT_Global_Atomic_Pseudo<"global_atomic_fcmpswap_x2", VReg_64, f64>; 663 defm GLOBAL_ATOMIC_FMIN_X2 : 664 FLAT_Global_Atomic_Pseudo<"global_atomic_fmin_x2", VReg_64, f64>; 665 defm GLOBAL_ATOMIC_FMAX_X2 : 666 FLAT_Global_Atomic_Pseudo<"global_atomic_fmax_x2", VReg_64, f64>; 667} // End SubtargetPredicate = isGFX10Plus, is_flat_global = 1 668 669let SubtargetPredicate = HasAtomicFaddInsts, is_flat_global = 1 in { 670 671defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Global_Atomic_Pseudo_NO_RTN < 672 "global_atomic_add_f32", VGPR_32, f32, atomic_fadd_global_noret 673>; 674defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Global_Atomic_Pseudo_NO_RTN < 675 "global_atomic_pk_add_f16", VGPR_32, v2f16, atomic_pk_fadd_global_noret 676>; 677 678} // End SubtargetPredicate = HasAtomicFaddInsts 679 680//===----------------------------------------------------------------------===// 681// Flat Patterns 682//===----------------------------------------------------------------------===// 683 684// Patterns for global loads with no offset. 685class FlatLoadPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat < 686 (vt (node (FLATOffset i64:$vaddr, i16:$offset, i1:$slc))), 687 (inst $vaddr, $offset, 0, 0, $slc) 688>; 689 690class FlatLoadPat_D16 <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat < 691 (node (FLATOffset (i64 VReg_64:$vaddr), i16:$offset, i1:$slc), vt:$in), 692 (inst $vaddr, $offset, 0, 0, $slc, $in) 693>; 694 695class FlatSignedLoadPat_D16 <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat < 696 (node (FLATOffsetSigned (i64 VReg_64:$vaddr), i16:$offset, i1:$slc), vt:$in), 697 (inst $vaddr, $offset, 0, 0, $slc, $in) 698>; 699 700class FlatLoadAtomicPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat < 701 (vt (node (FLATAtomic (i64 VReg_64:$vaddr), i16:$offset, i1:$slc))), 702 (inst $vaddr, $offset, 0, 0, $slc) 703>; 704 705class FlatLoadSignedPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat < 706 (vt (node (FLATOffsetSigned (i64 VReg_64:$vaddr), i16:$offset, i1:$slc))), 707 (inst $vaddr, $offset, 0, 0, $slc) 708>; 709 710class FlatStorePat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt, RegisterClass rc = VGPR_32> : GCNPat < 711 (node vt:$data, (FLATOffset i64:$vaddr, i16:$offset, i1:$slc)), 712 (inst $vaddr, rc:$data, $offset, 0, 0, $slc) 713>; 714 715class FlatStoreSignedPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt, RegisterClass rc = VGPR_32> : GCNPat < 716 (node vt:$data, (FLATOffsetSigned i64:$vaddr, i16:$offset, i1:$slc)), 717 (inst $vaddr, rc:$data, $offset, 0, 0, $slc) 718>; 719 720class FlatStoreAtomicPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt, RegisterClass rc = VGPR_32> : GCNPat < 721 // atomic store follows atomic binop convention so the address comes 722 // first. 723 (node (FLATAtomic i64:$vaddr, i16:$offset, i1:$slc), vt:$data), 724 (inst $vaddr, rc:$data, $offset, 0, 0, $slc) 725>; 726 727class FlatStoreSignedAtomicPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt, RegisterClass rc = VGPR_32> : GCNPat < 728 // atomic store follows atomic binop convention so the address comes 729 // first. 730 (node (FLATSignedAtomic i64:$vaddr, i16:$offset, i1:$slc), vt:$data), 731 (inst $vaddr, rc:$data, $offset, 0, 0, $slc) 732>; 733 734class FlatAtomicPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt, 735 ValueType data_vt = vt> : GCNPat < 736 (vt (node (FLATAtomic i64:$vaddr, i16:$offset, i1:$slc), data_vt:$data)), 737 (inst $vaddr, $data, $offset, $slc) 738>; 739 740class FlatAtomicPatNoRtn <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt> : GCNPat < 741 (node (FLATAtomic i64:$vaddr, i16:$offset, i1:$slc), vt:$data), 742 (inst $vaddr, $data, $offset, $slc) 743>; 744 745class FlatSignedAtomicPat <FLAT_Pseudo inst, SDPatternOperator node, ValueType vt, 746 ValueType data_vt = vt> : GCNPat < 747 (vt (node (FLATSignedAtomic i64:$vaddr, i16:$offset, i1:$slc), data_vt:$data)), 748 (inst $vaddr, $data, $offset, $slc) 749>; 750 751let OtherPredicates = [HasFlatAddressSpace] in { 752 753def : FlatLoadPat <FLAT_LOAD_UBYTE, extloadi8_flat, i32>; 754def : FlatLoadPat <FLAT_LOAD_UBYTE, zextloadi8_flat, i32>; 755def : FlatLoadPat <FLAT_LOAD_SBYTE, sextloadi8_flat, i32>; 756def : FlatLoadPat <FLAT_LOAD_UBYTE, extloadi8_flat, i16>; 757def : FlatLoadPat <FLAT_LOAD_UBYTE, zextloadi8_flat, i16>; 758def : FlatLoadPat <FLAT_LOAD_SBYTE, sextloadi8_flat, i16>; 759def : FlatLoadPat <FLAT_LOAD_USHORT, extloadi16_flat, i32>; 760def : FlatLoadPat <FLAT_LOAD_USHORT, zextloadi16_flat, i32>; 761def : FlatLoadPat <FLAT_LOAD_USHORT, load_flat, i16>; 762def : FlatLoadPat <FLAT_LOAD_SSHORT, sextloadi16_flat, i32>; 763def : FlatLoadPat <FLAT_LOAD_DWORDX3, load_flat, v3i32>; 764 765def : FlatLoadAtomicPat <FLAT_LOAD_DWORD, atomic_load_32_flat, i32>; 766def : FlatLoadAtomicPat <FLAT_LOAD_DWORDX2, atomic_load_64_flat, i64>; 767 768def : FlatStorePat <FLAT_STORE_BYTE, truncstorei8_flat, i32>; 769def : FlatStorePat <FLAT_STORE_SHORT, truncstorei16_flat, i32>; 770 771foreach vt = Reg32Types.types in { 772def : FlatLoadPat <FLAT_LOAD_DWORD, load_flat, vt>; 773def : FlatStorePat <FLAT_STORE_DWORD, store_flat, vt>; 774} 775 776foreach vt = VReg_64.RegTypes in { 777def : FlatStorePat <FLAT_STORE_DWORDX2, store_flat, vt, VReg_64>; 778def : FlatLoadPat <FLAT_LOAD_DWORDX2, load_flat, vt>; 779} 780 781def : FlatStorePat <FLAT_STORE_DWORDX3, store_flat, v3i32, VReg_96>; 782 783foreach vt = VReg_128.RegTypes in { 784def : FlatLoadPat <FLAT_LOAD_DWORDX4, load_flat, vt>; 785def : FlatStorePat <FLAT_STORE_DWORDX4, store_flat, vt, VReg_128>; 786} 787 788def : FlatStoreAtomicPat <FLAT_STORE_DWORD, atomic_store_flat_32, i32>; 789def : FlatStoreAtomicPat <FLAT_STORE_DWORDX2, atomic_store_flat_64, i64, VReg_64>; 790 791def : FlatAtomicPat <FLAT_ATOMIC_ADD_RTN, atomic_load_add_global_32, i32>; 792def : FlatAtomicPat <FLAT_ATOMIC_SUB_RTN, atomic_load_sub_global_32, i32>; 793def : FlatAtomicPat <FLAT_ATOMIC_INC_RTN, atomic_inc_global_32, i32>; 794def : FlatAtomicPat <FLAT_ATOMIC_DEC_RTN, atomic_dec_global_32, i32>; 795def : FlatAtomicPat <FLAT_ATOMIC_AND_RTN, atomic_load_and_global_32, i32>; 796def : FlatAtomicPat <FLAT_ATOMIC_SMAX_RTN, atomic_load_max_global_32, i32>; 797def : FlatAtomicPat <FLAT_ATOMIC_UMAX_RTN, atomic_load_umax_global_32, i32>; 798def : FlatAtomicPat <FLAT_ATOMIC_SMIN_RTN, atomic_load_min_global_32, i32>; 799def : FlatAtomicPat <FLAT_ATOMIC_UMIN_RTN, atomic_load_umin_global_32, i32>; 800def : FlatAtomicPat <FLAT_ATOMIC_OR_RTN, atomic_load_or_global_32, i32>; 801def : FlatAtomicPat <FLAT_ATOMIC_SWAP_RTN, atomic_swap_global_32, i32>; 802def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_RTN, AMDGPUatomic_cmp_swap_global_32, i32, v2i32>; 803def : FlatAtomicPat <FLAT_ATOMIC_XOR_RTN, atomic_load_xor_global_32, i32>; 804 805def : FlatAtomicPat <FLAT_ATOMIC_ADD_X2_RTN, atomic_load_add_global_64, i64>; 806def : FlatAtomicPat <FLAT_ATOMIC_SUB_X2_RTN, atomic_load_sub_global_64, i64>; 807def : FlatAtomicPat <FLAT_ATOMIC_INC_X2_RTN, atomic_inc_global_64, i64>; 808def : FlatAtomicPat <FLAT_ATOMIC_DEC_X2_RTN, atomic_dec_global_64, i64>; 809def : FlatAtomicPat <FLAT_ATOMIC_AND_X2_RTN, atomic_load_and_global_64, i64>; 810def : FlatAtomicPat <FLAT_ATOMIC_SMAX_X2_RTN, atomic_load_max_global_64, i64>; 811def : FlatAtomicPat <FLAT_ATOMIC_UMAX_X2_RTN, atomic_load_umax_global_64, i64>; 812def : FlatAtomicPat <FLAT_ATOMIC_SMIN_X2_RTN, atomic_load_min_global_64, i64>; 813def : FlatAtomicPat <FLAT_ATOMIC_UMIN_X2_RTN, atomic_load_umin_global_64, i64>; 814def : FlatAtomicPat <FLAT_ATOMIC_OR_X2_RTN, atomic_load_or_global_64, i64>; 815def : FlatAtomicPat <FLAT_ATOMIC_SWAP_X2_RTN, atomic_swap_global_64, i64>; 816def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_X2_RTN, AMDGPUatomic_cmp_swap_global_64, i64, v2i64>; 817def : FlatAtomicPat <FLAT_ATOMIC_XOR_X2_RTN, atomic_load_xor_global_64, i64>; 818 819def : FlatStorePat <FLAT_STORE_BYTE, truncstorei8_flat, i16>; 820def : FlatStorePat <FLAT_STORE_SHORT, store_flat, i16>; 821 822let OtherPredicates = [D16PreservesUnusedBits] in { 823def : FlatStorePat <FLAT_STORE_SHORT_D16_HI, truncstorei16_hi16_flat, i32>; 824def : FlatStorePat <FLAT_STORE_BYTE_D16_HI, truncstorei8_hi16_flat, i32>; 825 826def : FlatLoadPat_D16 <FLAT_LOAD_UBYTE_D16_HI, az_extloadi8_d16_hi_flat, v2i16>; 827def : FlatLoadPat_D16 <FLAT_LOAD_UBYTE_D16_HI, az_extloadi8_d16_hi_flat, v2f16>; 828def : FlatLoadPat_D16 <FLAT_LOAD_SBYTE_D16_HI, sextloadi8_d16_hi_flat, v2i16>; 829def : FlatLoadPat_D16 <FLAT_LOAD_SBYTE_D16_HI, sextloadi8_d16_hi_flat, v2f16>; 830def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16_HI, load_d16_hi_flat, v2i16>; 831def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16_HI, load_d16_hi_flat, v2f16>; 832 833def : FlatLoadPat_D16 <FLAT_LOAD_UBYTE_D16, az_extloadi8_d16_lo_flat, v2i16>; 834def : FlatLoadPat_D16 <FLAT_LOAD_UBYTE_D16, az_extloadi8_d16_lo_flat, v2f16>; 835def : FlatLoadPat_D16 <FLAT_LOAD_SBYTE_D16, sextloadi8_d16_lo_flat, v2i16>; 836def : FlatLoadPat_D16 <FLAT_LOAD_SBYTE_D16, sextloadi8_d16_lo_flat, v2f16>; 837def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16, load_d16_lo_flat, v2i16>; 838def : FlatLoadPat_D16 <FLAT_LOAD_SHORT_D16, load_d16_lo_flat, v2f16>; 839} 840 841} // End OtherPredicates = [HasFlatAddressSpace] 842 843let OtherPredicates = [HasFlatGlobalInsts], AddedComplexity = 10 in { 844 845def : FlatLoadSignedPat <GLOBAL_LOAD_UBYTE, extloadi8_global, i32>; 846def : FlatLoadSignedPat <GLOBAL_LOAD_UBYTE, zextloadi8_global, i32>; 847def : FlatLoadSignedPat <GLOBAL_LOAD_SBYTE, sextloadi8_global, i32>; 848def : FlatLoadSignedPat <GLOBAL_LOAD_UBYTE, extloadi8_global, i16>; 849def : FlatLoadSignedPat <GLOBAL_LOAD_UBYTE, zextloadi8_global, i16>; 850def : FlatLoadSignedPat <GLOBAL_LOAD_SBYTE, sextloadi8_global, i16>; 851def : FlatLoadSignedPat <GLOBAL_LOAD_USHORT, extloadi16_global, i32>; 852def : FlatLoadSignedPat <GLOBAL_LOAD_USHORT, zextloadi16_global, i32>; 853def : FlatLoadSignedPat <GLOBAL_LOAD_SSHORT, sextloadi16_global, i32>; 854def : FlatLoadSignedPat <GLOBAL_LOAD_USHORT, load_global, i16>; 855 856foreach vt = Reg32Types.types in { 857def : FlatLoadSignedPat <GLOBAL_LOAD_DWORD, load_global, vt>; 858def : FlatStoreSignedPat <GLOBAL_STORE_DWORD, store_global, vt, VGPR_32>; 859} 860 861foreach vt = VReg_64.RegTypes in { 862def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX2, load_global, vt>; 863def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX2, store_global, vt, VReg_64>; 864} 865 866def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX3, load_global, v3i32>; 867 868foreach vt = VReg_128.RegTypes in { 869def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX4, load_global, vt>; 870def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX4, store_global, vt, VReg_128>; 871} 872 873def : FlatLoadAtomicPat <GLOBAL_LOAD_DWORD, atomic_load_32_global, i32>; 874def : FlatLoadAtomicPat <GLOBAL_LOAD_DWORDX2, atomic_load_64_global, i64>; 875 876def : FlatStoreSignedPat <GLOBAL_STORE_BYTE, truncstorei8_global, i32, VGPR_32>; 877def : FlatStoreSignedPat <GLOBAL_STORE_BYTE, truncstorei8_global, i16, VGPR_32>; 878def : FlatStoreSignedPat <GLOBAL_STORE_SHORT, truncstorei16_global, i32, VGPR_32>; 879def : FlatStoreSignedPat <GLOBAL_STORE_SHORT, store_global, i16, VGPR_32>; 880def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX3, store_global, v3i32, VReg_96>; 881 882let OtherPredicates = [D16PreservesUnusedBits] in { 883def : FlatStoreSignedPat <GLOBAL_STORE_SHORT_D16_HI, truncstorei16_hi16_global, i32>; 884def : FlatStoreSignedPat <GLOBAL_STORE_BYTE_D16_HI, truncstorei8_hi16_global, i32>; 885 886def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_UBYTE_D16_HI, az_extloadi8_d16_hi_global, v2i16>; 887def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_UBYTE_D16_HI, az_extloadi8_d16_hi_global, v2f16>; 888def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SBYTE_D16_HI, sextloadi8_d16_hi_global, v2i16>; 889def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SBYTE_D16_HI, sextloadi8_d16_hi_global, v2f16>; 890def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SHORT_D16_HI, load_d16_hi_global, v2i16>; 891def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SHORT_D16_HI, load_d16_hi_global, v2f16>; 892 893def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_UBYTE_D16, az_extloadi8_d16_lo_global, v2i16>; 894def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_UBYTE_D16, az_extloadi8_d16_lo_global, v2f16>; 895def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SBYTE_D16, sextloadi8_d16_lo_global, v2i16>; 896def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SBYTE_D16, sextloadi8_d16_lo_global, v2f16>; 897def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SHORT_D16, load_d16_lo_global, v2i16>; 898def : FlatSignedLoadPat_D16 <GLOBAL_LOAD_SHORT_D16, load_d16_lo_global, v2f16>; 899} 900 901def : FlatStoreSignedAtomicPat <GLOBAL_STORE_DWORD, atomic_store_global_32, i32>; 902def : FlatStoreSignedAtomicPat <GLOBAL_STORE_DWORDX2, atomic_store_global_64, i64, VReg_64>; 903 904def : FlatSignedAtomicPat <GLOBAL_ATOMIC_ADD_RTN, atomic_load_add_global_32, i32>; 905def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SUB_RTN, atomic_load_sub_global_32, i32>; 906def : FlatSignedAtomicPat <GLOBAL_ATOMIC_INC_RTN, atomic_inc_global_32, i32>; 907def : FlatSignedAtomicPat <GLOBAL_ATOMIC_DEC_RTN, atomic_dec_global_32, i32>; 908def : FlatSignedAtomicPat <GLOBAL_ATOMIC_AND_RTN, atomic_load_and_global_32, i32>; 909def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SMAX_RTN, atomic_load_max_global_32, i32>; 910def : FlatSignedAtomicPat <GLOBAL_ATOMIC_UMAX_RTN, atomic_load_umax_global_32, i32>; 911def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SMIN_RTN, atomic_load_min_global_32, i32>; 912def : FlatSignedAtomicPat <GLOBAL_ATOMIC_UMIN_RTN, atomic_load_umin_global_32, i32>; 913def : FlatSignedAtomicPat <GLOBAL_ATOMIC_OR_RTN, atomic_load_or_global_32, i32>; 914def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SWAP_RTN, atomic_swap_global_32, i32>; 915def : FlatSignedAtomicPat <GLOBAL_ATOMIC_CMPSWAP_RTN, AMDGPUatomic_cmp_swap_global_32, i32, v2i32>; 916def : FlatSignedAtomicPat <GLOBAL_ATOMIC_XOR_RTN, atomic_load_xor_global_32, i32>; 917 918def : FlatSignedAtomicPat <GLOBAL_ATOMIC_ADD_X2_RTN, atomic_load_add_global_64, i64>; 919def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SUB_X2_RTN, atomic_load_sub_global_64, i64>; 920def : FlatSignedAtomicPat <GLOBAL_ATOMIC_INC_X2_RTN, atomic_inc_global_64, i64>; 921def : FlatSignedAtomicPat <GLOBAL_ATOMIC_DEC_X2_RTN, atomic_dec_global_64, i64>; 922def : FlatSignedAtomicPat <GLOBAL_ATOMIC_AND_X2_RTN, atomic_load_and_global_64, i64>; 923def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SMAX_X2_RTN, atomic_load_max_global_64, i64>; 924def : FlatSignedAtomicPat <GLOBAL_ATOMIC_UMAX_X2_RTN, atomic_load_umax_global_64, i64>; 925def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SMIN_X2_RTN, atomic_load_min_global_64, i64>; 926def : FlatSignedAtomicPat <GLOBAL_ATOMIC_UMIN_X2_RTN, atomic_load_umin_global_64, i64>; 927def : FlatSignedAtomicPat <GLOBAL_ATOMIC_OR_X2_RTN, atomic_load_or_global_64, i64>; 928def : FlatSignedAtomicPat <GLOBAL_ATOMIC_SWAP_X2_RTN, atomic_swap_global_64, i64>; 929def : FlatSignedAtomicPat <GLOBAL_ATOMIC_CMPSWAP_X2_RTN, AMDGPUatomic_cmp_swap_global_64, i64, v2i64>; 930def : FlatSignedAtomicPat <GLOBAL_ATOMIC_XOR_X2_RTN, atomic_load_xor_global_64, i64>; 931 932def : FlatAtomicPatNoRtn <GLOBAL_ATOMIC_ADD_F32, atomic_fadd_global_noret, f32>; 933def : FlatAtomicPatNoRtn <GLOBAL_ATOMIC_PK_ADD_F16, atomic_pk_fadd_global_noret, v2f16>; 934 935} // End OtherPredicates = [HasFlatGlobalInsts], AddedComplexity = 10 936 937 938//===----------------------------------------------------------------------===// 939// Target 940//===----------------------------------------------------------------------===// 941 942//===----------------------------------------------------------------------===// 943// CI 944//===----------------------------------------------------------------------===// 945 946class FLAT_Real_ci <bits<7> op, FLAT_Pseudo ps> : 947 FLAT_Real <op, ps>, 948 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SI> { 949 let AssemblerPredicate = isGFX7Only; 950 let DecoderNamespace="GFX7"; 951} 952 953def FLAT_LOAD_UBYTE_ci : FLAT_Real_ci <0x8, FLAT_LOAD_UBYTE>; 954def FLAT_LOAD_SBYTE_ci : FLAT_Real_ci <0x9, FLAT_LOAD_SBYTE>; 955def FLAT_LOAD_USHORT_ci : FLAT_Real_ci <0xa, FLAT_LOAD_USHORT>; 956def FLAT_LOAD_SSHORT_ci : FLAT_Real_ci <0xb, FLAT_LOAD_SSHORT>; 957def FLAT_LOAD_DWORD_ci : FLAT_Real_ci <0xc, FLAT_LOAD_DWORD>; 958def FLAT_LOAD_DWORDX2_ci : FLAT_Real_ci <0xd, FLAT_LOAD_DWORDX2>; 959def FLAT_LOAD_DWORDX4_ci : FLAT_Real_ci <0xe, FLAT_LOAD_DWORDX4>; 960def FLAT_LOAD_DWORDX3_ci : FLAT_Real_ci <0xf, FLAT_LOAD_DWORDX3>; 961 962def FLAT_STORE_BYTE_ci : FLAT_Real_ci <0x18, FLAT_STORE_BYTE>; 963def FLAT_STORE_SHORT_ci : FLAT_Real_ci <0x1a, FLAT_STORE_SHORT>; 964def FLAT_STORE_DWORD_ci : FLAT_Real_ci <0x1c, FLAT_STORE_DWORD>; 965def FLAT_STORE_DWORDX2_ci : FLAT_Real_ci <0x1d, FLAT_STORE_DWORDX2>; 966def FLAT_STORE_DWORDX4_ci : FLAT_Real_ci <0x1e, FLAT_STORE_DWORDX4>; 967def FLAT_STORE_DWORDX3_ci : FLAT_Real_ci <0x1f, FLAT_STORE_DWORDX3>; 968 969multiclass FLAT_Real_Atomics_ci <bits<7> op, FLAT_Pseudo ps> { 970 def _ci : FLAT_Real_ci<op, !cast<FLAT_Pseudo>(ps.PseudoInstr)>; 971 def _RTN_ci : FLAT_Real_ci<op, !cast<FLAT_Pseudo>(ps.PseudoInstr # "_RTN")>; 972} 973 974defm FLAT_ATOMIC_SWAP : FLAT_Real_Atomics_ci <0x30, FLAT_ATOMIC_SWAP>; 975defm FLAT_ATOMIC_CMPSWAP : FLAT_Real_Atomics_ci <0x31, FLAT_ATOMIC_CMPSWAP>; 976defm FLAT_ATOMIC_ADD : FLAT_Real_Atomics_ci <0x32, FLAT_ATOMIC_ADD>; 977defm FLAT_ATOMIC_SUB : FLAT_Real_Atomics_ci <0x33, FLAT_ATOMIC_SUB>; 978defm FLAT_ATOMIC_SMIN : FLAT_Real_Atomics_ci <0x35, FLAT_ATOMIC_SMIN>; 979defm FLAT_ATOMIC_UMIN : FLAT_Real_Atomics_ci <0x36, FLAT_ATOMIC_UMIN>; 980defm FLAT_ATOMIC_SMAX : FLAT_Real_Atomics_ci <0x37, FLAT_ATOMIC_SMAX>; 981defm FLAT_ATOMIC_UMAX : FLAT_Real_Atomics_ci <0x38, FLAT_ATOMIC_UMAX>; 982defm FLAT_ATOMIC_AND : FLAT_Real_Atomics_ci <0x39, FLAT_ATOMIC_AND>; 983defm FLAT_ATOMIC_OR : FLAT_Real_Atomics_ci <0x3a, FLAT_ATOMIC_OR>; 984defm FLAT_ATOMIC_XOR : FLAT_Real_Atomics_ci <0x3b, FLAT_ATOMIC_XOR>; 985defm FLAT_ATOMIC_INC : FLAT_Real_Atomics_ci <0x3c, FLAT_ATOMIC_INC>; 986defm FLAT_ATOMIC_DEC : FLAT_Real_Atomics_ci <0x3d, FLAT_ATOMIC_DEC>; 987defm FLAT_ATOMIC_SWAP_X2 : FLAT_Real_Atomics_ci <0x50, FLAT_ATOMIC_SWAP_X2>; 988defm FLAT_ATOMIC_CMPSWAP_X2 : FLAT_Real_Atomics_ci <0x51, FLAT_ATOMIC_CMPSWAP_X2>; 989defm FLAT_ATOMIC_ADD_X2 : FLAT_Real_Atomics_ci <0x52, FLAT_ATOMIC_ADD_X2>; 990defm FLAT_ATOMIC_SUB_X2 : FLAT_Real_Atomics_ci <0x53, FLAT_ATOMIC_SUB_X2>; 991defm FLAT_ATOMIC_SMIN_X2 : FLAT_Real_Atomics_ci <0x55, FLAT_ATOMIC_SMIN_X2>; 992defm FLAT_ATOMIC_UMIN_X2 : FLAT_Real_Atomics_ci <0x56, FLAT_ATOMIC_UMIN_X2>; 993defm FLAT_ATOMIC_SMAX_X2 : FLAT_Real_Atomics_ci <0x57, FLAT_ATOMIC_SMAX_X2>; 994defm FLAT_ATOMIC_UMAX_X2 : FLAT_Real_Atomics_ci <0x58, FLAT_ATOMIC_UMAX_X2>; 995defm FLAT_ATOMIC_AND_X2 : FLAT_Real_Atomics_ci <0x59, FLAT_ATOMIC_AND_X2>; 996defm FLAT_ATOMIC_OR_X2 : FLAT_Real_Atomics_ci <0x5a, FLAT_ATOMIC_OR_X2>; 997defm FLAT_ATOMIC_XOR_X2 : FLAT_Real_Atomics_ci <0x5b, FLAT_ATOMIC_XOR_X2>; 998defm FLAT_ATOMIC_INC_X2 : FLAT_Real_Atomics_ci <0x5c, FLAT_ATOMIC_INC_X2>; 999defm FLAT_ATOMIC_DEC_X2 : FLAT_Real_Atomics_ci <0x5d, FLAT_ATOMIC_DEC_X2>; 1000 1001// CI Only flat instructions 1002defm FLAT_ATOMIC_FCMPSWAP : FLAT_Real_Atomics_ci <0x3e, FLAT_ATOMIC_FCMPSWAP>; 1003defm FLAT_ATOMIC_FMIN : FLAT_Real_Atomics_ci <0x3f, FLAT_ATOMIC_FMIN>; 1004defm FLAT_ATOMIC_FMAX : FLAT_Real_Atomics_ci <0x40, FLAT_ATOMIC_FMAX>; 1005defm FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_Real_Atomics_ci <0x5e, FLAT_ATOMIC_FCMPSWAP_X2>; 1006defm FLAT_ATOMIC_FMIN_X2 : FLAT_Real_Atomics_ci <0x5f, FLAT_ATOMIC_FMIN_X2>; 1007defm FLAT_ATOMIC_FMAX_X2 : FLAT_Real_Atomics_ci <0x60, FLAT_ATOMIC_FMAX_X2>; 1008 1009 1010//===----------------------------------------------------------------------===// 1011// VI 1012//===----------------------------------------------------------------------===// 1013 1014class FLAT_Real_vi <bits<7> op, FLAT_Pseudo ps> : 1015 FLAT_Real <op, ps>, 1016 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> { 1017 let AssemblerPredicate = isGFX8GFX9; 1018 let DecoderNamespace = "GFX8"; 1019} 1020 1021multiclass FLAT_Real_AllAddr_vi<bits<7> op> { 1022 def _vi : FLAT_Real_vi<op, !cast<FLAT_Pseudo>(NAME)>; 1023 def _SADDR_vi : FLAT_Real_vi<op, !cast<FLAT_Pseudo>(NAME#"_SADDR")>; 1024} 1025 1026def FLAT_LOAD_UBYTE_vi : FLAT_Real_vi <0x10, FLAT_LOAD_UBYTE>; 1027def FLAT_LOAD_SBYTE_vi : FLAT_Real_vi <0x11, FLAT_LOAD_SBYTE>; 1028def FLAT_LOAD_USHORT_vi : FLAT_Real_vi <0x12, FLAT_LOAD_USHORT>; 1029def FLAT_LOAD_SSHORT_vi : FLAT_Real_vi <0x13, FLAT_LOAD_SSHORT>; 1030def FLAT_LOAD_DWORD_vi : FLAT_Real_vi <0x14, FLAT_LOAD_DWORD>; 1031def FLAT_LOAD_DWORDX2_vi : FLAT_Real_vi <0x15, FLAT_LOAD_DWORDX2>; 1032def FLAT_LOAD_DWORDX4_vi : FLAT_Real_vi <0x17, FLAT_LOAD_DWORDX4>; 1033def FLAT_LOAD_DWORDX3_vi : FLAT_Real_vi <0x16, FLAT_LOAD_DWORDX3>; 1034 1035def FLAT_STORE_BYTE_vi : FLAT_Real_vi <0x18, FLAT_STORE_BYTE>; 1036def FLAT_STORE_BYTE_D16_HI_vi : FLAT_Real_vi <0x19, FLAT_STORE_BYTE_D16_HI>; 1037def FLAT_STORE_SHORT_vi : FLAT_Real_vi <0x1a, FLAT_STORE_SHORT>; 1038def FLAT_STORE_SHORT_D16_HI_vi : FLAT_Real_vi <0x1b, FLAT_STORE_SHORT_D16_HI>; 1039def FLAT_STORE_DWORD_vi : FLAT_Real_vi <0x1c, FLAT_STORE_DWORD>; 1040def FLAT_STORE_DWORDX2_vi : FLAT_Real_vi <0x1d, FLAT_STORE_DWORDX2>; 1041def FLAT_STORE_DWORDX4_vi : FLAT_Real_vi <0x1f, FLAT_STORE_DWORDX4>; 1042def FLAT_STORE_DWORDX3_vi : FLAT_Real_vi <0x1e, FLAT_STORE_DWORDX3>; 1043 1044def FLAT_LOAD_UBYTE_D16_vi : FLAT_Real_vi <0x20, FLAT_LOAD_UBYTE_D16>; 1045def FLAT_LOAD_UBYTE_D16_HI_vi : FLAT_Real_vi <0x21, FLAT_LOAD_UBYTE_D16_HI>; 1046def FLAT_LOAD_SBYTE_D16_vi : FLAT_Real_vi <0x22, FLAT_LOAD_SBYTE_D16>; 1047def FLAT_LOAD_SBYTE_D16_HI_vi : FLAT_Real_vi <0x23, FLAT_LOAD_SBYTE_D16_HI>; 1048def FLAT_LOAD_SHORT_D16_vi : FLAT_Real_vi <0x24, FLAT_LOAD_SHORT_D16>; 1049def FLAT_LOAD_SHORT_D16_HI_vi : FLAT_Real_vi <0x25, FLAT_LOAD_SHORT_D16_HI>; 1050 1051multiclass FLAT_Real_Atomics_vi <bits<7> op, FLAT_Pseudo ps> { 1052 def _vi : FLAT_Real_vi<op, !cast<FLAT_Pseudo>(ps.PseudoInstr)>; 1053 def _RTN_vi : FLAT_Real_vi<op, !cast<FLAT_Pseudo>(ps.PseudoInstr # "_RTN")>; 1054} 1055 1056multiclass FLAT_Global_Real_Atomics_vi<bits<7> op> : 1057 FLAT_Real_AllAddr_vi<op> { 1058 def _RTN_vi : FLAT_Real_vi <op, !cast<FLAT_Pseudo>(NAME#"_RTN")>; 1059 def _SADDR_RTN_vi : FLAT_Real_vi <op, !cast<FLAT_Pseudo>(NAME#"_SADDR_RTN")>; 1060} 1061 1062 1063defm FLAT_ATOMIC_SWAP : FLAT_Real_Atomics_vi <0x40, FLAT_ATOMIC_SWAP>; 1064defm FLAT_ATOMIC_CMPSWAP : FLAT_Real_Atomics_vi <0x41, FLAT_ATOMIC_CMPSWAP>; 1065defm FLAT_ATOMIC_ADD : FLAT_Real_Atomics_vi <0x42, FLAT_ATOMIC_ADD>; 1066defm FLAT_ATOMIC_SUB : FLAT_Real_Atomics_vi <0x43, FLAT_ATOMIC_SUB>; 1067defm FLAT_ATOMIC_SMIN : FLAT_Real_Atomics_vi <0x44, FLAT_ATOMIC_SMIN>; 1068defm FLAT_ATOMIC_UMIN : FLAT_Real_Atomics_vi <0x45, FLAT_ATOMIC_UMIN>; 1069defm FLAT_ATOMIC_SMAX : FLAT_Real_Atomics_vi <0x46, FLAT_ATOMIC_SMAX>; 1070defm FLAT_ATOMIC_UMAX : FLAT_Real_Atomics_vi <0x47, FLAT_ATOMIC_UMAX>; 1071defm FLAT_ATOMIC_AND : FLAT_Real_Atomics_vi <0x48, FLAT_ATOMIC_AND>; 1072defm FLAT_ATOMIC_OR : FLAT_Real_Atomics_vi <0x49, FLAT_ATOMIC_OR>; 1073defm FLAT_ATOMIC_XOR : FLAT_Real_Atomics_vi <0x4a, FLAT_ATOMIC_XOR>; 1074defm FLAT_ATOMIC_INC : FLAT_Real_Atomics_vi <0x4b, FLAT_ATOMIC_INC>; 1075defm FLAT_ATOMIC_DEC : FLAT_Real_Atomics_vi <0x4c, FLAT_ATOMIC_DEC>; 1076defm FLAT_ATOMIC_SWAP_X2 : FLAT_Real_Atomics_vi <0x60, FLAT_ATOMIC_SWAP_X2>; 1077defm FLAT_ATOMIC_CMPSWAP_X2 : FLAT_Real_Atomics_vi <0x61, FLAT_ATOMIC_CMPSWAP_X2>; 1078defm FLAT_ATOMIC_ADD_X2 : FLAT_Real_Atomics_vi <0x62, FLAT_ATOMIC_ADD_X2>; 1079defm FLAT_ATOMIC_SUB_X2 : FLAT_Real_Atomics_vi <0x63, FLAT_ATOMIC_SUB_X2>; 1080defm FLAT_ATOMIC_SMIN_X2 : FLAT_Real_Atomics_vi <0x64, FLAT_ATOMIC_SMIN_X2>; 1081defm FLAT_ATOMIC_UMIN_X2 : FLAT_Real_Atomics_vi <0x65, FLAT_ATOMIC_UMIN_X2>; 1082defm FLAT_ATOMIC_SMAX_X2 : FLAT_Real_Atomics_vi <0x66, FLAT_ATOMIC_SMAX_X2>; 1083defm FLAT_ATOMIC_UMAX_X2 : FLAT_Real_Atomics_vi <0x67, FLAT_ATOMIC_UMAX_X2>; 1084defm FLAT_ATOMIC_AND_X2 : FLAT_Real_Atomics_vi <0x68, FLAT_ATOMIC_AND_X2>; 1085defm FLAT_ATOMIC_OR_X2 : FLAT_Real_Atomics_vi <0x69, FLAT_ATOMIC_OR_X2>; 1086defm FLAT_ATOMIC_XOR_X2 : FLAT_Real_Atomics_vi <0x6a, FLAT_ATOMIC_XOR_X2>; 1087defm FLAT_ATOMIC_INC_X2 : FLAT_Real_Atomics_vi <0x6b, FLAT_ATOMIC_INC_X2>; 1088defm FLAT_ATOMIC_DEC_X2 : FLAT_Real_Atomics_vi <0x6c, FLAT_ATOMIC_DEC_X2>; 1089 1090defm GLOBAL_LOAD_UBYTE : FLAT_Real_AllAddr_vi <0x10>; 1091defm GLOBAL_LOAD_SBYTE : FLAT_Real_AllAddr_vi <0x11>; 1092defm GLOBAL_LOAD_USHORT : FLAT_Real_AllAddr_vi <0x12>; 1093defm GLOBAL_LOAD_SSHORT : FLAT_Real_AllAddr_vi <0x13>; 1094defm GLOBAL_LOAD_DWORD : FLAT_Real_AllAddr_vi <0x14>; 1095defm GLOBAL_LOAD_DWORDX2 : FLAT_Real_AllAddr_vi <0x15>; 1096defm GLOBAL_LOAD_DWORDX3 : FLAT_Real_AllAddr_vi <0x16>; 1097defm GLOBAL_LOAD_DWORDX4 : FLAT_Real_AllAddr_vi <0x17>; 1098 1099defm GLOBAL_LOAD_UBYTE_D16 : FLAT_Real_AllAddr_vi <0x20>; 1100defm GLOBAL_LOAD_UBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x21>; 1101defm GLOBAL_LOAD_SBYTE_D16 : FLAT_Real_AllAddr_vi <0x22>; 1102defm GLOBAL_LOAD_SBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x23>; 1103defm GLOBAL_LOAD_SHORT_D16 : FLAT_Real_AllAddr_vi <0x24>; 1104defm GLOBAL_LOAD_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x25>; 1105 1106defm GLOBAL_STORE_BYTE : FLAT_Real_AllAddr_vi <0x18>; 1107defm GLOBAL_STORE_BYTE_D16_HI : FLAT_Real_AllAddr_vi <0x19>; 1108defm GLOBAL_STORE_SHORT : FLAT_Real_AllAddr_vi <0x1a>; 1109defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x1b>; 1110defm GLOBAL_STORE_DWORD : FLAT_Real_AllAddr_vi <0x1c>; 1111defm GLOBAL_STORE_DWORDX2 : FLAT_Real_AllAddr_vi <0x1d>; 1112defm GLOBAL_STORE_DWORDX3 : FLAT_Real_AllAddr_vi <0x1e>; 1113defm GLOBAL_STORE_DWORDX4 : FLAT_Real_AllAddr_vi <0x1f>; 1114 1115 1116defm GLOBAL_ATOMIC_SWAP : FLAT_Global_Real_Atomics_vi <0x40>; 1117defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Global_Real_Atomics_vi <0x41>; 1118defm GLOBAL_ATOMIC_ADD : FLAT_Global_Real_Atomics_vi <0x42>; 1119defm GLOBAL_ATOMIC_SUB : FLAT_Global_Real_Atomics_vi <0x43>; 1120defm GLOBAL_ATOMIC_SMIN : FLAT_Global_Real_Atomics_vi <0x44>; 1121defm GLOBAL_ATOMIC_UMIN : FLAT_Global_Real_Atomics_vi <0x45>; 1122defm GLOBAL_ATOMIC_SMAX : FLAT_Global_Real_Atomics_vi <0x46>; 1123defm GLOBAL_ATOMIC_UMAX : FLAT_Global_Real_Atomics_vi <0x47>; 1124defm GLOBAL_ATOMIC_AND : FLAT_Global_Real_Atomics_vi <0x48>; 1125defm GLOBAL_ATOMIC_OR : FLAT_Global_Real_Atomics_vi <0x49>; 1126defm GLOBAL_ATOMIC_XOR : FLAT_Global_Real_Atomics_vi <0x4a>; 1127defm GLOBAL_ATOMIC_INC : FLAT_Global_Real_Atomics_vi <0x4b>; 1128defm GLOBAL_ATOMIC_DEC : FLAT_Global_Real_Atomics_vi <0x4c>; 1129defm GLOBAL_ATOMIC_SWAP_X2 : FLAT_Global_Real_Atomics_vi <0x60>; 1130defm GLOBAL_ATOMIC_CMPSWAP_X2 : FLAT_Global_Real_Atomics_vi <0x61>; 1131defm GLOBAL_ATOMIC_ADD_X2 : FLAT_Global_Real_Atomics_vi <0x62>; 1132defm GLOBAL_ATOMIC_SUB_X2 : FLAT_Global_Real_Atomics_vi <0x63>; 1133defm GLOBAL_ATOMIC_SMIN_X2 : FLAT_Global_Real_Atomics_vi <0x64>; 1134defm GLOBAL_ATOMIC_UMIN_X2 : FLAT_Global_Real_Atomics_vi <0x65>; 1135defm GLOBAL_ATOMIC_SMAX_X2 : FLAT_Global_Real_Atomics_vi <0x66>; 1136defm GLOBAL_ATOMIC_UMAX_X2 : FLAT_Global_Real_Atomics_vi <0x67>; 1137defm GLOBAL_ATOMIC_AND_X2 : FLAT_Global_Real_Atomics_vi <0x68>; 1138defm GLOBAL_ATOMIC_OR_X2 : FLAT_Global_Real_Atomics_vi <0x69>; 1139defm GLOBAL_ATOMIC_XOR_X2 : FLAT_Global_Real_Atomics_vi <0x6a>; 1140defm GLOBAL_ATOMIC_INC_X2 : FLAT_Global_Real_Atomics_vi <0x6b>; 1141defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Global_Real_Atomics_vi <0x6c>; 1142 1143defm SCRATCH_LOAD_UBYTE : FLAT_Real_AllAddr_vi <0x10>; 1144defm SCRATCH_LOAD_SBYTE : FLAT_Real_AllAddr_vi <0x11>; 1145defm SCRATCH_LOAD_USHORT : FLAT_Real_AllAddr_vi <0x12>; 1146defm SCRATCH_LOAD_SSHORT : FLAT_Real_AllAddr_vi <0x13>; 1147defm SCRATCH_LOAD_DWORD : FLAT_Real_AllAddr_vi <0x14>; 1148defm SCRATCH_LOAD_DWORDX2 : FLAT_Real_AllAddr_vi <0x15>; 1149defm SCRATCH_LOAD_DWORDX3 : FLAT_Real_AllAddr_vi <0x16>; 1150defm SCRATCH_LOAD_DWORDX4 : FLAT_Real_AllAddr_vi <0x17>; 1151defm SCRATCH_STORE_BYTE : FLAT_Real_AllAddr_vi <0x18>; 1152defm SCRATCH_STORE_BYTE_D16_HI : FLAT_Real_AllAddr_vi <0x19>; 1153defm SCRATCH_LOAD_UBYTE_D16 : FLAT_Real_AllAddr_vi <0x20>; 1154defm SCRATCH_LOAD_UBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x21>; 1155defm SCRATCH_LOAD_SBYTE_D16 : FLAT_Real_AllAddr_vi <0x22>; 1156defm SCRATCH_LOAD_SBYTE_D16_HI : FLAT_Real_AllAddr_vi <0x23>; 1157defm SCRATCH_LOAD_SHORT_D16 : FLAT_Real_AllAddr_vi <0x24>; 1158defm SCRATCH_LOAD_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x25>; 1159defm SCRATCH_STORE_SHORT : FLAT_Real_AllAddr_vi <0x1a>; 1160defm SCRATCH_STORE_SHORT_D16_HI : FLAT_Real_AllAddr_vi <0x1b>; 1161defm SCRATCH_STORE_DWORD : FLAT_Real_AllAddr_vi <0x1c>; 1162defm SCRATCH_STORE_DWORDX2 : FLAT_Real_AllAddr_vi <0x1d>; 1163defm SCRATCH_STORE_DWORDX3 : FLAT_Real_AllAddr_vi <0x1e>; 1164defm SCRATCH_STORE_DWORDX4 : FLAT_Real_AllAddr_vi <0x1f>; 1165 1166 1167//===----------------------------------------------------------------------===// 1168// GFX10. 1169//===----------------------------------------------------------------------===// 1170 1171class FLAT_Real_gfx10<bits<7> op, FLAT_Pseudo ps> : 1172 FLAT_Real<op, ps>, SIMCInstr<ps.PseudoInstr, SIEncodingFamily.GFX10> { 1173 let AssemblerPredicate = isGFX10Plus; 1174 let DecoderNamespace = "GFX10"; 1175 1176 let Inst{11-0} = offset{11-0}; 1177 let Inst{12} = !if(ps.has_dlc, dlc, ps.dlcValue); 1178 let Inst{54-48} = !if(ps.has_saddr, !if(ps.enabled_saddr, saddr, 0x7d), 0x7d); 1179 let Inst{55} = 0; 1180} 1181 1182 1183multiclass FLAT_Real_Base_gfx10<bits<7> op> { 1184 def _gfx10 : 1185 FLAT_Real_gfx10<op, !cast<FLAT_Pseudo>(NAME)>; 1186} 1187 1188multiclass FLAT_Real_RTN_gfx10<bits<7> op> { 1189 def _RTN_gfx10 : 1190 FLAT_Real_gfx10<op, !cast<FLAT_Pseudo>(NAME#"_RTN")>; 1191} 1192 1193multiclass FLAT_Real_SADDR_gfx10<bits<7> op> { 1194 def _SADDR_gfx10 : 1195 FLAT_Real_gfx10<op, !cast<FLAT_Pseudo>(NAME#"_SADDR")>; 1196} 1197 1198multiclass FLAT_Real_SADDR_RTN_gfx10<bits<7> op> { 1199 def _SADDR_RTN_gfx10 : 1200 FLAT_Real_gfx10<op, !cast<FLAT_Pseudo>(NAME#"_SADDR_RTN")>; 1201} 1202 1203 1204multiclass FLAT_Real_AllAddr_gfx10<bits<7> op> : 1205 FLAT_Real_Base_gfx10<op>, 1206 FLAT_Real_SADDR_gfx10<op>; 1207 1208multiclass FLAT_Real_Atomics_gfx10<bits<7> op> : 1209 FLAT_Real_Base_gfx10<op>, 1210 FLAT_Real_RTN_gfx10<op>; 1211 1212multiclass FLAT_Real_GlblAtomics_gfx10<bits<7> op> : 1213 FLAT_Real_AllAddr_gfx10<op>, 1214 FLAT_Real_RTN_gfx10<op>, 1215 FLAT_Real_SADDR_RTN_gfx10<op>; 1216 1217 1218// ENC_FLAT. 1219defm FLAT_LOAD_UBYTE : FLAT_Real_Base_gfx10<0x008>; 1220defm FLAT_LOAD_SBYTE : FLAT_Real_Base_gfx10<0x009>; 1221defm FLAT_LOAD_USHORT : FLAT_Real_Base_gfx10<0x00a>; 1222defm FLAT_LOAD_SSHORT : FLAT_Real_Base_gfx10<0x00b>; 1223defm FLAT_LOAD_DWORD : FLAT_Real_Base_gfx10<0x00c>; 1224defm FLAT_LOAD_DWORDX2 : FLAT_Real_Base_gfx10<0x00d>; 1225defm FLAT_LOAD_DWORDX4 : FLAT_Real_Base_gfx10<0x00e>; 1226defm FLAT_LOAD_DWORDX3 : FLAT_Real_Base_gfx10<0x00f>; 1227defm FLAT_STORE_BYTE : FLAT_Real_Base_gfx10<0x018>; 1228defm FLAT_STORE_BYTE_D16_HI : FLAT_Real_Base_gfx10<0x019>; 1229defm FLAT_STORE_SHORT : FLAT_Real_Base_gfx10<0x01a>; 1230defm FLAT_STORE_SHORT_D16_HI : FLAT_Real_Base_gfx10<0x01b>; 1231defm FLAT_STORE_DWORD : FLAT_Real_Base_gfx10<0x01c>; 1232defm FLAT_STORE_DWORDX2 : FLAT_Real_Base_gfx10<0x01d>; 1233defm FLAT_STORE_DWORDX4 : FLAT_Real_Base_gfx10<0x01e>; 1234defm FLAT_STORE_DWORDX3 : FLAT_Real_Base_gfx10<0x01f>; 1235defm FLAT_LOAD_UBYTE_D16 : FLAT_Real_Base_gfx10<0x020>; 1236defm FLAT_LOAD_UBYTE_D16_HI : FLAT_Real_Base_gfx10<0x021>; 1237defm FLAT_LOAD_SBYTE_D16 : FLAT_Real_Base_gfx10<0x022>; 1238defm FLAT_LOAD_SBYTE_D16_HI : FLAT_Real_Base_gfx10<0x023>; 1239defm FLAT_LOAD_SHORT_D16 : FLAT_Real_Base_gfx10<0x024>; 1240defm FLAT_LOAD_SHORT_D16_HI : FLAT_Real_Base_gfx10<0x025>; 1241defm FLAT_ATOMIC_SWAP : FLAT_Real_Atomics_gfx10<0x030>; 1242defm FLAT_ATOMIC_CMPSWAP : FLAT_Real_Atomics_gfx10<0x031>; 1243defm FLAT_ATOMIC_ADD : FLAT_Real_Atomics_gfx10<0x032>; 1244defm FLAT_ATOMIC_SUB : FLAT_Real_Atomics_gfx10<0x033>; 1245defm FLAT_ATOMIC_SMIN : FLAT_Real_Atomics_gfx10<0x035>; 1246defm FLAT_ATOMIC_UMIN : FLAT_Real_Atomics_gfx10<0x036>; 1247defm FLAT_ATOMIC_SMAX : FLAT_Real_Atomics_gfx10<0x037>; 1248defm FLAT_ATOMIC_UMAX : FLAT_Real_Atomics_gfx10<0x038>; 1249defm FLAT_ATOMIC_AND : FLAT_Real_Atomics_gfx10<0x039>; 1250defm FLAT_ATOMIC_OR : FLAT_Real_Atomics_gfx10<0x03a>; 1251defm FLAT_ATOMIC_XOR : FLAT_Real_Atomics_gfx10<0x03b>; 1252defm FLAT_ATOMIC_INC : FLAT_Real_Atomics_gfx10<0x03c>; 1253defm FLAT_ATOMIC_DEC : FLAT_Real_Atomics_gfx10<0x03d>; 1254defm FLAT_ATOMIC_FCMPSWAP : FLAT_Real_Atomics_gfx10<0x03e>; 1255defm FLAT_ATOMIC_FMIN : FLAT_Real_Atomics_gfx10<0x03f>; 1256defm FLAT_ATOMIC_FMAX : FLAT_Real_Atomics_gfx10<0x040>; 1257defm FLAT_ATOMIC_SWAP_X2 : FLAT_Real_Atomics_gfx10<0x050>; 1258defm FLAT_ATOMIC_CMPSWAP_X2 : FLAT_Real_Atomics_gfx10<0x051>; 1259defm FLAT_ATOMIC_ADD_X2 : FLAT_Real_Atomics_gfx10<0x052>; 1260defm FLAT_ATOMIC_SUB_X2 : FLAT_Real_Atomics_gfx10<0x053>; 1261defm FLAT_ATOMIC_SMIN_X2 : FLAT_Real_Atomics_gfx10<0x055>; 1262defm FLAT_ATOMIC_UMIN_X2 : FLAT_Real_Atomics_gfx10<0x056>; 1263defm FLAT_ATOMIC_SMAX_X2 : FLAT_Real_Atomics_gfx10<0x057>; 1264defm FLAT_ATOMIC_UMAX_X2 : FLAT_Real_Atomics_gfx10<0x058>; 1265defm FLAT_ATOMIC_AND_X2 : FLAT_Real_Atomics_gfx10<0x059>; 1266defm FLAT_ATOMIC_OR_X2 : FLAT_Real_Atomics_gfx10<0x05a>; 1267defm FLAT_ATOMIC_XOR_X2 : FLAT_Real_Atomics_gfx10<0x05b>; 1268defm FLAT_ATOMIC_INC_X2 : FLAT_Real_Atomics_gfx10<0x05c>; 1269defm FLAT_ATOMIC_DEC_X2 : FLAT_Real_Atomics_gfx10<0x05d>; 1270defm FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_Real_Atomics_gfx10<0x05e>; 1271defm FLAT_ATOMIC_FMIN_X2 : FLAT_Real_Atomics_gfx10<0x05f>; 1272defm FLAT_ATOMIC_FMAX_X2 : FLAT_Real_Atomics_gfx10<0x060>; 1273 1274 1275// ENC_FLAT_GLBL. 1276defm GLOBAL_LOAD_UBYTE : FLAT_Real_AllAddr_gfx10<0x008>; 1277defm GLOBAL_LOAD_SBYTE : FLAT_Real_AllAddr_gfx10<0x009>; 1278defm GLOBAL_LOAD_USHORT : FLAT_Real_AllAddr_gfx10<0x00a>; 1279defm GLOBAL_LOAD_SSHORT : FLAT_Real_AllAddr_gfx10<0x00b>; 1280defm GLOBAL_LOAD_DWORD : FLAT_Real_AllAddr_gfx10<0x00c>; 1281defm GLOBAL_LOAD_DWORDX2 : FLAT_Real_AllAddr_gfx10<0x00d>; 1282defm GLOBAL_LOAD_DWORDX4 : FLAT_Real_AllAddr_gfx10<0x00e>; 1283defm GLOBAL_LOAD_DWORDX3 : FLAT_Real_AllAddr_gfx10<0x00f>; 1284defm GLOBAL_STORE_BYTE : FLAT_Real_AllAddr_gfx10<0x018>; 1285defm GLOBAL_STORE_BYTE_D16_HI : FLAT_Real_AllAddr_gfx10<0x019>; 1286defm GLOBAL_STORE_SHORT : FLAT_Real_AllAddr_gfx10<0x01a>; 1287defm GLOBAL_STORE_SHORT_D16_HI : FLAT_Real_AllAddr_gfx10<0x01b>; 1288defm GLOBAL_STORE_DWORD : FLAT_Real_AllAddr_gfx10<0x01c>; 1289defm GLOBAL_STORE_DWORDX2 : FLAT_Real_AllAddr_gfx10<0x01d>; 1290defm GLOBAL_STORE_DWORDX4 : FLAT_Real_AllAddr_gfx10<0x01e>; 1291defm GLOBAL_STORE_DWORDX3 : FLAT_Real_AllAddr_gfx10<0x01f>; 1292defm GLOBAL_LOAD_UBYTE_D16 : FLAT_Real_AllAddr_gfx10<0x020>; 1293defm GLOBAL_LOAD_UBYTE_D16_HI : FLAT_Real_AllAddr_gfx10<0x021>; 1294defm GLOBAL_LOAD_SBYTE_D16 : FLAT_Real_AllAddr_gfx10<0x022>; 1295defm GLOBAL_LOAD_SBYTE_D16_HI : FLAT_Real_AllAddr_gfx10<0x023>; 1296defm GLOBAL_LOAD_SHORT_D16 : FLAT_Real_AllAddr_gfx10<0x024>; 1297defm GLOBAL_LOAD_SHORT_D16_HI : FLAT_Real_AllAddr_gfx10<0x025>; 1298defm GLOBAL_ATOMIC_SWAP : FLAT_Real_GlblAtomics_gfx10<0x030>; 1299defm GLOBAL_ATOMIC_CMPSWAP : FLAT_Real_GlblAtomics_gfx10<0x031>; 1300defm GLOBAL_ATOMIC_ADD : FLAT_Real_GlblAtomics_gfx10<0x032>; 1301defm GLOBAL_ATOMIC_SUB : FLAT_Real_GlblAtomics_gfx10<0x033>; 1302defm GLOBAL_ATOMIC_SMIN : FLAT_Real_GlblAtomics_gfx10<0x035>; 1303defm GLOBAL_ATOMIC_UMIN : FLAT_Real_GlblAtomics_gfx10<0x036>; 1304defm GLOBAL_ATOMIC_SMAX : FLAT_Real_GlblAtomics_gfx10<0x037>; 1305defm GLOBAL_ATOMIC_UMAX : FLAT_Real_GlblAtomics_gfx10<0x038>; 1306defm GLOBAL_ATOMIC_AND : FLAT_Real_GlblAtomics_gfx10<0x039>; 1307defm GLOBAL_ATOMIC_OR : FLAT_Real_GlblAtomics_gfx10<0x03a>; 1308defm GLOBAL_ATOMIC_XOR : FLAT_Real_GlblAtomics_gfx10<0x03b>; 1309defm GLOBAL_ATOMIC_INC : FLAT_Real_GlblAtomics_gfx10<0x03c>; 1310defm GLOBAL_ATOMIC_DEC : FLAT_Real_GlblAtomics_gfx10<0x03d>; 1311defm GLOBAL_ATOMIC_FCMPSWAP : FLAT_Real_GlblAtomics_gfx10<0x03e>; 1312defm GLOBAL_ATOMIC_FMIN : FLAT_Real_GlblAtomics_gfx10<0x03f>; 1313defm GLOBAL_ATOMIC_FMAX : FLAT_Real_GlblAtomics_gfx10<0x040>; 1314defm GLOBAL_ATOMIC_SWAP_X2 : FLAT_Real_GlblAtomics_gfx10<0x050>; 1315defm GLOBAL_ATOMIC_CMPSWAP_X2 : FLAT_Real_GlblAtomics_gfx10<0x051>; 1316defm GLOBAL_ATOMIC_ADD_X2 : FLAT_Real_GlblAtomics_gfx10<0x052>; 1317defm GLOBAL_ATOMIC_SUB_X2 : FLAT_Real_GlblAtomics_gfx10<0x053>; 1318defm GLOBAL_ATOMIC_SMIN_X2 : FLAT_Real_GlblAtomics_gfx10<0x055>; 1319defm GLOBAL_ATOMIC_UMIN_X2 : FLAT_Real_GlblAtomics_gfx10<0x056>; 1320defm GLOBAL_ATOMIC_SMAX_X2 : FLAT_Real_GlblAtomics_gfx10<0x057>; 1321defm GLOBAL_ATOMIC_UMAX_X2 : FLAT_Real_GlblAtomics_gfx10<0x058>; 1322defm GLOBAL_ATOMIC_AND_X2 : FLAT_Real_GlblAtomics_gfx10<0x059>; 1323defm GLOBAL_ATOMIC_OR_X2 : FLAT_Real_GlblAtomics_gfx10<0x05a>; 1324defm GLOBAL_ATOMIC_XOR_X2 : FLAT_Real_GlblAtomics_gfx10<0x05b>; 1325defm GLOBAL_ATOMIC_INC_X2 : FLAT_Real_GlblAtomics_gfx10<0x05c>; 1326defm GLOBAL_ATOMIC_DEC_X2 : FLAT_Real_GlblAtomics_gfx10<0x05d>; 1327defm GLOBAL_ATOMIC_FCMPSWAP_X2 : FLAT_Real_GlblAtomics_gfx10<0x05e>; 1328defm GLOBAL_ATOMIC_FMIN_X2 : FLAT_Real_GlblAtomics_gfx10<0x05f>; 1329defm GLOBAL_ATOMIC_FMAX_X2 : FLAT_Real_GlblAtomics_gfx10<0x060>; 1330 1331 1332// ENC_FLAT_SCRATCH. 1333defm SCRATCH_LOAD_UBYTE : FLAT_Real_AllAddr_gfx10<0x008>; 1334defm SCRATCH_LOAD_SBYTE : FLAT_Real_AllAddr_gfx10<0x009>; 1335defm SCRATCH_LOAD_USHORT : FLAT_Real_AllAddr_gfx10<0x00a>; 1336defm SCRATCH_LOAD_SSHORT : FLAT_Real_AllAddr_gfx10<0x00b>; 1337defm SCRATCH_LOAD_DWORD : FLAT_Real_AllAddr_gfx10<0x00c>; 1338defm SCRATCH_LOAD_DWORDX2 : FLAT_Real_AllAddr_gfx10<0x00d>; 1339defm SCRATCH_LOAD_DWORDX4 : FLAT_Real_AllAddr_gfx10<0x00e>; 1340defm SCRATCH_LOAD_DWORDX3 : FLAT_Real_AllAddr_gfx10<0x00f>; 1341defm SCRATCH_STORE_BYTE : FLAT_Real_AllAddr_gfx10<0x018>; 1342defm SCRATCH_STORE_BYTE_D16_HI : FLAT_Real_AllAddr_gfx10<0x019>; 1343defm SCRATCH_STORE_SHORT : FLAT_Real_AllAddr_gfx10<0x01a>; 1344defm SCRATCH_STORE_SHORT_D16_HI : FLAT_Real_AllAddr_gfx10<0x01b>; 1345defm SCRATCH_STORE_DWORD : FLAT_Real_AllAddr_gfx10<0x01c>; 1346defm SCRATCH_STORE_DWORDX2 : FLAT_Real_AllAddr_gfx10<0x01d>; 1347defm SCRATCH_STORE_DWORDX4 : FLAT_Real_AllAddr_gfx10<0x01e>; 1348defm SCRATCH_STORE_DWORDX3 : FLAT_Real_AllAddr_gfx10<0x01f>; 1349defm SCRATCH_LOAD_UBYTE_D16 : FLAT_Real_AllAddr_gfx10<0x020>; 1350defm SCRATCH_LOAD_UBYTE_D16_HI : FLAT_Real_AllAddr_gfx10<0x021>; 1351defm SCRATCH_LOAD_SBYTE_D16 : FLAT_Real_AllAddr_gfx10<0x022>; 1352defm SCRATCH_LOAD_SBYTE_D16_HI : FLAT_Real_AllAddr_gfx10<0x023>; 1353defm SCRATCH_LOAD_SHORT_D16 : FLAT_Real_AllAddr_gfx10<0x024>; 1354defm SCRATCH_LOAD_SHORT_D16_HI : FLAT_Real_AllAddr_gfx10<0x025>; 1355 1356let SubtargetPredicate = HasAtomicFaddInsts in { 1357 1358defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Real_AllAddr_vi <0x04d>; 1359defm GLOBAL_ATOMIC_PK_ADD_F16 : FLAT_Real_AllAddr_vi <0x04e>; 1360 1361} // End SubtargetPredicate = HasAtomicFaddInsts 1362