1add_llvm_component_group(AMDGPU)
2
3set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
4
5tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
9tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
10tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
15tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
16tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
17
18set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
19tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
20tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
21              -combiners="AMDGPUPreLegalizerCombinerHelper")
22tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
23              -combiners="AMDGPUPostLegalizerCombinerHelper")
24tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner
25              -combiners="AMDGPURegBankCombinerHelper")
26
27set(LLVM_TARGET_DEFINITIONS R600.td)
28tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
29tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
30tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
31tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
32tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
33tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
34tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
35tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
36
37add_public_tablegen_target(AMDGPUCommonTableGen)
38
39set(LLVM_TARGET_DEFINITIONS InstCombineTables.td)
40tablegen(LLVM InstCombineTables.inc -gen-searchable-tables)
41add_public_tablegen_target(InstCombineTableGen)
42
43add_llvm_target(AMDGPUCodeGen
44  AMDGPUAliasAnalysis.cpp
45  AMDGPUAlwaysInlinePass.cpp
46  AMDGPUAnnotateKernelFeatures.cpp
47  AMDGPUAnnotateUniformValues.cpp
48  AMDGPUArgumentUsageInfo.cpp
49  AMDGPUAsmPrinter.cpp
50  AMDGPUAtomicOptimizer.cpp
51  AMDGPUAttributor.cpp
52  AMDGPUCallLowering.cpp
53  AMDGPUCodeGenPrepare.cpp
54  AMDGPUCombinerHelper.cpp
55  AMDGPUCtorDtorLowering.cpp
56  AMDGPUExportClustering.cpp
57  AMDGPUFrameLowering.cpp
58  AMDGPUGlobalISelUtils.cpp
59  AMDGPUHSAMetadataStreamer.cpp
60  AMDGPUInstCombineIntrinsic.cpp
61  AMDGPUInstrInfo.cpp
62  AMDGPUInstructionSelector.cpp
63  AMDGPUISelDAGToDAG.cpp
64  AMDGPUISelLowering.cpp
65  AMDGPULateCodeGenPrepare.cpp
66  AMDGPULegalizerInfo.cpp
67  AMDGPULibCalls.cpp
68  AMDGPULibFunc.cpp
69  AMDGPULowerIntrinsics.cpp
70  AMDGPULowerKernelArguments.cpp
71  AMDGPULowerKernelAttributes.cpp
72  AMDGPULowerModuleLDSPass.cpp
73  AMDGPUMachineCFGStructurizer.cpp
74  AMDGPUMachineFunction.cpp
75  AMDGPUMachineModuleInfo.cpp
76  AMDGPUMacroFusion.cpp
77  AMDGPUMCInstLower.cpp
78  AMDGPUIGroupLP.cpp
79  AMDGPUMIRFormatter.cpp
80  AMDGPUOpenCLEnqueuedBlockLowering.cpp
81  AMDGPUPerfHintAnalysis.cpp
82  AMDGPUPostLegalizerCombiner.cpp
83  AMDGPUPreLegalizerCombiner.cpp
84  AMDGPUPrintfRuntimeBinding.cpp
85  AMDGPUPromoteAlloca.cpp
86  AMDGPUPropagateAttributes.cpp
87  AMDGPUPromoteKernelArguments.cpp
88  AMDGPURegBankCombiner.cpp
89  AMDGPURegisterBankInfo.cpp
90  AMDGPUReplaceLDSUseWithPointer.cpp
91  AMDGPUResourceUsageAnalysis.cpp
92  AMDGPURewriteOutArguments.cpp
93  AMDGPUSetWavePriority.cpp
94  AMDGPUSubtarget.cpp
95  AMDGPUTargetMachine.cpp
96  AMDGPUTargetObjectFile.cpp
97  AMDGPUTargetTransformInfo.cpp
98  AMDGPUUnifyDivergentExitNodes.cpp
99  AMDGPUUnifyMetadata.cpp
100  R600MachineCFGStructurizer.cpp
101  GCNDPPCombine.cpp
102  GCNHazardRecognizer.cpp
103  GCNILPSched.cpp
104  GCNIterativeScheduler.cpp
105  GCNMinRegStrategy.cpp
106  GCNNSAReassign.cpp
107  GCNPreRAOptimizations.cpp
108  GCNRegPressure.cpp
109  GCNSchedStrategy.cpp
110  R600AsmPrinter.cpp
111  R600ClauseMergePass.cpp
112  R600ControlFlowFinalizer.cpp
113  R600EmitClauseMarkers.cpp
114  R600ExpandSpecialInstrs.cpp
115  R600FrameLowering.cpp
116  R600InstrInfo.cpp
117  R600ISelDAGToDAG.cpp
118  R600ISelLowering.cpp
119  R600MachineFunctionInfo.cpp
120  R600MachineScheduler.cpp
121  R600MCInstLower.cpp
122  R600OpenCLImageTypeLoweringPass.cpp
123  R600OptimizeVectorRegisters.cpp
124  R600Packetizer.cpp
125  R600RegisterInfo.cpp
126  R600Subtarget.cpp
127  R600TargetMachine.cpp
128  R600TargetTransformInfo.cpp
129  SIAnnotateControlFlow.cpp
130  SIFixSGPRCopies.cpp
131  SIFixVGPRCopies.cpp
132  SIFoldOperands.cpp
133  SIFormMemoryClauses.cpp
134  SIFrameLowering.cpp
135  SIInsertHardClauses.cpp
136  SIInsertWaitcnts.cpp
137  SIInstrInfo.cpp
138  SIISelLowering.cpp
139  SILateBranchLowering.cpp
140  SILoadStoreOptimizer.cpp
141  SILowerControlFlow.cpp
142  SILowerI1Copies.cpp
143  SILowerSGPRSpills.cpp
144  SIMachineFunctionInfo.cpp
145  SIMachineScheduler.cpp
146  SIMemoryLegalizer.cpp
147  SIModeRegister.cpp
148  SIOptimizeExecMasking.cpp
149  SIOptimizeExecMaskingPreRA.cpp
150  SIOptimizeVGPRLiveRange.cpp
151  SIPeepholeSDWA.cpp
152  SIPostRABundler.cpp
153  SIPreAllocateWWMRegs.cpp
154  SIPreEmitPeephole.cpp
155  SIProgramInfo.cpp
156  SIRegisterInfo.cpp
157  SIShrinkInstructions.cpp
158  SIWholeQuadMode.cpp
159
160  LINK_COMPONENTS
161  Analysis
162  AsmPrinter
163  CodeGen
164  Core
165  IPO
166  MC
167  Passes
168  AMDGPUDesc
169  AMDGPUInfo
170  AMDGPUUtils
171  Scalar
172  SelectionDAG
173  Support
174  Target
175  TransformUtils
176  Vectorize
177  GlobalISel
178  BinaryFormat
179  MIRParser
180
181  ADD_TO_COMPONENT
182  AMDGPU
183  )
184
185add_subdirectory(AsmParser)
186add_subdirectory(Disassembler)
187add_subdirectory(MCA)
188add_subdirectory(MCTargetDesc)
189add_subdirectory(TargetInfo)
190add_subdirectory(Utils)
191