1add_llvm_component_group(AMDGPU)
2
3set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
4
5tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
6tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
7tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
8tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
9tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
10tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
11tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
15tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
16tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
17
18set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
19tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
20tablegen(LLVM AMDGPUGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
21              -combiners="AMDGPUPreLegalizerCombinerHelper")
22tablegen(LLVM AMDGPUGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
23              -combiners="AMDGPUPostLegalizerCombinerHelper")
24tablegen(LLVM AMDGPUGenRegBankGICombiner.inc -gen-global-isel-combiner
25              -combiners="AMDGPURegBankCombinerHelper")
26
27set(LLVM_TARGET_DEFINITIONS R600.td)
28tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
29tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
30tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
31tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
32tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
33tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
34tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
35tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
36
37add_public_tablegen_target(AMDGPUCommonTableGen)
38
39set(LLVM_TARGET_DEFINITIONS InstCombineTables.td)
40tablegen(LLVM InstCombineTables.inc -gen-searchable-tables)
41add_public_tablegen_target(InstCombineTableGen)
42
43add_llvm_target(AMDGPUCodeGen
44  AMDGPUAliasAnalysis.cpp
45  AMDGPUAlwaysInlinePass.cpp
46  AMDGPUAnnotateKernelFeatures.cpp
47  AMDGPUAnnotateUniformValues.cpp
48  AMDGPUArgumentUsageInfo.cpp
49  AMDGPUAsmPrinter.cpp
50  AMDGPUAtomicOptimizer.cpp
51  AMDGPUAttributor.cpp
52  AMDGPUCallLowering.cpp
53  AMDGPUCodeGenPrepare.cpp
54  AMDGPUCombinerHelper.cpp
55  AMDGPUCtorDtorLowering.cpp
56  AMDGPUExportClustering.cpp
57  AMDGPUFrameLowering.cpp
58  AMDGPUGlobalISelUtils.cpp
59  AMDGPUHSAMetadataStreamer.cpp
60  AMDGPUInsertDelayAlu.cpp
61  AMDGPUInstCombineIntrinsic.cpp
62  AMDGPUInstrInfo.cpp
63  AMDGPUInstructionSelector.cpp
64  AMDGPUISelDAGToDAG.cpp
65  AMDGPUISelLowering.cpp
66  AMDGPULateCodeGenPrepare.cpp
67  AMDGPULegalizerInfo.cpp
68  AMDGPULibCalls.cpp
69  AMDGPULibFunc.cpp
70  AMDGPULowerIntrinsics.cpp
71  AMDGPULowerKernelArguments.cpp
72  AMDGPULowerKernelAttributes.cpp
73  AMDGPULowerModuleLDSPass.cpp
74  AMDGPUMachineCFGStructurizer.cpp
75  AMDGPUMachineFunction.cpp
76  AMDGPUMachineModuleInfo.cpp
77  AMDGPUMacroFusion.cpp
78  AMDGPUMCInstLower.cpp
79  AMDGPUIGroupLP.cpp
80  AMDGPUMIRFormatter.cpp
81  AMDGPUOpenCLEnqueuedBlockLowering.cpp
82  AMDGPUPerfHintAnalysis.cpp
83  AMDGPUPostLegalizerCombiner.cpp
84  AMDGPUPreLegalizerCombiner.cpp
85  AMDGPUPrintfRuntimeBinding.cpp
86  AMDGPUPromoteAlloca.cpp
87  AMDGPUPropagateAttributes.cpp
88  AMDGPUPromoteKernelArguments.cpp
89  AMDGPURegBankCombiner.cpp
90  AMDGPURegisterBankInfo.cpp
91  AMDGPUReleaseVGPRs.cpp
92  AMDGPUReplaceLDSUseWithPointer.cpp
93  AMDGPUResourceUsageAnalysis.cpp
94  AMDGPURewriteOutArguments.cpp
95  AMDGPUSetWavePriority.cpp
96  AMDGPUSubtarget.cpp
97  AMDGPUTargetMachine.cpp
98  AMDGPUTargetObjectFile.cpp
99  AMDGPUTargetTransformInfo.cpp
100  AMDGPUUnifyDivergentExitNodes.cpp
101  AMDGPUUnifyMetadata.cpp
102  R600MachineCFGStructurizer.cpp
103  GCNCreateVOPD.cpp
104  GCNDPPCombine.cpp
105  GCNHazardRecognizer.cpp
106  GCNILPSched.cpp
107  GCNIterativeScheduler.cpp
108  GCNMinRegStrategy.cpp
109  GCNNSAReassign.cpp
110  GCNPreRAOptimizations.cpp
111  GCNRegPressure.cpp
112  GCNSchedStrategy.cpp
113  GCNVOPDUtils.cpp
114  R600AsmPrinter.cpp
115  R600ClauseMergePass.cpp
116  R600ControlFlowFinalizer.cpp
117  R600EmitClauseMarkers.cpp
118  R600ExpandSpecialInstrs.cpp
119  R600FrameLowering.cpp
120  R600InstrInfo.cpp
121  R600ISelDAGToDAG.cpp
122  R600ISelLowering.cpp
123  R600MachineFunctionInfo.cpp
124  R600MachineScheduler.cpp
125  R600MCInstLower.cpp
126  R600OpenCLImageTypeLoweringPass.cpp
127  R600OptimizeVectorRegisters.cpp
128  R600Packetizer.cpp
129  R600RegisterInfo.cpp
130  R600Subtarget.cpp
131  R600TargetMachine.cpp
132  R600TargetTransformInfo.cpp
133  SIAnnotateControlFlow.cpp
134  SIFixSGPRCopies.cpp
135  SIFixVGPRCopies.cpp
136  SIFoldOperands.cpp
137  SIFormMemoryClauses.cpp
138  SIFrameLowering.cpp
139  SIInsertHardClauses.cpp
140  SIInsertWaitcnts.cpp
141  SIInstrInfo.cpp
142  SIISelLowering.cpp
143  SILateBranchLowering.cpp
144  SILoadStoreOptimizer.cpp
145  SILowerControlFlow.cpp
146  SILowerI1Copies.cpp
147  SILowerSGPRSpills.cpp
148  SIMachineFunctionInfo.cpp
149  SIMachineScheduler.cpp
150  SIMemoryLegalizer.cpp
151  SIModeRegister.cpp
152  SIOptimizeExecMasking.cpp
153  SIOptimizeExecMaskingPreRA.cpp
154  SIOptimizeVGPRLiveRange.cpp
155  SIPeepholeSDWA.cpp
156  SIPostRABundler.cpp
157  SIPreAllocateWWMRegs.cpp
158  SIPreEmitPeephole.cpp
159  SIProgramInfo.cpp
160  SIRegisterInfo.cpp
161  SIShrinkInstructions.cpp
162  SIWholeQuadMode.cpp
163
164  LINK_COMPONENTS
165  Analysis
166  AsmPrinter
167  CodeGen
168  Core
169  IPO
170  MC
171  Passes
172  AMDGPUDesc
173  AMDGPUInfo
174  AMDGPUUtils
175  Scalar
176  SelectionDAG
177  Support
178  Target
179  TransformUtils
180  Vectorize
181  GlobalISel
182  BinaryFormat
183  MIRParser
184
185  ADD_TO_COMPONENT
186  AMDGPU
187  )
188
189add_subdirectory(AsmParser)
190add_subdirectory(Disassembler)
191add_subdirectory(MCA)
192add_subdirectory(MCTargetDesc)
193add_subdirectory(TargetInfo)
194add_subdirectory(Utils)
195