1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// The AMDGPU TargetMachine interface definition for hw codgen targets.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16 
17 #include "AMDGPUSubtarget.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/StringMap.h"
20 #include "llvm/ADT/StringRef.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/Support/CodeGen.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include <memory>
25 
26 namespace llvm {
27 
28 //===----------------------------------------------------------------------===//
29 // AMDGPU Target Machine (R600+)
30 //===----------------------------------------------------------------------===//
31 
32 class AMDGPUTargetMachine : public LLVMTargetMachine {
33 protected:
34   std::unique_ptr<TargetLoweringObjectFile> TLOF;
35 
36   StringRef getGPUName(const Function &F) const;
37   StringRef getFeatureString(const Function &F) const;
38 
39 public:
40   static bool EnableLateStructurizeCFG;
41   static bool EnableFunctionCalls;
42   static bool EnableFixedFunctionABI;
43 
44   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
45                       StringRef FS, TargetOptions Options,
46                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
47                       CodeGenOpt::Level OL);
48   ~AMDGPUTargetMachine() override;
49 
50   const TargetSubtargetInfo *getSubtargetImpl() const;
51   const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
52 
53   TargetLoweringObjectFile *getObjFileLowering() const override {
54     return TLOF.get();
55   }
56 
57   void adjustPassManager(PassManagerBuilder &) override;
58 
59   /// Get the integer value of a null pointer in the given address space.
60   static int64_t getNullPointerValue(unsigned AddrSpace) {
61     return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
62             AddrSpace == AMDGPUAS::PRIVATE_ADDRESS ||
63             AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0;
64   }
65 
66   bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
67 };
68 
69 //===----------------------------------------------------------------------===//
70 // R600 Target Machine (R600 -> Cayman)
71 //===----------------------------------------------------------------------===//
72 
73 class R600TargetMachine final : public AMDGPUTargetMachine {
74 private:
75   mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
76 
77 public:
78   R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
79                     StringRef FS, TargetOptions Options,
80                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
81                     CodeGenOpt::Level OL, bool JIT);
82 
83   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
84 
85   const R600Subtarget *getSubtargetImpl(const Function &) const override;
86 
87   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
88 
89   bool isMachineVerifierClean() const override {
90     return false;
91   }
92 };
93 
94 //===----------------------------------------------------------------------===//
95 // GCN Target Machine (SI+)
96 //===----------------------------------------------------------------------===//
97 
98 class GCNTargetMachine final : public AMDGPUTargetMachine {
99 private:
100   mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
101 
102 public:
103   GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
104                    StringRef FS, TargetOptions Options,
105                    Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
106                    CodeGenOpt::Level OL, bool JIT);
107 
108   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
109 
110   const GCNSubtarget *getSubtargetImpl(const Function &) const override;
111 
112   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
113 
114   bool useIPRA() const override {
115     return true;
116   }
117 
118   yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
119   yaml::MachineFunctionInfo *
120   convertFuncInfoToYAML(const MachineFunction &MF) const override;
121   bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
122                                 PerFunctionMIParsingState &PFS,
123                                 SMDiagnostic &Error,
124                                 SMRange &SourceRange) const override;
125 };
126 
127 } // end namespace llvm
128 
129 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
130