1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief The AMDGPU TargetMachine interface definition for hw codgen targets. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H 17 18 #include "AMDGPUIntrinsicInfo.h" 19 #include "AMDGPUSubtarget.h" 20 21 namespace llvm { 22 23 //===----------------------------------------------------------------------===// 24 // AMDGPU Target Machine (R600+) 25 //===----------------------------------------------------------------------===// 26 27 class AMDGPUTargetMachine : public LLVMTargetMachine { 28 protected: 29 std::unique_ptr<TargetLoweringObjectFile> TLOF; 30 AMDGPUIntrinsicInfo IntrinsicInfo; 31 32 StringRef getGPUName(const Function &F) const; 33 StringRef getFeatureString(const Function &F) const; 34 35 public: 36 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 37 StringRef FS, TargetOptions Options, 38 Optional<Reloc::Model> RM, CodeModel::Model CM, 39 CodeGenOpt::Level OL); 40 ~AMDGPUTargetMachine(); 41 42 const AMDGPUSubtarget *getSubtargetImpl() const; 43 const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override = 0; 44 45 const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override { 46 return &IntrinsicInfo; 47 } 48 TargetIRAnalysis getTargetIRAnalysis() override; 49 50 TargetLoweringObjectFile *getObjFileLowering() const override { 51 return TLOF.get(); 52 } 53 void addEarlyAsPossiblePasses(PassManagerBase &PM) override; 54 }; 55 56 //===----------------------------------------------------------------------===// 57 // R600 Target Machine (R600 -> Cayman) 58 //===----------------------------------------------------------------------===// 59 60 class R600TargetMachine final : public AMDGPUTargetMachine { 61 private: 62 mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap; 63 64 public: 65 R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, 66 StringRef FS, TargetOptions Options, 67 Optional<Reloc::Model> RM, CodeModel::Model CM, 68 CodeGenOpt::Level OL); 69 70 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 71 72 const R600Subtarget *getSubtargetImpl(const Function &) const override; 73 }; 74 75 //===----------------------------------------------------------------------===// 76 // GCN Target Machine (SI+) 77 //===----------------------------------------------------------------------===// 78 79 class GCNTargetMachine final : public AMDGPUTargetMachine { 80 private: 81 mutable StringMap<std::unique_ptr<SISubtarget>> SubtargetMap; 82 83 public: 84 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 85 StringRef FS, TargetOptions Options, 86 Optional<Reloc::Model> RM, CodeModel::Model CM, 87 CodeGenOpt::Level OL); 88 89 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 90 91 const SISubtarget *getSubtargetImpl(const Function &) const override; 92 }; 93 94 } // End namespace llvm 95 96 #endif 97