1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// The AMDGPU TargetMachine interface definition for hw codgen targets.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16 
17 #include "AMDGPUSubtarget.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/StringMap.h"
20 #include "llvm/ADT/StringRef.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/Support/CodeGen.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include <memory>
25 
26 namespace llvm {
27 
28 //===----------------------------------------------------------------------===//
29 // AMDGPU Target Machine (R600+)
30 //===----------------------------------------------------------------------===//
31 
32 class AMDGPUTargetMachine : public LLVMTargetMachine {
33 protected:
34   std::unique_ptr<TargetLoweringObjectFile> TLOF;
35 
36   StringRef getGPUName(const Function &F) const;
37   StringRef getFeatureString(const Function &F) const;
38 
39 public:
40   static bool EnableLateStructurizeCFG;
41   static bool EnableFunctionCalls;
42   static bool EnableFixedFunctionABI;
43 
44   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
45                       StringRef FS, TargetOptions Options,
46                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
47                       CodeGenOpt::Level OL);
48   ~AMDGPUTargetMachine() override;
49 
50   const TargetSubtargetInfo *getSubtargetImpl() const;
51   const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
52 
53   TargetLoweringObjectFile *getObjFileLowering() const override {
54     return TLOF.get();
55   }
56 
57   void adjustPassManager(PassManagerBuilder &) override;
58 
59   /// Get the integer value of a null pointer in the given address space.
60   uint64_t getNullPointerValue(unsigned AddrSpace) const {
61     return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
62             AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0;
63   }
64 };
65 
66 //===----------------------------------------------------------------------===//
67 // R600 Target Machine (R600 -> Cayman)
68 //===----------------------------------------------------------------------===//
69 
70 class R600TargetMachine final : public AMDGPUTargetMachine {
71 private:
72   mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
73 
74 public:
75   R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
76                     StringRef FS, TargetOptions Options,
77                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
78                     CodeGenOpt::Level OL, bool JIT);
79 
80   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
81 
82   const R600Subtarget *getSubtargetImpl(const Function &) const override;
83 
84   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
85 
86   bool isMachineVerifierClean() const override {
87     return false;
88   }
89 };
90 
91 //===----------------------------------------------------------------------===//
92 // GCN Target Machine (SI+)
93 //===----------------------------------------------------------------------===//
94 
95 class GCNTargetMachine final : public AMDGPUTargetMachine {
96 private:
97   mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
98 
99 public:
100   GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
101                    StringRef FS, TargetOptions Options,
102                    Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
103                    CodeGenOpt::Level OL, bool JIT);
104 
105   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
106 
107   const GCNSubtarget *getSubtargetImpl(const Function &) const override;
108 
109   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
110 
111   bool useIPRA() const override {
112     return true;
113   }
114 
115   yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
116   yaml::MachineFunctionInfo *
117   convertFuncInfoToYAML(const MachineFunction &MF) const override;
118   bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
119                                 PerFunctionMIParsingState &PFS,
120                                 SMDiagnostic &Error,
121                                 SMRange &SourceRange) const override;
122 };
123 
124 } // end namespace llvm
125 
126 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
127