1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
17 
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUIntrinsicInfo.h"
21 #include "AMDGPUSubtarget.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/IR/DataLayout.h"
24 
25 namespace llvm {
26 
27 //===----------------------------------------------------------------------===//
28 // AMDGPU Target Machine (R600+)
29 //===----------------------------------------------------------------------===//
30 
31 class AMDGPUTargetMachine : public LLVMTargetMachine {
32 private:
33 
34 protected:
35   std::unique_ptr<TargetLoweringObjectFile> TLOF;
36   AMDGPUSubtarget Subtarget;
37   AMDGPUIntrinsicInfo IntrinsicInfo;
38 
39 public:
40   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
41                       StringRef FS, TargetOptions Options,
42                       Optional<Reloc::Model> RM, CodeModel::Model CM,
43                       CodeGenOpt::Level OL);
44   ~AMDGPUTargetMachine();
45 
46   const AMDGPUSubtarget *getSubtargetImpl() const { return &Subtarget; }
47   const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override {
48     return &Subtarget;
49   }
50   const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
51     return &IntrinsicInfo;
52   }
53   TargetIRAnalysis getTargetIRAnalysis() override;
54 
55   TargetLoweringObjectFile *getObjFileLowering() const override {
56     return TLOF.get();
57   }
58 };
59 
60 //===----------------------------------------------------------------------===//
61 // R600 Target Machine (R600 -> Cayman)
62 //===----------------------------------------------------------------------===//
63 
64 class R600TargetMachine final : public AMDGPUTargetMachine {
65 
66 public:
67   R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
68                     StringRef FS, TargetOptions Options,
69                     Optional<Reloc::Model> RM, CodeModel::Model CM,
70                     CodeGenOpt::Level OL);
71 
72   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
73 };
74 
75 //===----------------------------------------------------------------------===//
76 // GCN Target Machine (SI+)
77 //===----------------------------------------------------------------------===//
78 
79 class GCNTargetMachine final : public AMDGPUTargetMachine {
80 
81 public:
82   GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
83                    StringRef FS, TargetOptions Options,
84                    Optional<Reloc::Model> RM, CodeModel::Model CM,
85                    CodeGenOpt::Level OL);
86 
87   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
88 };
89 
90 } // End namespace llvm
91 
92 #endif
93