1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
17 
18 #include "AMDGPUIntrinsicInfo.h"
19 #include "AMDGPUSubtarget.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/StringMap.h"
22 #include "llvm/ADT/StringRef.h"
23 #include "llvm/Analysis/TargetTransformInfo.h"
24 #include "llvm/Support/CodeGen.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include <memory>
27 
28 namespace llvm {
29 
30 //===----------------------------------------------------------------------===//
31 // AMDGPU Target Machine (R600+)
32 //===----------------------------------------------------------------------===//
33 
34 class AMDGPUTargetMachine : public LLVMTargetMachine {
35 protected:
36   std::unique_ptr<TargetLoweringObjectFile> TLOF;
37   AMDGPUIntrinsicInfo IntrinsicInfo;
38 
39   StringRef getGPUName(const Function &F) const;
40   StringRef getFeatureString(const Function &F) const;
41 
42 public:
43   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44                       StringRef FS, TargetOptions Options,
45                       Optional<Reloc::Model> RM, CodeModel::Model CM,
46                       CodeGenOpt::Level OL);
47   ~AMDGPUTargetMachine() override;
48 
49   const AMDGPUSubtarget *getSubtargetImpl() const;
50   const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override = 0;
51 
52   const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
53     return &IntrinsicInfo;
54   }
55   TargetIRAnalysis getTargetIRAnalysis() override;
56 
57   TargetLoweringObjectFile *getObjFileLowering() const override {
58     return TLOF.get();
59   }
60   void addEarlyAsPossiblePasses(PassManagerBase &PM) override;
61 };
62 
63 //===----------------------------------------------------------------------===//
64 // R600 Target Machine (R600 -> Cayman)
65 //===----------------------------------------------------------------------===//
66 
67 class R600TargetMachine final : public AMDGPUTargetMachine {
68 private:
69   mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
70 
71 public:
72   R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
73                     StringRef FS, TargetOptions Options,
74                     Optional<Reloc::Model> RM, CodeModel::Model CM,
75                     CodeGenOpt::Level OL);
76 
77   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
78 
79   const R600Subtarget *getSubtargetImpl(const Function &) const override;
80 };
81 
82 //===----------------------------------------------------------------------===//
83 // GCN Target Machine (SI+)
84 //===----------------------------------------------------------------------===//
85 
86 class GCNTargetMachine final : public AMDGPUTargetMachine {
87 private:
88   mutable StringMap<std::unique_ptr<SISubtarget>> SubtargetMap;
89 
90 public:
91   GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
92                    StringRef FS, TargetOptions Options,
93                    Optional<Reloc::Model> RM, CodeModel::Model CM,
94                    CodeGenOpt::Level OL);
95 
96   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
97 
98   const SISubtarget *getSubtargetImpl(const Function &) const override;
99 };
100 
101 } // end namespace llvm
102 
103 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
104