1 //=== lib/CodeGen/GlobalISel/AMDGPUPreLegalizerCombiner.cpp ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass does combining of machine instructions at the generic MI level,
10 // before the legalizer.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AMDGPUTargetMachine.h"
15 #include "llvm/CodeGen/GlobalISel/Combiner.h"
16 #include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
17 #include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
18 #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
19 #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/Support/Debug.h"
24 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
25 
26 #define DEBUG_TYPE "amdgpu-prelegalizer-combiner"
27 
28 using namespace llvm;
29 using namespace MIPatternMatch;
30 
31 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
32 #include "AMDGPUGenPreLegalizeGICombiner.inc"
33 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
34 
35 namespace {
36 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
37 #include "AMDGPUGenPreLegalizeGICombiner.inc"
38 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
39 
40 class AMDGPUPreLegalizerCombinerInfo : public CombinerInfo {
41   GISelKnownBits *KB;
42   MachineDominatorTree *MDT;
43 
44 public:
45   AMDGPUGenPreLegalizerCombinerHelper Generated;
46 
47   AMDGPUPreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize,
48                                   GISelKnownBits *KB, MachineDominatorTree *MDT)
49       : CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
50                      /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize),
51         KB(KB), MDT(MDT) {
52     if (!Generated.parseCommandLineOption())
53       report_fatal_error("Invalid rule identifier");
54   }
55 
56   virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI,
57                        MachineIRBuilder &B) const override;
58 };
59 
60 bool AMDGPUPreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer,
61                                               MachineInstr &MI,
62                                               MachineIRBuilder &B) const {
63   CombinerHelper Helper(Observer, B, KB, MDT);
64 
65   if (Generated.tryCombineAll(Observer, MI, B, Helper))
66     return true;
67 
68   switch (MI.getOpcode()) {
69   case TargetOpcode::G_CONCAT_VECTORS:
70     return Helper.tryCombineConcatVectors(MI);
71   case TargetOpcode::G_SHUFFLE_VECTOR:
72     return Helper.tryCombineShuffleVector(MI);
73   }
74 
75   return false;
76 }
77 
78 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
79 #include "AMDGPUGenPreLegalizeGICombiner.inc"
80 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
81 
82 // Pass boilerplate
83 // ================
84 
85 class AMDGPUPreLegalizerCombiner : public MachineFunctionPass {
86 public:
87   static char ID;
88 
89   AMDGPUPreLegalizerCombiner(bool IsOptNone = false);
90 
91   StringRef getPassName() const override {
92     return "AMDGPUPreLegalizerCombiner";
93   }
94 
95   bool runOnMachineFunction(MachineFunction &MF) override;
96 
97   void getAnalysisUsage(AnalysisUsage &AU) const override;
98 private:
99   bool IsOptNone;
100 };
101 } // end anonymous namespace
102 
103 void AMDGPUPreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
104   AU.addRequired<TargetPassConfig>();
105   AU.setPreservesCFG();
106   getSelectionDAGFallbackAnalysisUsage(AU);
107   AU.addRequired<GISelKnownBitsAnalysis>();
108   AU.addPreserved<GISelKnownBitsAnalysis>();
109   if (!IsOptNone) {
110     AU.addRequired<MachineDominatorTree>();
111     AU.addPreserved<MachineDominatorTree>();
112   }
113   MachineFunctionPass::getAnalysisUsage(AU);
114 }
115 
116 AMDGPUPreLegalizerCombiner::AMDGPUPreLegalizerCombiner(bool IsOptNone)
117   : MachineFunctionPass(ID), IsOptNone(IsOptNone) {
118   initializeAMDGPUPreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
119 }
120 
121 bool AMDGPUPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
122   if (MF.getProperties().hasProperty(
123           MachineFunctionProperties::Property::FailedISel))
124     return false;
125   auto *TPC = &getAnalysis<TargetPassConfig>();
126   const Function &F = MF.getFunction();
127   bool EnableOpt =
128       MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F);
129   GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
130   MachineDominatorTree *MDT =
131       IsOptNone ? nullptr : &getAnalysis<MachineDominatorTree>();
132   AMDGPUPreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(),
133                                         F.hasMinSize(), KB, MDT);
134   Combiner C(PCInfo, TPC);
135   return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr);
136 }
137 
138 char AMDGPUPreLegalizerCombiner::ID = 0;
139 INITIALIZE_PASS_BEGIN(AMDGPUPreLegalizerCombiner, DEBUG_TYPE,
140                       "Combine AMDGPU machine instrs before legalization",
141                       false, false)
142 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
143 INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)
144 INITIALIZE_PASS_END(AMDGPUPreLegalizerCombiner, DEBUG_TYPE,
145                     "Combine AMDGPU machine instrs before legalization", false,
146                     false)
147 
148 namespace llvm {
149 FunctionPass *createAMDGPUPreLegalizeCombiner(bool IsOptNone) {
150   return new AMDGPUPreLegalizerCombiner(IsOptNone);
151 }
152 } // end namespace llvm
153