1 //===-- AMDGPUMachineFunctionInfo.h -------------------------------*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
10 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
11 
12 #include "Utils/AMDGPUBaseInfo.h"
13 #include "llvm/ADT/DenseMap.h"
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "AMDGPU.h"
16 
17 namespace llvm {
18 
19 class AMDGPUMachineFunction : public MachineFunctionInfo {
20   /// A map to keep track of local memory objects and their offsets within the
21   /// local memory space.
22   SmallDenseMap<const GlobalValue *, unsigned, 4> LocalMemoryObjects;
23 
24 protected:
25   uint64_t ExplicitKernArgSize = 0; // Cache for this.
26   Align MaxKernArgAlign;        // Cache for this.
27 
28   /// Number of bytes in the LDS that are being used.
29   uint32_t LDSSize = 0;
30   uint32_t GDSSize = 0;
31 
32   /// Number of bytes in the LDS allocated statically. This field is only used
33   /// in the instruction selector and not part of the machine function info.
34   uint32_t StaticLDSSize = 0;
35   uint32_t StaticGDSSize = 0;
36 
37   /// Align for dynamic shared memory if any. Dynamic shared memory is
38   /// allocated directly after the static one, i.e., LDSSize. Need to pad
39   /// LDSSize to ensure that dynamic one is aligned accordingly.
40   /// The maximal alignment is updated during IR translation or lowering
41   /// stages.
42   Align DynLDSAlign;
43 
44   // State of MODE register, assumed FP mode.
45   AMDGPU::SIModeRegisterDefaults Mode;
46 
47   // Kernels + shaders. i.e. functions called by the hardware and not called
48   // by other functions.
49   bool IsEntryFunction = false;
50 
51   // Entry points called by other functions instead of directly by the hardware.
52   bool IsModuleEntryFunction = false;
53 
54   bool NoSignedZerosFPMath = false;
55 
56   // Function may be memory bound.
57   bool MemoryBound = false;
58 
59   // Kernel may need limited waves per EU for better performance.
60   bool WaveLimiter = false;
61 
62 public:
63   AMDGPUMachineFunction(const MachineFunction &MF);
64 
65   uint64_t getExplicitKernArgSize() const {
66     return ExplicitKernArgSize;
67   }
68 
69   unsigned getMaxKernArgAlign() const { return MaxKernArgAlign.value(); }
70 
71   uint32_t getLDSSize() const {
72     return LDSSize;
73   }
74 
75   uint32_t getGDSSize() const {
76     return GDSSize;
77   }
78 
79   AMDGPU::SIModeRegisterDefaults getMode() const {
80     return Mode;
81   }
82 
83   bool isEntryFunction() const {
84     return IsEntryFunction;
85   }
86 
87   bool isModuleEntryFunction() const { return IsModuleEntryFunction; }
88 
89   bool hasNoSignedZerosFPMath() const {
90     return NoSignedZerosFPMath;
91   }
92 
93   bool isMemoryBound() const {
94     return MemoryBound;
95   }
96 
97   bool needsWaveLimiter() const {
98     return WaveLimiter;
99   }
100 
101   unsigned allocateLDSGlobal(const DataLayout &DL, const GlobalVariable &GV);
102   void allocateModuleLDSGlobal(const Module *M);
103 
104   Align getDynLDSAlign() const { return DynLDSAlign; }
105 
106   void setDynLDSAlign(const DataLayout &DL, const GlobalVariable &GV);
107 };
108 
109 }
110 #endif
111