1 //===-- AMDGPUMachineFunctionInfo.h -------------------------------*- C++ -*-=//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
10 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
11 
12 #include "Utils/AMDGPUBaseInfo.h"
13 #include "llvm/ADT/DenseMap.h"
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/Support/Alignment.h"
16 
17 namespace llvm {
18 
19 class GCNSubtarget;
20 
21 class AMDGPUMachineFunction : public MachineFunctionInfo {
22   /// A map to keep track of local memory objects and their offsets within the
23   /// local memory space.
24   SmallDenseMap<const GlobalValue *, unsigned, 4> LocalMemoryObjects;
25 
26 protected:
27   uint64_t ExplicitKernArgSize = 0; // Cache for this.
28   Align MaxKernArgAlign;        // Cache for this.
29 
30   /// Number of bytes in the LDS that are being used.
31   unsigned LDSSize = 0;
32 
33   /// Number of bytes in the LDS allocated statically. This field is only used
34   /// in the instruction selector and not part of the machine function info.
35   unsigned StaticLDSSize = 0;
36 
37   /// Align for dynamic shared memory if any. Dynamic shared memory is
38   /// allocated directly after the static one, i.e., LDSSize. Need to pad
39   /// LDSSize to ensure that dynamic one is aligned accordingly.
40   /// The maximal alignment is updated during IR translation or lowering
41   /// stages.
42   Align DynLDSAlign;
43 
44   // State of MODE register, assumed FP mode.
45   AMDGPU::SIModeRegisterDefaults Mode;
46 
47   // Kernels + shaders. i.e. functions called by the hardware and not called
48   // by other functions.
49   bool IsEntryFunction = false;
50 
51   // Entry points called by other functions instead of directly by the hardware.
52   bool IsModuleEntryFunction = false;
53 
54   bool NoSignedZerosFPMath = false;
55 
56   // Function may be memory bound.
57   bool MemoryBound = false;
58 
59   // Kernel may need limited waves per EU for better performance.
60   bool WaveLimiter = false;
61 
62 public:
63   AMDGPUMachineFunction(const MachineFunction &MF);
64 
65   uint64_t getExplicitKernArgSize() const {
66     return ExplicitKernArgSize;
67   }
68 
69   unsigned getMaxKernArgAlign() const { return MaxKernArgAlign.value(); }
70 
71   unsigned getLDSSize() const {
72     return LDSSize;
73   }
74 
75   AMDGPU::SIModeRegisterDefaults getMode() const {
76     return Mode;
77   }
78 
79   bool isEntryFunction() const {
80     return IsEntryFunction;
81   }
82 
83   bool isModuleEntryFunction() const { return IsModuleEntryFunction; }
84 
85   bool hasNoSignedZerosFPMath() const {
86     return NoSignedZerosFPMath;
87   }
88 
89   bool isMemoryBound() const {
90     return MemoryBound;
91   }
92 
93   bool needsWaveLimiter() const {
94     return WaveLimiter;
95   }
96 
97   unsigned allocateLDSGlobal(const DataLayout &DL, const GlobalVariable &GV);
98 
99   Align getDynLDSAlign() const { return DynLDSAlign; }
100 
101   void setDynLDSAlign(const DataLayout &DL, const GlobalVariable &GV);
102 };
103 
104 }
105 #endif
106