1 //===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "AMDGPUMachineFunction.h" 11 #include "AMDGPUSubtarget.h" 12 13 using namespace llvm; 14 15 static bool isEntryFunctionCC(CallingConv::ID CC) { 16 switch (CC) { 17 case CallingConv::AMDGPU_KERNEL: 18 case CallingConv::SPIR_KERNEL: 19 case CallingConv::AMDGPU_VS: 20 case CallingConv::AMDGPU_HS: 21 case CallingConv::AMDGPU_GS: 22 case CallingConv::AMDGPU_PS: 23 case CallingConv::AMDGPU_CS: 24 return true; 25 default: 26 return false; 27 } 28 } 29 30 AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) : 31 MachineFunctionInfo(), 32 LocalMemoryObjects(), 33 KernArgSize(0), 34 MaxKernArgAlign(0), 35 LDSSize(0), 36 ABIArgOffset(0), 37 IsEntryFunction(isEntryFunctionCC(MF.getFunction()->getCallingConv())), 38 NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) { 39 // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset, 40 // except reserved size is not correctly aligned. 41 } 42 43 unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL, 44 const GlobalValue &GV) { 45 auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0)); 46 if (!Entry.second) 47 return Entry.first->second; 48 49 unsigned Align = GV.getAlignment(); 50 if (Align == 0) 51 Align = DL.getABITypeAlignment(GV.getValueType()); 52 53 /// TODO: We should sort these to minimize wasted space due to alignment 54 /// padding. Currently the padding is decided by the first encountered use 55 /// during lowering. 56 unsigned Offset = LDSSize = alignTo(LDSSize, Align); 57 58 Entry.first->second = Offset; 59 LDSSize += DL.getTypeAllocSize(GV.getValueType()); 60 61 return Offset; 62 } 63