152ef4019SMatt Arsenault //===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=//
252ef4019SMatt Arsenault //
32946cd70SChandler Carruth // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
42946cd70SChandler Carruth // See https://llvm.org/LICENSE.txt for license information.
52946cd70SChandler Carruth // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
652ef4019SMatt Arsenault //
752ef4019SMatt Arsenault //===----------------------------------------------------------------------===//
852ef4019SMatt Arsenault 
945bb48eaSTom Stellard #include "AMDGPUMachineFunction.h"
1052ef4019SMatt Arsenault #include "AMDGPUSubtarget.h"
111c538423SStanislav Mekhanoshin #include "AMDGPUPerfHintAnalysis.h"
121c538423SStanislav Mekhanoshin #include "llvm/CodeGen/MachineModuleInfo.h"
13e935f05aSMatt Arsenault 
1445bb48eaSTom Stellard using namespace llvm;
1545bb48eaSTom Stellard 
1645bb48eaSTom Stellard AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
1745bb48eaSTom Stellard   MachineFunctionInfo(),
185660bb6bSMatt Arsenault   Mode(MF.getFunction()),
19f1caa283SMatthias Braun   IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())),
2061813b80SMatt Arsenault   NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) {
214bec7d42SMatt Arsenault   const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
224bec7d42SMatt Arsenault 
2352ef4019SMatt Arsenault   // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
2452ef4019SMatt Arsenault   // except reserved size is not correctly aligned.
254bec7d42SMatt Arsenault   const Function &F = MF.getFunction();
261c538423SStanislav Mekhanoshin 
27e7e23e3eSMatt Arsenault   Attribute MemBoundAttr = F.getFnAttribute("amdgpu-memory-bound");
28e7e23e3eSMatt Arsenault   MemoryBound = MemBoundAttr.isStringAttribute() &&
29e7e23e3eSMatt Arsenault                 MemBoundAttr.getValueAsString() == "true";
30e7e23e3eSMatt Arsenault 
31e7e23e3eSMatt Arsenault   Attribute WaveLimitAttr = F.getFnAttribute("amdgpu-wave-limiter");
32e7e23e3eSMatt Arsenault   WaveLimiter = WaveLimitAttr.isStringAttribute() &&
33e7e23e3eSMatt Arsenault                 WaveLimitAttr.getValueAsString() == "true";
344bec7d42SMatt Arsenault 
354bec7d42SMatt Arsenault   CallingConv::ID CC = F.getCallingConv();
364bec7d42SMatt Arsenault   if (CC == CallingConv::AMDGPU_KERNEL || CC == CallingConv::SPIR_KERNEL)
374bec7d42SMatt Arsenault     ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign);
38beb24f5bSNikolay Haustov }
39beb24f5bSNikolay Haustov 
4052ef4019SMatt Arsenault unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
41*a2caa3b6SEli Friedman                                                   const GlobalVariable &GV) {
4252ef4019SMatt Arsenault   auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0));
4352ef4019SMatt Arsenault   if (!Entry.second)
4452ef4019SMatt Arsenault     return Entry.first->second;
4552ef4019SMatt Arsenault 
4652ef4019SMatt Arsenault   unsigned Align = GV.getAlignment();
4752ef4019SMatt Arsenault   if (Align == 0)
4852ef4019SMatt Arsenault     Align = DL.getABITypeAlignment(GV.getValueType());
4952ef4019SMatt Arsenault 
5052ef4019SMatt Arsenault   /// TODO: We should sort these to minimize wasted space due to alignment
5152ef4019SMatt Arsenault   /// padding. Currently the padding is decided by the first encountered use
5252ef4019SMatt Arsenault   /// during lowering.
5352ef4019SMatt Arsenault   unsigned Offset = LDSSize = alignTo(LDSSize, Align);
5452ef4019SMatt Arsenault 
5552ef4019SMatt Arsenault   Entry.first->second = Offset;
5652ef4019SMatt Arsenault   LDSSize += DL.getTypeAllocSize(GV.getValueType());
5752ef4019SMatt Arsenault 
5852ef4019SMatt Arsenault   return Offset;
59beb24f5bSNikolay Haustov }
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