152ef4019SMatt Arsenault //===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=// 252ef4019SMatt Arsenault // 3*2946cd70SChandler Carruth // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*2946cd70SChandler Carruth // See https://llvm.org/LICENSE.txt for license information. 5*2946cd70SChandler Carruth // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 652ef4019SMatt Arsenault // 752ef4019SMatt Arsenault //===----------------------------------------------------------------------===// 852ef4019SMatt Arsenault 945bb48eaSTom Stellard #include "AMDGPUMachineFunction.h" 1052ef4019SMatt Arsenault #include "AMDGPUSubtarget.h" 111c538423SStanislav Mekhanoshin #include "AMDGPUPerfHintAnalysis.h" 121c538423SStanislav Mekhanoshin #include "llvm/CodeGen/MachineModuleInfo.h" 13e935f05aSMatt Arsenault 1445bb48eaSTom Stellard using namespace llvm; 1545bb48eaSTom Stellard 1645bb48eaSTom Stellard AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) : 1745bb48eaSTom Stellard MachineFunctionInfo(), 1852ef4019SMatt Arsenault LocalMemoryObjects(), 1975e7192bSMatt Arsenault ExplicitKernArgSize(0), 20e935f05aSMatt Arsenault MaxKernArgAlign(0), 2145bb48eaSTom Stellard LDSSize(0), 22f1caa283SMatthias Braun IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())), 231c538423SStanislav Mekhanoshin NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath), 241c538423SStanislav Mekhanoshin MemoryBound(false), 251c538423SStanislav Mekhanoshin WaveLimiter(false) { 264bec7d42SMatt Arsenault const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF); 274bec7d42SMatt Arsenault 2852ef4019SMatt Arsenault // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset, 2952ef4019SMatt Arsenault // except reserved size is not correctly aligned. 304bec7d42SMatt Arsenault const Function &F = MF.getFunction(); 311c538423SStanislav Mekhanoshin 321c538423SStanislav Mekhanoshin if (auto *Resolver = MF.getMMI().getResolver()) { 331c538423SStanislav Mekhanoshin if (AMDGPUPerfHintAnalysis *PHA = static_cast<AMDGPUPerfHintAnalysis*>( 341c538423SStanislav Mekhanoshin Resolver->getAnalysisIfAvailable(&AMDGPUPerfHintAnalysisID, true))) { 354bec7d42SMatt Arsenault MemoryBound = PHA->isMemoryBound(&F); 364bec7d42SMatt Arsenault WaveLimiter = PHA->needsWaveLimiter(&F); 371c538423SStanislav Mekhanoshin } 381c538423SStanislav Mekhanoshin } 394bec7d42SMatt Arsenault 404bec7d42SMatt Arsenault CallingConv::ID CC = F.getCallingConv(); 414bec7d42SMatt Arsenault if (CC == CallingConv::AMDGPU_KERNEL || CC == CallingConv::SPIR_KERNEL) 424bec7d42SMatt Arsenault ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign); 43beb24f5bSNikolay Haustov } 44beb24f5bSNikolay Haustov 4552ef4019SMatt Arsenault unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL, 4652ef4019SMatt Arsenault const GlobalValue &GV) { 4752ef4019SMatt Arsenault auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0)); 4852ef4019SMatt Arsenault if (!Entry.second) 4952ef4019SMatt Arsenault return Entry.first->second; 5052ef4019SMatt Arsenault 5152ef4019SMatt Arsenault unsigned Align = GV.getAlignment(); 5252ef4019SMatt Arsenault if (Align == 0) 5352ef4019SMatt Arsenault Align = DL.getABITypeAlignment(GV.getValueType()); 5452ef4019SMatt Arsenault 5552ef4019SMatt Arsenault /// TODO: We should sort these to minimize wasted space due to alignment 5652ef4019SMatt Arsenault /// padding. Currently the padding is decided by the first encountered use 5752ef4019SMatt Arsenault /// during lowering. 5852ef4019SMatt Arsenault unsigned Offset = LDSSize = alignTo(LDSSize, Align); 5952ef4019SMatt Arsenault 6052ef4019SMatt Arsenault Entry.first->second = Offset; 6152ef4019SMatt Arsenault LDSSize += DL.getTypeAllocSize(GV.getValueType()); 6252ef4019SMatt Arsenault 6352ef4019SMatt Arsenault return Offset; 64beb24f5bSNikolay Haustov } 65