1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for
11 /// AMDGPU.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPU.h"
16 #include "AMDGPULegalizerInfo.h"
17 #include "AMDGPUTargetMachine.h"
18 #include "llvm/CodeGen/TargetOpcodes.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 using namespace LegalizeActions;
26 
27 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
28                                          const GCNTargetMachine &TM) {
29   using namespace TargetOpcode;
30 
31   auto GetAddrSpacePtr = [&TM](unsigned AS) {
32     return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
33   };
34 
35   const LLT S1 = LLT::scalar(1);
36   const LLT V2S16 = LLT::vector(2, 16);
37 
38   const LLT S32 = LLT::scalar(32);
39   const LLT S64 = LLT::scalar(64);
40   const LLT S512 = LLT::scalar(512);
41 
42   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
43   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
44   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS);
45   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS);
46   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS);
47 
48   const LLT AddrSpaces[] = {
49     GlobalPtr,
50     ConstantPtr,
51     LocalPtr,
52     FlatPtr,
53     PrivatePtr
54   };
55 
56   setAction({G_ADD, S32}, Legal);
57   setAction({G_ASHR, S32}, Legal);
58   setAction({G_SUB, S32}, Legal);
59   setAction({G_MUL, S32}, Legal);
60   setAction({G_AND, S32}, Legal);
61   setAction({G_OR, S32}, Legal);
62   setAction({G_XOR, S32}, Legal);
63 
64   setAction({G_BITCAST, V2S16}, Legal);
65   setAction({G_BITCAST, 1, S32}, Legal);
66 
67   setAction({G_BITCAST, S32}, Legal);
68   setAction({G_BITCAST, 1, V2S16}, Legal);
69 
70   getActionDefinitionsBuilder(G_FCONSTANT)
71     .legalFor({S32, S64});
72 
73   // G_IMPLICIT_DEF is a no-op so we can make it legal for any value type that
74   // can fit in a register.
75   // FIXME: We need to legalize several more operations before we can add
76   // a test case for size > 512.
77   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
78     .legalIf([=](const LegalityQuery &Query) {
79         return Query.Types[0].getSizeInBits() <= 512;
80     })
81     .clampScalar(0, S1, S512);
82 
83   getActionDefinitionsBuilder(G_CONSTANT)
84     .legalFor({S1, S32, S64});
85 
86   // FIXME: i1 operands to intrinsics should always be legal, but other i1
87   // values may not be legal.  We need to figure out how to distinguish
88   // between these two scenarios.
89   setAction({G_CONSTANT, S1}, Legal);
90 
91   setAction({G_FADD, S32}, Legal);
92 
93   setAction({G_FCMP, S1}, Legal);
94   setAction({G_FCMP, 1, S32}, Legal);
95   setAction({G_FCMP, 1, S64}, Legal);
96 
97   setAction({G_FMUL, S32}, Legal);
98 
99   setAction({G_ZEXT, S64}, Legal);
100   setAction({G_ZEXT, 1, S32}, Legal);
101 
102   setAction({G_FPTOSI, S32}, Legal);
103   setAction({G_FPTOSI, 1, S32}, Legal);
104 
105   setAction({G_SITOFP, S32}, Legal);
106   setAction({G_SITOFP, 1, S32}, Legal);
107 
108   setAction({G_FPTOUI, S32}, Legal);
109   setAction({G_FPTOUI, 1, S32}, Legal);
110 
111   for (LLT PtrTy : AddrSpaces) {
112     LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits());
113     setAction({G_GEP, PtrTy}, Legal);
114     setAction({G_GEP, 1, IdxTy}, Legal);
115   }
116 
117   setAction({G_ICMP, S1}, Legal);
118   setAction({G_ICMP, 1, S32}, Legal);
119 
120 
121   getActionDefinitionsBuilder({G_LOAD, G_STORE})
122     .legalIf([=, &ST](const LegalityQuery &Query) {
123         const LLT &Ty0 = Query.Types[0];
124 
125         // TODO: Decompose private loads into 4-byte components.
126         // TODO: Illegal flat loads on SI
127         switch (Ty0.getSizeInBits()) {
128         case 32:
129         case 64:
130         case 128:
131           return true;
132 
133         case 96:
134           // XXX hasLoadX3
135           return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS);
136 
137         case 256:
138         case 512:
139           // TODO: constant loads
140         default:
141           return false;
142         }
143       });
144 
145 
146 
147   setAction({G_SELECT, S32}, Legal);
148   setAction({G_SELECT, 1, S1}, Legal);
149 
150   setAction({G_SHL, S32}, Legal);
151 
152 
153   // FIXME: When RegBankSelect inserts copies, it will only create new
154   // registers with scalar types.  This means we can end up with
155   // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
156   // operands.  In assert builds, the instruction selector will assert
157   // if it sees a generic instruction which isn't legal, so we need to
158   // tell it that scalar types are legal for pointer operands
159   setAction({G_GEP, S64}, Legal);
160 
161   for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) {
162     getActionDefinitionsBuilder(Op)
163       .legalIf([=](const LegalityQuery &Query) {
164           const LLT &VecTy = Query.Types[1];
165           const LLT &IdxTy = Query.Types[2];
166           return VecTy.getSizeInBits() % 32 == 0 &&
167             VecTy.getSizeInBits() <= 512 &&
168             IdxTy.getSizeInBits() == 32;
169         });
170   }
171 
172   // FIXME: Doesn't handle extract of illegal sizes.
173   getActionDefinitionsBuilder({G_EXTRACT, G_INSERT})
174     .legalIf([=](const LegalityQuery &Query) {
175         const LLT &Ty0 = Query.Types[0];
176         const LLT &Ty1 = Query.Types[1];
177         return (Ty0.getSizeInBits() % 32 == 0) &&
178                (Ty1.getSizeInBits() % 32 == 0);
179       });
180 
181   // Merge/Unmerge
182   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
183     unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
184     unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
185 
186     getActionDefinitionsBuilder(Op)
187       .legalIf([=](const LegalityQuery &Query) {
188           const LLT &BigTy = Query.Types[BigTyIdx];
189           const LLT &LitTy = Query.Types[LitTyIdx];
190           return BigTy.getSizeInBits() % 32 == 0 &&
191                  LitTy.getSizeInBits() % 32 == 0 &&
192                  BigTy.getSizeInBits() <= 512;
193         })
194       // Any vectors left are the wrong size. Scalarize them.
195       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
196                        [](const LegalityQuery &Query) {
197                          return std::make_pair(
198                            0, Query.Types[0].getElementType());
199                        })
200       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
201                        [](const LegalityQuery &Query) {
202                          return std::make_pair(
203                            1, Query.Types[1].getElementType());
204                        });
205 
206   }
207 
208   computeTables();
209   verify(*ST.getInstrInfo());
210 }
211