1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for
11 /// AMDGPU.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPU.h"
16 #include "AMDGPULegalizerInfo.h"
17 #include "AMDGPUTargetMachine.h"
18 #include "llvm/CodeGen/TargetOpcodes.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 using namespace LegalizeActions;
26 
27 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
28                                          const GCNTargetMachine &TM) {
29   using namespace TargetOpcode;
30 
31   auto GetAddrSpacePtr = [&TM](unsigned AS) {
32     return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
33   };
34 
35   const LLT S1 = LLT::scalar(1);
36   const LLT V2S16 = LLT::vector(2, 16);
37 
38   const LLT S32 = LLT::scalar(32);
39   const LLT S64 = LLT::scalar(64);
40   const LLT S512 = LLT::scalar(512);
41 
42   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
43   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
44   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS);
45   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS);
46   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS);
47 
48   const LLT CodePtr = FlatPtr;
49 
50   const LLT AddrSpaces[] = {
51     GlobalPtr,
52     ConstantPtr,
53     LocalPtr,
54     FlatPtr,
55     PrivatePtr
56   };
57 
58   setAction({G_ADD, S32}, Legal);
59   setAction({G_ASHR, S32}, Legal);
60   setAction({G_SUB, S32}, Legal);
61   setAction({G_MUL, S32}, Legal);
62   setAction({G_AND, S32}, Legal);
63   setAction({G_OR, S32}, Legal);
64   setAction({G_XOR, S32}, Legal);
65 
66   setAction({G_BITCAST, V2S16}, Legal);
67   setAction({G_BITCAST, 1, S32}, Legal);
68 
69   setAction({G_BITCAST, S32}, Legal);
70   setAction({G_BITCAST, 1, V2S16}, Legal);
71 
72   getActionDefinitionsBuilder(G_FCONSTANT)
73     .legalFor({S32, S64});
74 
75   // G_IMPLICIT_DEF is a no-op so we can make it legal for any value type that
76   // can fit in a register.
77   // FIXME: We need to legalize several more operations before we can add
78   // a test case for size > 512.
79   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
80     .legalIf([=](const LegalityQuery &Query) {
81         return Query.Types[0].getSizeInBits() <= 512;
82     })
83     .clampScalar(0, S1, S512);
84 
85   getActionDefinitionsBuilder(G_CONSTANT)
86     .legalFor({S1, S32, S64});
87 
88   // FIXME: i1 operands to intrinsics should always be legal, but other i1
89   // values may not be legal.  We need to figure out how to distinguish
90   // between these two scenarios.
91   setAction({G_CONSTANT, S1}, Legal);
92 
93   setAction({G_FRAME_INDEX, PrivatePtr}, Legal);
94 
95   getActionDefinitionsBuilder(
96     { G_FADD, G_FMUL, G_FNEG, G_FABS, G_FMA})
97     .legalFor({S32, S64});
98 
99   // Use actual fsub instruction
100   setAction({G_FSUB, S32}, Legal);
101 
102   // Must use fadd + fneg
103   setAction({G_FSUB, S64}, Lower);
104 
105   setAction({G_FCMP, S1}, Legal);
106   setAction({G_FCMP, 1, S32}, Legal);
107   setAction({G_FCMP, 1, S64}, Legal);
108 
109   setAction({G_ZEXT, S64}, Legal);
110   setAction({G_ZEXT, 1, S32}, Legal);
111 
112   setAction({G_SEXT, S64}, Legal);
113   setAction({G_SEXT, 1, S32}, Legal);
114 
115   setAction({G_ANYEXT, S64}, Legal);
116   setAction({G_ANYEXT, 1, S32}, Legal);
117 
118   setAction({G_FPTOSI, S32}, Legal);
119   setAction({G_FPTOSI, 1, S32}, Legal);
120 
121   setAction({G_SITOFP, S32}, Legal);
122   setAction({G_SITOFP, 1, S32}, Legal);
123 
124   setAction({G_FPTOUI, S32}, Legal);
125   setAction({G_FPTOUI, 1, S32}, Legal);
126 
127   for (LLT PtrTy : AddrSpaces) {
128     LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits());
129     setAction({G_GEP, PtrTy}, Legal);
130     setAction({G_GEP, 1, IdxTy}, Legal);
131   }
132 
133   setAction({G_BLOCK_ADDR, CodePtr}, Legal);
134 
135   setAction({G_ICMP, S1}, Legal);
136   setAction({G_ICMP, 1, S32}, Legal);
137 
138   setAction({G_CTLZ, S32}, Legal);
139   setAction({G_CTLZ_ZERO_UNDEF, S32}, Legal);
140   setAction({G_CTTZ, S32}, Legal);
141   setAction({G_CTTZ_ZERO_UNDEF, S32}, Legal);
142   setAction({G_BSWAP, S32}, Legal);
143   setAction({G_CTPOP, S32}, Legal);
144 
145   getActionDefinitionsBuilder(G_INTTOPTR)
146     .legalIf([](const LegalityQuery &Query) {
147       return true;
148     });
149 
150   getActionDefinitionsBuilder(G_PTRTOINT)
151     .legalIf([](const LegalityQuery &Query) {
152       return true;
153     });
154 
155   getActionDefinitionsBuilder({G_LOAD, G_STORE})
156     .legalIf([=, &ST](const LegalityQuery &Query) {
157         const LLT &Ty0 = Query.Types[0];
158 
159         // TODO: Decompose private loads into 4-byte components.
160         // TODO: Illegal flat loads on SI
161         switch (Ty0.getSizeInBits()) {
162         case 32:
163         case 64:
164         case 128:
165           return true;
166 
167         case 96:
168           // XXX hasLoadX3
169           return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS);
170 
171         case 256:
172         case 512:
173           // TODO: constant loads
174         default:
175           return false;
176         }
177       });
178 
179 
180 
181   setAction({G_SELECT, S32}, Legal);
182   setAction({G_SELECT, 1, S1}, Legal);
183 
184   setAction({G_SHL, S32}, Legal);
185 
186 
187   // FIXME: When RegBankSelect inserts copies, it will only create new
188   // registers with scalar types.  This means we can end up with
189   // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
190   // operands.  In assert builds, the instruction selector will assert
191   // if it sees a generic instruction which isn't legal, so we need to
192   // tell it that scalar types are legal for pointer operands
193   setAction({G_GEP, S64}, Legal);
194 
195   for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) {
196     getActionDefinitionsBuilder(Op)
197       .legalIf([=](const LegalityQuery &Query) {
198           const LLT &VecTy = Query.Types[1];
199           const LLT &IdxTy = Query.Types[2];
200           return VecTy.getSizeInBits() % 32 == 0 &&
201             VecTy.getSizeInBits() <= 512 &&
202             IdxTy.getSizeInBits() == 32;
203         });
204   }
205 
206   // FIXME: Doesn't handle extract of illegal sizes.
207   getActionDefinitionsBuilder({G_EXTRACT, G_INSERT})
208     .legalIf([=](const LegalityQuery &Query) {
209         const LLT &Ty0 = Query.Types[0];
210         const LLT &Ty1 = Query.Types[1];
211         return (Ty0.getSizeInBits() % 32 == 0) &&
212                (Ty1.getSizeInBits() % 32 == 0);
213       });
214 
215   getActionDefinitionsBuilder(G_BUILD_VECTOR)
216       .legalIf([=](const LegalityQuery &Query) {
217         const LLT &VecTy = Query.Types[0];
218         const LLT &ScalarTy = Query.Types[1];
219         return VecTy.getSizeInBits() % 32 == 0 &&
220                ScalarTy.getSizeInBits() % 32 == 0 &&
221                VecTy.getSizeInBits() <= 512;
222       });
223   // Merge/Unmerge
224   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
225     unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
226     unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
227 
228     getActionDefinitionsBuilder(Op)
229       .legalIf([=](const LegalityQuery &Query) {
230           const LLT &BigTy = Query.Types[BigTyIdx];
231           const LLT &LitTy = Query.Types[LitTyIdx];
232           return BigTy.getSizeInBits() % 32 == 0 &&
233                  LitTy.getSizeInBits() % 32 == 0 &&
234                  BigTy.getSizeInBits() <= 512;
235         })
236       // Any vectors left are the wrong size. Scalarize them.
237       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
238                        [](const LegalityQuery &Query) {
239                          return std::make_pair(
240                            0, Query.Types[0].getElementType());
241                        })
242       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
243                        [](const LegalityQuery &Query) {
244                          return std::make_pair(
245                            1, Query.Types[1].getElementType());
246                        });
247 
248   }
249 
250   computeTables();
251   verify(*ST.getInstrInfo());
252 }
253