1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for
11 /// AMDGPU.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPU.h"
16 #include "AMDGPULegalizerInfo.h"
17 #include "AMDGPUTargetMachine.h"
18 #include "llvm/CodeGen/TargetOpcodes.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 using namespace LegalizeActions;
26 
27 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
28                                          const GCNTargetMachine &TM) {
29   using namespace TargetOpcode;
30 
31   auto GetAddrSpacePtr = [&TM](unsigned AS) {
32     return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
33   };
34 
35   auto AMDGPUAS = ST.getAMDGPUAS();
36 
37   const LLT S1 = LLT::scalar(1);
38   const LLT V2S16 = LLT::vector(2, 16);
39 
40   const LLT S32 = LLT::scalar(32);
41   const LLT S64 = LLT::scalar(64);
42   const LLT S512 = LLT::scalar(512);
43 
44   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
45   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
46   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS);
47   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS.FLAT_ADDRESS);
48   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS.PRIVATE_ADDRESS);
49 
50   const LLT AddrSpaces[] = {
51     GlobalPtr,
52     ConstantPtr,
53     LocalPtr,
54     FlatPtr,
55     PrivatePtr
56   };
57 
58   setAction({G_ADD, S32}, Legal);
59   setAction({G_ASHR, S32}, Legal);
60   setAction({G_SUB, S32}, Legal);
61   setAction({G_MUL, S32}, Legal);
62   setAction({G_AND, S32}, Legal);
63   setAction({G_OR, S32}, Legal);
64   setAction({G_XOR, S32}, Legal);
65 
66   setAction({G_BITCAST, V2S16}, Legal);
67   setAction({G_BITCAST, 1, S32}, Legal);
68 
69   setAction({G_BITCAST, S32}, Legal);
70   setAction({G_BITCAST, 1, V2S16}, Legal);
71 
72   getActionDefinitionsBuilder(G_FCONSTANT)
73     .legalFor({S32, S64});
74 
75   // G_IMPLICIT_DEF is a no-op so we can make it legal for any value type that
76   // can fit in a register.
77   // FIXME: We need to legalize several more operations before we can add
78   // a test case for size > 512.
79   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
80     .legalIf([=](const LegalityQuery &Query) {
81         return Query.Types[0].getSizeInBits() <= 512;
82     })
83     .clampScalar(0, S1, S512);
84 
85   getActionDefinitionsBuilder(G_CONSTANT)
86     .legalFor({S1, S32, S64});
87 
88   // FIXME: i1 operands to intrinsics should always be legal, but other i1
89   // values may not be legal.  We need to figure out how to distinguish
90   // between these two scenarios.
91   setAction({G_CONSTANT, S1}, Legal);
92 
93   setAction({G_FADD, S32}, Legal);
94 
95   setAction({G_FCMP, S1}, Legal);
96   setAction({G_FCMP, 1, S32}, Legal);
97   setAction({G_FCMP, 1, S64}, Legal);
98 
99   setAction({G_FMUL, S32}, Legal);
100 
101   setAction({G_ZEXT, S64}, Legal);
102   setAction({G_ZEXT, 1, S32}, Legal);
103 
104   setAction({G_FPTOSI, S32}, Legal);
105   setAction({G_FPTOSI, 1, S32}, Legal);
106 
107   setAction({G_SITOFP, S32}, Legal);
108   setAction({G_SITOFP, 1, S32}, Legal);
109 
110   setAction({G_FPTOUI, S32}, Legal);
111   setAction({G_FPTOUI, 1, S32}, Legal);
112 
113   for (LLT PtrTy : AddrSpaces) {
114     LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits());
115     setAction({G_GEP, PtrTy}, Legal);
116     setAction({G_GEP, 1, IdxTy}, Legal);
117   }
118 
119   setAction({G_ICMP, S1}, Legal);
120   setAction({G_ICMP, 1, S32}, Legal);
121 
122 
123   getActionDefinitionsBuilder({G_LOAD, G_STORE})
124     .legalIf([=, &ST](const LegalityQuery &Query) {
125         const LLT &Ty0 = Query.Types[0];
126 
127         // TODO: Decompose private loads into 4-byte components.
128         // TODO: Illegal flat loads on SI
129         switch (Ty0.getSizeInBits()) {
130         case 32:
131         case 64:
132         case 128:
133           return true;
134 
135         case 96:
136           // XXX hasLoadX3
137           return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS);
138 
139         case 256:
140         case 512:
141           // TODO: constant loads
142         default:
143           return false;
144         }
145       });
146 
147 
148 
149   setAction({G_SELECT, S32}, Legal);
150   setAction({G_SELECT, 1, S1}, Legal);
151 
152   setAction({G_SHL, S32}, Legal);
153 
154 
155   // FIXME: When RegBankSelect inserts copies, it will only create new
156   // registers with scalar types.  This means we can end up with
157   // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
158   // operands.  In assert builds, the instruction selector will assert
159   // if it sees a generic instruction which isn't legal, so we need to
160   // tell it that scalar types are legal for pointer operands
161   setAction({G_GEP, S64}, Legal);
162 
163   for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) {
164     getActionDefinitionsBuilder(Op)
165       .legalIf([=](const LegalityQuery &Query) {
166           const LLT &VecTy = Query.Types[1];
167           const LLT &IdxTy = Query.Types[2];
168           return VecTy.getSizeInBits() % 32 == 0 &&
169             VecTy.getSizeInBits() <= 512 &&
170             IdxTy.getSizeInBits() == 32;
171         });
172   }
173 
174   // FIXME: Doesn't handle extract of illegal sizes.
175   getActionDefinitionsBuilder({G_EXTRACT, G_INSERT})
176     .legalIf([=](const LegalityQuery &Query) {
177         const LLT &Ty0 = Query.Types[0];
178         const LLT &Ty1 = Query.Types[1];
179         return (Ty0.getSizeInBits() % 32 == 0) &&
180                (Ty1.getSizeInBits() % 32 == 0);
181       });
182 
183   // Merge/Unmerge
184   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
185     unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
186     unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
187 
188     getActionDefinitionsBuilder(Op)
189       .legalIf([=](const LegalityQuery &Query) {
190           const LLT &BigTy = Query.Types[BigTyIdx];
191           const LLT &LitTy = Query.Types[LitTyIdx];
192           return BigTy.getSizeInBits() % 32 == 0 &&
193                  LitTy.getSizeInBits() % 32 == 0 &&
194                  BigTy.getSizeInBits() <= 512;
195         })
196       // Any vectors left are the wrong size. Scalarize them.
197       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
198                        [](const LegalityQuery &Query) {
199                          return std::make_pair(
200                            0, Query.Types[0].getElementType());
201                        })
202       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
203                        [](const LegalityQuery &Query) {
204                          return std::make_pair(
205                            1, Query.Types[1].getElementType());
206                        });
207 
208   }
209 
210   computeTables();
211   verify(*ST.getInstrInfo());
212 }
213