1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for
11 /// AMDGPU.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPU.h"
16 #include "AMDGPULegalizerInfo.h"
17 #include "AMDGPUTargetMachine.h"
18 #include "llvm/CodeGen/TargetOpcodes.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 using namespace LegalizeActions;
26 
27 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST,
28                                          const GCNTargetMachine &TM) {
29   using namespace TargetOpcode;
30 
31   auto GetAddrSpacePtr = [&TM](unsigned AS) {
32     return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
33   };
34 
35   auto AMDGPUAS = ST.getAMDGPUAS();
36 
37   const LLT S1 = LLT::scalar(1);
38   const LLT V2S16 = LLT::vector(2, 16);
39 
40   const LLT S32 = LLT::scalar(32);
41   const LLT S64 = LLT::scalar(64);
42 
43   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
44   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
45   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS);
46   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS.FLAT_ADDRESS);
47   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS.PRIVATE_ADDRESS);
48 
49   const LLT AddrSpaces[] = {
50     GlobalPtr,
51     ConstantPtr,
52     LocalPtr,
53     FlatPtr,
54     PrivatePtr
55   };
56 
57   setAction({G_ADD, S32}, Legal);
58   setAction({G_ASHR, S32}, Legal);
59   setAction({G_SUB, S32}, Legal);
60   setAction({G_MUL, S32}, Legal);
61   setAction({G_AND, S32}, Legal);
62   setAction({G_OR, S32}, Legal);
63   setAction({G_XOR, S32}, Legal);
64 
65   setAction({G_BITCAST, V2S16}, Legal);
66   setAction({G_BITCAST, 1, S32}, Legal);
67 
68   setAction({G_BITCAST, S32}, Legal);
69   setAction({G_BITCAST, 1, V2S16}, Legal);
70 
71   getActionDefinitionsBuilder(G_FCONSTANT)
72     .legalFor({S32, S64});
73   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
74     .legalFor({S1, S32, S64,
75                GlobalPtr, ConstantPtr, LocalPtr, FlatPtr, PrivatePtr});
76 
77   getActionDefinitionsBuilder(G_CONSTANT)
78     .legalFor({S1, S32, S64});
79 
80   // FIXME: i1 operands to intrinsics should always be legal, but other i1
81   // values may not be legal.  We need to figure out how to distinguish
82   // between these two scenarios.
83   setAction({G_CONSTANT, S1}, Legal);
84 
85   setAction({G_FADD, S32}, Legal);
86 
87   setAction({G_FCMP, S1}, Legal);
88   setAction({G_FCMP, 1, S32}, Legal);
89   setAction({G_FCMP, 1, S64}, Legal);
90 
91   setAction({G_FMUL, S32}, Legal);
92 
93   setAction({G_ZEXT, S64}, Legal);
94   setAction({G_ZEXT, 1, S32}, Legal);
95 
96   setAction({G_FPTOSI, S32}, Legal);
97   setAction({G_FPTOSI, 1, S32}, Legal);
98 
99   setAction({G_SITOFP, S32}, Legal);
100   setAction({G_SITOFP, 1, S32}, Legal);
101 
102   setAction({G_FPTOUI, S32}, Legal);
103   setAction({G_FPTOUI, 1, S32}, Legal);
104 
105   for (LLT PtrTy : AddrSpaces) {
106     LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits());
107     setAction({G_GEP, PtrTy}, Legal);
108     setAction({G_GEP, 1, IdxTy}, Legal);
109   }
110 
111   setAction({G_ICMP, S1}, Legal);
112   setAction({G_ICMP, 1, S32}, Legal);
113 
114 
115   getActionDefinitionsBuilder({G_LOAD, G_STORE})
116     .legalIf([=, &ST](const LegalityQuery &Query) {
117         const LLT &Ty0 = Query.Types[0];
118 
119         // TODO: Decompose private loads into 4-byte components.
120         // TODO: Illegal flat loads on SI
121         switch (Ty0.getSizeInBits()) {
122         case 32:
123         case 64:
124         case 128:
125           return true;
126 
127         case 96:
128           // XXX hasLoadX3
129           return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS);
130 
131         case 256:
132         case 512:
133           // TODO: constant loads
134         default:
135           return false;
136         }
137       });
138 
139 
140 
141   setAction({G_SELECT, S32}, Legal);
142   setAction({G_SELECT, 1, S1}, Legal);
143 
144   setAction({G_SHL, S32}, Legal);
145 
146 
147   // FIXME: When RegBankSelect inserts copies, it will only create new
148   // registers with scalar types.  This means we can end up with
149   // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
150   // operands.  In assert builds, the instruction selector will assert
151   // if it sees a generic instruction which isn't legal, so we need to
152   // tell it that scalar types are legal for pointer operands
153   setAction({G_GEP, S64}, Legal);
154 
155   for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) {
156     getActionDefinitionsBuilder(Op)
157       .legalIf([=](const LegalityQuery &Query) {
158           const LLT &VecTy = Query.Types[1];
159           const LLT &IdxTy = Query.Types[2];
160           return VecTy.getSizeInBits() % 32 == 0 &&
161             VecTy.getSizeInBits() <= 512 &&
162             IdxTy.getSizeInBits() == 32;
163         });
164   }
165 
166   // FIXME: Doesn't handle extract of illegal sizes.
167   getActionDefinitionsBuilder(G_EXTRACT)
168     .unsupportedIf([=](const LegalityQuery &Query) {
169         return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits();
170       })
171     .legalIf([=](const LegalityQuery &Query) {
172         const LLT &Ty0 = Query.Types[0];
173         const LLT &Ty1 = Query.Types[1];
174         return (Ty0.getSizeInBits() % 32 == 0) &&
175                (Ty1.getSizeInBits() % 32 == 0);
176       });
177 
178   // Merge/Unmerge
179   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
180     unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
181     unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
182 
183     getActionDefinitionsBuilder(Op)
184       .legalIf([=](const LegalityQuery &Query) {
185           const LLT &BigTy = Query.Types[BigTyIdx];
186           const LLT &LitTy = Query.Types[LitTyIdx];
187           return BigTy.getSizeInBits() % 32 == 0 &&
188                  LitTy.getSizeInBits() % 32 == 0 &&
189                  BigTy.getSizeInBits() <= 512;
190         })
191       // Any vectors left are the wrong size. Scalarize them.
192       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
193                        [](const LegalityQuery &Query) {
194                          return std::make_pair(
195                            0, Query.Types[0].getElementType());
196                        })
197       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
198                        [](const LegalityQuery &Query) {
199                          return std::make_pair(
200                            1, Query.Types[1].getElementType());
201                        });
202 
203   }
204 
205   computeTables();
206   verify(*ST.getInstrInfo());
207 }
208