1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the targeting of the Machinelegalizer class for 11 /// AMDGPU. 12 /// \todo This should be generated by TableGen. 13 //===----------------------------------------------------------------------===// 14 15 #include "AMDGPULegalizerInfo.h" 16 #include "llvm/CodeGen/TargetOpcodes.h" 17 #include "llvm/CodeGen/ValueTypes.h" 18 #include "llvm/IR/DerivedTypes.h" 19 #include "llvm/IR/Type.h" 20 #include "llvm/Support/Debug.h" 21 22 using namespace llvm; 23 using namespace LegalizeActions; 24 25 AMDGPULegalizerInfo::AMDGPULegalizerInfo() { 26 using namespace TargetOpcode; 27 28 const LLT S1= LLT::scalar(1); 29 const LLT V2S16 = LLT::vector(2, 16); 30 const LLT S32 = LLT::scalar(32); 31 const LLT S64 = LLT::scalar(64); 32 const LLT P1 = LLT::pointer(1, 64); 33 const LLT P2 = LLT::pointer(2, 64); 34 35 setAction({G_ADD, S32}, Legal); 36 setAction({G_AND, S32}, Legal); 37 38 setAction({G_BITCAST, V2S16}, Legal); 39 setAction({G_BITCAST, 1, S32}, Legal); 40 41 setAction({G_BITCAST, S32}, Legal); 42 setAction({G_BITCAST, 1, V2S16}, Legal); 43 44 // FIXME: i1 operands to intrinsics should always be legal, but other i1 45 // values may not be legal. We need to figure out how to distinguish 46 // between these two scenarios. 47 setAction({G_CONSTANT, S1}, Legal); 48 setAction({G_CONSTANT, S32}, Legal); 49 setAction({G_CONSTANT, S64}, Legal); 50 51 setAction({G_FCONSTANT, S32}, Legal); 52 53 setAction({G_FADD, S32}, Legal); 54 55 setAction({G_FMUL, S32}, Legal); 56 57 setAction({G_GEP, P1}, Legal); 58 setAction({G_GEP, P2}, Legal); 59 setAction({G_GEP, 1, S64}, Legal); 60 61 setAction({G_ICMP, S1}, Legal); 62 setAction({G_ICMP, 1, S32}, Legal); 63 64 setAction({G_LOAD, P1}, Legal); 65 setAction({G_LOAD, P2}, Legal); 66 setAction({G_LOAD, S32}, Legal); 67 setAction({G_LOAD, 1, P1}, Legal); 68 setAction({G_LOAD, 1, P2}, Legal); 69 70 setAction({G_OR, S32}, Legal); 71 72 setAction({G_SELECT, S32}, Legal); 73 setAction({G_SELECT, 1, S1}, Legal); 74 75 setAction({G_SHL, S32}, Legal); 76 77 setAction({G_STORE, S32}, Legal); 78 setAction({G_STORE, 1, P1}, Legal); 79 80 // FIXME: When RegBankSelect inserts copies, it will only create new 81 // registers with scalar types. This means we can end up with 82 // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer 83 // operands. In assert builds, the instruction selector will assert 84 // if it sees a generic instruction which isn't legal, so we need to 85 // tell it that scalar types are legal for pointer operands 86 setAction({G_GEP, S64}, Legal); 87 setAction({G_LOAD, 1, S64}, Legal); 88 setAction({G_STORE, 1, S64}, Legal); 89 90 computeTables(); 91 } 92