1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for
11 /// AMDGPU.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPU.h"
16 #include "AMDGPULegalizerInfo.h"
17 #include "AMDGPUTargetMachine.h"
18 #include "llvm/CodeGen/TargetOpcodes.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 using namespace LegalizeActions;
26 
27 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST,
28                                          const GCNTargetMachine &TM) {
29   using namespace TargetOpcode;
30 
31   auto GetAddrSpacePtr = [&TM](unsigned AS) {
32     return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
33   };
34 
35   auto AMDGPUAS = ST.getAMDGPUAS();
36 
37   const LLT S1 = LLT::scalar(1);
38   const LLT V2S16 = LLT::vector(2, 16);
39 
40   const LLT S32 = LLT::scalar(32);
41   const LLT S64 = LLT::scalar(64);
42 
43   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
44   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
45   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS);
46   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS.FLAT_ADDRESS);
47   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS.PRIVATE_ADDRESS);
48 
49   const LLT AddrSpaces[] = {
50     GlobalPtr,
51     ConstantPtr,
52     LocalPtr,
53     FlatPtr,
54     PrivatePtr
55   };
56 
57   setAction({G_ADD, S32}, Legal);
58   setAction({G_SUB, S32}, Legal);
59   setAction({G_MUL, S32}, Legal);
60   setAction({G_AND, S32}, Legal);
61   setAction({G_OR, S32}, Legal);
62   setAction({G_XOR, S32}, Legal);
63 
64   setAction({G_BITCAST, V2S16}, Legal);
65   setAction({G_BITCAST, 1, S32}, Legal);
66 
67   setAction({G_BITCAST, S32}, Legal);
68   setAction({G_BITCAST, 1, V2S16}, Legal);
69 
70   getActionDefinitionsBuilder(G_FCONSTANT)
71     .legalFor({S32, S64});
72   getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_CONSTANT})
73     .legalFor({S1, S32, S64});
74 
75   // FIXME: i1 operands to intrinsics should always be legal, but other i1
76   // values may not be legal.  We need to figure out how to distinguish
77   // between these two scenarios.
78   setAction({G_CONSTANT, S1}, Legal);
79 
80   setAction({G_FADD, S32}, Legal);
81 
82   setAction({G_FCMP, S1}, Legal);
83   setAction({G_FCMP, 1, S32}, Legal);
84   setAction({G_FCMP, 1, S64}, Legal);
85 
86   setAction({G_FMUL, S32}, Legal);
87 
88   setAction({G_ZEXT, S64}, Legal);
89   setAction({G_ZEXT, 1, S32}, Legal);
90 
91   setAction({G_FPTOSI, S32}, Legal);
92   setAction({G_FPTOSI, 1, S32}, Legal);
93 
94   setAction({G_FPTOUI, S32}, Legal);
95   setAction({G_FPTOUI, 1, S32}, Legal);
96 
97   for (LLT PtrTy : AddrSpaces) {
98     LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits());
99     setAction({G_GEP, PtrTy}, Legal);
100     setAction({G_GEP, 1, IdxTy}, Legal);
101   }
102 
103   setAction({G_ICMP, S1}, Legal);
104   setAction({G_ICMP, 1, S32}, Legal);
105 
106 
107   getActionDefinitionsBuilder({G_LOAD, G_STORE})
108     .legalIf([=, &ST](const LegalityQuery &Query) {
109         const LLT &Ty0 = Query.Types[0];
110 
111         // TODO: Decompose private loads into 4-byte components.
112         // TODO: Illegal flat loads on SI
113         switch (Ty0.getSizeInBits()) {
114         case 32:
115         case 64:
116         case 128:
117           return true;
118 
119         case 96:
120           // XXX hasLoadX3
121           return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS);
122 
123         case 256:
124         case 512:
125           // TODO: constant loads
126         default:
127           return false;
128         }
129       });
130 
131 
132 
133   setAction({G_SELECT, S32}, Legal);
134   setAction({G_SELECT, 1, S1}, Legal);
135 
136   setAction({G_SHL, S32}, Legal);
137 
138 
139   // FIXME: When RegBankSelect inserts copies, it will only create new
140   // registers with scalar types.  This means we can end up with
141   // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
142   // operands.  In assert builds, the instruction selector will assert
143   // if it sees a generic instruction which isn't legal, so we need to
144   // tell it that scalar types are legal for pointer operands
145   setAction({G_GEP, S64}, Legal);
146 
147   for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) {
148     getActionDefinitionsBuilder(Op)
149       .legalIf([=](const LegalityQuery &Query) {
150           const LLT &VecTy = Query.Types[1];
151           const LLT &IdxTy = Query.Types[2];
152           return VecTy.getSizeInBits() % 32 == 0 &&
153             VecTy.getSizeInBits() <= 512 &&
154             IdxTy.getSizeInBits() == 32;
155         });
156   }
157 
158   // FIXME: Doesn't handle extract of illegal sizes.
159   getActionDefinitionsBuilder(G_EXTRACT)
160     .unsupportedIf([=](const LegalityQuery &Query) {
161         return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits();
162       })
163     .legalIf([=](const LegalityQuery &Query) {
164         const LLT &Ty0 = Query.Types[0];
165         const LLT &Ty1 = Query.Types[1];
166         return (Ty0.getSizeInBits() % 32 == 0) &&
167                (Ty1.getSizeInBits() % 32 == 0);
168       });
169 
170   // Merge/Unmerge
171   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
172     unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
173     unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
174 
175     getActionDefinitionsBuilder(Op)
176       .legalIf([=](const LegalityQuery &Query) {
177           const LLT &BigTy = Query.Types[BigTyIdx];
178           const LLT &LitTy = Query.Types[LitTyIdx];
179           return BigTy.getSizeInBits() % 32 == 0 &&
180                  LitTy.getSizeInBits() % 32 == 0 &&
181                  BigTy.getSizeInBits() <= 512;
182         })
183       // Any vectors left are the wrong size. Scalarize them.
184       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
185                        [](const LegalityQuery &Query) {
186                          return std::make_pair(
187                            0, Query.Types[0].getElementType());
188                        })
189       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
190                        [](const LegalityQuery &Query) {
191                          return std::make_pair(
192                            1, Query.Types[1].getElementType());
193                        });
194 
195   }
196 
197   computeTables();
198 }
199