1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the Machinelegalizer class for
11 /// AMDGPU.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPU.h"
16 #include "AMDGPULegalizerInfo.h"
17 #include "AMDGPUTargetMachine.h"
18 #include "llvm/CodeGen/TargetOpcodes.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/IR/DerivedTypes.h"
21 #include "llvm/IR/Type.h"
22 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 using namespace LegalizeActions;
26 
27 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST,
28                                          const GCNTargetMachine &TM) {
29   using namespace TargetOpcode;
30 
31   auto GetAddrSpacePtr = [&TM](unsigned AS) {
32     return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
33   };
34 
35   auto AMDGPUAS = ST.getAMDGPUAS();
36 
37   const LLT S1 = LLT::scalar(1);
38   const LLT V2S16 = LLT::vector(2, 16);
39 
40   const LLT S32 = LLT::scalar(32);
41   const LLT S64 = LLT::scalar(64);
42 
43   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS);
44   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS);
45   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS);
46   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS.FLAT_ADDRESS);
47   const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS.PRIVATE_ADDRESS);
48 
49   const LLT AddrSpaces[] = {
50     GlobalPtr,
51     ConstantPtr,
52     LocalPtr,
53     FlatPtr,
54     PrivatePtr
55   };
56 
57   setAction({G_ADD, S32}, Legal);
58   setAction({G_MUL, S32}, Legal);
59   setAction({G_AND, S32}, Legal);
60   setAction({G_OR, S32}, Legal);
61   setAction({G_XOR, S32}, Legal);
62 
63   setAction({G_BITCAST, V2S16}, Legal);
64   setAction({G_BITCAST, 1, S32}, Legal);
65 
66   setAction({G_BITCAST, S32}, Legal);
67   setAction({G_BITCAST, 1, V2S16}, Legal);
68 
69   getActionDefinitionsBuilder(G_FCONSTANT)
70     .legalFor({S32, S64});
71   getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_CONSTANT})
72     .legalFor({S1, S32, S64});
73 
74   // FIXME: i1 operands to intrinsics should always be legal, but other i1
75   // values may not be legal.  We need to figure out how to distinguish
76   // between these two scenarios.
77   setAction({G_CONSTANT, S1}, Legal);
78 
79   setAction({G_FADD, S32}, Legal);
80 
81   setAction({G_FCMP, S1}, Legal);
82   setAction({G_FCMP, 1, S32}, Legal);
83   setAction({G_FCMP, 1, S64}, Legal);
84 
85   setAction({G_FMUL, S32}, Legal);
86 
87   setAction({G_ZEXT, S64}, Legal);
88   setAction({G_ZEXT, 1, S32}, Legal);
89 
90   setAction({G_FPTOSI, S32}, Legal);
91   setAction({G_FPTOSI, 1, S32}, Legal);
92 
93   setAction({G_FPTOUI, S32}, Legal);
94   setAction({G_FPTOUI, 1, S32}, Legal);
95 
96   for (LLT PtrTy : AddrSpaces) {
97     LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits());
98     setAction({G_GEP, PtrTy}, Legal);
99     setAction({G_GEP, 1, IdxTy}, Legal);
100   }
101 
102   setAction({G_ICMP, S1}, Legal);
103   setAction({G_ICMP, 1, S32}, Legal);
104 
105 
106   getActionDefinitionsBuilder({G_LOAD, G_STORE})
107     .legalIf([=, &ST](const LegalityQuery &Query) {
108         const LLT &Ty0 = Query.Types[0];
109 
110         // TODO: Decompose private loads into 4-byte components.
111         // TODO: Illegal flat loads on SI
112         switch (Ty0.getSizeInBits()) {
113         case 32:
114         case 64:
115         case 128:
116           return true;
117 
118         case 96:
119           // XXX hasLoadX3
120           return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS);
121 
122         case 256:
123         case 512:
124           // TODO: constant loads
125         default:
126           return false;
127         }
128       });
129 
130 
131 
132   setAction({G_SELECT, S32}, Legal);
133   setAction({G_SELECT, 1, S1}, Legal);
134 
135   setAction({G_SHL, S32}, Legal);
136 
137 
138   // FIXME: When RegBankSelect inserts copies, it will only create new
139   // registers with scalar types.  This means we can end up with
140   // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer
141   // operands.  In assert builds, the instruction selector will assert
142   // if it sees a generic instruction which isn't legal, so we need to
143   // tell it that scalar types are legal for pointer operands
144   setAction({G_GEP, S64}, Legal);
145 
146   for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) {
147     getActionDefinitionsBuilder(Op)
148       .legalIf([=](const LegalityQuery &Query) {
149           const LLT &VecTy = Query.Types[1];
150           const LLT &IdxTy = Query.Types[2];
151           return VecTy.getSizeInBits() % 32 == 0 &&
152             VecTy.getSizeInBits() <= 512 &&
153             IdxTy.getSizeInBits() == 32;
154         });
155   }
156 
157   // FIXME: Doesn't handle extract of illegal sizes.
158   getActionDefinitionsBuilder(G_EXTRACT)
159     .unsupportedIf([=](const LegalityQuery &Query) {
160         return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits();
161       })
162     .legalIf([=](const LegalityQuery &Query) {
163         const LLT &Ty0 = Query.Types[0];
164         const LLT &Ty1 = Query.Types[1];
165         return (Ty0.getSizeInBits() % 32 == 0) &&
166                (Ty1.getSizeInBits() % 32 == 0);
167       });
168 
169   // Merge/Unmerge
170   for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
171     unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
172     unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
173 
174     getActionDefinitionsBuilder(Op)
175       .legalIf([=](const LegalityQuery &Query) {
176           const LLT &BigTy = Query.Types[BigTyIdx];
177           const LLT &LitTy = Query.Types[LitTyIdx];
178           return BigTy.getSizeInBits() % 32 == 0 &&
179                  LitTy.getSizeInBits() % 32 == 0 &&
180                  BigTy.getSizeInBits() <= 512;
181         })
182       // Any vectors left are the wrong size. Scalarize them.
183       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
184                        [](const LegalityQuery &Query) {
185                          return std::make_pair(
186                            0, Query.Types[0].getElementType());
187                        })
188       .fewerElementsIf([](const LegalityQuery &Query) { return true; },
189                        [](const LegalityQuery &Query) {
190                          return std::make_pair(
191                            1, Query.Types[1].getElementType());
192                        });
193 
194   }
195 
196   computeTables();
197 }
198