1 //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the targeting of the Machinelegalizer class for 11 /// AMDGPU. 12 /// \todo This should be generated by TableGen. 13 //===----------------------------------------------------------------------===// 14 15 #include "AMDGPU.h" 16 #include "AMDGPULegalizerInfo.h" 17 #include "llvm/CodeGen/TargetOpcodes.h" 18 #include "llvm/CodeGen/ValueTypes.h" 19 #include "llvm/IR/DerivedTypes.h" 20 #include "llvm/IR/Type.h" 21 #include "llvm/Support/Debug.h" 22 23 using namespace llvm; 24 using namespace LegalizeActions; 25 26 AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST, 27 const GCNTargetMachine &TM) { 28 using namespace TargetOpcode; 29 30 const LLT S1= LLT::scalar(1); 31 const LLT V2S16 = LLT::vector(2, 16); 32 const LLT S32 = LLT::scalar(32); 33 const LLT S64 = LLT::scalar(64); 34 const LLT P1 = LLT::pointer(AMDGPUAS::GLOBAL_ADDRESS, 64); 35 const LLT P2 = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); 36 37 setAction({G_ADD, S32}, Legal); 38 setAction({G_MUL, S32}, Legal); 39 setAction({G_AND, S32}, Legal); 40 setAction({G_OR, S32}, Legal); 41 setAction({G_XOR, S32}, Legal); 42 43 setAction({G_BITCAST, V2S16}, Legal); 44 setAction({G_BITCAST, 1, S32}, Legal); 45 46 setAction({G_BITCAST, S32}, Legal); 47 setAction({G_BITCAST, 1, V2S16}, Legal); 48 49 // FIXME: i1 operands to intrinsics should always be legal, but other i1 50 // values may not be legal. We need to figure out how to distinguish 51 // between these two scenarios. 52 setAction({G_CONSTANT, S1}, Legal); 53 setAction({G_CONSTANT, S32}, Legal); 54 setAction({G_CONSTANT, S64}, Legal); 55 56 setAction({G_FCONSTANT, S32}, Legal); 57 setAction({G_FCONSTANT, S64}, Legal); 58 59 setAction({G_IMPLICIT_DEF, S32}, Legal); 60 setAction({G_IMPLICIT_DEF, S64}, Legal); 61 62 setAction({G_FADD, S32}, Legal); 63 64 setAction({G_FCMP, S1}, Legal); 65 setAction({G_FCMP, 1, S32}, Legal); 66 setAction({G_FCMP, 1, S64}, Legal); 67 68 setAction({G_FMUL, S32}, Legal); 69 70 setAction({G_ZEXT, S64}, Legal); 71 setAction({G_ZEXT, 1, S32}, Legal); 72 73 setAction({G_FPTOSI, S32}, Legal); 74 setAction({G_FPTOSI, 1, S32}, Legal); 75 76 setAction({G_FPTOUI, S32}, Legal); 77 setAction({G_FPTOUI, 1, S32}, Legal); 78 79 setAction({G_GEP, P1}, Legal); 80 setAction({G_GEP, P2}, Legal); 81 setAction({G_GEP, 1, S64}, Legal); 82 83 setAction({G_ICMP, S1}, Legal); 84 setAction({G_ICMP, 1, S32}, Legal); 85 86 setAction({G_LOAD, P1}, Legal); 87 setAction({G_LOAD, P2}, Legal); 88 setAction({G_LOAD, S32}, Legal); 89 setAction({G_LOAD, 1, P1}, Legal); 90 setAction({G_LOAD, 1, P2}, Legal); 91 92 setAction({G_SELECT, S32}, Legal); 93 setAction({G_SELECT, 1, S1}, Legal); 94 95 setAction({G_SHL, S32}, Legal); 96 97 setAction({G_STORE, S32}, Legal); 98 setAction({G_STORE, 1, P1}, Legal); 99 100 // FIXME: When RegBankSelect inserts copies, it will only create new 101 // registers with scalar types. This means we can end up with 102 // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer 103 // operands. In assert builds, the instruction selector will assert 104 // if it sees a generic instruction which isn't legal, so we need to 105 // tell it that scalar types are legal for pointer operands 106 setAction({G_GEP, S64}, Legal); 107 setAction({G_LOAD, 1, S64}, Legal); 108 setAction({G_STORE, 1, S64}, Legal); 109 110 // FIXME: Doesn't handle extract of illegal sizes. 111 getActionDefinitionsBuilder(G_EXTRACT) 112 .unsupportedIf([=](const LegalityQuery &Query) { 113 return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits(); 114 }) 115 .legalIf([=](const LegalityQuery &Query) { 116 const LLT &Ty0 = Query.Types[0]; 117 const LLT &Ty1 = Query.Types[1]; 118 return (Ty0.getSizeInBits() % 32 == 0) && 119 (Ty1.getSizeInBits() % 32 == 0); 120 }); 121 122 computeTables(); 123 } 124