1//===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===------------------------------------------------------------===//
8
9include "llvm/TableGen/SearchableTable.td"
10include "llvm/Target/Target.td"
11include "AMDGPUFeatures.td"
12
13def p0 : PtrValueType<i64, 0>;
14def p1 : PtrValueType<i64, 1>;
15def p2 : PtrValueType<i32, 2>;
16def p3 : PtrValueType<i32, 3>;
17def p4 : PtrValueType<i64, 4>;
18def p5 : PtrValueType<i32, 5>;
19def p6 : PtrValueType<i32, 6>;
20
21class BoolToList<bit Value> {
22  list<int> ret = !if(Value, [1]<int>, []<int>);
23}
24
25//===------------------------------------------------------------===//
26// Subtarget Features (device properties)
27//===------------------------------------------------------------===//
28
29def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf",
30  "FastFMAF32",
31  "true",
32  "Assuming f32 fma is at least as fast as mul + add"
33>;
34
35def FeatureFastDenormalF32 : SubtargetFeature<"fast-denormal-f32",
36  "FastDenormalF32",
37  "true",
38  "Enabling denormals does not cause f32 instructions to run at f64 rates"
39>;
40
41def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128",
42  "MIMG_R128",
43  "true",
44  "Support 128-bit texture resources"
45>;
46
47def HalfRate64Ops : SubtargetFeature<"half-rate-64-ops",
48  "HalfRate64Ops",
49  "true",
50  "Most fp64 instructions are half rate instead of quarter"
51>;
52
53def FullRate64Ops : SubtargetFeature<"full-rate-64-ops",
54  "FullRate64Ops",
55  "true",
56  "Most fp64 instructions are full rate"
57>;
58
59def FeatureFlatAddressSpace : SubtargetFeature<"flat-address-space",
60  "FlatAddressSpace",
61  "true",
62  "Support flat address space"
63>;
64
65def FeatureFlatInstOffsets : SubtargetFeature<"flat-inst-offsets",
66  "FlatInstOffsets",
67  "true",
68  "Flat instructions have immediate offset addressing mode"
69>;
70
71def FeatureFlatGlobalInsts : SubtargetFeature<"flat-global-insts",
72  "FlatGlobalInsts",
73  "true",
74  "Have global_* flat memory instructions"
75>;
76
77def FeatureFlatScratchInsts : SubtargetFeature<"flat-scratch-insts",
78  "FlatScratchInsts",
79  "true",
80  "Have scratch_* flat memory instructions"
81>;
82
83def FeatureScalarFlatScratchInsts : SubtargetFeature<"scalar-flat-scratch-insts",
84  "ScalarFlatScratchInsts",
85  "true",
86  "Have s_scratch_* flat memory instructions"
87>;
88
89def FeatureEnableFlatScratch : SubtargetFeature<"enable-flat-scratch",
90  "EnableFlatScratch",
91  "true",
92  "Use scratch_* flat memory instructions to access scratch"
93>;
94
95def FeatureAddNoCarryInsts : SubtargetFeature<"add-no-carry-insts",
96  "AddNoCarryInsts",
97  "true",
98  "Have VALU add/sub instructions without carry out"
99>;
100
101def FeatureUnalignedBufferAccess : SubtargetFeature<"unaligned-buffer-access",
102  "UnalignedBufferAccess",
103  "true",
104  "Hardware supports unaligned global loads and stores"
105>;
106
107def FeatureTrapHandler: SubtargetFeature<"trap-handler",
108  "TrapHandler",
109  "true",
110  "Trap handler support"
111>;
112
113def FeatureUnalignedScratchAccess : SubtargetFeature<"unaligned-scratch-access",
114  "UnalignedScratchAccess",
115  "true",
116  "Support unaligned scratch loads and stores"
117>;
118
119def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
120  "UnalignedDSAccess",
121  "true",
122  "Hardware supports unaligned local and region loads and stores"
123>;
124
125def FeatureApertureRegs : SubtargetFeature<"aperture-regs",
126  "HasApertureRegs",
127  "true",
128  "Has Memory Aperture Base and Size Registers"
129>;
130
131def FeatureMadMixInsts : SubtargetFeature<"mad-mix-insts",
132  "HasMadMixInsts",
133  "true",
134  "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
135>;
136
137def FeatureFmaMixInsts : SubtargetFeature<"fma-mix-insts",
138  "HasFmaMixInsts",
139  "true",
140  "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions"
141>;
142
143def FeatureSupportsXNACK : SubtargetFeature<"xnack-support",
144  "SupportsXNACK",
145  "true",
146  "Hardware supports XNACK"
147>;
148
149// XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support
150// XNACK. The current default kernel driver setting is:
151// - graphics ring: XNACK disabled
152// - compute ring: XNACK enabled
153//
154// If XNACK is enabled, the VMEM latency can be worse.
155// If XNACK is disabled, the 2 SGPRs can be used for general purposes.
156def FeatureXNACK : SubtargetFeature<"xnack",
157  "EnableXNACK",
158  "true",
159  "Enable XNACK support"
160>;
161
162def FeatureTgSplit : SubtargetFeature<"tgsplit",
163  "EnableTgSplit",
164  "true",
165  "Enable threadgroup split execution"
166>;
167
168def FeatureCuMode : SubtargetFeature<"cumode",
169  "EnableCuMode",
170  "true",
171  "Enable CU wavefront execution mode"
172>;
173
174def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
175  "SGPRInitBug",
176  "true",
177  "VI SGPR initialization bug requiring a fixed SGPR allocation size"
178>;
179
180def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
181  "LDSMisalignedBug",
182  "true",
183  "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode"
184>;
185
186def FeatureMFMAInlineLiteralBug : SubtargetFeature<"mfma-inline-literal-bug",
187  "HasMFMAInlineLiteralBug",
188  "true",
189  "MFMA cannot use inline literal as SrcC"
190>;
191
192def FeatureVcmpxPermlaneHazard : SubtargetFeature<"vcmpx-permlane-hazard",
193  "HasVcmpxPermlaneHazard",
194  "true",
195  "TODO: describe me"
196>;
197
198def FeatureVMEMtoScalarWriteHazard : SubtargetFeature<"vmem-to-scalar-write-hazard",
199  "HasVMEMtoScalarWriteHazard",
200  "true",
201  "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution."
202>;
203
204def FeatureSMEMtoVectorWriteHazard : SubtargetFeature<"smem-to-vector-write-hazard",
205  "HasSMEMtoVectorWriteHazard",
206  "true",
207  "s_load_dword followed by v_cmp page faults"
208>;
209
210def FeatureInstFwdPrefetchBug : SubtargetFeature<"inst-fwd-prefetch-bug",
211  "HasInstFwdPrefetchBug",
212  "true",
213  "S_INST_PREFETCH instruction causes shader to hang"
214>;
215
216def FeatureVcmpxExecWARHazard : SubtargetFeature<"vcmpx-exec-war-hazard",
217  "HasVcmpxExecWARHazard",
218  "true",
219  "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)"
220>;
221
222def FeatureLdsBranchVmemWARHazard : SubtargetFeature<"lds-branch-vmem-war-hazard",
223  "HasLdsBranchVmemWARHazard",
224  "true",
225  "Switching between LDS and VMEM-tex not waiting VM_VSRC=0"
226>;
227
228def FeatureNSAtoVMEMBug : SubtargetFeature<"nsa-to-vmem-bug",
229  "HasNSAtoVMEMBug",
230  "true",
231  "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero"
232>;
233
234def FeatureNSAClauseBug : SubtargetFeature<"nsa-clause-bug",
235  "HasNSAClauseBug",
236  "true",
237  "MIMG-NSA in a hard clause has unpredictable results on GFX10.1"
238>;
239
240def FeatureFlatSegmentOffsetBug : SubtargetFeature<"flat-segment-offset-bug",
241  "HasFlatSegmentOffsetBug",
242  "true",
243  "GFX10 bug where inst_offset is ignored when flat instructions access global memory"
244>;
245
246def FeatureNegativeScratchOffsetBug : SubtargetFeature<"negative-scratch-offset-bug",
247  "NegativeScratchOffsetBug",
248  "true",
249  "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9"
250>;
251
252def FeatureNegativeUnalignedScratchOffsetBug : SubtargetFeature<"negative-unaligned-scratch-offset-bug",
253  "NegativeUnalignedScratchOffsetBug",
254  "true",
255  "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10"
256>;
257
258def FeatureOffset3fBug : SubtargetFeature<"offset-3f-bug",
259  "HasOffset3fBug",
260  "true",
261  "Branch offset of 3f hardware bug"
262>;
263
264def FeatureImageStoreD16Bug : SubtargetFeature<"image-store-d16-bug",
265  "HasImageStoreD16Bug",
266  "true",
267  "Image Store D16 hardware bug"
268>;
269
270def FeatureImageGather4D16Bug : SubtargetFeature<"image-gather4-d16-bug",
271  "HasImageGather4D16Bug",
272  "true",
273  "Image Gather4 D16 hardware bug"
274>;
275
276class SubtargetFeatureLDSBankCount <int Value> : SubtargetFeature <
277  "ldsbankcount"#Value,
278  "LDSBankCount",
279  !cast<string>(Value),
280  "The number of LDS banks per compute unit."
281>;
282
283def FeatureLDSBankCount16 : SubtargetFeatureLDSBankCount<16>;
284def FeatureLDSBankCount32 : SubtargetFeatureLDSBankCount<32>;
285
286def FeatureGCN3Encoding : SubtargetFeature<"gcn3-encoding",
287  "GCN3Encoding",
288  "true",
289  "Encoding format for VI"
290>;
291
292def FeatureCIInsts : SubtargetFeature<"ci-insts",
293  "CIInsts",
294  "true",
295  "Additional instructions for CI+"
296>;
297
298def FeatureGFX8Insts : SubtargetFeature<"gfx8-insts",
299  "GFX8Insts",
300  "true",
301  "Additional instructions for GFX8+"
302>;
303
304def FeatureGFX9Insts : SubtargetFeature<"gfx9-insts",
305  "GFX9Insts",
306  "true",
307  "Additional instructions for GFX9+"
308>;
309
310def FeatureGFX90AInsts : SubtargetFeature<"gfx90a-insts",
311  "GFX90AInsts",
312  "true",
313  "Additional instructions for GFX90A+"
314>;
315
316def FeatureGFX940Insts : SubtargetFeature<"gfx940-insts",
317  "GFX940Insts",
318  "true",
319  "Additional instructions for GFX940+"
320>;
321
322def FeatureGFX10Insts : SubtargetFeature<"gfx10-insts",
323  "GFX10Insts",
324  "true",
325  "Additional instructions for GFX10+"
326>;
327
328def FeatureGFX11Insts : SubtargetFeature<"gfx11-insts",
329  "GFX11Insts",
330  "true",
331  "Additional instructions for GFX11+"
332>;
333
334def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts",
335  "GFX10_3Insts",
336  "true",
337  "Additional instructions for GFX10.3"
338>;
339
340def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts",
341  "GFX7GFX8GFX9Insts",
342  "true",
343  "Instructions shared in GFX7, GFX8, GFX9"
344>;
345
346def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
347  "HasSMemRealTime",
348  "true",
349  "Has s_memrealtime instruction"
350>;
351
352def FeatureInv2PiInlineImm : SubtargetFeature<"inv-2pi-inline-imm",
353  "HasInv2PiInlineImm",
354  "true",
355  "Has 1 / (2 * pi) as inline immediate"
356>;
357
358def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
359  "Has16BitInsts",
360  "true",
361  "Has i16/f16 instructions"
362>;
363
364def FeatureTrue16BitInsts : SubtargetFeature<"true16",
365  "HasTrue16BitInsts",
366  "true",
367  "True 16-bit operand instructions"
368>;
369
370def FeatureVOP3P : SubtargetFeature<"vop3p",
371  "HasVOP3PInsts",
372  "true",
373  "Has VOP3P packed instructions"
374>;
375
376def FeatureMovrel : SubtargetFeature<"movrel",
377  "HasMovrel",
378  "true",
379  "Has v_movrel*_b32 instructions"
380>;
381
382def FeatureVGPRIndexMode : SubtargetFeature<"vgpr-index-mode",
383  "HasVGPRIndexMode",
384  "true",
385  "Has VGPR mode register indexing"
386>;
387
388def FeatureScalarStores : SubtargetFeature<"scalar-stores",
389  "HasScalarStores",
390  "true",
391  "Has store scalar memory instructions"
392>;
393
394def FeatureScalarAtomics : SubtargetFeature<"scalar-atomics",
395  "HasScalarAtomics",
396  "true",
397  "Has atomic scalar memory instructions"
398>;
399
400def FeatureSDWA : SubtargetFeature<"sdwa",
401  "HasSDWA",
402  "true",
403  "Support SDWA (Sub-DWORD Addressing) extension"
404>;
405
406def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
407  "HasSDWAOmod",
408  "true",
409  "Support OMod with SDWA (Sub-DWORD Addressing) extension"
410>;
411
412def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
413  "HasSDWAScalar",
414  "true",
415  "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
416>;
417
418def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
419  "HasSDWASdst",
420  "true",
421  "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
422>;
423
424def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
425  "HasSDWAMac",
426  "true",
427  "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
428>;
429
430def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
431  "HasSDWAOutModsVOPC",
432  "true",
433  "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
434>;
435
436def FeatureDPP : SubtargetFeature<"dpp",
437  "HasDPP",
438  "true",
439  "Support DPP (Data Parallel Primitives) extension"
440>;
441
442// DPP8 allows arbitrary cross-lane swizzling within groups of 8 lanes.
443def FeatureDPP8 : SubtargetFeature<"dpp8",
444  "HasDPP8",
445  "true",
446  "Support DPP8 (Data Parallel Primitives) extension"
447>;
448
449def Feature64BitDPP : SubtargetFeature<"dpp-64bit",
450  "Has64BitDPP",
451  "true",
452  "Support DPP (Data Parallel Primitives) extension"
453>;
454
455def FeaturePackedFP32Ops : SubtargetFeature<"packed-fp32-ops",
456  "HasPackedFP32Ops",
457  "true",
458  "Support packed fp32 instructions"
459>;
460
461def FeatureR128A16 : SubtargetFeature<"r128-a16",
462  "HasR128A16",
463  "true",
464  "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128"
465>;
466
467def FeatureGFX10A16 : SubtargetFeature<"a16",
468  "HasGFX10A16",
469  "true",
470  "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands"
471>;
472
473def FeatureG16 : SubtargetFeature<"g16",
474  "HasG16",
475  "true",
476  "Support G16 for 16-bit gradient image operands"
477>;
478
479def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding",
480  "HasNSAEncoding",
481  "true",
482  "Support NSA encoding for image instructions"
483>;
484
485def FeatureImageInsts : SubtargetFeature<"image-insts",
486  "HasImageInsts",
487  "true",
488  "Support image instructions"
489>;
490
491def FeatureExtendedImageInsts : SubtargetFeature<"extended-image-insts",
492  "HasExtendedImageInsts",
493  "true",
494  "Support mips != 0, lod != 0, gather4, and get_lod"
495>;
496
497def FeatureGFX10_AEncoding : SubtargetFeature<"gfx10_a-encoding",
498  "GFX10_AEncoding",
499  "true",
500  "Has BVH ray tracing instructions"
501>;
502
503def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding",
504  "GFX10_BEncoding",
505  "true",
506  "Encoding format GFX10_B"
507>;
508
509def FeatureIntClamp : SubtargetFeature<"int-clamp-insts",
510  "HasIntClamp",
511  "true",
512  "Support clamp for integer destination"
513>;
514
515def FeatureUnpackedD16VMem : SubtargetFeature<"unpacked-d16-vmem",
516  "HasUnpackedD16VMem",
517  "true",
518  "Has unpacked d16 vmem instructions"
519>;
520
521def FeatureDLInsts : SubtargetFeature<"dl-insts",
522  "HasDLInsts",
523  "true",
524  "Has v_fmac_f32 and v_xnor_b32 instructions"
525>;
526
527def FeatureDot1Insts : SubtargetFeature<"dot1-insts",
528  "HasDot1Insts",
529  "true",
530  "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions"
531>;
532
533def FeatureDot2Insts : SubtargetFeature<"dot2-insts",
534  "HasDot2Insts",
535  "true",
536  "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions"
537>;
538
539def FeatureDot3Insts : SubtargetFeature<"dot3-insts",
540  "HasDot3Insts",
541  "true",
542  "Has v_dot8c_i32_i4 instruction"
543>;
544
545def FeatureDot4Insts : SubtargetFeature<"dot4-insts",
546  "HasDot4Insts",
547  "true",
548  "Has v_dot2c_i32_i16 instruction"
549>;
550
551def FeatureDot5Insts : SubtargetFeature<"dot5-insts",
552  "HasDot5Insts",
553  "true",
554  "Has v_dot2c_f32_f16 instruction"
555>;
556
557def FeatureDot6Insts : SubtargetFeature<"dot6-insts",
558  "HasDot6Insts",
559  "true",
560  "Has v_dot4c_i32_i8 instruction"
561>;
562
563def FeatureDot7Insts : SubtargetFeature<"dot7-insts",
564  "HasDot7Insts",
565  "true",
566  "Has v_dot2_f32_f16, v_dot4_u32_u8, v_dot8_u32_u4 instructions"
567>;
568
569def FeatureDot8Insts : SubtargetFeature<"dot8-insts",
570  "HasDot8Insts",
571  "true",
572  "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16, "
573  "v_dot4_i32_iu8, v_dot8_i32_iu4 instructions"
574>;
575
576def FeatureMAIInsts : SubtargetFeature<"mai-insts",
577  "HasMAIInsts",
578  "true",
579  "Has mAI instructions"
580>;
581
582def FeaturePkFmacF16Inst : SubtargetFeature<"pk-fmac-f16-inst",
583  "HasPkFmacF16Inst",
584  "true",
585  "Has v_pk_fmac_f16 instruction"
586>;
587
588def FeatureAtomicFaddRtnInsts : SubtargetFeature<"atomic-fadd-rtn-insts",
589  "HasAtomicFaddRtnInsts",
590  "true",
591  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
592  "return original value",
593  [FeatureFlatGlobalInsts]
594>;
595
596def FeatureAtomicFaddNoRtnInsts : SubtargetFeature<"atomic-fadd-no-rtn-insts",
597  "HasAtomicFaddNoRtnInsts",
598  "true",
599  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
600  "don't return original value",
601  [FeatureFlatGlobalInsts]
602>;
603
604def FeatureAtomicPkFaddNoRtnInsts
605  : SubtargetFeature<"atomic-pk-fadd-no-rtn-insts",
606  "HasAtomicPkFaddNoRtnInsts",
607  "true",
608  "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that "
609  "don't return original value",
610  [FeatureFlatGlobalInsts]
611>;
612
613def FeatureSupportsSRAMECC : SubtargetFeature<"sramecc-support",
614  "SupportsSRAMECC",
615  "true",
616  "Hardware supports SRAMECC"
617>;
618
619def FeatureSRAMECC : SubtargetFeature<"sramecc",
620  "EnableSRAMECC",
621  "true",
622  "Enable SRAMECC"
623>;
624
625def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
626  "HasNoSdstCMPX",
627  "true",
628  "V_CMPX does not write VCC/SGPR in addition to EXEC"
629>;
630
631def FeatureVscnt : SubtargetFeature<"vscnt",
632  "HasVscnt",
633  "true",
634  "Has separate store vscnt counter"
635>;
636
637def FeatureGetWaveIdInst : SubtargetFeature<"get-wave-id-inst",
638  "HasGetWaveIdInst",
639  "true",
640  "Has s_get_waveid_in_workgroup instruction"
641>;
642
643def FeatureSMemTimeInst : SubtargetFeature<"s-memtime-inst",
644  "HasSMemTimeInst",
645  "true",
646  "Has s_memtime instruction"
647>;
648
649def FeatureShaderCyclesRegister : SubtargetFeature<"shader-cycles-register",
650  "HasShaderCyclesRegister",
651  "true",
652  "Has SHADER_CYCLES hardware register"
653>;
654
655def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts",
656  "HasMadMacF32Insts",
657  "true",
658  "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions"
659>;
660
661def FeatureDsSrc2Insts : SubtargetFeature<"ds-src2-insts",
662  "HasDsSrc2Insts",
663  "true",
664  "Has ds_*_src2 instructions"
665>;
666
667def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
668  "HasVOP3Literal",
669  "true",
670  "Can use one literal in VOP3"
671>;
672
673def FeatureNoDataDepHazard : SubtargetFeature<"no-data-dep-hazard",
674  "HasNoDataDepHazard",
675  "true",
676  "Does not need SW waitstates"
677>;
678
679class SubtargetFeatureNSAMaxSize <int Value> : SubtargetFeature <
680  "nsa-max-size-"#Value,
681  "NSAMaxSize",
682  !cast<string>(Value),
683  "The maximum non-sequential address size in VGPRs."
684>;
685
686def FeatureNSAMaxSize5 : SubtargetFeatureNSAMaxSize<5>;
687def FeatureNSAMaxSize13 : SubtargetFeatureNSAMaxSize<13>;
688
689def FeatureVOPD : SubtargetFeature<"vopd",
690  "HasVOPDInsts",
691  "true",
692  "Has VOPD dual issue wave32 instructions"
693>;
694
695//===------------------------------------------------------------===//
696// Subtarget Features (options and debugging)
697//===------------------------------------------------------------===//
698
699class FeatureMaxPrivateElementSize<int size> : SubtargetFeature<
700  "max-private-element-size-"#size,
701  "MaxPrivateElementSize",
702  !cast<string>(size),
703  "Maximum private access size may be "#size
704>;
705
706def FeatureMaxPrivateElementSize4 : FeatureMaxPrivateElementSize<4>;
707def FeatureMaxPrivateElementSize8 : FeatureMaxPrivateElementSize<8>;
708def FeatureMaxPrivateElementSize16 : FeatureMaxPrivateElementSize<16>;
709
710def FeatureDumpCode : SubtargetFeature <"DumpCode",
711  "DumpCode",
712  "true",
713  "Dump MachineInstrs in the CodeEmitter"
714>;
715
716def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
717  "DumpCode",
718  "true",
719  "Dump MachineInstrs in the CodeEmitter"
720>;
721
722// XXX - This should probably be removed once enabled by default
723def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",
724  "EnableLoadStoreOpt",
725  "true",
726  "Enable SI load/store optimizer pass"
727>;
728
729// Performance debugging feature. Allow using DS instruction immediate
730// offsets even if the base pointer can't be proven to be base. On SI,
731// base pointer values that won't give the same result as a 16-bit add
732// are not safe to fold, but this will override the conservative test
733// for the base pointer.
734def FeatureEnableUnsafeDSOffsetFolding : SubtargetFeature <
735  "unsafe-ds-offset-folding",
736  "EnableUnsafeDSOffsetFolding",
737  "true",
738  "Force using DS instruction immediate offsets on SI"
739>;
740
741def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler",
742  "EnableSIScheduler",
743  "true",
744  "Enable SI Machine Scheduler"
745>;
746
747def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
748  "EnableDS128",
749  "true",
750  "Use ds_{read|write}_b128"
751>;
752
753// Sparse texture support requires that all result registers are zeroed when
754// PRTStrictNull is set to true. This feature is turned on for all architectures
755// but is enabled as a feature in case there are situations where PRTStrictNull
756// is disabled by the driver.
757def FeatureEnablePRTStrictNull : SubtargetFeature<"enable-prt-strict-null",
758  "EnablePRTStrictNull",
759  "true",
760  "Enable zeroing of result registers for sparse texture fetches"
761>;
762
763// Unless +-flat-for-global is specified, turn on FlatForGlobal for
764// all OS-es on VI and newer hardware to avoid assertion failures due
765// to missing ADDR64 variants of MUBUF instructions.
766// FIXME: moveToVALU should be able to handle converting addr64 MUBUF
767// instructions.
768
769def FeatureFlatForGlobal : SubtargetFeature<"flat-for-global",
770  "FlatForGlobal",
771  "true",
772  "Force to generate flat instruction for global"
773>;
774
775def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
776  "auto-waitcnt-before-barrier",
777  "AutoWaitcntBeforeBarrier",
778  "true",
779  "Hardware automatically inserts waitcnt before barrier"
780>;
781
782def FeatureTrigReducedRange : SubtargetFeature<"trig-reduced-range",
783  "HasTrigReducedRange",
784  "true",
785  "Requires use of fract on arguments to trig instructions"
786>;
787
788// Alignment enforcement is controlled by a configuration register:
789// SH_MEM_CONFIG.alignment_mode
790def FeatureUnalignedAccessMode : SubtargetFeature<"unaligned-access-mode",
791  "UnalignedAccessMode",
792  "true",
793  "Enable unaligned global, local and region loads and stores if the hardware"
794  " supports it"
795>;
796
797def FeaturePackedTID : SubtargetFeature<"packed-tid",
798  "HasPackedTID",
799  "true",
800  "Workitem IDs are packed into v0 at kernel launch"
801>;
802
803def FeatureArchitectedFlatScratch : SubtargetFeature<"architected-flat-scratch",
804  "HasArchitectedFlatScratch",
805  "true",
806  "Flat Scratch register is a readonly SPI initialized architected register"
807>;
808
809// Dummy feature used to disable assembler instructions.
810def FeatureDisable : SubtargetFeature<"",
811  "FeatureDisable","true",
812  "Dummy feature to disable assembler instructions"
813>;
814
815class GCNSubtargetFeatureGeneration <string Value,
816                                     string FeatureName,
817                                     list<SubtargetFeature> Implies> :
818        SubtargetFeatureGeneration <Value, FeatureName, "GCNSubtarget", Implies>;
819
820def FeatureSouthernIslands : GCNSubtargetFeatureGeneration<"SOUTHERN_ISLANDS",
821    "southern-islands",
822  [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128,
823  FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts,
824  FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel,
825  FeatureTrigReducedRange, FeatureExtendedImageInsts, FeatureImageInsts
826  ]
827>;
828
829def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS",
830    "sea-islands",
831  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
832  FeatureWavefrontSize64, FeatureFlatAddressSpace,
833  FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange,
834  FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
835  FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureUnalignedBufferAccess,
836  FeatureImageInsts
837  ]
838>;
839
840def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
841  "volcanic-islands",
842  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
843   FeatureWavefrontSize64, FeatureFlatAddressSpace,
844   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
845   FeatureSMemRealTime, FeatureVGPRIndexMode, FeatureMovrel,
846   FeatureScalarStores, FeatureInv2PiInlineImm,
847   FeatureSDWA, FeatureSDWAOutModsVOPC, FeatureSDWAMac, FeatureDPP,
848   FeatureIntClamp, FeatureTrigReducedRange, FeatureGFX8Insts,
849   FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
850   FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureFastDenormalF32,
851   FeatureUnalignedBufferAccess, FeatureImageInsts
852  ]
853>;
854
855def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9",
856  "gfx9",
857  [FeatureFP64, FeatureLocalMemorySize65536,
858   FeatureWavefrontSize64, FeatureFlatAddressSpace,
859   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
860   FeatureSMemRealTime, FeatureScalarStores, FeatureInv2PiInlineImm,
861   FeatureApertureRegs, FeatureGFX9Insts, FeatureVOP3P, FeatureVGPRIndexMode,
862   FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
863   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
864   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
865   FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts,
866   FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16,
867   FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK,
868   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess,
869   FeatureNegativeScratchOffsetBug
870  ]
871>;
872
873def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
874  "gfx10",
875  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
876   FeatureFlatAddressSpace,
877   FeatureCIInsts, Feature16BitInsts,
878   FeatureSMemRealTime, FeatureInv2PiInlineImm,
879   FeatureApertureRegs, FeatureGFX9Insts, FeatureGFX10Insts, FeatureVOP3P,
880   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
881   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
882   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
883   FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts,
884   FeatureNoSdstCMPX, FeatureVscnt,
885   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
886   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
887   FeatureGFX10A16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureG16,
888   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess, FeatureImageInsts
889  ]
890>;
891
892def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
893  "gfx11",
894  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
895   FeatureFlatAddressSpace, Feature16BitInsts,
896   FeatureInv2PiInlineImm, FeatureApertureRegs,
897   FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
898   FeatureGFX10_AEncoding, FeatureGFX10_BEncoding, FeatureGFX10_3Insts,
899   FeatureGFX11Insts, FeatureVOP3P, FeatureVOPD, FeatureTrue16BitInsts,
900   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
901   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
902   FeatureAddNoCarryInsts, FeatureFmaMixInsts,
903   FeatureNoSdstCMPX, FeatureVscnt,
904   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
905   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
906   FeatureGFX10A16, FeatureFastDenormalF32, FeatureG16,
907   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess
908  ]
909>;
910
911class FeatureSet<list<SubtargetFeature> Features_> {
912  list<SubtargetFeature> Features = Features_;
913}
914
915def FeatureISAVersion6_0_0 : FeatureSet<[FeatureSouthernIslands,
916   FeatureFastFMAF32,
917   HalfRate64Ops,
918   FeatureLDSBankCount32]>;
919
920def FeatureISAVersion6_0_1 : FeatureSet<
921  [FeatureSouthernIslands,
922   FeatureLDSBankCount32]>;
923
924def FeatureISAVersion6_0_2 : FeatureSet<
925  [FeatureSouthernIslands,
926   FeatureLDSBankCount32]>;
927
928def FeatureISAVersion7_0_0 : FeatureSet<
929  [FeatureSeaIslands,
930   FeatureLDSBankCount32]>;
931
932def FeatureISAVersion7_0_1 : FeatureSet<
933  [FeatureSeaIslands,
934   HalfRate64Ops,
935   FeatureLDSBankCount32,
936   FeatureFastFMAF32]>;
937
938def FeatureISAVersion7_0_2 : FeatureSet<
939  [FeatureSeaIslands,
940   FeatureLDSBankCount16,
941   FeatureFastFMAF32]>;
942
943def FeatureISAVersion7_0_3 : FeatureSet<
944  [FeatureSeaIslands,
945   FeatureLDSBankCount16]>;
946
947def FeatureISAVersion7_0_4 : FeatureSet<
948  [FeatureSeaIslands,
949   FeatureLDSBankCount32]>;
950
951def FeatureISAVersion7_0_5 : FeatureSet<
952  [FeatureSeaIslands,
953   FeatureLDSBankCount16]>;
954
955def FeatureISAVersion8_0_1 : FeatureSet<
956  [FeatureVolcanicIslands,
957   FeatureFastFMAF32,
958   HalfRate64Ops,
959   FeatureLDSBankCount32,
960   FeatureSupportsXNACK,
961   FeatureUnpackedD16VMem]>;
962
963def FeatureISAVersion8_0_2 : FeatureSet<
964  [FeatureVolcanicIslands,
965   FeatureLDSBankCount32,
966   FeatureSGPRInitBug,
967   FeatureUnpackedD16VMem]>;
968
969def FeatureISAVersion8_0_3 : FeatureSet<
970  [FeatureVolcanicIslands,
971   FeatureLDSBankCount32,
972   FeatureUnpackedD16VMem]>;
973
974def FeatureISAVersion8_0_5 : FeatureSet<
975  [FeatureVolcanicIslands,
976   FeatureLDSBankCount32,
977   FeatureSGPRInitBug,
978   FeatureUnpackedD16VMem]>;
979
980def FeatureISAVersion8_1_0 : FeatureSet<
981  [FeatureVolcanicIslands,
982   FeatureLDSBankCount16,
983   FeatureSupportsXNACK,
984   FeatureImageStoreD16Bug,
985   FeatureImageGather4D16Bug]>;
986
987def FeatureISAVersion9_0_0 : FeatureSet<
988  [FeatureGFX9,
989   FeatureMadMixInsts,
990   FeatureLDSBankCount32,
991   FeatureDsSrc2Insts,
992   FeatureExtendedImageInsts,
993   FeatureImageInsts,
994   FeatureMadMacF32Insts,
995   FeatureImageGather4D16Bug]>;
996
997def FeatureISAVersion9_0_2 : FeatureSet<
998  [FeatureGFX9,
999   FeatureMadMixInsts,
1000   FeatureLDSBankCount32,
1001   FeatureDsSrc2Insts,
1002   FeatureExtendedImageInsts,
1003   FeatureImageInsts,
1004   FeatureMadMacF32Insts,
1005   FeatureImageGather4D16Bug]>;
1006
1007def FeatureISAVersion9_0_4 : FeatureSet<
1008  [FeatureGFX9,
1009   FeatureLDSBankCount32,
1010   FeatureDsSrc2Insts,
1011   FeatureExtendedImageInsts,
1012   FeatureImageInsts,
1013   FeatureMadMacF32Insts,
1014   FeatureFmaMixInsts,
1015   FeatureImageGather4D16Bug]>;
1016
1017def FeatureISAVersion9_0_6 : FeatureSet<
1018  [FeatureGFX9,
1019   HalfRate64Ops,
1020   FeatureFmaMixInsts,
1021   FeatureLDSBankCount32,
1022   FeatureDsSrc2Insts,
1023   FeatureExtendedImageInsts,
1024   FeatureImageInsts,
1025   FeatureMadMacF32Insts,
1026   FeatureDLInsts,
1027   FeatureDot1Insts,
1028   FeatureDot2Insts,
1029   FeatureDot7Insts,
1030   FeatureSupportsSRAMECC,
1031   FeatureImageGather4D16Bug]>;
1032
1033def FeatureISAVersion9_0_8 : FeatureSet<
1034  [FeatureGFX9,
1035   HalfRate64Ops,
1036   FeatureFmaMixInsts,
1037   FeatureLDSBankCount32,
1038   FeatureDsSrc2Insts,
1039   FeatureExtendedImageInsts,
1040   FeatureImageInsts,
1041   FeatureMadMacF32Insts,
1042   FeatureDLInsts,
1043   FeatureDot1Insts,
1044   FeatureDot2Insts,
1045   FeatureDot3Insts,
1046   FeatureDot4Insts,
1047   FeatureDot5Insts,
1048   FeatureDot6Insts,
1049   FeatureDot7Insts,
1050   FeatureMAIInsts,
1051   FeaturePkFmacF16Inst,
1052   FeatureAtomicFaddNoRtnInsts,
1053   FeatureAtomicPkFaddNoRtnInsts,
1054   FeatureSupportsSRAMECC,
1055   FeatureMFMAInlineLiteralBug,
1056   FeatureImageGather4D16Bug]>;
1057
1058def FeatureISAVersion9_0_9 : FeatureSet<
1059  [FeatureGFX9,
1060   FeatureMadMixInsts,
1061   FeatureLDSBankCount32,
1062   FeatureDsSrc2Insts,
1063   FeatureExtendedImageInsts,
1064   FeatureImageInsts,
1065   FeatureMadMacF32Insts,
1066   FeatureImageGather4D16Bug]>;
1067
1068def FeatureISAVersion9_0_A : FeatureSet<
1069  [FeatureGFX9,
1070   FeatureGFX90AInsts,
1071   FeatureFmaMixInsts,
1072   FeatureLDSBankCount32,
1073   FeatureDLInsts,
1074   FeatureDot1Insts,
1075   FeatureDot2Insts,
1076   FeatureDot3Insts,
1077   FeatureDot4Insts,
1078   FeatureDot5Insts,
1079   FeatureDot6Insts,
1080   FeatureDot7Insts,
1081   Feature64BitDPP,
1082   FeaturePackedFP32Ops,
1083   FeatureMAIInsts,
1084   FeaturePkFmacF16Inst,
1085   FeatureAtomicFaddRtnInsts,
1086   FeatureAtomicFaddNoRtnInsts,
1087   FeatureAtomicPkFaddNoRtnInsts,
1088   FeatureImageInsts,
1089   FeatureMadMacF32Insts,
1090   FeatureSupportsSRAMECC,
1091   FeaturePackedTID,
1092   FullRate64Ops]>;
1093
1094def FeatureISAVersion9_0_C : FeatureSet<
1095  [FeatureGFX9,
1096   FeatureMadMixInsts,
1097   FeatureLDSBankCount32,
1098   FeatureDsSrc2Insts,
1099   FeatureExtendedImageInsts,
1100   FeatureImageInsts,
1101   FeatureMadMacF32Insts,
1102   FeatureImageGather4D16Bug]>;
1103
1104def FeatureISAVersion9_4_0 : FeatureSet<
1105  [FeatureGFX9,
1106   FeatureGFX90AInsts,
1107   FeatureGFX940Insts,
1108   FeatureFmaMixInsts,
1109   FeatureLDSBankCount32,
1110   FeatureDLInsts,
1111   FeatureDot1Insts,
1112   FeatureDot2Insts,
1113   FeatureDot3Insts,
1114   FeatureDot4Insts,
1115   FeatureDot5Insts,
1116   FeatureDot6Insts,
1117   FeatureDot7Insts,
1118   Feature64BitDPP,
1119   FeaturePackedFP32Ops,
1120   FeatureMAIInsts,
1121   FeaturePkFmacF16Inst,
1122   FeatureAtomicFaddRtnInsts,
1123   FeatureAtomicFaddNoRtnInsts,
1124   FeatureAtomicPkFaddNoRtnInsts,
1125   FeatureSupportsSRAMECC,
1126   FeaturePackedTID,
1127   FeatureArchitectedFlatScratch,
1128   FullRate64Ops]>;
1129
1130// TODO: Organize more features into groups.
1131def FeatureGroup {
1132  // Bugs present on gfx10.1.
1133  list<SubtargetFeature> GFX10_1_Bugs = [
1134    FeatureVcmpxPermlaneHazard,
1135    FeatureVMEMtoScalarWriteHazard,
1136    FeatureSMEMtoVectorWriteHazard,
1137    FeatureInstFwdPrefetchBug,
1138    FeatureVcmpxExecWARHazard,
1139    FeatureLdsBranchVmemWARHazard,
1140    FeatureNSAtoVMEMBug,
1141    FeatureNSAClauseBug,
1142    FeatureOffset3fBug,
1143    FeatureFlatSegmentOffsetBug,
1144    FeatureNegativeUnalignedScratchOffsetBug
1145   ];
1146}
1147
1148def FeatureISAVersion10_1_0 : FeatureSet<
1149  !listconcat(FeatureGroup.GFX10_1_Bugs,
1150    [FeatureGFX10,
1151     FeatureLDSBankCount32,
1152     FeatureDLInsts,
1153     FeatureNSAEncoding,
1154     FeatureNSAMaxSize5,
1155     FeatureWavefrontSize32,
1156     FeatureScalarStores,
1157     FeatureScalarAtomics,
1158     FeatureScalarFlatScratchInsts,
1159     FeatureGetWaveIdInst,
1160     FeatureMadMacF32Insts,
1161     FeatureDsSrc2Insts,
1162     FeatureLdsMisalignedBug,
1163     FeatureSupportsXNACK])>;
1164
1165def FeatureISAVersion10_1_1 : FeatureSet<
1166  !listconcat(FeatureGroup.GFX10_1_Bugs,
1167    [FeatureGFX10,
1168     FeatureLDSBankCount32,
1169     FeatureDLInsts,
1170     FeatureDot1Insts,
1171     FeatureDot2Insts,
1172     FeatureDot5Insts,
1173     FeatureDot6Insts,
1174     FeatureDot7Insts,
1175     FeatureNSAEncoding,
1176     FeatureNSAMaxSize5,
1177     FeatureWavefrontSize32,
1178     FeatureScalarStores,
1179     FeatureScalarAtomics,
1180     FeatureScalarFlatScratchInsts,
1181     FeatureGetWaveIdInst,
1182     FeatureMadMacF32Insts,
1183     FeatureDsSrc2Insts,
1184     FeatureLdsMisalignedBug,
1185     FeatureSupportsXNACK])>;
1186
1187def FeatureISAVersion10_1_2 : FeatureSet<
1188  !listconcat(FeatureGroup.GFX10_1_Bugs,
1189    [FeatureGFX10,
1190     FeatureLDSBankCount32,
1191     FeatureDLInsts,
1192     FeatureDot1Insts,
1193     FeatureDot2Insts,
1194     FeatureDot5Insts,
1195     FeatureDot6Insts,
1196     FeatureDot7Insts,
1197     FeatureNSAEncoding,
1198     FeatureNSAMaxSize5,
1199     FeatureWavefrontSize32,
1200     FeatureScalarStores,
1201     FeatureScalarAtomics,
1202     FeatureScalarFlatScratchInsts,
1203     FeatureGetWaveIdInst,
1204     FeatureMadMacF32Insts,
1205     FeatureDsSrc2Insts,
1206     FeatureLdsMisalignedBug,
1207     FeatureSupportsXNACK])>;
1208
1209def FeatureISAVersion10_1_3 : FeatureSet<
1210  !listconcat(FeatureGroup.GFX10_1_Bugs,
1211    [FeatureGFX10,
1212     FeatureGFX10_AEncoding,
1213     FeatureLDSBankCount32,
1214     FeatureDLInsts,
1215     FeatureNSAEncoding,
1216     FeatureNSAMaxSize5,
1217     FeatureWavefrontSize32,
1218     FeatureScalarStores,
1219     FeatureScalarAtomics,
1220     FeatureScalarFlatScratchInsts,
1221     FeatureGetWaveIdInst,
1222     FeatureMadMacF32Insts,
1223     FeatureDsSrc2Insts,
1224     FeatureLdsMisalignedBug,
1225     FeatureSupportsXNACK])>;
1226
1227def FeatureISAVersion10_3_0 : FeatureSet<
1228  [FeatureGFX10,
1229   FeatureGFX10_AEncoding,
1230   FeatureGFX10_BEncoding,
1231   FeatureGFX10_3Insts,
1232   FeatureLDSBankCount32,
1233   FeatureDLInsts,
1234   FeatureDot1Insts,
1235   FeatureDot2Insts,
1236   FeatureDot5Insts,
1237   FeatureDot6Insts,
1238   FeatureDot7Insts,
1239   FeatureNSAEncoding,
1240   FeatureNSAMaxSize13,
1241   FeatureWavefrontSize32,
1242   FeatureShaderCyclesRegister]>;
1243
1244def FeatureISAVersion11_Common : FeatureSet<
1245  [FeatureGFX11,
1246   FeatureLDSBankCount32,
1247   FeatureDLInsts,
1248   FeatureDot5Insts,
1249   FeatureDot7Insts,
1250   FeatureDot8Insts,
1251   FeatureNSAEncoding,
1252   FeatureNSAMaxSize5,
1253   FeatureWavefrontSize32,
1254   FeatureShaderCyclesRegister,
1255   FeatureArchitectedFlatScratch,
1256   FeatureAtomicFaddRtnInsts,
1257   FeatureAtomicFaddNoRtnInsts,
1258   FeatureImageInsts,
1259   FeaturePackedTID,
1260   FeatureVcmpxPermlaneHazard]>;
1261
1262// Features for GFX 11.0.0 and 11.0.1
1263def FeatureISAVersion11_0 : FeatureSet<
1264  !listconcat(FeatureISAVersion11_Common.Features,
1265    [])>;
1266
1267def FeatureISAVersion11_0_2 : FeatureSet<
1268  !listconcat(FeatureISAVersion11_Common.Features,
1269    [])>;
1270
1271//===----------------------------------------------------------------------===//
1272
1273def AMDGPUInstrInfo : InstrInfo {
1274  let guessInstructionProperties = 1;
1275  let noNamedPositionallyEncodedOperands = 1;
1276}
1277
1278def AMDGPUAsmParser : AsmParser {
1279  // Some of the R600 registers have the same name, so this crashes.
1280  // For example T0_XYZW and T0_XY both have the asm name T0.
1281  let ShouldEmitMatchRegisterName = 0;
1282}
1283
1284def AMDGPUAsmWriter : AsmWriter {
1285  int PassSubtarget = 1;
1286}
1287
1288def AMDGPUAsmVariants {
1289  string Default = "Default";
1290  int Default_ID = 0;
1291  string VOP3 = "VOP3";
1292  int VOP3_ID = 1;
1293  string SDWA = "SDWA";
1294  int SDWA_ID = 2;
1295  string SDWA9 = "SDWA9";
1296  int SDWA9_ID = 3;
1297  string DPP = "DPP";
1298  int DPP_ID = 4;
1299  string Disable = "Disable";
1300  int Disable_ID = 5;
1301}
1302
1303def DefaultAMDGPUAsmParserVariant : AsmParserVariant {
1304  let Variant = AMDGPUAsmVariants.Default_ID;
1305  let Name = AMDGPUAsmVariants.Default;
1306}
1307
1308def VOP3AsmParserVariant : AsmParserVariant {
1309  let Variant = AMDGPUAsmVariants.VOP3_ID;
1310  let Name = AMDGPUAsmVariants.VOP3;
1311}
1312
1313def SDWAAsmParserVariant : AsmParserVariant {
1314  let Variant = AMDGPUAsmVariants.SDWA_ID;
1315  let Name = AMDGPUAsmVariants.SDWA;
1316}
1317
1318def SDWA9AsmParserVariant : AsmParserVariant {
1319  let Variant = AMDGPUAsmVariants.SDWA9_ID;
1320  let Name = AMDGPUAsmVariants.SDWA9;
1321}
1322
1323def DPPAsmParserVariant : AsmParserVariant {
1324  let Variant = AMDGPUAsmVariants.DPP_ID;
1325  let Name = AMDGPUAsmVariants.DPP;
1326}
1327
1328def AMDGPU : Target {
1329  // Pull in Instruction Info:
1330  let InstructionSet = AMDGPUInstrInfo;
1331  let AssemblyParsers = [AMDGPUAsmParser];
1332  let AssemblyParserVariants = [DefaultAMDGPUAsmParserVariant,
1333                                VOP3AsmParserVariant,
1334                                SDWAAsmParserVariant,
1335                                SDWA9AsmParserVariant,
1336                                DPPAsmParserVariant];
1337  let AssemblyWriters = [AMDGPUAsmWriter];
1338  let AllowRegisterRenaming = 1;
1339}
1340
1341// Dummy Instruction itineraries for pseudo instructions
1342def ALU_NULL : FuncUnit;
1343def NullALU : InstrItinClass;
1344
1345//===----------------------------------------------------------------------===//
1346// Predicate helper class
1347//===----------------------------------------------------------------------===//
1348
1349def isGFX6 :
1350  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
1351  AssemblerPredicate<(all_of FeatureSouthernIslands)>;
1352
1353def isGFX6GFX7 :
1354  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1355            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1356  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX10Insts))>;
1357
1358def isGFX6GFX7GFX10 :
1359  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1360            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1361            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1362  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX11Insts))>;
1363
1364def isGFX6GFX7GFX10Plus :
1365  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1366            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1367            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1368  AssemblerPredicate<(all_of (not FeatureGCN3Encoding))>;
1369
1370def isGFX7Only :
1371  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1372  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX10Insts))>;
1373
1374def isGFX7GFX10 :
1375  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1376            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1377  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX11Insts))>;
1378
1379def isGFX7GFX10GFX11 :
1380  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1381            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1382            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1383  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts)>;
1384
1385def isGFX7GFX8GFX9 :
1386  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1387            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1388            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1389  AssemblerPredicate<(all_of FeatureGFX7GFX8GFX9Insts)>;
1390
1391def isGFX6GFX7GFX8GFX9 :
1392  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1393            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1394            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1395            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1396  AssemblerPredicate<(all_of (not FeatureGFX10Insts))>;
1397
1398def isGFX6GFX7GFX8GFX9NotGFX90A :
1399  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1400            "(Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1401            " Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1402            " Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1403            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1404  AssemblerPredicate<(all_of (not FeatureGFX10Insts), (not FeatureGFX90AInsts))>;
1405
1406def isGFX6GFX7GFX8GFX9GFX10 :
1407  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1408            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1409            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1410            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1411            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1412  AssemblerPredicate<(all_of (not FeatureGFX11Insts))>;
1413
1414def isGFX7GFX8GFX9GFX10 :
1415  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1416            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1417            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1418            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1419  AssemblerPredicate<(all_of FeatureCIInsts, (not FeatureGFX11Insts))>;
1420
1421def isGFX7Plus :
1422  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">,
1423  AssemblerPredicate<(all_of FeatureCIInsts)>;
1424
1425def isGFX8Plus :
1426  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1427  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1428
1429def isGFX8Only : Predicate<"Subtarget->getGeneration() =="
1430                           "AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1431  AssemblerPredicate <(all_of FeatureVolcanicIslands)>;
1432
1433def isGFX9Plus :
1434  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1435  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1436
1437def isGFX9Only : Predicate <
1438  "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1439  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts)>;
1440
1441def isGCN3ExcludingGFX90A :
1442  Predicate<"Subtarget->isGCN3Encoding() && !Subtarget->hasGFX90AInsts()">,
1443  AssemblerPredicate<(all_of FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1444
1445def isGFX90APlus :
1446  Predicate<"Subtarget->hasGFX90AInsts()">,
1447  AssemblerPredicate<(all_of FeatureGFX90AInsts)>;
1448
1449def isNotGFX90APlus :
1450  Predicate<"!Subtarget->hasGFX90AInsts()">,
1451  AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
1452
1453def isGFX8GFX9NotGFX90A :
1454  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1455            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1456            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1457  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1458
1459def isGFX90AOnly :
1460  Predicate<"Subtarget->hasGFX90AInsts() && !Subtarget->hasGFX940Insts()">,
1461  AssemblerPredicate<(all_of FeatureGFX90AInsts, (not FeatureGFX940Insts))>;
1462
1463def isGFX908orGFX90A :
1464  Predicate<"Subtarget->hasMAIInsts() && !Subtarget->hasGFX940Insts()">,
1465  AssemblerPredicate<(all_of FeatureMAIInsts, (not FeatureGFX940Insts))>;
1466
1467def isGFX940Plus :
1468  Predicate<"Subtarget->hasGFX940Insts()">,
1469  AssemblerPredicate<(all_of FeatureGFX940Insts)>;
1470
1471def isGFX940GFX11Plus :
1472  Predicate<"Subtarget->hasGFX940Insts() ||"
1473            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1474  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1475
1476def isGFX8GFX9NotGFX940 :
1477  Predicate<"!Subtarget->hasGFX940Insts() &&"
1478            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1479            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1480  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX940Insts))>;
1481
1482def isGFX8GFX9 :
1483  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1484            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1485  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding)>;
1486
1487def isGFX10Only :
1488  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1489  AssemblerPredicate<(all_of FeatureGFX10Insts, (not FeatureGFX11Insts))>;
1490
1491def isGFX10Plus :
1492  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1493  AssemblerPredicate<(all_of FeatureGFX10Insts)>;
1494
1495def isGFX10Before1030 :
1496  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 &&"
1497            "!Subtarget->hasGFX10_3Insts()">,
1498  AssemblerPredicate<(all_of FeatureGFX10Insts,(not FeatureGFX10_3Insts))>;
1499
1500def isGFX9GFX10 :
1501  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1502            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1503  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureGFX11Insts))>;
1504
1505def isGFX8GFX9GFX10 :
1506  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1507            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1508            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1509  AssemblerPredicate<(all_of FeatureGFX8Insts, (not FeatureGFX11Insts))>;
1510
1511def isGFX11Only :
1512  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1513  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1514
1515def isGFX11Plus :
1516  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1517  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1518
1519def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">,
1520  AssemblerPredicate<(all_of FeatureFlatAddressSpace)>;
1521
1522def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">,
1523  AssemblerPredicate<(all_of FeatureFlatGlobalInsts)>;
1524def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
1525  AssemblerPredicate<(all_of FeatureFlatScratchInsts)>;
1526def HasScalarFlatScratchInsts : Predicate<"Subtarget->hasScalarFlatScratchInsts()">,
1527  AssemblerPredicate<(all_of FeatureScalarFlatScratchInsts)>;
1528def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
1529  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1530
1531def HasFlatScratchSTMode : Predicate<"Subtarget->hasFlatScratchSTMode()">,
1532  AssemblerPredicate<(any_of FeatureGFX10_3Insts, FeatureGFX940Insts)>;
1533def HasFlatScratchSVSMode : Predicate<"Subtarget->hasFlatScratchSVSMode()">,
1534  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1535
1536def HasGFX10_AEncoding : Predicate<"Subtarget->hasGFX10_AEncoding()">,
1537  AssemblerPredicate<(all_of FeatureGFX10_AEncoding)>;
1538
1539def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">,
1540  AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>;
1541
1542def HasUnpackedD16VMem : Predicate<"Subtarget->hasUnpackedD16VMem()">,
1543  AssemblerPredicate<(all_of FeatureUnpackedD16VMem)>;
1544def HasPackedD16VMem : Predicate<"!Subtarget->hasUnpackedD16VMem()">,
1545  AssemblerPredicate<(all_of (not FeatureUnpackedD16VMem))>;
1546
1547def D16PreservesUnusedBits :
1548  Predicate<"Subtarget->d16PreservesUnusedBits()">,
1549  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureSRAMECC))>;
1550
1551def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
1552def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
1553
1554def HasDSAddTid : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1555  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1556
1557def HasLDSFPAtomicAdd : Predicate<"Subtarget->hasLDSFPAtomicAdd()">,
1558  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1559
1560def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarry()">,
1561  AssemblerPredicate<(all_of FeatureAddNoCarryInsts)>;
1562
1563def NotHasAddNoCarryInsts : Predicate<"!Subtarget->hasAddNoCarry()">;
1564
1565def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
1566  AssemblerPredicate<(all_of Feature16BitInsts)>;
1567
1568def HasTrue16BitInsts : Predicate<"Subtarget->hasTrue16BitInsts()">,
1569  AssemblerPredicate<(all_of FeatureTrue16BitInsts)>;
1570def NotHasTrue16BitInsts : Predicate<"!Subtarget->hasTrue16BitInsts()">;
1571
1572def HasVOP3PInsts : Predicate<"Subtarget->hasVOP3PInsts()">,
1573  AssemblerPredicate<(all_of FeatureVOP3P)>;
1574
1575def HasMinMaxDenormModes : Predicate<"Subtarget->supportsMinMaxDenormModes()">;
1576def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()">;
1577
1578def HasSDWA : Predicate<"Subtarget->hasSDWA()">,
1579  AssemblerPredicate<(all_of FeatureSDWA, FeatureVolcanicIslands)>;
1580
1581def HasSDWA9 :
1582  Predicate<"Subtarget->hasSDWA()">,
1583  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts,FeatureSDWA)>;
1584
1585def HasSDWA10 :
1586  Predicate<"Subtarget->hasSDWA()">,
1587  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureSDWA)>;
1588
1589def HasDPP : Predicate<"Subtarget->hasDPP()">,
1590  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureDPP)>;
1591
1592def HasDPP8 : Predicate<"Subtarget->hasDPP8()">,
1593  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP8)>;
1594
1595def Has64BitDPP : Predicate<"Subtarget->has64BitDPP()">,
1596  AssemblerPredicate<(all_of Feature64BitDPP)>;
1597
1598def HasPackedFP32Ops : Predicate<"Subtarget->hasPackedFP32Ops()">,
1599  AssemblerPredicate<(all_of FeaturePackedFP32Ops)>;
1600
1601def HasFmaakFmamkF32Insts :
1602  Predicate<"Subtarget->hasFmaakFmamkF32Insts()">,
1603  AssemblerPredicate<(any_of FeatureGFX10Insts, FeatureGFX940Insts)>;
1604
1605def HasImageInsts : Predicate<"Subtarget->hasImageInsts()">,
1606  AssemblerPredicate<(all_of FeatureImageInsts)>;
1607
1608def HasExtendedImageInsts : Predicate<"Subtarget->hasExtendedImageInsts()">,
1609  AssemblerPredicate<(all_of FeatureExtendedImageInsts)>;
1610
1611def HasR128A16 : Predicate<"Subtarget->hasR128A16()">,
1612  AssemblerPredicate<(all_of FeatureR128A16)>;
1613
1614def HasGFX10A16 : Predicate<"Subtarget->hasGFX10A16()">,
1615  AssemblerPredicate<(all_of FeatureGFX10A16)>;
1616
1617def HasG16 : Predicate<"Subtarget->hasG16()">,
1618  AssemblerPredicate<(all_of FeatureG16)>;
1619
1620def HasDPP16 : Predicate<"Subtarget->hasDPP()">,
1621  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP)>;
1622
1623def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">,
1624  AssemblerPredicate<(all_of FeatureIntClamp)>;
1625
1626def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">,
1627  AssemblerPredicate<(all_of FeatureMadMixInsts)>;
1628
1629def HasScalarStores : Predicate<"Subtarget->hasScalarStores()">,
1630  AssemblerPredicate<(all_of FeatureScalarStores)>;
1631
1632def HasScalarAtomics : Predicate<"Subtarget->hasScalarAtomics()">,
1633  AssemblerPredicate<(all_of FeatureScalarAtomics)>;
1634
1635def HasNoSdstCMPX : Predicate<"Subtarget->hasNoSdstCMPX()">,
1636  AssemblerPredicate<(all_of FeatureNoSdstCMPX)>;
1637
1638def HasSdstCMPX : Predicate<"!Subtarget->hasNoSdstCMPX()">,
1639  AssemblerPredicate<(all_of (not FeatureNoSdstCMPX))>;
1640
1641def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">;
1642def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">;
1643def HasVGPRIndexMode : Predicate<"Subtarget->hasVGPRIndexMode()">,
1644                      AssemblerPredicate<(all_of FeatureVGPRIndexMode)>;
1645def HasMovrel : Predicate<"Subtarget->hasMovrel()">,
1646                AssemblerPredicate<(all_of FeatureMovrel)>;
1647
1648def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">,
1649  AssemblerPredicate<(all_of FeatureFmaMixInsts)>;
1650
1651def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">,
1652  AssemblerPredicate<(all_of FeatureDLInsts)>;
1653
1654def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">,
1655  AssemblerPredicate<(all_of FeatureDot1Insts)>;
1656
1657def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">,
1658  AssemblerPredicate<(all_of FeatureDot2Insts)>;
1659
1660def HasDot3Insts : Predicate<"Subtarget->hasDot3Insts()">,
1661  AssemblerPredicate<(all_of FeatureDot3Insts)>;
1662
1663def HasDot4Insts : Predicate<"Subtarget->hasDot4Insts()">,
1664  AssemblerPredicate<(all_of FeatureDot4Insts)>;
1665
1666def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">,
1667  AssemblerPredicate<(all_of FeatureDot5Insts)>;
1668
1669def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
1670  AssemblerPredicate<(all_of FeatureDot6Insts)>;
1671
1672def HasDot7Insts : Predicate<"Subtarget->hasDot7Insts()">,
1673  AssemblerPredicate<(all_of FeatureDot7Insts)>;
1674
1675def HasDot8Insts : Predicate<"Subtarget->hasDot8Insts()">,
1676  AssemblerPredicate<(all_of FeatureDot8Insts)>;
1677
1678def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">,
1679  AssemblerPredicate<(all_of FeatureGetWaveIdInst)>;
1680
1681def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">,
1682  AssemblerPredicate<(all_of FeatureMAIInsts)>;
1683
1684def HasSMemRealTime : Predicate<"Subtarget->hasSMemRealTime()">,
1685  AssemblerPredicate<(all_of FeatureSMemRealTime)>;
1686
1687def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">,
1688  AssemblerPredicate<(all_of FeatureSMemTimeInst)>;
1689
1690def HasShaderCyclesRegister : Predicate<"Subtarget->hasShaderCyclesRegister()">,
1691  AssemblerPredicate<(all_of FeatureShaderCyclesRegister)>;
1692
1693def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">,
1694  AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>;
1695
1696def HasMadMacF32Insts : Predicate<"Subtarget->hasMadMacF32Insts()">,
1697  AssemblerPredicate<(all_of FeatureMadMacF32Insts)>;
1698
1699def HasFmaLegacy32 : Predicate<"Subtarget->hasGFX10_3Insts()">,
1700  AssemblerPredicate<(any_of FeatureGFX10_3Insts)>;
1701
1702def HasAtomicFaddRtnInsts : Predicate<"Subtarget->hasAtomicFaddRtnInsts()">,
1703  AssemblerPredicate<(all_of FeatureAtomicFaddRtnInsts)>;
1704def HasAtomicFaddNoRtnInsts : Predicate<"Subtarget->hasAtomicFaddNoRtnInsts()">,
1705  AssemblerPredicate<(all_of FeatureAtomicFaddNoRtnInsts)>;
1706def HasAtomicPkFaddNoRtnInsts
1707  : Predicate<"Subtarget->hasAtomicPkFaddNoRtnInsts()">,
1708  AssemblerPredicate<(all_of FeatureAtomicPkFaddNoRtnInsts)>;
1709
1710def HasDsSrc2Insts : Predicate<"!Subtarget->hasDsSrc2Insts()">,
1711  AssemblerPredicate<(all_of FeatureDsSrc2Insts)>;
1712
1713def EnableLateCFGStructurize : Predicate<
1714  "EnableLateStructurizeCFG">;
1715
1716def EnableFlatScratch : Predicate<"Subtarget->enableFlatScratch()">;
1717
1718def DisableFlatScratch : Predicate<"!Subtarget->enableFlatScratch()">;
1719
1720def HasUnalignedAccessMode : Predicate<"Subtarget->hasUnalignedAccessMode()">,
1721  AssemblerPredicate<(all_of FeatureUnalignedAccessMode)>;
1722
1723// Include AMDGPU TD files
1724include "SISchedule.td"
1725include "GCNProcessors.td"
1726include "AMDGPUInstrInfo.td"
1727include "SIRegisterInfo.td"
1728include "AMDGPURegisterBanks.td"
1729include "AMDGPUInstructions.td"
1730include "SIInstrInfo.td"
1731include "AMDGPUCallingConv.td"
1732include "AMDGPUSearchableTables.td"
1733