1//===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===------------------------------------------------------------===//
8
9include "llvm/TableGen/SearchableTable.td"
10include "llvm/Target/Target.td"
11include "AMDGPUFeatures.td"
12
13def p0 : PtrValueType<i64, 0>;
14def p1 : PtrValueType<i64, 1>;
15def p2 : PtrValueType<i32, 2>;
16def p3 : PtrValueType<i32, 3>;
17def p4 : PtrValueType<i64, 4>;
18def p5 : PtrValueType<i32, 5>;
19def p6 : PtrValueType<i32, 6>;
20
21class BoolToList<bit Value> {
22  list<int> ret = !if(Value, [1]<int>, []<int>);
23}
24
25//===------------------------------------------------------------===//
26// Subtarget Features (device properties)
27//===------------------------------------------------------------===//
28
29def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf",
30  "FastFMAF32",
31  "true",
32  "Assuming f32 fma is at least as fast as mul + add"
33>;
34
35def FeatureFastDenormalF32 : SubtargetFeature<"fast-denormal-f32",
36  "FastDenormalF32",
37  "true",
38  "Enabling denormals does not cause f32 instructions to run at f64 rates"
39>;
40
41def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128",
42  "MIMG_R128",
43  "true",
44  "Support 128-bit texture resources"
45>;
46
47def HalfRate64Ops : SubtargetFeature<"half-rate-64-ops",
48  "HalfRate64Ops",
49  "true",
50  "Most fp64 instructions are half rate instead of quarter"
51>;
52
53def FullRate64Ops : SubtargetFeature<"full-rate-64-ops",
54  "FullRate64Ops",
55  "true",
56  "Most fp64 instructions are full rate"
57>;
58
59def FeatureFlatAddressSpace : SubtargetFeature<"flat-address-space",
60  "FlatAddressSpace",
61  "true",
62  "Support flat address space"
63>;
64
65def FeatureFlatInstOffsets : SubtargetFeature<"flat-inst-offsets",
66  "FlatInstOffsets",
67  "true",
68  "Flat instructions have immediate offset addressing mode"
69>;
70
71def FeatureFlatGlobalInsts : SubtargetFeature<"flat-global-insts",
72  "FlatGlobalInsts",
73  "true",
74  "Have global_* flat memory instructions"
75>;
76
77def FeatureFlatScratchInsts : SubtargetFeature<"flat-scratch-insts",
78  "FlatScratchInsts",
79  "true",
80  "Have scratch_* flat memory instructions"
81>;
82
83def FeatureScalarFlatScratchInsts : SubtargetFeature<"scalar-flat-scratch-insts",
84  "ScalarFlatScratchInsts",
85  "true",
86  "Have s_scratch_* flat memory instructions"
87>;
88
89def FeatureEnableFlatScratch : SubtargetFeature<"enable-flat-scratch",
90  "EnableFlatScratch",
91  "true",
92  "Use scratch_* flat memory instructions to access scratch"
93>;
94
95def FeatureAddNoCarryInsts : SubtargetFeature<"add-no-carry-insts",
96  "AddNoCarryInsts",
97  "true",
98  "Have VALU add/sub instructions without carry out"
99>;
100
101def FeatureUnalignedBufferAccess : SubtargetFeature<"unaligned-buffer-access",
102  "UnalignedBufferAccess",
103  "true",
104  "Hardware supports unaligned global loads and stores"
105>;
106
107def FeatureTrapHandler: SubtargetFeature<"trap-handler",
108  "TrapHandler",
109  "true",
110  "Trap handler support"
111>;
112
113def FeatureUnalignedScratchAccess : SubtargetFeature<"unaligned-scratch-access",
114  "UnalignedScratchAccess",
115  "true",
116  "Support unaligned scratch loads and stores"
117>;
118
119def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
120  "UnalignedDSAccess",
121  "true",
122  "Hardware supports unaligned local and region loads and stores"
123>;
124
125def FeatureApertureRegs : SubtargetFeature<"aperture-regs",
126  "HasApertureRegs",
127  "true",
128  "Has Memory Aperture Base and Size Registers"
129>;
130
131def FeatureMadMixInsts : SubtargetFeature<"mad-mix-insts",
132  "HasMadMixInsts",
133  "true",
134  "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
135>;
136
137def FeatureFmaMixInsts : SubtargetFeature<"fma-mix-insts",
138  "HasFmaMixInsts",
139  "true",
140  "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions"
141>;
142
143def FeatureSupportsXNACK : SubtargetFeature<"xnack-support",
144  "SupportsXNACK",
145  "true",
146  "Hardware supports XNACK"
147>;
148
149// XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support
150// XNACK. The current default kernel driver setting is:
151// - graphics ring: XNACK disabled
152// - compute ring: XNACK enabled
153//
154// If XNACK is enabled, the VMEM latency can be worse.
155// If XNACK is disabled, the 2 SGPRs can be used for general purposes.
156def FeatureXNACK : SubtargetFeature<"xnack",
157  "EnableXNACK",
158  "true",
159  "Enable XNACK support"
160>;
161
162def FeatureTgSplit : SubtargetFeature<"tgsplit",
163  "EnableTgSplit",
164  "true",
165  "Enable threadgroup split execution"
166>;
167
168def FeatureCuMode : SubtargetFeature<"cumode",
169  "EnableCuMode",
170  "true",
171  "Enable CU wavefront execution mode"
172>;
173
174def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
175  "SGPRInitBug",
176  "true",
177  "VI SGPR initialization bug requiring a fixed SGPR allocation size"
178>;
179
180def FeatureUserSGPRInit16Bug : SubtargetFeature<"user-sgpr-init16-bug",
181  "UserSGPRInit16Bug",
182  "true",
183  "Bug requiring at least 16 user+system SGPRs to be enabled"
184>;
185
186def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
187  "LDSMisalignedBug",
188  "true",
189  "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode"
190>;
191
192def FeatureMFMAInlineLiteralBug : SubtargetFeature<"mfma-inline-literal-bug",
193  "HasMFMAInlineLiteralBug",
194  "true",
195  "MFMA cannot use inline literal as SrcC"
196>;
197
198def FeatureVcmpxPermlaneHazard : SubtargetFeature<"vcmpx-permlane-hazard",
199  "HasVcmpxPermlaneHazard",
200  "true",
201  "TODO: describe me"
202>;
203
204def FeatureVMEMtoScalarWriteHazard : SubtargetFeature<"vmem-to-scalar-write-hazard",
205  "HasVMEMtoScalarWriteHazard",
206  "true",
207  "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution."
208>;
209
210def FeatureSMEMtoVectorWriteHazard : SubtargetFeature<"smem-to-vector-write-hazard",
211  "HasSMEMtoVectorWriteHazard",
212  "true",
213  "s_load_dword followed by v_cmp page faults"
214>;
215
216def FeatureInstFwdPrefetchBug : SubtargetFeature<"inst-fwd-prefetch-bug",
217  "HasInstFwdPrefetchBug",
218  "true",
219  "S_INST_PREFETCH instruction causes shader to hang"
220>;
221
222def FeatureVcmpxExecWARHazard : SubtargetFeature<"vcmpx-exec-war-hazard",
223  "HasVcmpxExecWARHazard",
224  "true",
225  "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)"
226>;
227
228def FeatureLdsBranchVmemWARHazard : SubtargetFeature<"lds-branch-vmem-war-hazard",
229  "HasLdsBranchVmemWARHazard",
230  "true",
231  "Switching between LDS and VMEM-tex not waiting VM_VSRC=0"
232>;
233
234def FeatureNSAtoVMEMBug : SubtargetFeature<"nsa-to-vmem-bug",
235  "HasNSAtoVMEMBug",
236  "true",
237  "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero"
238>;
239
240def FeatureNSAClauseBug : SubtargetFeature<"nsa-clause-bug",
241  "HasNSAClauseBug",
242  "true",
243  "MIMG-NSA in a hard clause has unpredictable results on GFX10.1"
244>;
245
246def FeatureFlatSegmentOffsetBug : SubtargetFeature<"flat-segment-offset-bug",
247  "HasFlatSegmentOffsetBug",
248  "true",
249  "GFX10 bug where inst_offset is ignored when flat instructions access global memory"
250>;
251
252def FeatureNegativeScratchOffsetBug : SubtargetFeature<"negative-scratch-offset-bug",
253  "NegativeScratchOffsetBug",
254  "true",
255  "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9"
256>;
257
258def FeatureNegativeUnalignedScratchOffsetBug : SubtargetFeature<"negative-unaligned-scratch-offset-bug",
259  "NegativeUnalignedScratchOffsetBug",
260  "true",
261  "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10"
262>;
263
264def FeatureOffset3fBug : SubtargetFeature<"offset-3f-bug",
265  "HasOffset3fBug",
266  "true",
267  "Branch offset of 3f hardware bug"
268>;
269
270def FeatureImageStoreD16Bug : SubtargetFeature<"image-store-d16-bug",
271  "HasImageStoreD16Bug",
272  "true",
273  "Image Store D16 hardware bug"
274>;
275
276def FeatureImageGather4D16Bug : SubtargetFeature<"image-gather4-d16-bug",
277  "HasImageGather4D16Bug",
278  "true",
279  "Image Gather4 D16 hardware bug"
280>;
281
282class SubtargetFeatureLDSBankCount <int Value> : SubtargetFeature <
283  "ldsbankcount"#Value,
284  "LDSBankCount",
285  !cast<string>(Value),
286  "The number of LDS banks per compute unit."
287>;
288
289def FeatureLDSBankCount16 : SubtargetFeatureLDSBankCount<16>;
290def FeatureLDSBankCount32 : SubtargetFeatureLDSBankCount<32>;
291
292def FeatureGCN3Encoding : SubtargetFeature<"gcn3-encoding",
293  "GCN3Encoding",
294  "true",
295  "Encoding format for VI"
296>;
297
298def FeatureCIInsts : SubtargetFeature<"ci-insts",
299  "CIInsts",
300  "true",
301  "Additional instructions for CI+"
302>;
303
304def FeatureGFX8Insts : SubtargetFeature<"gfx8-insts",
305  "GFX8Insts",
306  "true",
307  "Additional instructions for GFX8+"
308>;
309
310def FeatureGFX9Insts : SubtargetFeature<"gfx9-insts",
311  "GFX9Insts",
312  "true",
313  "Additional instructions for GFX9+"
314>;
315
316def FeatureGFX90AInsts : SubtargetFeature<"gfx90a-insts",
317  "GFX90AInsts",
318  "true",
319  "Additional instructions for GFX90A+"
320>;
321
322def FeatureGFX940Insts : SubtargetFeature<"gfx940-insts",
323  "GFX940Insts",
324  "true",
325  "Additional instructions for GFX940+"
326>;
327
328def FeatureGFX10Insts : SubtargetFeature<"gfx10-insts",
329  "GFX10Insts",
330  "true",
331  "Additional instructions for GFX10+"
332>;
333
334def FeatureGFX11Insts : SubtargetFeature<"gfx11-insts",
335  "GFX11Insts",
336  "true",
337  "Additional instructions for GFX11+"
338>;
339
340def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts",
341  "GFX10_3Insts",
342  "true",
343  "Additional instructions for GFX10.3"
344>;
345
346def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts",
347  "GFX7GFX8GFX9Insts",
348  "true",
349  "Instructions shared in GFX7, GFX8, GFX9"
350>;
351
352def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
353  "HasSMemRealTime",
354  "true",
355  "Has s_memrealtime instruction"
356>;
357
358def FeatureInv2PiInlineImm : SubtargetFeature<"inv-2pi-inline-imm",
359  "HasInv2PiInlineImm",
360  "true",
361  "Has 1 / (2 * pi) as inline immediate"
362>;
363
364def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
365  "Has16BitInsts",
366  "true",
367  "Has i16/f16 instructions"
368>;
369
370def FeatureTrue16BitInsts : SubtargetFeature<"true16",
371  "HasTrue16BitInsts",
372  "true",
373  "True 16-bit operand instructions"
374>;
375
376def FeatureVOP3P : SubtargetFeature<"vop3p",
377  "HasVOP3PInsts",
378  "true",
379  "Has VOP3P packed instructions"
380>;
381
382def FeatureMovrel : SubtargetFeature<"movrel",
383  "HasMovrel",
384  "true",
385  "Has v_movrel*_b32 instructions"
386>;
387
388def FeatureVGPRIndexMode : SubtargetFeature<"vgpr-index-mode",
389  "HasVGPRIndexMode",
390  "true",
391  "Has VGPR mode register indexing"
392>;
393
394def FeatureScalarStores : SubtargetFeature<"scalar-stores",
395  "HasScalarStores",
396  "true",
397  "Has store scalar memory instructions"
398>;
399
400def FeatureScalarAtomics : SubtargetFeature<"scalar-atomics",
401  "HasScalarAtomics",
402  "true",
403  "Has atomic scalar memory instructions"
404>;
405
406def FeatureSDWA : SubtargetFeature<"sdwa",
407  "HasSDWA",
408  "true",
409  "Support SDWA (Sub-DWORD Addressing) extension"
410>;
411
412def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
413  "HasSDWAOmod",
414  "true",
415  "Support OMod with SDWA (Sub-DWORD Addressing) extension"
416>;
417
418def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
419  "HasSDWAScalar",
420  "true",
421  "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
422>;
423
424def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
425  "HasSDWASdst",
426  "true",
427  "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
428>;
429
430def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
431  "HasSDWAMac",
432  "true",
433  "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
434>;
435
436def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
437  "HasSDWAOutModsVOPC",
438  "true",
439  "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
440>;
441
442def FeatureDPP : SubtargetFeature<"dpp",
443  "HasDPP",
444  "true",
445  "Support DPP (Data Parallel Primitives) extension"
446>;
447
448// DPP8 allows arbitrary cross-lane swizzling within groups of 8 lanes.
449def FeatureDPP8 : SubtargetFeature<"dpp8",
450  "HasDPP8",
451  "true",
452  "Support DPP8 (Data Parallel Primitives) extension"
453>;
454
455def Feature64BitDPP : SubtargetFeature<"dpp-64bit",
456  "Has64BitDPP",
457  "true",
458  "Support DPP (Data Parallel Primitives) extension"
459>;
460
461def FeaturePackedFP32Ops : SubtargetFeature<"packed-fp32-ops",
462  "HasPackedFP32Ops",
463  "true",
464  "Support packed fp32 instructions"
465>;
466
467def FeatureR128A16 : SubtargetFeature<"r128-a16",
468  "HasR128A16",
469  "true",
470  "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128"
471>;
472
473def FeatureGFX10A16 : SubtargetFeature<"a16",
474  "HasGFX10A16",
475  "true",
476  "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands"
477>;
478
479def FeatureG16 : SubtargetFeature<"g16",
480  "HasG16",
481  "true",
482  "Support G16 for 16-bit gradient image operands"
483>;
484
485def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding",
486  "HasNSAEncoding",
487  "true",
488  "Support NSA encoding for image instructions"
489>;
490
491def FeatureImageInsts : SubtargetFeature<"image-insts",
492  "HasImageInsts",
493  "true",
494  "Support image instructions"
495>;
496
497def FeatureExtendedImageInsts : SubtargetFeature<"extended-image-insts",
498  "HasExtendedImageInsts",
499  "true",
500  "Support mips != 0, lod != 0, gather4, and get_lod"
501>;
502
503def FeatureGFX10_AEncoding : SubtargetFeature<"gfx10_a-encoding",
504  "GFX10_AEncoding",
505  "true",
506  "Has BVH ray tracing instructions"
507>;
508
509def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding",
510  "GFX10_BEncoding",
511  "true",
512  "Encoding format GFX10_B"
513>;
514
515def FeatureIntClamp : SubtargetFeature<"int-clamp-insts",
516  "HasIntClamp",
517  "true",
518  "Support clamp for integer destination"
519>;
520
521def FeatureUnpackedD16VMem : SubtargetFeature<"unpacked-d16-vmem",
522  "HasUnpackedD16VMem",
523  "true",
524  "Has unpacked d16 vmem instructions"
525>;
526
527def FeatureDLInsts : SubtargetFeature<"dl-insts",
528  "HasDLInsts",
529  "true",
530  "Has v_fmac_f32 and v_xnor_b32 instructions"
531>;
532
533def FeatureDot1Insts : SubtargetFeature<"dot1-insts",
534  "HasDot1Insts",
535  "true",
536  "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions"
537>;
538
539def FeatureDot2Insts : SubtargetFeature<"dot2-insts",
540  "HasDot2Insts",
541  "true",
542  "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions"
543>;
544
545def FeatureDot3Insts : SubtargetFeature<"dot3-insts",
546  "HasDot3Insts",
547  "true",
548  "Has v_dot8c_i32_i4 instruction"
549>;
550
551def FeatureDot4Insts : SubtargetFeature<"dot4-insts",
552  "HasDot4Insts",
553  "true",
554  "Has v_dot2c_i32_i16 instruction"
555>;
556
557def FeatureDot5Insts : SubtargetFeature<"dot5-insts",
558  "HasDot5Insts",
559  "true",
560  "Has v_dot2c_f32_f16 instruction"
561>;
562
563def FeatureDot6Insts : SubtargetFeature<"dot6-insts",
564  "HasDot6Insts",
565  "true",
566  "Has v_dot4c_i32_i8 instruction"
567>;
568
569def FeatureDot7Insts : SubtargetFeature<"dot7-insts",
570  "HasDot7Insts",
571  "true",
572  "Has v_dot2_f32_f16, v_dot4_u32_u8, v_dot8_u32_u4 instructions"
573>;
574
575def FeatureDot8Insts : SubtargetFeature<"dot8-insts",
576  "HasDot8Insts",
577  "true",
578  "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16, "
579  "v_dot4_i32_iu8, v_dot8_i32_iu4 instructions"
580>;
581
582def FeatureMAIInsts : SubtargetFeature<"mai-insts",
583  "HasMAIInsts",
584  "true",
585  "Has mAI instructions"
586>;
587
588def FeatureFP8Insts : SubtargetFeature<"fp8-insts",
589  "HasFP8Insts",
590  "true",
591  "Has fp8 and bf8 instructions"
592>;
593
594def FeaturePkFmacF16Inst : SubtargetFeature<"pk-fmac-f16-inst",
595  "HasPkFmacF16Inst",
596  "true",
597  "Has v_pk_fmac_f16 instruction"
598>;
599
600def FeatureAtomicFaddRtnInsts : SubtargetFeature<"atomic-fadd-rtn-insts",
601  "HasAtomicFaddRtnInsts",
602  "true",
603  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
604  "return original value",
605  [FeatureFlatGlobalInsts]
606>;
607
608def FeatureAtomicFaddNoRtnInsts : SubtargetFeature<"atomic-fadd-no-rtn-insts",
609  "HasAtomicFaddNoRtnInsts",
610  "true",
611  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
612  "don't return original value",
613  [FeatureFlatGlobalInsts]
614>;
615
616def FeatureAtomicPkFaddNoRtnInsts
617  : SubtargetFeature<"atomic-pk-fadd-no-rtn-insts",
618  "HasAtomicPkFaddNoRtnInsts",
619  "true",
620  "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that "
621  "don't return original value",
622  [FeatureFlatGlobalInsts]
623>;
624
625def FeatureSupportsSRAMECC : SubtargetFeature<"sramecc-support",
626  "SupportsSRAMECC",
627  "true",
628  "Hardware supports SRAMECC"
629>;
630
631def FeatureSRAMECC : SubtargetFeature<"sramecc",
632  "EnableSRAMECC",
633  "true",
634  "Enable SRAMECC"
635>;
636
637def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
638  "HasNoSdstCMPX",
639  "true",
640  "V_CMPX does not write VCC/SGPR in addition to EXEC"
641>;
642
643def FeatureVscnt : SubtargetFeature<"vscnt",
644  "HasVscnt",
645  "true",
646  "Has separate store vscnt counter"
647>;
648
649def FeatureGetWaveIdInst : SubtargetFeature<"get-wave-id-inst",
650  "HasGetWaveIdInst",
651  "true",
652  "Has s_get_waveid_in_workgroup instruction"
653>;
654
655def FeatureSMemTimeInst : SubtargetFeature<"s-memtime-inst",
656  "HasSMemTimeInst",
657  "true",
658  "Has s_memtime instruction"
659>;
660
661def FeatureShaderCyclesRegister : SubtargetFeature<"shader-cycles-register",
662  "HasShaderCyclesRegister",
663  "true",
664  "Has SHADER_CYCLES hardware register"
665>;
666
667def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts",
668  "HasMadMacF32Insts",
669  "true",
670  "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions"
671>;
672
673def FeatureDsSrc2Insts : SubtargetFeature<"ds-src2-insts",
674  "HasDsSrc2Insts",
675  "true",
676  "Has ds_*_src2 instructions"
677>;
678
679def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
680  "HasVOP3Literal",
681  "true",
682  "Can use one literal in VOP3"
683>;
684
685def FeatureNoDataDepHazard : SubtargetFeature<"no-data-dep-hazard",
686  "HasNoDataDepHazard",
687  "true",
688  "Does not need SW waitstates"
689>;
690
691class SubtargetFeatureNSAMaxSize <int Value> : SubtargetFeature <
692  "nsa-max-size-"#Value,
693  "NSAMaxSize",
694  !cast<string>(Value),
695  "The maximum non-sequential address size in VGPRs."
696>;
697
698def FeatureNSAMaxSize5 : SubtargetFeatureNSAMaxSize<5>;
699def FeatureNSAMaxSize13 : SubtargetFeatureNSAMaxSize<13>;
700
701def FeatureVOPD : SubtargetFeature<"vopd",
702  "HasVOPDInsts",
703  "true",
704  "Has VOPD dual issue wave32 instructions"
705>;
706
707//===------------------------------------------------------------===//
708// Subtarget Features (options and debugging)
709//===------------------------------------------------------------===//
710
711class FeatureMaxPrivateElementSize<int size> : SubtargetFeature<
712  "max-private-element-size-"#size,
713  "MaxPrivateElementSize",
714  !cast<string>(size),
715  "Maximum private access size may be "#size
716>;
717
718def FeatureMaxPrivateElementSize4 : FeatureMaxPrivateElementSize<4>;
719def FeatureMaxPrivateElementSize8 : FeatureMaxPrivateElementSize<8>;
720def FeatureMaxPrivateElementSize16 : FeatureMaxPrivateElementSize<16>;
721
722def FeatureDumpCode : SubtargetFeature <"DumpCode",
723  "DumpCode",
724  "true",
725  "Dump MachineInstrs in the CodeEmitter"
726>;
727
728def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
729  "DumpCode",
730  "true",
731  "Dump MachineInstrs in the CodeEmitter"
732>;
733
734// XXX - This should probably be removed once enabled by default
735def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",
736  "EnableLoadStoreOpt",
737  "true",
738  "Enable SI load/store optimizer pass"
739>;
740
741// Performance debugging feature. Allow using DS instruction immediate
742// offsets even if the base pointer can't be proven to be base. On SI,
743// base pointer values that won't give the same result as a 16-bit add
744// are not safe to fold, but this will override the conservative test
745// for the base pointer.
746def FeatureEnableUnsafeDSOffsetFolding : SubtargetFeature <
747  "unsafe-ds-offset-folding",
748  "EnableUnsafeDSOffsetFolding",
749  "true",
750  "Force using DS instruction immediate offsets on SI"
751>;
752
753def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler",
754  "EnableSIScheduler",
755  "true",
756  "Enable SI Machine Scheduler"
757>;
758
759def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
760  "EnableDS128",
761  "true",
762  "Use ds_{read|write}_b128"
763>;
764
765// Sparse texture support requires that all result registers are zeroed when
766// PRTStrictNull is set to true. This feature is turned on for all architectures
767// but is enabled as a feature in case there are situations where PRTStrictNull
768// is disabled by the driver.
769def FeatureEnablePRTStrictNull : SubtargetFeature<"enable-prt-strict-null",
770  "EnablePRTStrictNull",
771  "true",
772  "Enable zeroing of result registers for sparse texture fetches"
773>;
774
775// Unless +-flat-for-global is specified, turn on FlatForGlobal for
776// all OS-es on VI and newer hardware to avoid assertion failures due
777// to missing ADDR64 variants of MUBUF instructions.
778// FIXME: moveToVALU should be able to handle converting addr64 MUBUF
779// instructions.
780
781def FeatureFlatForGlobal : SubtargetFeature<"flat-for-global",
782  "FlatForGlobal",
783  "true",
784  "Force to generate flat instruction for global"
785>;
786
787def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
788  "auto-waitcnt-before-barrier",
789  "AutoWaitcntBeforeBarrier",
790  "true",
791  "Hardware automatically inserts waitcnt before barrier"
792>;
793
794def FeatureTrigReducedRange : SubtargetFeature<"trig-reduced-range",
795  "HasTrigReducedRange",
796  "true",
797  "Requires use of fract on arguments to trig instructions"
798>;
799
800// Alignment enforcement is controlled by a configuration register:
801// SH_MEM_CONFIG.alignment_mode
802def FeatureUnalignedAccessMode : SubtargetFeature<"unaligned-access-mode",
803  "UnalignedAccessMode",
804  "true",
805  "Enable unaligned global, local and region loads and stores if the hardware"
806  " supports it"
807>;
808
809def FeaturePackedTID : SubtargetFeature<"packed-tid",
810  "HasPackedTID",
811  "true",
812  "Workitem IDs are packed into v0 at kernel launch"
813>;
814
815def FeatureArchitectedFlatScratch : SubtargetFeature<"architected-flat-scratch",
816  "HasArchitectedFlatScratch",
817  "true",
818  "Flat Scratch register is a readonly SPI initialized architected register"
819>;
820
821// Dummy feature used to disable assembler instructions.
822def FeatureDisable : SubtargetFeature<"",
823  "FeatureDisable","true",
824  "Dummy feature to disable assembler instructions"
825>;
826
827class GCNSubtargetFeatureGeneration <string Value,
828                                     string FeatureName,
829                                     list<SubtargetFeature> Implies> :
830        SubtargetFeatureGeneration <Value, FeatureName, "GCNSubtarget", Implies>;
831
832def FeatureSouthernIslands : GCNSubtargetFeatureGeneration<"SOUTHERN_ISLANDS",
833    "southern-islands",
834  [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128,
835  FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts,
836  FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel,
837  FeatureTrigReducedRange, FeatureExtendedImageInsts, FeatureImageInsts
838  ]
839>;
840
841def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS",
842    "sea-islands",
843  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
844  FeatureWavefrontSize64, FeatureFlatAddressSpace,
845  FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange,
846  FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
847  FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureUnalignedBufferAccess,
848  FeatureImageInsts
849  ]
850>;
851
852def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
853  "volcanic-islands",
854  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
855   FeatureWavefrontSize64, FeatureFlatAddressSpace,
856   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
857   FeatureSMemRealTime, FeatureVGPRIndexMode, FeatureMovrel,
858   FeatureScalarStores, FeatureInv2PiInlineImm,
859   FeatureSDWA, FeatureSDWAOutModsVOPC, FeatureSDWAMac, FeatureDPP,
860   FeatureIntClamp, FeatureTrigReducedRange, FeatureGFX8Insts,
861   FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
862   FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureFastDenormalF32,
863   FeatureUnalignedBufferAccess, FeatureImageInsts
864  ]
865>;
866
867def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9",
868  "gfx9",
869  [FeatureFP64, FeatureLocalMemorySize65536,
870   FeatureWavefrontSize64, FeatureFlatAddressSpace,
871   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
872   FeatureSMemRealTime, FeatureScalarStores, FeatureInv2PiInlineImm,
873   FeatureApertureRegs, FeatureGFX9Insts, FeatureVOP3P, FeatureVGPRIndexMode,
874   FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
875   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
876   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
877   FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts,
878   FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16,
879   FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK,
880   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess,
881   FeatureNegativeScratchOffsetBug
882  ]
883>;
884
885def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
886  "gfx10",
887  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
888   FeatureFlatAddressSpace,
889   FeatureCIInsts, Feature16BitInsts,
890   FeatureSMemRealTime, FeatureInv2PiInlineImm,
891   FeatureApertureRegs, FeatureGFX9Insts, FeatureGFX10Insts, FeatureVOP3P,
892   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
893   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
894   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
895   FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts,
896   FeatureNoSdstCMPX, FeatureVscnt,
897   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
898   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
899   FeatureGFX10A16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureG16,
900   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess, FeatureImageInsts
901  ]
902>;
903
904def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
905  "gfx11",
906  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
907   FeatureFlatAddressSpace, Feature16BitInsts,
908   FeatureInv2PiInlineImm, FeatureApertureRegs,
909   FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
910   FeatureGFX10_AEncoding, FeatureGFX10_BEncoding, FeatureGFX10_3Insts,
911   FeatureGFX11Insts, FeatureVOP3P, FeatureVOPD, FeatureTrue16BitInsts,
912   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
913   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
914   FeatureAddNoCarryInsts, FeatureFmaMixInsts,
915   FeatureNoSdstCMPX, FeatureVscnt,
916   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
917   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
918   FeatureGFX10A16, FeatureFastDenormalF32, FeatureG16,
919   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess
920  ]
921>;
922
923class FeatureSet<list<SubtargetFeature> Features_> {
924  list<SubtargetFeature> Features = Features_;
925}
926
927def FeatureISAVersion6_0_0 : FeatureSet<[FeatureSouthernIslands,
928   FeatureFastFMAF32,
929   HalfRate64Ops,
930   FeatureLDSBankCount32]>;
931
932def FeatureISAVersion6_0_1 : FeatureSet<
933  [FeatureSouthernIslands,
934   FeatureLDSBankCount32]>;
935
936def FeatureISAVersion6_0_2 : FeatureSet<
937  [FeatureSouthernIslands,
938   FeatureLDSBankCount32]>;
939
940def FeatureISAVersion7_0_0 : FeatureSet<
941  [FeatureSeaIslands,
942   FeatureLDSBankCount32]>;
943
944def FeatureISAVersion7_0_1 : FeatureSet<
945  [FeatureSeaIslands,
946   HalfRate64Ops,
947   FeatureLDSBankCount32,
948   FeatureFastFMAF32]>;
949
950def FeatureISAVersion7_0_2 : FeatureSet<
951  [FeatureSeaIslands,
952   FeatureLDSBankCount16,
953   FeatureFastFMAF32]>;
954
955def FeatureISAVersion7_0_3 : FeatureSet<
956  [FeatureSeaIslands,
957   FeatureLDSBankCount16]>;
958
959def FeatureISAVersion7_0_4 : FeatureSet<
960  [FeatureSeaIslands,
961   FeatureLDSBankCount32]>;
962
963def FeatureISAVersion7_0_5 : FeatureSet<
964  [FeatureSeaIslands,
965   FeatureLDSBankCount16]>;
966
967def FeatureISAVersion8_0_1 : FeatureSet<
968  [FeatureVolcanicIslands,
969   FeatureFastFMAF32,
970   HalfRate64Ops,
971   FeatureLDSBankCount32,
972   FeatureSupportsXNACK,
973   FeatureUnpackedD16VMem]>;
974
975def FeatureISAVersion8_0_2 : FeatureSet<
976  [FeatureVolcanicIslands,
977   FeatureLDSBankCount32,
978   FeatureSGPRInitBug,
979   FeatureUnpackedD16VMem]>;
980
981def FeatureISAVersion8_0_3 : FeatureSet<
982  [FeatureVolcanicIslands,
983   FeatureLDSBankCount32,
984   FeatureUnpackedD16VMem]>;
985
986def FeatureISAVersion8_0_5 : FeatureSet<
987  [FeatureVolcanicIslands,
988   FeatureLDSBankCount32,
989   FeatureSGPRInitBug,
990   FeatureUnpackedD16VMem]>;
991
992def FeatureISAVersion8_1_0 : FeatureSet<
993  [FeatureVolcanicIslands,
994   FeatureLDSBankCount16,
995   FeatureSupportsXNACK,
996   FeatureImageStoreD16Bug,
997   FeatureImageGather4D16Bug]>;
998
999def FeatureISAVersion9_0_0 : FeatureSet<
1000  [FeatureGFX9,
1001   FeatureMadMixInsts,
1002   FeatureLDSBankCount32,
1003   FeatureDsSrc2Insts,
1004   FeatureExtendedImageInsts,
1005   FeatureImageInsts,
1006   FeatureMadMacF32Insts,
1007   FeatureImageGather4D16Bug]>;
1008
1009def FeatureISAVersion9_0_2 : FeatureSet<
1010  [FeatureGFX9,
1011   FeatureMadMixInsts,
1012   FeatureLDSBankCount32,
1013   FeatureDsSrc2Insts,
1014   FeatureExtendedImageInsts,
1015   FeatureImageInsts,
1016   FeatureMadMacF32Insts,
1017   FeatureImageGather4D16Bug]>;
1018
1019def FeatureISAVersion9_0_4 : FeatureSet<
1020  [FeatureGFX9,
1021   FeatureLDSBankCount32,
1022   FeatureDsSrc2Insts,
1023   FeatureExtendedImageInsts,
1024   FeatureImageInsts,
1025   FeatureMadMacF32Insts,
1026   FeatureFmaMixInsts,
1027   FeatureImageGather4D16Bug]>;
1028
1029def FeatureISAVersion9_0_6 : FeatureSet<
1030  [FeatureGFX9,
1031   HalfRate64Ops,
1032   FeatureFmaMixInsts,
1033   FeatureLDSBankCount32,
1034   FeatureDsSrc2Insts,
1035   FeatureExtendedImageInsts,
1036   FeatureImageInsts,
1037   FeatureMadMacF32Insts,
1038   FeatureDLInsts,
1039   FeatureDot1Insts,
1040   FeatureDot2Insts,
1041   FeatureDot7Insts,
1042   FeatureSupportsSRAMECC,
1043   FeatureImageGather4D16Bug]>;
1044
1045def FeatureISAVersion9_0_8 : FeatureSet<
1046  [FeatureGFX9,
1047   HalfRate64Ops,
1048   FeatureFmaMixInsts,
1049   FeatureLDSBankCount32,
1050   FeatureDsSrc2Insts,
1051   FeatureExtendedImageInsts,
1052   FeatureImageInsts,
1053   FeatureMadMacF32Insts,
1054   FeatureDLInsts,
1055   FeatureDot1Insts,
1056   FeatureDot2Insts,
1057   FeatureDot3Insts,
1058   FeatureDot4Insts,
1059   FeatureDot5Insts,
1060   FeatureDot6Insts,
1061   FeatureDot7Insts,
1062   FeatureMAIInsts,
1063   FeaturePkFmacF16Inst,
1064   FeatureAtomicFaddNoRtnInsts,
1065   FeatureAtomicPkFaddNoRtnInsts,
1066   FeatureSupportsSRAMECC,
1067   FeatureMFMAInlineLiteralBug,
1068   FeatureImageGather4D16Bug]>;
1069
1070def FeatureISAVersion9_0_9 : FeatureSet<
1071  [FeatureGFX9,
1072   FeatureMadMixInsts,
1073   FeatureLDSBankCount32,
1074   FeatureDsSrc2Insts,
1075   FeatureExtendedImageInsts,
1076   FeatureImageInsts,
1077   FeatureMadMacF32Insts,
1078   FeatureImageGather4D16Bug]>;
1079
1080def FeatureISAVersion9_0_A : FeatureSet<
1081  [FeatureGFX9,
1082   FeatureGFX90AInsts,
1083   FeatureFmaMixInsts,
1084   FeatureLDSBankCount32,
1085   FeatureDLInsts,
1086   FeatureDot1Insts,
1087   FeatureDot2Insts,
1088   FeatureDot3Insts,
1089   FeatureDot4Insts,
1090   FeatureDot5Insts,
1091   FeatureDot6Insts,
1092   FeatureDot7Insts,
1093   Feature64BitDPP,
1094   FeaturePackedFP32Ops,
1095   FeatureMAIInsts,
1096   FeaturePkFmacF16Inst,
1097   FeatureAtomicFaddRtnInsts,
1098   FeatureAtomicFaddNoRtnInsts,
1099   FeatureAtomicPkFaddNoRtnInsts,
1100   FeatureImageInsts,
1101   FeatureMadMacF32Insts,
1102   FeatureSupportsSRAMECC,
1103   FeaturePackedTID,
1104   FullRate64Ops]>;
1105
1106def FeatureISAVersion9_0_C : FeatureSet<
1107  [FeatureGFX9,
1108   FeatureMadMixInsts,
1109   FeatureLDSBankCount32,
1110   FeatureDsSrc2Insts,
1111   FeatureExtendedImageInsts,
1112   FeatureImageInsts,
1113   FeatureMadMacF32Insts,
1114   FeatureImageGather4D16Bug]>;
1115
1116def FeatureISAVersion9_4_0 : FeatureSet<
1117  [FeatureGFX9,
1118   FeatureGFX90AInsts,
1119   FeatureGFX940Insts,
1120   FeatureFmaMixInsts,
1121   FeatureLDSBankCount32,
1122   FeatureDLInsts,
1123   FeatureDot1Insts,
1124   FeatureDot2Insts,
1125   FeatureDot3Insts,
1126   FeatureDot4Insts,
1127   FeatureDot5Insts,
1128   FeatureDot6Insts,
1129   FeatureDot7Insts,
1130   Feature64BitDPP,
1131   FeaturePackedFP32Ops,
1132   FeatureMAIInsts,
1133   FeatureFP8Insts,
1134   FeaturePkFmacF16Inst,
1135   FeatureAtomicFaddRtnInsts,
1136   FeatureAtomicFaddNoRtnInsts,
1137   FeatureAtomicPkFaddNoRtnInsts,
1138   FeatureSupportsSRAMECC,
1139   FeaturePackedTID,
1140   FeatureArchitectedFlatScratch,
1141   FullRate64Ops]>;
1142
1143// TODO: Organize more features into groups.
1144def FeatureGroup {
1145  // Bugs present on gfx10.1.
1146  list<SubtargetFeature> GFX10_1_Bugs = [
1147    FeatureVcmpxPermlaneHazard,
1148    FeatureVMEMtoScalarWriteHazard,
1149    FeatureSMEMtoVectorWriteHazard,
1150    FeatureInstFwdPrefetchBug,
1151    FeatureVcmpxExecWARHazard,
1152    FeatureLdsBranchVmemWARHazard,
1153    FeatureNSAtoVMEMBug,
1154    FeatureNSAClauseBug,
1155    FeatureOffset3fBug,
1156    FeatureFlatSegmentOffsetBug,
1157    FeatureNegativeUnalignedScratchOffsetBug
1158   ];
1159}
1160
1161def FeatureISAVersion10_1_0 : FeatureSet<
1162  !listconcat(FeatureGroup.GFX10_1_Bugs,
1163    [FeatureGFX10,
1164     FeatureLDSBankCount32,
1165     FeatureDLInsts,
1166     FeatureNSAEncoding,
1167     FeatureNSAMaxSize5,
1168     FeatureWavefrontSize32,
1169     FeatureScalarStores,
1170     FeatureScalarAtomics,
1171     FeatureScalarFlatScratchInsts,
1172     FeatureGetWaveIdInst,
1173     FeatureMadMacF32Insts,
1174     FeatureDsSrc2Insts,
1175     FeatureLdsMisalignedBug,
1176     FeatureSupportsXNACK])>;
1177
1178def FeatureISAVersion10_1_1 : FeatureSet<
1179  !listconcat(FeatureGroup.GFX10_1_Bugs,
1180    [FeatureGFX10,
1181     FeatureLDSBankCount32,
1182     FeatureDLInsts,
1183     FeatureDot1Insts,
1184     FeatureDot2Insts,
1185     FeatureDot5Insts,
1186     FeatureDot6Insts,
1187     FeatureDot7Insts,
1188     FeatureNSAEncoding,
1189     FeatureNSAMaxSize5,
1190     FeatureWavefrontSize32,
1191     FeatureScalarStores,
1192     FeatureScalarAtomics,
1193     FeatureScalarFlatScratchInsts,
1194     FeatureGetWaveIdInst,
1195     FeatureMadMacF32Insts,
1196     FeatureDsSrc2Insts,
1197     FeatureLdsMisalignedBug,
1198     FeatureSupportsXNACK])>;
1199
1200def FeatureISAVersion10_1_2 : FeatureSet<
1201  !listconcat(FeatureGroup.GFX10_1_Bugs,
1202    [FeatureGFX10,
1203     FeatureLDSBankCount32,
1204     FeatureDLInsts,
1205     FeatureDot1Insts,
1206     FeatureDot2Insts,
1207     FeatureDot5Insts,
1208     FeatureDot6Insts,
1209     FeatureDot7Insts,
1210     FeatureNSAEncoding,
1211     FeatureNSAMaxSize5,
1212     FeatureWavefrontSize32,
1213     FeatureScalarStores,
1214     FeatureScalarAtomics,
1215     FeatureScalarFlatScratchInsts,
1216     FeatureGetWaveIdInst,
1217     FeatureMadMacF32Insts,
1218     FeatureDsSrc2Insts,
1219     FeatureLdsMisalignedBug,
1220     FeatureSupportsXNACK])>;
1221
1222def FeatureISAVersion10_1_3 : FeatureSet<
1223  !listconcat(FeatureGroup.GFX10_1_Bugs,
1224    [FeatureGFX10,
1225     FeatureGFX10_AEncoding,
1226     FeatureLDSBankCount32,
1227     FeatureDLInsts,
1228     FeatureNSAEncoding,
1229     FeatureNSAMaxSize5,
1230     FeatureWavefrontSize32,
1231     FeatureScalarStores,
1232     FeatureScalarAtomics,
1233     FeatureScalarFlatScratchInsts,
1234     FeatureGetWaveIdInst,
1235     FeatureMadMacF32Insts,
1236     FeatureDsSrc2Insts,
1237     FeatureLdsMisalignedBug,
1238     FeatureSupportsXNACK])>;
1239
1240def FeatureISAVersion10_3_0 : FeatureSet<
1241  [FeatureGFX10,
1242   FeatureGFX10_AEncoding,
1243   FeatureGFX10_BEncoding,
1244   FeatureGFX10_3Insts,
1245   FeatureLDSBankCount32,
1246   FeatureDLInsts,
1247   FeatureDot1Insts,
1248   FeatureDot2Insts,
1249   FeatureDot5Insts,
1250   FeatureDot6Insts,
1251   FeatureDot7Insts,
1252   FeatureNSAEncoding,
1253   FeatureNSAMaxSize13,
1254   FeatureWavefrontSize32,
1255   FeatureShaderCyclesRegister]>;
1256
1257def FeatureISAVersion11_Common : FeatureSet<
1258  [FeatureGFX11,
1259   FeatureLDSBankCount32,
1260   FeatureDLInsts,
1261   FeatureDot5Insts,
1262   FeatureDot7Insts,
1263   FeatureDot8Insts,
1264   FeatureNSAEncoding,
1265   FeatureNSAMaxSize5,
1266   FeatureWavefrontSize32,
1267   FeatureShaderCyclesRegister,
1268   FeatureArchitectedFlatScratch,
1269   FeatureAtomicFaddRtnInsts,
1270   FeatureAtomicFaddNoRtnInsts,
1271   FeatureImageInsts,
1272   FeaturePackedTID,
1273   FeatureVcmpxPermlaneHazard]>;
1274
1275// Features for GFX 11.0.0 and 11.0.1
1276def FeatureISAVersion11_0 : FeatureSet<
1277  !listconcat(FeatureISAVersion11_Common.Features,
1278    [FeatureUserSGPRInit16Bug])>;
1279
1280def FeatureISAVersion11_0_2 : FeatureSet<
1281  !listconcat(FeatureISAVersion11_Common.Features,
1282    [FeatureUserSGPRInit16Bug])>;
1283
1284//===----------------------------------------------------------------------===//
1285
1286def AMDGPUInstrInfo : InstrInfo {
1287  let guessInstructionProperties = 1;
1288  let noNamedPositionallyEncodedOperands = 1;
1289}
1290
1291def AMDGPUAsmParser : AsmParser {
1292  // Some of the R600 registers have the same name, so this crashes.
1293  // For example T0_XYZW and T0_XY both have the asm name T0.
1294  let ShouldEmitMatchRegisterName = 0;
1295}
1296
1297def AMDGPUAsmWriter : AsmWriter {
1298  int PassSubtarget = 1;
1299}
1300
1301def AMDGPUAsmVariants {
1302  string Default = "Default";
1303  int Default_ID = 0;
1304  string VOP3 = "VOP3";
1305  int VOP3_ID = 1;
1306  string SDWA = "SDWA";
1307  int SDWA_ID = 2;
1308  string SDWA9 = "SDWA9";
1309  int SDWA9_ID = 3;
1310  string DPP = "DPP";
1311  int DPP_ID = 4;
1312  string VOP3_DPP = "VOP3_DPP";
1313  int VOP3_DPP_ID = 5;
1314  string Disable = "Disable";
1315  int Disable_ID = 6;
1316}
1317
1318def DefaultAMDGPUAsmParserVariant : AsmParserVariant {
1319  let Variant = AMDGPUAsmVariants.Default_ID;
1320  let Name = AMDGPUAsmVariants.Default;
1321}
1322
1323def VOP3AsmParserVariant : AsmParserVariant {
1324  let Variant = AMDGPUAsmVariants.VOP3_ID;
1325  let Name = AMDGPUAsmVariants.VOP3;
1326}
1327
1328def SDWAAsmParserVariant : AsmParserVariant {
1329  let Variant = AMDGPUAsmVariants.SDWA_ID;
1330  let Name = AMDGPUAsmVariants.SDWA;
1331}
1332
1333def SDWA9AsmParserVariant : AsmParserVariant {
1334  let Variant = AMDGPUAsmVariants.SDWA9_ID;
1335  let Name = AMDGPUAsmVariants.SDWA9;
1336}
1337
1338def DPPAsmParserVariant : AsmParserVariant {
1339  let Variant = AMDGPUAsmVariants.DPP_ID;
1340  let Name = AMDGPUAsmVariants.DPP;
1341}
1342
1343def VOP3_DPPAsmParserVariant : AsmParserVariant {
1344  let Variant = AMDGPUAsmVariants.VOP3_DPP_ID;
1345  let Name = AMDGPUAsmVariants.VOP3_DPP;
1346}
1347
1348def AMDGPU : Target {
1349  // Pull in Instruction Info:
1350  let InstructionSet = AMDGPUInstrInfo;
1351  let AssemblyParsers = [AMDGPUAsmParser];
1352  let AssemblyParserVariants = [DefaultAMDGPUAsmParserVariant,
1353                                VOP3AsmParserVariant,
1354                                SDWAAsmParserVariant,
1355                                SDWA9AsmParserVariant,
1356                                DPPAsmParserVariant,
1357                                VOP3_DPPAsmParserVariant];
1358  let AssemblyWriters = [AMDGPUAsmWriter];
1359  let AllowRegisterRenaming = 1;
1360}
1361
1362// Dummy Instruction itineraries for pseudo instructions
1363def ALU_NULL : FuncUnit;
1364def NullALU : InstrItinClass;
1365
1366//===----------------------------------------------------------------------===//
1367// Predicate helper class
1368//===----------------------------------------------------------------------===//
1369
1370def isGFX6 :
1371  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
1372  AssemblerPredicate<(all_of FeatureSouthernIslands)>;
1373
1374def isGFX6GFX7 :
1375  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1376            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1377  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX10Insts))>;
1378
1379def isGFX6GFX7GFX10 :
1380  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1381            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1382            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1383  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX11Insts))>;
1384
1385def isGFX6GFX7GFX10Plus :
1386  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1387            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1388            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1389  AssemblerPredicate<(all_of (not FeatureGCN3Encoding))>;
1390
1391def isGFX7Only :
1392  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1393  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX10Insts))>;
1394
1395def isGFX7GFX10 :
1396  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1397            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1398  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX11Insts))>;
1399
1400def isGFX7GFX10GFX11 :
1401  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1402            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1403            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1404  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts)>;
1405
1406def isGFX7GFX8GFX9 :
1407  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1408            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1409            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1410  AssemblerPredicate<(all_of FeatureGFX7GFX8GFX9Insts)>;
1411
1412def isGFX6GFX7GFX8GFX9 :
1413  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1414            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1415            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1416            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1417  AssemblerPredicate<(all_of (not FeatureGFX10Insts))>;
1418
1419def isGFX6GFX7GFX8GFX9NotGFX90A :
1420  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1421            "(Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1422            " Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1423            " Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1424            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1425  AssemblerPredicate<(all_of (not FeatureGFX10Insts), (not FeatureGFX90AInsts))>;
1426
1427def isGFX6GFX7GFX8GFX9GFX10 :
1428  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1429            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1430            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1431            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1432            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1433  AssemblerPredicate<(all_of (not FeatureGFX11Insts))>;
1434
1435def isGFX7GFX8GFX9GFX10 :
1436  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1437            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1438            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1439            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1440  AssemblerPredicate<(all_of FeatureCIInsts, (not FeatureGFX11Insts))>;
1441
1442def isGFX7Plus :
1443  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">,
1444  AssemblerPredicate<(all_of FeatureCIInsts)>;
1445
1446def isGFX8Plus :
1447  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1448  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1449
1450def isGFX8Only : Predicate<"Subtarget->getGeneration() =="
1451                           "AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1452  AssemblerPredicate <(all_of FeatureVolcanicIslands)>;
1453
1454def isGFX9Plus :
1455  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1456  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1457
1458def isGFX9Only : Predicate <
1459  "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1460  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts)>;
1461
1462def isGCN3ExcludingGFX90A :
1463  Predicate<"Subtarget->isGCN3Encoding() && !Subtarget->hasGFX90AInsts()">,
1464  AssemblerPredicate<(all_of FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1465
1466def isGFX90APlus :
1467  Predicate<"Subtarget->hasGFX90AInsts()">,
1468  AssemblerPredicate<(all_of FeatureGFX90AInsts)>;
1469
1470def isNotGFX90APlus :
1471  Predicate<"!Subtarget->hasGFX90AInsts()">,
1472  AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
1473
1474def isGFX8GFX9NotGFX90A :
1475  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1476            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1477            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1478  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1479
1480def isGFX90AOnly :
1481  Predicate<"Subtarget->hasGFX90AInsts() && !Subtarget->hasGFX940Insts()">,
1482  AssemblerPredicate<(all_of FeatureGFX90AInsts, (not FeatureGFX940Insts))>;
1483
1484def isGFX908orGFX90A :
1485  Predicate<"Subtarget->hasMAIInsts() && !Subtarget->hasGFX940Insts()">,
1486  AssemblerPredicate<(all_of FeatureMAIInsts, (not FeatureGFX940Insts))>;
1487
1488def isGFX940Plus :
1489  Predicate<"Subtarget->hasGFX940Insts()">,
1490  AssemblerPredicate<(all_of FeatureGFX940Insts)>;
1491
1492def isGFX940GFX11Plus :
1493  Predicate<"Subtarget->hasGFX940Insts() ||"
1494            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1495  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1496
1497def isGFX8GFX9NotGFX940 :
1498  Predicate<"!Subtarget->hasGFX940Insts() &&"
1499            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1500            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1501  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX940Insts))>;
1502
1503def isGFX8GFX9 :
1504  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1505            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1506  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding)>;
1507
1508def isGFX10Only :
1509  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1510  AssemblerPredicate<(all_of FeatureGFX10Insts, (not FeatureGFX11Insts))>;
1511
1512def isGFX10Plus :
1513  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1514  AssemblerPredicate<(all_of FeatureGFX10Insts)>;
1515
1516def isGFX10Before1030 :
1517  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 &&"
1518            "!Subtarget->hasGFX10_3Insts()">,
1519  AssemblerPredicate<(all_of FeatureGFX10Insts,(not FeatureGFX10_3Insts))>;
1520
1521def isGFX9GFX10 :
1522  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1523            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1524  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureGFX11Insts))>;
1525
1526def isGFX8GFX9GFX10 :
1527  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1528            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1529            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1530  AssemblerPredicate<(all_of FeatureGFX8Insts, (not FeatureGFX11Insts))>;
1531
1532def isGFX11Only :
1533  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1534  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1535
1536def isGFX11Plus :
1537  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1538  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1539
1540def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">,
1541  AssemblerPredicate<(all_of FeatureFlatAddressSpace)>;
1542
1543def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">,
1544  AssemblerPredicate<(all_of FeatureFlatGlobalInsts)>;
1545def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
1546  AssemblerPredicate<(all_of FeatureFlatScratchInsts)>;
1547def HasScalarFlatScratchInsts : Predicate<"Subtarget->hasScalarFlatScratchInsts()">,
1548  AssemblerPredicate<(all_of FeatureScalarFlatScratchInsts)>;
1549def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
1550  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1551
1552def HasFlatScratchSTMode : Predicate<"Subtarget->hasFlatScratchSTMode()">,
1553  AssemblerPredicate<(any_of FeatureGFX10_3Insts, FeatureGFX940Insts)>;
1554def HasFlatScratchSVSMode : Predicate<"Subtarget->hasFlatScratchSVSMode()">,
1555  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1556
1557def HasGFX10_AEncoding : Predicate<"Subtarget->hasGFX10_AEncoding()">,
1558  AssemblerPredicate<(all_of FeatureGFX10_AEncoding)>;
1559
1560def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">,
1561  AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>;
1562
1563def HasUnpackedD16VMem : Predicate<"Subtarget->hasUnpackedD16VMem()">,
1564  AssemblerPredicate<(all_of FeatureUnpackedD16VMem)>;
1565def HasPackedD16VMem : Predicate<"!Subtarget->hasUnpackedD16VMem()">,
1566  AssemblerPredicate<(all_of (not FeatureUnpackedD16VMem))>;
1567
1568def D16PreservesUnusedBits :
1569  Predicate<"Subtarget->d16PreservesUnusedBits()">,
1570  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureSRAMECC))>;
1571
1572def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
1573def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
1574
1575def HasDSAddTid : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1576  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1577
1578def HasLDSFPAtomicAdd : Predicate<"Subtarget->hasLDSFPAtomicAdd()">,
1579  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1580
1581def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarry()">,
1582  AssemblerPredicate<(all_of FeatureAddNoCarryInsts)>;
1583
1584def NotHasAddNoCarryInsts : Predicate<"!Subtarget->hasAddNoCarry()">;
1585
1586def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
1587  AssemblerPredicate<(all_of Feature16BitInsts)>;
1588
1589def HasTrue16BitInsts : Predicate<"Subtarget->hasTrue16BitInsts()">,
1590  AssemblerPredicate<(all_of FeatureTrue16BitInsts)>;
1591def NotHasTrue16BitInsts : Predicate<"!Subtarget->hasTrue16BitInsts()">;
1592
1593def HasVOP3PInsts : Predicate<"Subtarget->hasVOP3PInsts()">,
1594  AssemblerPredicate<(all_of FeatureVOP3P)>;
1595
1596def HasMinMaxDenormModes : Predicate<"Subtarget->supportsMinMaxDenormModes()">;
1597def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()">;
1598
1599def HasSDWA : Predicate<"Subtarget->hasSDWA()">,
1600  AssemblerPredicate<(all_of FeatureSDWA, FeatureVolcanicIslands)>;
1601
1602def HasSDWA9 :
1603  Predicate<"Subtarget->hasSDWA()">,
1604  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts,FeatureSDWA)>;
1605
1606def HasSDWA10 :
1607  Predicate<"Subtarget->hasSDWA()">,
1608  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureSDWA)>;
1609
1610def HasDPP : Predicate<"Subtarget->hasDPP()">,
1611  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureDPP)>;
1612
1613def HasDPP8 : Predicate<"Subtarget->hasDPP8()">,
1614  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP8)>;
1615
1616def Has64BitDPP : Predicate<"Subtarget->has64BitDPP()">,
1617  AssemblerPredicate<(all_of Feature64BitDPP)>;
1618
1619def HasPackedFP32Ops : Predicate<"Subtarget->hasPackedFP32Ops()">,
1620  AssemblerPredicate<(all_of FeaturePackedFP32Ops)>;
1621
1622def HasFmaakFmamkF32Insts :
1623  Predicate<"Subtarget->hasFmaakFmamkF32Insts()">,
1624  AssemblerPredicate<(any_of FeatureGFX10Insts, FeatureGFX940Insts)>;
1625
1626def HasImageInsts : Predicate<"Subtarget->hasImageInsts()">,
1627  AssemblerPredicate<(all_of FeatureImageInsts)>;
1628
1629def HasExtendedImageInsts : Predicate<"Subtarget->hasExtendedImageInsts()">,
1630  AssemblerPredicate<(all_of FeatureExtendedImageInsts)>;
1631
1632def HasR128A16 : Predicate<"Subtarget->hasR128A16()">,
1633  AssemblerPredicate<(all_of FeatureR128A16)>;
1634
1635def HasGFX10A16 : Predicate<"Subtarget->hasGFX10A16()">,
1636  AssemblerPredicate<(all_of FeatureGFX10A16)>;
1637
1638def HasG16 : Predicate<"Subtarget->hasG16()">,
1639  AssemblerPredicate<(all_of FeatureG16)>;
1640
1641def HasDPP16 : Predicate<"Subtarget->hasDPP()">,
1642  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP)>;
1643
1644def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">,
1645  AssemblerPredicate<(all_of FeatureIntClamp)>;
1646
1647def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">,
1648  AssemblerPredicate<(all_of FeatureMadMixInsts)>;
1649
1650def HasScalarStores : Predicate<"Subtarget->hasScalarStores()">,
1651  AssemblerPredicate<(all_of FeatureScalarStores)>;
1652
1653def HasScalarAtomics : Predicate<"Subtarget->hasScalarAtomics()">,
1654  AssemblerPredicate<(all_of FeatureScalarAtomics)>;
1655
1656def HasNoSdstCMPX : Predicate<"Subtarget->hasNoSdstCMPX()">,
1657  AssemblerPredicate<(all_of FeatureNoSdstCMPX)>;
1658
1659def HasSdstCMPX : Predicate<"!Subtarget->hasNoSdstCMPX()">,
1660  AssemblerPredicate<(all_of (not FeatureNoSdstCMPX))>;
1661
1662def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">;
1663def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">;
1664def HasVGPRIndexMode : Predicate<"Subtarget->hasVGPRIndexMode()">,
1665                      AssemblerPredicate<(all_of FeatureVGPRIndexMode)>;
1666def HasMovrel : Predicate<"Subtarget->hasMovrel()">,
1667                AssemblerPredicate<(all_of FeatureMovrel)>;
1668
1669def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">,
1670  AssemblerPredicate<(all_of FeatureFmaMixInsts)>;
1671
1672def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">,
1673  AssemblerPredicate<(all_of FeatureDLInsts)>;
1674
1675def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">,
1676  AssemblerPredicate<(all_of FeatureDot1Insts)>;
1677
1678def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">,
1679  AssemblerPredicate<(all_of FeatureDot2Insts)>;
1680
1681def HasDot3Insts : Predicate<"Subtarget->hasDot3Insts()">,
1682  AssemblerPredicate<(all_of FeatureDot3Insts)>;
1683
1684def HasDot4Insts : Predicate<"Subtarget->hasDot4Insts()">,
1685  AssemblerPredicate<(all_of FeatureDot4Insts)>;
1686
1687def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">,
1688  AssemblerPredicate<(all_of FeatureDot5Insts)>;
1689
1690def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
1691  AssemblerPredicate<(all_of FeatureDot6Insts)>;
1692
1693def HasDot7Insts : Predicate<"Subtarget->hasDot7Insts()">,
1694  AssemblerPredicate<(all_of FeatureDot7Insts)>;
1695
1696def HasDot8Insts : Predicate<"Subtarget->hasDot8Insts()">,
1697  AssemblerPredicate<(all_of FeatureDot8Insts)>;
1698
1699def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">,
1700  AssemblerPredicate<(all_of FeatureGetWaveIdInst)>;
1701
1702def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">,
1703  AssemblerPredicate<(all_of FeatureMAIInsts)>;
1704
1705def HasSMemRealTime : Predicate<"Subtarget->hasSMemRealTime()">,
1706  AssemblerPredicate<(all_of FeatureSMemRealTime)>;
1707
1708def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">,
1709  AssemblerPredicate<(all_of FeatureSMemTimeInst)>;
1710
1711def HasShaderCyclesRegister : Predicate<"Subtarget->hasShaderCyclesRegister()">,
1712  AssemblerPredicate<(all_of FeatureShaderCyclesRegister)>;
1713
1714def HasFP8Insts : Predicate<"Subtarget->hasFP8Insts()">,
1715  AssemblerPredicate<(all_of FeatureFP8Insts)>;
1716
1717def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">,
1718  AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>;
1719
1720def HasMadMacF32Insts : Predicate<"Subtarget->hasMadMacF32Insts()">,
1721  AssemblerPredicate<(all_of FeatureMadMacF32Insts)>;
1722
1723def HasFmaLegacy32 : Predicate<"Subtarget->hasGFX10_3Insts()">,
1724  AssemblerPredicate<(any_of FeatureGFX10_3Insts)>;
1725
1726def HasAtomicFaddRtnInsts : Predicate<"Subtarget->hasAtomicFaddRtnInsts()">,
1727  AssemblerPredicate<(all_of FeatureAtomicFaddRtnInsts)>;
1728def HasAtomicFaddNoRtnInsts : Predicate<"Subtarget->hasAtomicFaddNoRtnInsts()">,
1729  AssemblerPredicate<(all_of FeatureAtomicFaddNoRtnInsts)>;
1730def HasAtomicPkFaddNoRtnInsts
1731  : Predicate<"Subtarget->hasAtomicPkFaddNoRtnInsts()">,
1732  AssemblerPredicate<(all_of FeatureAtomicPkFaddNoRtnInsts)>;
1733
1734def HasDsSrc2Insts : Predicate<"!Subtarget->hasDsSrc2Insts()">,
1735  AssemblerPredicate<(all_of FeatureDsSrc2Insts)>;
1736
1737def EnableLateCFGStructurize : Predicate<
1738  "EnableLateStructurizeCFG">;
1739
1740def EnableFlatScratch : Predicate<"Subtarget->enableFlatScratch()">;
1741
1742def DisableFlatScratch : Predicate<"!Subtarget->enableFlatScratch()">;
1743
1744def HasUnalignedAccessMode : Predicate<"Subtarget->hasUnalignedAccessMode()">,
1745  AssemblerPredicate<(all_of FeatureUnalignedAccessMode)>;
1746
1747// Include AMDGPU TD files
1748include "SISchedule.td"
1749include "GCNProcessors.td"
1750include "AMDGPUInstrInfo.td"
1751include "SIRegisterInfo.td"
1752include "AMDGPURegisterBanks.td"
1753include "AMDGPUInstructions.td"
1754include "SIInstrInfo.td"
1755include "AMDGPUCallingConv.td"
1756include "AMDGPUSearchableTables.td"
1757