1 //===-- AArch64MCTargetDesc.cpp - AArch64 Target Descriptions ---*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides AArch64 specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AArch64MCTargetDesc.h"
15 #include "AArch64ELFStreamer.h"
16 #include "AArch64MCAsmInfo.h"
17 #include "InstPrinter/AArch64InstPrinter.h"
18 #include "llvm/MC/MCInstrAnalysis.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
25 
26 using namespace llvm;
27 
28 #define GET_INSTRINFO_MC_DESC
29 #include "AArch64GenInstrInfo.inc"
30 
31 #define GET_SUBTARGETINFO_MC_DESC
32 #include "AArch64GenSubtargetInfo.inc"
33 
34 #define GET_REGINFO_MC_DESC
35 #include "AArch64GenRegisterInfo.inc"
36 
37 static MCInstrInfo *createAArch64MCInstrInfo() {
38   MCInstrInfo *X = new MCInstrInfo();
39   InitAArch64MCInstrInfo(X);
40   return X;
41 }
42 
43 static MCSubtargetInfo *
44 createAArch64MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
45   if (CPU.empty())
46     CPU = "generic";
47 
48   return createAArch64MCSubtargetInfoImpl(TT, CPU, FS);
49 }
50 
51 static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) {
52   MCRegisterInfo *X = new MCRegisterInfo();
53   InitAArch64MCRegisterInfo(X, AArch64::LR);
54   return X;
55 }
56 
57 static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
58                                          const Triple &TheTriple) {
59   MCAsmInfo *MAI;
60   if (TheTriple.isOSBinFormatMachO())
61     MAI = new AArch64MCAsmInfoDarwin();
62   else {
63     assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
64     MAI = new AArch64MCAsmInfoELF(TheTriple);
65   }
66 
67   // Initial state of the frame pointer is SP.
68   unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true);
69   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
70   MAI->addInitialFrameState(Inst);
71 
72   return MAI;
73 }
74 
75 static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
76                               CodeModel::Model &CM) {
77   assert((TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()) &&
78          "Only expect Darwin and ELF targets");
79 
80   if (CM == CodeModel::Default)
81     CM = CodeModel::Small;
82   // The default MCJIT memory managers make no guarantees about where they can
83   // find an executable page; JITed code needs to be able to refer to globals
84   // no matter how far away they are.
85   else if (CM == CodeModel::JITDefault)
86     CM = CodeModel::Large;
87   else if (CM != CodeModel::Small && CM != CodeModel::Large)
88     report_fatal_error(
89         "Only small and large code models are allowed on AArch64");
90 }
91 
92 static MCInstPrinter *createAArch64MCInstPrinter(const Triple &T,
93                                                  unsigned SyntaxVariant,
94                                                  const MCAsmInfo &MAI,
95                                                  const MCInstrInfo &MII,
96                                                  const MCRegisterInfo &MRI) {
97   if (SyntaxVariant == 0)
98     return new AArch64InstPrinter(MAI, MII, MRI);
99   if (SyntaxVariant == 1)
100     return new AArch64AppleInstPrinter(MAI, MII, MRI);
101 
102   return nullptr;
103 }
104 
105 static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
106                                      MCAsmBackend &TAB, raw_pwrite_stream &OS,
107                                      MCCodeEmitter *Emitter, bool RelaxAll) {
108   return createAArch64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
109 }
110 
111 static MCStreamer *createMachOStreamer(MCContext &Ctx, MCAsmBackend &TAB,
112                                        raw_pwrite_stream &OS,
113                                        MCCodeEmitter *Emitter, bool RelaxAll,
114                                        bool DWARFMustBeAtTheEnd) {
115   return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
116                              DWARFMustBeAtTheEnd,
117                              /*LabelSections*/ true);
118 }
119 
120 static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
121   return new MCInstrAnalysis(Info);
122 }
123 
124 // Force static initialization.
125 extern "C" void LLVMInitializeAArch64TargetMC() {
126   for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
127                     &getTheARM64Target()}) {
128     // Register the MC asm info.
129     RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
130 
131     // Register the MC codegen info.
132     TargetRegistry::registerMCAdjustCodeGenOpts(*T, adjustCodeGenOpts);
133 
134     // Register the MC instruction info.
135     TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);
136 
137     // Register the MC register info.
138     TargetRegistry::RegisterMCRegInfo(*T, createAArch64MCRegisterInfo);
139 
140     // Register the MC subtarget info.
141     TargetRegistry::RegisterMCSubtargetInfo(*T, createAArch64MCSubtargetInfo);
142 
143     // Register the MC instruction analyzer.
144     TargetRegistry::RegisterMCInstrAnalysis(*T, createAArch64InstrAnalysis);
145 
146     // Register the MC Code Emitter
147     TargetRegistry::RegisterMCCodeEmitter(*T, createAArch64MCCodeEmitter);
148 
149     // Register the obj streamers.
150     TargetRegistry::RegisterELFStreamer(*T, createELFStreamer);
151     TargetRegistry::RegisterMachOStreamer(*T, createMachOStreamer);
152 
153     // Register the obj target streamer.
154     TargetRegistry::RegisterObjectTargetStreamer(
155         *T, createAArch64ObjectTargetStreamer);
156 
157     // Register the asm streamer.
158     TargetRegistry::RegisterAsmTargetStreamer(*T,
159                                               createAArch64AsmTargetStreamer);
160     // Register the MCInstPrinter.
161     TargetRegistry::RegisterMCInstPrinter(*T, createAArch64MCInstPrinter);
162   }
163 
164   // Register the asm backend.
165   for (Target *T : {&getTheAArch64leTarget(), &getTheARM64Target()})
166     TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend);
167   TargetRegistry::RegisterMCAsmBackend(getTheAArch64beTarget(),
168                                        createAArch64beAsmBackend);
169 }
170