1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements a target parser to recognise hardware features such as 11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/Support/ARMBuildAttributes.h" 16 #include "llvm/Support/TargetParser.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/ADT/StringSwitch.h" 19 #include <cctype> 20 21 using namespace llvm; 22 23 namespace { 24 25 // List of canonical FPU names (use getFPUSynonym) and which architectural 26 // features they correspond to (use getFPUFeatures). 27 // FIXME: TableGen this. 28 // The entries must appear in the order listed in ARM::FPUKind for correct indexing 29 struct { 30 const char * Name; 31 ARM::FPUKind ID; 32 ARM::FPUVersion FPUVersion; 33 ARM::NeonSupportLevel NeonSupport; 34 ARM::FPURestriction Restriction; 35 } FPUNames[] = { 36 { "invalid", ARM::FK_INVALID, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, 37 { "none", ARM::FK_NONE, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, 38 { "vfp", ARM::FK_VFP, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None}, 39 { "vfpv2", ARM::FK_VFPV2, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None}, 40 { "vfpv3", ARM::FK_VFPV3, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_None}, 41 { "vfpv3-fp16", ARM::FK_VFPV3_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_None}, 42 { "vfpv3-d16", ARM::FK_VFPV3_D16, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_D16}, 43 { "vfpv3-d16-fp16", ARM::FK_VFPV3_D16_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_D16}, 44 { "vfpv3xd", ARM::FK_VFPV3XD, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_SP_D16}, 45 { "vfpv3xd-fp16", ARM::FK_VFPV3XD_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_SP_D16}, 46 { "vfpv4", ARM::FK_VFPV4, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_None}, 47 { "vfpv4-d16", ARM::FK_VFPV4_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_D16}, 48 { "fpv4-sp-d16", ARM::FK_FPV4_SP_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_SP_D16}, 49 { "fpv5-d16", ARM::FK_FPV5_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_D16}, 50 { "fpv5-sp-d16", ARM::FK_FPV5_SP_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_SP_D16}, 51 { "fp-armv8", ARM::FK_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_None}, 52 { "neon", ARM::FK_NEON, ARM::FV_VFPV3, ARM::NS_Neon, ARM::FR_None}, 53 { "neon-fp16", ARM::FK_NEON_FP16, ARM::FV_VFPV3_FP16, ARM::NS_Neon, ARM::FR_None}, 54 { "neon-vfpv4", ARM::FK_NEON_VFPV4, ARM::FV_VFPV4, ARM::NS_Neon, ARM::FR_None}, 55 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Neon, ARM::FR_None}, 56 { "crypto-neon-fp-armv8", 57 ARM::FK_CRYPTO_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Crypto, ARM::FR_None}, 58 { "softvfp", ARM::FK_SOFTVFP, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, 59 }; 60 61 // List of canonical arch names (use getArchSynonym). 62 // This table also provides the build attribute fields for CPU arch 63 // and Arch ID, according to the Addenda to the ARM ABI, chapters 64 // 2.4 and 2.3.5.2 respectively. 65 // FIXME: SubArch values were simplified to fit into the expectations 66 // of the triples and are not conforming with their official names. 67 // Check to see if the expectation should be changed. 68 // FIXME: TableGen this. 69 struct { 70 const char *Name; 71 ARM::ArchKind ID; 72 const char *CPUAttr; // CPU class in build attributes. 73 const char *SubArch; // Sub-Arch name. 74 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. 75 } ARCHNames[] = { 76 { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 }, 77 { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 }, 78 { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 }, 79 { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 }, 80 { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 }, 81 { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 }, 82 { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T }, 83 { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, 84 { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, 85 { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ }, 86 { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 }, 87 { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K }, 88 { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 }, 89 { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ }, 90 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ }, 91 { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M }, 92 { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M }, 93 { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 }, 94 { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 }, 95 { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 }, 96 { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M }, 97 { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 }, 98 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 }, 99 // Non-standard Arch names. 100 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE }, 101 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE }, 102 { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE }, 103 { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, 104 { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, 105 { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 }, 106 { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M }, 107 { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 }, 108 { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 }, 109 { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 }, 110 { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 } 111 }; 112 // List of Arch Extension names. 113 // FIXME: TableGen this. 114 struct { 115 const char *Name; 116 unsigned ID; 117 } ARCHExtNames[] = { 118 { "invalid", ARM::AEK_INVALID }, 119 { "none", ARM::AEK_NONE }, 120 { "crc", ARM::AEK_CRC }, 121 { "crypto", ARM::AEK_CRYPTO }, 122 { "fp", ARM::AEK_FP }, 123 { "idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV) }, 124 { "mp", ARM::AEK_MP }, 125 { "simd", ARM::AEK_SIMD }, 126 { "sec", ARM::AEK_SEC }, 127 { "virt", ARM::AEK_VIRT }, 128 { "os", ARM::AEK_OS }, 129 { "iwmmxt", ARM::AEK_IWMMXT }, 130 { "iwmmxt2", ARM::AEK_IWMMXT2 }, 131 { "maverick", ARM::AEK_MAVERICK }, 132 { "xscale", ARM::AEK_XSCALE } 133 }; 134 // List of HWDiv names (use getHWDivSynonym) and which architectural 135 // features they correspond to (use getHWDivFeatures). 136 // FIXME: TableGen this. 137 struct { 138 const char *Name; 139 unsigned ID; 140 } HWDivNames[] = { 141 { "invalid", ARM::AEK_INVALID }, 142 { "none", ARM::AEK_NONE }, 143 { "thumb", ARM::AEK_HWDIV }, 144 { "arm", ARM::AEK_HWDIVARM }, 145 { "arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV) } 146 }; 147 // List of CPU names and their arches. 148 // The same CPU can have multiple arches and can be default on multiple arches. 149 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly. 150 // When this becomes table-generated, we'd probably need two tables. 151 // FIXME: TableGen this. 152 struct { 153 const char *Name; 154 ARM::ArchKind ArchID; 155 ARM::FPUKind DefaultFPU; 156 bool Default; // is $Name the default CPU for $ArchID ? 157 } CPUNames[] = { 158 { "arm2", ARM::AK_ARMV2, ARM::FK_NONE, true }, 159 { "arm3", ARM::AK_ARMV2A, ARM::FK_NONE, true }, 160 { "arm6", ARM::AK_ARMV3, ARM::FK_NONE, true }, 161 { "arm7m", ARM::AK_ARMV3M, ARM::FK_NONE, true }, 162 { "arm8", ARM::AK_ARMV4, ARM::FK_NONE, false }, 163 { "arm810", ARM::AK_ARMV4, ARM::FK_NONE, false }, 164 { "strongarm", ARM::AK_ARMV4, ARM::FK_NONE, true }, 165 { "strongarm110", ARM::AK_ARMV4, ARM::FK_NONE, false }, 166 { "strongarm1100", ARM::AK_ARMV4, ARM::FK_NONE, false }, 167 { "strongarm1110", ARM::AK_ARMV4, ARM::FK_NONE, false }, 168 { "arm7tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, true }, 169 { "arm7tdmi-s", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 170 { "arm710t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 171 { "arm720t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 172 { "arm9", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 173 { "arm9tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 174 { "arm920", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 175 { "arm920t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 176 { "arm922t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 177 { "arm9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 178 { "arm940t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 179 { "ep9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 180 { "arm10tdmi", ARM::AK_ARMV5T, ARM::FK_NONE, true }, 181 { "arm1020t", ARM::AK_ARMV5T, ARM::FK_NONE, false }, 182 { "arm9e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 183 { "arm946e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 184 { "arm966e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 185 { "arm968e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 186 { "arm10e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 187 { "arm1020e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 188 { "arm1022e", ARM::AK_ARMV5TE, ARM::FK_NONE, true }, 189 { "iwmmxt", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 190 { "xscale", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 191 { "arm926ej-s", ARM::AK_ARMV5TEJ, ARM::FK_NONE, true }, 192 { "arm1136jf-s", ARM::AK_ARMV6, ARM::FK_VFPV2, true }, 193 { "arm1176j-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, 194 { "arm1176jz-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, 195 { "mpcore", ARM::AK_ARMV6K, ARM::FK_VFPV2, false }, 196 { "mpcorenovfp", ARM::AK_ARMV6K, ARM::FK_NONE, false }, 197 { "arm1176jzf-s", ARM::AK_ARMV6K, ARM::FK_VFPV2, true }, 198 { "arm1176jzf-s", ARM::AK_ARMV6Z, ARM::FK_VFPV2, true }, 199 { "arm1176jzf-s", ARM::AK_ARMV6ZK, ARM::FK_VFPV2, true }, 200 { "arm1156t2-s", ARM::AK_ARMV6T2, ARM::FK_NONE, true }, 201 { "arm1156t2f-s", ARM::AK_ARMV6T2, ARM::FK_VFPV2, false }, 202 { "cortex-m0", ARM::AK_ARMV6M, ARM::FK_NONE, true }, 203 { "cortex-m0plus", ARM::AK_ARMV6M, ARM::FK_NONE, false }, 204 { "cortex-m1", ARM::AK_ARMV6M, ARM::FK_NONE, false }, 205 { "sc000", ARM::AK_ARMV6M, ARM::FK_NONE, false }, 206 { "cortex-a5", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 207 { "cortex-a7", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 208 { "cortex-a8", ARM::AK_ARMV7A, ARM::FK_NEON, true }, 209 { "cortex-a9", ARM::AK_ARMV7A, ARM::FK_NEON_FP16, false }, 210 { "cortex-a12", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 211 { "cortex-a15", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 212 { "cortex-a17", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 213 { "krait", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 214 { "cortex-r4", ARM::AK_ARMV7R, ARM::FK_NONE, true }, 215 { "cortex-r4f", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, 216 { "cortex-r5", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, 217 { "cortex-r7", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16_FP16, false }, 218 { "sc300", ARM::AK_ARMV7M, ARM::FK_NONE, false }, 219 { "cortex-m3", ARM::AK_ARMV7M, ARM::FK_NONE, true }, 220 { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_FPV4_SP_D16, true }, 221 { "cortex-m7", ARM::AK_ARMV7EM, ARM::FK_FPV5_D16, false }, 222 { "cortex-a53", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, true }, 223 { "cortex-a57", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, 224 { "cortex-a72", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, 225 { "cyclone", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, 226 { "generic", ARM::AK_ARMV8_1A, ARM::FK_NEON_FP_ARMV8, true }, 227 // Non-standard Arch names. 228 { "iwmmxt", ARM::AK_IWMMXT, ARM::FK_NONE, true }, 229 { "xscale", ARM::AK_XSCALE, ARM::FK_NONE, true }, 230 { "arm10tdmi", ARM::AK_ARMV5, ARM::FK_NONE, true }, 231 { "arm1022e", ARM::AK_ARMV5E, ARM::FK_NONE, true }, 232 { "arm1136j-s", ARM::AK_ARMV6J, ARM::FK_NONE, true }, 233 { "arm1136jz-s", ARM::AK_ARMV6J, ARM::FK_NONE, false }, 234 { "cortex-m0", ARM::AK_ARMV6SM, ARM::FK_NONE, true }, 235 { "arm1176jzf-s", ARM::AK_ARMV6HL, ARM::FK_VFPV2, true }, 236 { "cortex-a8", ARM::AK_ARMV7, ARM::FK_NEON, true }, 237 { "cortex-a8", ARM::AK_ARMV7L, ARM::FK_NEON, true }, 238 { "cortex-a8", ARM::AK_ARMV7HL, ARM::FK_NEON, true }, 239 { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_NONE, true }, 240 { "swift", ARM::AK_ARMV7S, ARM::FK_NEON_VFPV4, true }, 241 // Invalid CPU 242 { "invalid", ARM::AK_INVALID, ARM::FK_INVALID, true } 243 }; 244 245 } // namespace 246 247 // ======================================================= // 248 // Information by ID 249 // ======================================================= // 250 251 const char *ARMTargetParser::getFPUName(unsigned FPUKind) { 252 if (FPUKind >= ARM::FK_LAST) 253 return nullptr; 254 return FPUNames[FPUKind].Name; 255 } 256 257 unsigned ARMTargetParser::getFPUVersion(unsigned FPUKind) { 258 if (FPUKind >= ARM::FK_LAST) 259 return 0; 260 return FPUNames[FPUKind].FPUVersion; 261 } 262 263 unsigned ARMTargetParser::getFPUNeonSupportLevel(unsigned FPUKind) { 264 if (FPUKind >= ARM::FK_LAST) 265 return 0; 266 return FPUNames[FPUKind].NeonSupport; 267 } 268 269 unsigned ARMTargetParser::getFPURestriction(unsigned FPUKind) { 270 if (FPUKind >= ARM::FK_LAST) 271 return 0; 272 return FPUNames[FPUKind].Restriction; 273 } 274 275 unsigned ARMTargetParser::getDefaultFPU(StringRef CPU) { 276 for (const auto C : CPUNames) { 277 if (CPU == C.Name) 278 return C.DefaultFPU; 279 } 280 return ARM::FK_INVALID; 281 } 282 283 bool ARMTargetParser::getHWDivFeatures(unsigned HWDivKind, 284 std::vector<const char *> &Features) { 285 286 if (HWDivKind == ARM::AEK_INVALID) 287 return false; 288 289 if (HWDivKind & ARM::AEK_HWDIVARM) 290 Features.push_back("+hwdiv-arm"); 291 else 292 Features.push_back("-hwdiv-arm"); 293 294 if (HWDivKind & ARM::AEK_HWDIV) 295 Features.push_back("+hwdiv"); 296 else 297 Features.push_back("-hwdiv"); 298 299 return true; 300 } 301 302 bool ARMTargetParser::getFPUFeatures(unsigned FPUKind, 303 std::vector<const char *> &Features) { 304 305 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID) 306 return false; 307 308 // fp-only-sp and d16 subtarget features are independent of each other, so we 309 // must enable/disable both. 310 switch (FPUNames[FPUKind].Restriction) { 311 case ARM::FR_SP_D16: 312 Features.push_back("+fp-only-sp"); 313 Features.push_back("+d16"); 314 break; 315 case ARM::FR_D16: 316 Features.push_back("-fp-only-sp"); 317 Features.push_back("+d16"); 318 break; 319 case ARM::FR_None: 320 Features.push_back("-fp-only-sp"); 321 Features.push_back("-d16"); 322 break; 323 } 324 325 // FPU version subtarget features are inclusive of lower-numbered ones, so 326 // enable the one corresponding to this version and disable all that are 327 // higher. We also have to make sure to disable fp16 when vfp4 is disabled, 328 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16. 329 switch (FPUNames[FPUKind].FPUVersion) { 330 case ARM::FV_VFPV5: 331 Features.push_back("+fp-armv8"); 332 break; 333 case ARM::FV_VFPV4: 334 Features.push_back("+vfp4"); 335 Features.push_back("-fp-armv8"); 336 break; 337 case ARM::FV_VFPV3_FP16: 338 Features.push_back("+vfp3"); 339 Features.push_back("+fp16"); 340 Features.push_back("-vfp4"); 341 Features.push_back("-fp-armv8"); 342 break; 343 case ARM::FV_VFPV3: 344 Features.push_back("+vfp3"); 345 Features.push_back("-fp16"); 346 Features.push_back("-vfp4"); 347 Features.push_back("-fp-armv8"); 348 break; 349 case ARM::FV_VFPV2: 350 Features.push_back("+vfp2"); 351 Features.push_back("-vfp3"); 352 Features.push_back("-fp16"); 353 Features.push_back("-vfp4"); 354 Features.push_back("-fp-armv8"); 355 break; 356 case ARM::FV_NONE: 357 Features.push_back("-vfp2"); 358 Features.push_back("-vfp3"); 359 Features.push_back("-fp16"); 360 Features.push_back("-vfp4"); 361 Features.push_back("-fp-armv8"); 362 break; 363 } 364 365 // crypto includes neon, so we handle this similarly to FPU version. 366 switch (FPUNames[FPUKind].NeonSupport) { 367 case ARM::NS_Crypto: 368 Features.push_back("+crypto"); 369 break; 370 case ARM::NS_Neon: 371 Features.push_back("+neon"); 372 Features.push_back("-crypto"); 373 break; 374 case ARM::NS_None: 375 Features.push_back("-neon"); 376 Features.push_back("-crypto"); 377 break; 378 } 379 380 return true; 381 } 382 383 const char *ARMTargetParser::getArchName(unsigned ArchKind) { 384 if (ArchKind >= ARM::AK_LAST) 385 return nullptr; 386 return ARCHNames[ArchKind].Name; 387 } 388 389 const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) { 390 if (ArchKind >= ARM::AK_LAST) 391 return nullptr; 392 return ARCHNames[ArchKind].CPUAttr; 393 } 394 395 const char *ARMTargetParser::getSubArch(unsigned ArchKind) { 396 if (ArchKind >= ARM::AK_LAST) 397 return nullptr; 398 return ARCHNames[ArchKind].SubArch; 399 } 400 401 unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) { 402 if (ArchKind >= ARM::AK_LAST) 403 return ARMBuildAttrs::CPUArch::Pre_v4; 404 return ARCHNames[ArchKind].ArchAttr; 405 } 406 407 const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) { 408 for (const auto AE : ARCHExtNames) { 409 if (ArchExtKind == AE.ID) 410 return AE.Name; 411 } 412 return nullptr; 413 } 414 415 const char *ARMTargetParser::getHWDivName(unsigned HWDivKind) { 416 for (const auto D : HWDivNames) { 417 if (HWDivKind == D.ID) 418 return D.Name; 419 } 420 return nullptr; 421 } 422 423 const char *ARMTargetParser::getDefaultCPU(StringRef Arch) { 424 unsigned AK = parseArch(Arch); 425 if (AK == ARM::AK_INVALID) 426 return nullptr; 427 428 // Look for multiple AKs to find the default for pair AK+Name. 429 for (const auto CPU : CPUNames) { 430 if (CPU.ArchID == AK && CPU.Default) 431 return CPU.Name; 432 } 433 return nullptr; 434 } 435 436 // ======================================================= // 437 // Parsers 438 // ======================================================= // 439 440 StringRef ARMTargetParser::getHWDivSynonym(StringRef HWDiv) { 441 return StringSwitch<StringRef>(HWDiv) 442 .Case("thumb,arm", "arm,thumb") 443 .Default(HWDiv); 444 } 445 446 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) { 447 return StringSwitch<StringRef>(FPU) 448 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 449 .Case("vfp2", "vfpv2") 450 .Case("vfp3", "vfpv3") 451 .Case("vfp4", "vfpv4") 452 .Case("vfp3-d16", "vfpv3-d16") 453 .Case("vfp4-d16", "vfpv4-d16") 454 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 455 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 456 .Case("fp5-sp-d16", "fpv5-sp-d16") 457 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 458 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 459 .Case("neon-vfpv3", "neon") 460 .Default(FPU); 461 } 462 463 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) { 464 return StringSwitch<StringRef>(Arch) 465 .Case("v6sm", "v6s-m") 466 .Case("v6m", "v6-m") 467 .Case("v7a", "v7-a") 468 .Case("v7r", "v7-r") 469 .Case("v7m", "v7-m") 470 .Case("v7em", "v7e-m") 471 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a") 472 .Case("v8.1a", "v8.1-a") 473 .Default(Arch); 474 } 475 476 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 477 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 478 // "v.+", if the latter, return unmodified string, minus 'eb'. 479 // If invalid, return empty string. 480 StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) { 481 size_t offset = StringRef::npos; 482 StringRef A = Arch; 483 StringRef Error = ""; 484 485 // Begins with "arm" / "thumb", move past it. 486 if (A.startswith("arm64")) 487 offset = 5; 488 else if (A.startswith("arm")) 489 offset = 3; 490 else if (A.startswith("thumb")) 491 offset = 5; 492 else if (A.startswith("aarch64")) { 493 offset = 7; 494 // AArch64 uses "_be", not "eb" suffix. 495 if (A.find("eb") != StringRef::npos) 496 return Error; 497 if (A.substr(offset,3) == "_be") 498 offset += 3; 499 } 500 501 // Ex. "armebv7", move past the "eb". 502 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 503 offset += 2; 504 // Or, if it ends with eb ("armv7eb"), chop it off. 505 else if (A.endswith("eb")) 506 A = A.substr(0, A.size() - 2); 507 // Trim the head 508 if (offset != StringRef::npos) 509 A = A.substr(offset); 510 511 // Empty string means offset reached the end, which means it's valid. 512 if (A.empty()) 513 return Arch; 514 515 // Only match non-marketing names 516 if (offset != StringRef::npos) { 517 // Must start with 'vN'. 518 if (A[0] != 'v' || !std::isdigit(A[1])) 519 return Error; 520 // Can't have an extra 'eb'. 521 if (A.find("eb") != StringRef::npos) 522 return Error; 523 } 524 525 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 526 return A; 527 } 528 529 unsigned ARMTargetParser::parseHWDiv(StringRef HWDiv) { 530 StringRef Syn = getHWDivSynonym(HWDiv); 531 for (const auto D : HWDivNames) { 532 if (Syn == D.Name) 533 return D.ID; 534 } 535 return ARM::AEK_INVALID; 536 } 537 538 unsigned ARMTargetParser::parseFPU(StringRef FPU) { 539 StringRef Syn = getFPUSynonym(FPU); 540 for (const auto F : FPUNames) { 541 if (Syn == F.Name) 542 return F.ID; 543 } 544 return ARM::FK_INVALID; 545 } 546 547 // Allows partial match, ex. "v7a" matches "armv7a". 548 unsigned ARMTargetParser::parseArch(StringRef Arch) { 549 Arch = getCanonicalArchName(Arch); 550 StringRef Syn = getArchSynonym(Arch); 551 for (const auto A : ARCHNames) { 552 if (StringRef(A.Name).endswith(Syn)) 553 return A.ID; 554 } 555 return ARM::AK_INVALID; 556 } 557 558 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) { 559 for (const auto A : ARCHExtNames) { 560 if (ArchExt == A.Name) 561 return A.ID; 562 } 563 return ARM::AEK_INVALID; 564 } 565 566 unsigned ARMTargetParser::parseCPUArch(StringRef CPU) { 567 for (const auto C : CPUNames) { 568 if (CPU == C.Name) 569 return C.ArchID; 570 } 571 return ARM::AK_INVALID; 572 } 573 574 // ARM, Thumb, AArch64 575 unsigned ARMTargetParser::parseArchISA(StringRef Arch) { 576 return StringSwitch<unsigned>(Arch) 577 .StartsWith("aarch64", ARM::IK_AARCH64) 578 .StartsWith("arm64", ARM::IK_AARCH64) 579 .StartsWith("thumb", ARM::IK_THUMB) 580 .StartsWith("arm", ARM::IK_ARM) 581 .Default(ARM::EK_INVALID); 582 } 583 584 // Little/Big endian 585 unsigned ARMTargetParser::parseArchEndian(StringRef Arch) { 586 if (Arch.startswith("armeb") || 587 Arch.startswith("thumbeb") || 588 Arch.startswith("aarch64_be")) 589 return ARM::EK_BIG; 590 591 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 592 if (Arch.endswith("eb")) 593 return ARM::EK_BIG; 594 else 595 return ARM::EK_LITTLE; 596 } 597 598 if (Arch.startswith("aarch64")) 599 return ARM::EK_LITTLE; 600 601 return ARM::EK_INVALID; 602 } 603 604 // Profile A/R/M 605 unsigned ARMTargetParser::parseArchProfile(StringRef Arch) { 606 Arch = getCanonicalArchName(Arch); 607 switch(parseArch(Arch)) { 608 case ARM::AK_ARMV6M: 609 case ARM::AK_ARMV7M: 610 case ARM::AK_ARMV6SM: 611 case ARM::AK_ARMV7EM: 612 return ARM::PK_M; 613 case ARM::AK_ARMV7R: 614 return ARM::PK_R; 615 case ARM::AK_ARMV7: 616 case ARM::AK_ARMV7A: 617 case ARM::AK_ARMV7L: 618 case ARM::AK_ARMV8A: 619 case ARM::AK_ARMV8_1A: 620 return ARM::PK_A; 621 } 622 return ARM::PK_INVALID; 623 } 624 625 // Version number (ex. v7 = 7). 626 unsigned ARMTargetParser::parseArchVersion(StringRef Arch) { 627 Arch = getCanonicalArchName(Arch); 628 switch(parseArch(Arch)) { 629 case ARM::AK_ARMV2: 630 case ARM::AK_ARMV2A: 631 return 2; 632 case ARM::AK_ARMV3: 633 case ARM::AK_ARMV3M: 634 return 3; 635 case ARM::AK_ARMV4: 636 case ARM::AK_ARMV4T: 637 return 4; 638 case ARM::AK_ARMV5: 639 case ARM::AK_ARMV5T: 640 case ARM::AK_ARMV5TE: 641 case ARM::AK_IWMMXT: 642 case ARM::AK_IWMMXT2: 643 case ARM::AK_XSCALE: 644 case ARM::AK_ARMV5E: 645 case ARM::AK_ARMV5TEJ: 646 return 5; 647 case ARM::AK_ARMV6: 648 case ARM::AK_ARMV6J: 649 case ARM::AK_ARMV6K: 650 case ARM::AK_ARMV6T2: 651 case ARM::AK_ARMV6Z: 652 case ARM::AK_ARMV6ZK: 653 case ARM::AK_ARMV6M: 654 case ARM::AK_ARMV6SM: 655 case ARM::AK_ARMV6HL: 656 return 6; 657 case ARM::AK_ARMV7: 658 case ARM::AK_ARMV7A: 659 case ARM::AK_ARMV7R: 660 case ARM::AK_ARMV7M: 661 case ARM::AK_ARMV7L: 662 case ARM::AK_ARMV7HL: 663 case ARM::AK_ARMV7S: 664 case ARM::AK_ARMV7EM: 665 return 7; 666 case ARM::AK_ARMV8A: 667 case ARM::AK_ARMV8_1A: 668 return 8; 669 } 670 return 0; 671 } 672