1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements a target parser to recognise hardware features such as 11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/Support/ARMBuildAttributes.h" 16 #include "llvm/Support/TargetParser.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/ADT/StringSwitch.h" 19 #include <cctype> 20 21 using namespace llvm; 22 23 namespace { 24 25 // List of canonical FPU names (use getFPUSynonym) and which architectural 26 // features they correspond to (use getFPUFeatures). 27 // FIXME: TableGen this. 28 // The entries must appear in the order listed in ARM::FPUKind for correct indexing 29 struct { 30 const char * Name; 31 ARM::FPUKind ID; 32 ARM::FPUVersion FPUVersion; 33 ARM::NeonSupportLevel NeonSupport; 34 ARM::FPURestriction Restriction; 35 } FPUNames[] = { 36 { "invalid", ARM::FK_INVALID, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, 37 { "none", ARM::FK_NONE, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, 38 { "vfp", ARM::FK_VFP, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None}, 39 { "vfpv2", ARM::FK_VFPV2, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None}, 40 { "vfpv3", ARM::FK_VFPV3, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_None}, 41 { "vfpv3-fp16", ARM::FK_VFPV3_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_None}, 42 { "vfpv3-d16", ARM::FK_VFPV3_D16, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_D16}, 43 { "vfpv3-d16-fp16", ARM::FK_VFPV3_D16_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_D16}, 44 { "vfpv3xd", ARM::FK_VFPV3XD, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_SP_D16}, 45 { "vfpv3xd-fp16", ARM::FK_VFPV3XD_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_SP_D16}, 46 { "vfpv4", ARM::FK_VFPV4, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_None}, 47 { "vfpv4-d16", ARM::FK_VFPV4_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_D16}, 48 { "fpv4-sp-d16", ARM::FK_FPV4_SP_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_SP_D16}, 49 { "fpv5-d16", ARM::FK_FPV5_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_D16}, 50 { "fpv5-sp-d16", ARM::FK_FPV5_SP_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_SP_D16}, 51 { "fp-armv8", ARM::FK_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_None}, 52 { "neon", ARM::FK_NEON, ARM::FV_VFPV3, ARM::NS_Neon, ARM::FR_None}, 53 { "neon-fp16", ARM::FK_NEON_FP16, ARM::FV_VFPV3_FP16, ARM::NS_Neon, ARM::FR_None}, 54 { "neon-vfpv4", ARM::FK_NEON_VFPV4, ARM::FV_VFPV4, ARM::NS_Neon, ARM::FR_None}, 55 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Neon, ARM::FR_None}, 56 { "crypto-neon-fp-armv8", 57 ARM::FK_CRYPTO_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Crypto, ARM::FR_None}, 58 { "softvfp", ARM::FK_SOFTVFP, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, 59 }; 60 61 // List of canonical arch names (use getArchSynonym). 62 // This table also provides the build attribute fields for CPU arch 63 // and Arch ID, according to the Addenda to the ARM ABI, chapters 64 // 2.4 and 2.3.5.2 respectively. 65 // FIXME: SubArch values were simplified to fit into the expectations 66 // of the triples and are not conforming with their official names. 67 // Check to see if the expectation should be changed. 68 // FIXME: TableGen this. 69 struct { 70 const char *Name; 71 ARM::ArchKind ID; 72 const char *CPUAttr; // CPU class in build attributes. 73 const char *SubArch; // Sub-Arch name. 74 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. 75 } ARCHNames[] = { 76 { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 }, 77 { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 }, 78 { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 }, 79 { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 }, 80 { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 }, 81 { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 }, 82 { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T }, 83 { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, 84 { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, 85 { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ }, 86 { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 }, 87 { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K }, 88 { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 }, 89 { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ }, 90 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ }, 91 { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M }, 92 { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M }, 93 { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 }, 94 { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 }, 95 { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 }, 96 { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M }, 97 { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 }, 98 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 }, 99 // Non-standard Arch names. 100 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE }, 101 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE }, 102 { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE }, 103 { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, 104 { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, 105 { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 }, 106 { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M }, 107 { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 }, 108 { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 }, 109 { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 }, 110 { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 }, 111 { "armv7k", ARM::AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7 } 112 }; 113 // List of Arch Extension names. 114 // FIXME: TableGen this. 115 struct { 116 const char *Name; 117 unsigned ID; 118 } ARCHExtNames[] = { 119 { "invalid", ARM::AEK_INVALID }, 120 { "none", ARM::AEK_NONE }, 121 { "crc", ARM::AEK_CRC }, 122 { "crypto", ARM::AEK_CRYPTO }, 123 { "fp", ARM::AEK_FP }, 124 { "idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV) }, 125 { "mp", ARM::AEK_MP }, 126 { "simd", ARM::AEK_SIMD }, 127 { "sec", ARM::AEK_SEC }, 128 { "virt", ARM::AEK_VIRT }, 129 { "os", ARM::AEK_OS }, 130 { "iwmmxt", ARM::AEK_IWMMXT }, 131 { "iwmmxt2", ARM::AEK_IWMMXT2 }, 132 { "maverick", ARM::AEK_MAVERICK }, 133 { "xscale", ARM::AEK_XSCALE } 134 }; 135 // List of HWDiv names (use getHWDivSynonym) and which architectural 136 // features they correspond to (use getHWDivFeatures). 137 // FIXME: TableGen this. 138 struct { 139 const char *Name; 140 unsigned ID; 141 } HWDivNames[] = { 142 { "invalid", ARM::AEK_INVALID }, 143 { "none", ARM::AEK_NONE }, 144 { "thumb", ARM::AEK_HWDIV }, 145 { "arm", ARM::AEK_HWDIVARM }, 146 { "arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV) } 147 }; 148 // List of CPU names and their arches. 149 // The same CPU can have multiple arches and can be default on multiple arches. 150 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly. 151 // When this becomes table-generated, we'd probably need two tables. 152 // FIXME: TableGen this. 153 struct { 154 const char *Name; 155 ARM::ArchKind ArchID; 156 ARM::FPUKind DefaultFPU; 157 bool Default; // is $Name the default CPU for $ArchID ? 158 } CPUNames[] = { 159 { "arm2", ARM::AK_ARMV2, ARM::FK_NONE, true }, 160 { "arm3", ARM::AK_ARMV2A, ARM::FK_NONE, true }, 161 { "arm6", ARM::AK_ARMV3, ARM::FK_NONE, true }, 162 { "arm7m", ARM::AK_ARMV3M, ARM::FK_NONE, true }, 163 { "arm8", ARM::AK_ARMV4, ARM::FK_NONE, false }, 164 { "arm810", ARM::AK_ARMV4, ARM::FK_NONE, false }, 165 { "strongarm", ARM::AK_ARMV4, ARM::FK_NONE, true }, 166 { "strongarm110", ARM::AK_ARMV4, ARM::FK_NONE, false }, 167 { "strongarm1100", ARM::AK_ARMV4, ARM::FK_NONE, false }, 168 { "strongarm1110", ARM::AK_ARMV4, ARM::FK_NONE, false }, 169 { "arm7tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, true }, 170 { "arm7tdmi-s", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 171 { "arm710t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 172 { "arm720t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 173 { "arm9", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 174 { "arm9tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 175 { "arm920", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 176 { "arm920t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 177 { "arm922t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 178 { "arm9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 179 { "arm940t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 180 { "ep9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, 181 { "arm10tdmi", ARM::AK_ARMV5T, ARM::FK_NONE, true }, 182 { "arm1020t", ARM::AK_ARMV5T, ARM::FK_NONE, false }, 183 { "arm9e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 184 { "arm946e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 185 { "arm966e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 186 { "arm968e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 187 { "arm10e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 188 { "arm1020e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 189 { "arm1022e", ARM::AK_ARMV5TE, ARM::FK_NONE, true }, 190 { "iwmmxt", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 191 { "xscale", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, 192 { "arm926ej-s", ARM::AK_ARMV5TEJ, ARM::FK_NONE, true }, 193 { "arm1136jf-s", ARM::AK_ARMV6, ARM::FK_VFPV2, true }, 194 { "arm1176j-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, 195 { "arm1176jz-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, 196 { "mpcore", ARM::AK_ARMV6K, ARM::FK_VFPV2, false }, 197 { "mpcorenovfp", ARM::AK_ARMV6K, ARM::FK_NONE, false }, 198 { "arm1176jzf-s", ARM::AK_ARMV6K, ARM::FK_VFPV2, true }, 199 { "arm1176jzf-s", ARM::AK_ARMV6Z, ARM::FK_VFPV2, true }, 200 { "arm1176jzf-s", ARM::AK_ARMV6ZK, ARM::FK_VFPV2, true }, 201 { "arm1156t2-s", ARM::AK_ARMV6T2, ARM::FK_NONE, true }, 202 { "arm1156t2f-s", ARM::AK_ARMV6T2, ARM::FK_VFPV2, false }, 203 { "cortex-m0", ARM::AK_ARMV6M, ARM::FK_NONE, true }, 204 { "cortex-m0plus", ARM::AK_ARMV6M, ARM::FK_NONE, false }, 205 { "cortex-m1", ARM::AK_ARMV6M, ARM::FK_NONE, false }, 206 { "sc000", ARM::AK_ARMV6M, ARM::FK_NONE, false }, 207 { "cortex-a5", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 208 { "cortex-a7", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 209 { "cortex-a8", ARM::AK_ARMV7A, ARM::FK_NEON, true }, 210 { "cortex-a9", ARM::AK_ARMV7A, ARM::FK_NEON_FP16, false }, 211 { "cortex-a12", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 212 { "cortex-a15", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 213 { "cortex-a17", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 214 { "krait", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, 215 { "cortex-r4", ARM::AK_ARMV7R, ARM::FK_NONE, true }, 216 { "cortex-r4f", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, 217 { "cortex-r5", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, 218 { "cortex-r7", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16_FP16, false }, 219 { "sc300", ARM::AK_ARMV7M, ARM::FK_NONE, false }, 220 { "cortex-m3", ARM::AK_ARMV7M, ARM::FK_NONE, true }, 221 { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_FPV4_SP_D16, true }, 222 { "cortex-m7", ARM::AK_ARMV7EM, ARM::FK_FPV5_D16, false }, 223 { "cortex-a53", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, true }, 224 { "cortex-a57", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, 225 { "cortex-a72", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, 226 { "cyclone", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, 227 { "generic", ARM::AK_ARMV8_1A, ARM::FK_NEON_FP_ARMV8, true }, 228 // Non-standard Arch names. 229 { "iwmmxt", ARM::AK_IWMMXT, ARM::FK_NONE, true }, 230 { "xscale", ARM::AK_XSCALE, ARM::FK_NONE, true }, 231 { "arm10tdmi", ARM::AK_ARMV5, ARM::FK_NONE, true }, 232 { "arm1022e", ARM::AK_ARMV5E, ARM::FK_NONE, true }, 233 { "arm1136j-s", ARM::AK_ARMV6J, ARM::FK_NONE, true }, 234 { "arm1136jz-s", ARM::AK_ARMV6J, ARM::FK_NONE, false }, 235 { "cortex-m0", ARM::AK_ARMV6SM, ARM::FK_NONE, true }, 236 { "arm1176jzf-s", ARM::AK_ARMV6HL, ARM::FK_VFPV2, true }, 237 { "cortex-a8", ARM::AK_ARMV7, ARM::FK_NEON, true }, 238 { "cortex-a8", ARM::AK_ARMV7L, ARM::FK_NEON, true }, 239 { "cortex-a8", ARM::AK_ARMV7HL, ARM::FK_NEON, true }, 240 { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_NONE, true }, 241 { "swift", ARM::AK_ARMV7S, ARM::FK_NEON_VFPV4, true }, 242 // Invalid CPU 243 { "invalid", ARM::AK_INVALID, ARM::FK_INVALID, true } 244 }; 245 246 } // namespace 247 248 // ======================================================= // 249 // Information by ID 250 // ======================================================= // 251 252 const char *ARMTargetParser::getFPUName(unsigned FPUKind) { 253 if (FPUKind >= ARM::FK_LAST) 254 return nullptr; 255 return FPUNames[FPUKind].Name; 256 } 257 258 unsigned ARMTargetParser::getFPUVersion(unsigned FPUKind) { 259 if (FPUKind >= ARM::FK_LAST) 260 return 0; 261 return FPUNames[FPUKind].FPUVersion; 262 } 263 264 unsigned ARMTargetParser::getFPUNeonSupportLevel(unsigned FPUKind) { 265 if (FPUKind >= ARM::FK_LAST) 266 return 0; 267 return FPUNames[FPUKind].NeonSupport; 268 } 269 270 unsigned ARMTargetParser::getFPURestriction(unsigned FPUKind) { 271 if (FPUKind >= ARM::FK_LAST) 272 return 0; 273 return FPUNames[FPUKind].Restriction; 274 } 275 276 unsigned ARMTargetParser::getDefaultFPU(StringRef CPU) { 277 for (const auto C : CPUNames) { 278 if (CPU == C.Name) 279 return C.DefaultFPU; 280 } 281 return ARM::FK_INVALID; 282 } 283 284 bool ARMTargetParser::getHWDivFeatures(unsigned HWDivKind, 285 std::vector<const char *> &Features) { 286 287 if (HWDivKind == ARM::AEK_INVALID) 288 return false; 289 290 if (HWDivKind & ARM::AEK_HWDIVARM) 291 Features.push_back("+hwdiv-arm"); 292 else 293 Features.push_back("-hwdiv-arm"); 294 295 if (HWDivKind & ARM::AEK_HWDIV) 296 Features.push_back("+hwdiv"); 297 else 298 Features.push_back("-hwdiv"); 299 300 return true; 301 } 302 303 bool ARMTargetParser::getFPUFeatures(unsigned FPUKind, 304 std::vector<const char *> &Features) { 305 306 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID) 307 return false; 308 309 // fp-only-sp and d16 subtarget features are independent of each other, so we 310 // must enable/disable both. 311 switch (FPUNames[FPUKind].Restriction) { 312 case ARM::FR_SP_D16: 313 Features.push_back("+fp-only-sp"); 314 Features.push_back("+d16"); 315 break; 316 case ARM::FR_D16: 317 Features.push_back("-fp-only-sp"); 318 Features.push_back("+d16"); 319 break; 320 case ARM::FR_None: 321 Features.push_back("-fp-only-sp"); 322 Features.push_back("-d16"); 323 break; 324 } 325 326 // FPU version subtarget features are inclusive of lower-numbered ones, so 327 // enable the one corresponding to this version and disable all that are 328 // higher. We also have to make sure to disable fp16 when vfp4 is disabled, 329 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16. 330 switch (FPUNames[FPUKind].FPUVersion) { 331 case ARM::FV_VFPV5: 332 Features.push_back("+fp-armv8"); 333 break; 334 case ARM::FV_VFPV4: 335 Features.push_back("+vfp4"); 336 Features.push_back("-fp-armv8"); 337 break; 338 case ARM::FV_VFPV3_FP16: 339 Features.push_back("+vfp3"); 340 Features.push_back("+fp16"); 341 Features.push_back("-vfp4"); 342 Features.push_back("-fp-armv8"); 343 break; 344 case ARM::FV_VFPV3: 345 Features.push_back("+vfp3"); 346 Features.push_back("-fp16"); 347 Features.push_back("-vfp4"); 348 Features.push_back("-fp-armv8"); 349 break; 350 case ARM::FV_VFPV2: 351 Features.push_back("+vfp2"); 352 Features.push_back("-vfp3"); 353 Features.push_back("-fp16"); 354 Features.push_back("-vfp4"); 355 Features.push_back("-fp-armv8"); 356 break; 357 case ARM::FV_NONE: 358 Features.push_back("-vfp2"); 359 Features.push_back("-vfp3"); 360 Features.push_back("-fp16"); 361 Features.push_back("-vfp4"); 362 Features.push_back("-fp-armv8"); 363 break; 364 } 365 366 // crypto includes neon, so we handle this similarly to FPU version. 367 switch (FPUNames[FPUKind].NeonSupport) { 368 case ARM::NS_Crypto: 369 Features.push_back("+crypto"); 370 break; 371 case ARM::NS_Neon: 372 Features.push_back("+neon"); 373 Features.push_back("-crypto"); 374 break; 375 case ARM::NS_None: 376 Features.push_back("-neon"); 377 Features.push_back("-crypto"); 378 break; 379 } 380 381 return true; 382 } 383 384 const char *ARMTargetParser::getArchName(unsigned ArchKind) { 385 if (ArchKind >= ARM::AK_LAST) 386 return nullptr; 387 return ARCHNames[ArchKind].Name; 388 } 389 390 const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) { 391 if (ArchKind >= ARM::AK_LAST) 392 return nullptr; 393 return ARCHNames[ArchKind].CPUAttr; 394 } 395 396 const char *ARMTargetParser::getSubArch(unsigned ArchKind) { 397 if (ArchKind >= ARM::AK_LAST) 398 return nullptr; 399 return ARCHNames[ArchKind].SubArch; 400 } 401 402 unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) { 403 if (ArchKind >= ARM::AK_LAST) 404 return ARMBuildAttrs::CPUArch::Pre_v4; 405 return ARCHNames[ArchKind].ArchAttr; 406 } 407 408 const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) { 409 for (const auto AE : ARCHExtNames) { 410 if (ArchExtKind == AE.ID) 411 return AE.Name; 412 } 413 return nullptr; 414 } 415 416 const char *ARMTargetParser::getHWDivName(unsigned HWDivKind) { 417 for (const auto D : HWDivNames) { 418 if (HWDivKind == D.ID) 419 return D.Name; 420 } 421 return nullptr; 422 } 423 424 const char *ARMTargetParser::getDefaultCPU(StringRef Arch) { 425 unsigned AK = parseArch(Arch); 426 if (AK == ARM::AK_INVALID) 427 return nullptr; 428 429 // Look for multiple AKs to find the default for pair AK+Name. 430 for (const auto CPU : CPUNames) { 431 if (CPU.ArchID == AK && CPU.Default) 432 return CPU.Name; 433 } 434 return nullptr; 435 } 436 437 // ======================================================= // 438 // Parsers 439 // ======================================================= // 440 441 StringRef ARMTargetParser::getHWDivSynonym(StringRef HWDiv) { 442 return StringSwitch<StringRef>(HWDiv) 443 .Case("thumb,arm", "arm,thumb") 444 .Default(HWDiv); 445 } 446 447 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) { 448 return StringSwitch<StringRef>(FPU) 449 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 450 .Case("vfp2", "vfpv2") 451 .Case("vfp3", "vfpv3") 452 .Case("vfp4", "vfpv4") 453 .Case("vfp3-d16", "vfpv3-d16") 454 .Case("vfp4-d16", "vfpv4-d16") 455 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 456 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 457 .Case("fp5-sp-d16", "fpv5-sp-d16") 458 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 459 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 460 .Case("neon-vfpv3", "neon") 461 .Default(FPU); 462 } 463 464 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) { 465 return StringSwitch<StringRef>(Arch) 466 .Case("v6sm", "v6s-m") 467 .Case("v6m", "v6-m") 468 .Case("v7a", "v7-a") 469 .Case("v7r", "v7-r") 470 .Case("v7m", "v7-m") 471 .Case("v7em", "v7e-m") 472 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a") 473 .Case("v8.1a", "v8.1-a") 474 .Default(Arch); 475 } 476 477 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 478 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 479 // "v.+", if the latter, return unmodified string, minus 'eb'. 480 // If invalid, return empty string. 481 StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) { 482 size_t offset = StringRef::npos; 483 StringRef A = Arch; 484 StringRef Error = ""; 485 486 // Begins with "arm" / "thumb", move past it. 487 if (A.startswith("arm64")) 488 offset = 5; 489 else if (A.startswith("arm")) 490 offset = 3; 491 else if (A.startswith("thumb")) 492 offset = 5; 493 else if (A.startswith("aarch64")) { 494 offset = 7; 495 // AArch64 uses "_be", not "eb" suffix. 496 if (A.find("eb") != StringRef::npos) 497 return Error; 498 if (A.substr(offset,3) == "_be") 499 offset += 3; 500 } 501 502 // Ex. "armebv7", move past the "eb". 503 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 504 offset += 2; 505 // Or, if it ends with eb ("armv7eb"), chop it off. 506 else if (A.endswith("eb")) 507 A = A.substr(0, A.size() - 2); 508 // Trim the head 509 if (offset != StringRef::npos) 510 A = A.substr(offset); 511 512 // Empty string means offset reached the end, which means it's valid. 513 if (A.empty()) 514 return Arch; 515 516 // Only match non-marketing names 517 if (offset != StringRef::npos) { 518 // Must start with 'vN'. 519 if (A[0] != 'v' || !std::isdigit(A[1])) 520 return Error; 521 // Can't have an extra 'eb'. 522 if (A.find("eb") != StringRef::npos) 523 return Error; 524 } 525 526 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 527 return A; 528 } 529 530 unsigned ARMTargetParser::parseHWDiv(StringRef HWDiv) { 531 StringRef Syn = getHWDivSynonym(HWDiv); 532 for (const auto D : HWDivNames) { 533 if (Syn == D.Name) 534 return D.ID; 535 } 536 return ARM::AEK_INVALID; 537 } 538 539 unsigned ARMTargetParser::parseFPU(StringRef FPU) { 540 StringRef Syn = getFPUSynonym(FPU); 541 for (const auto F : FPUNames) { 542 if (Syn == F.Name) 543 return F.ID; 544 } 545 return ARM::FK_INVALID; 546 } 547 548 // Allows partial match, ex. "v7a" matches "armv7a". 549 unsigned ARMTargetParser::parseArch(StringRef Arch) { 550 Arch = getCanonicalArchName(Arch); 551 StringRef Syn = getArchSynonym(Arch); 552 for (const auto A : ARCHNames) { 553 if (StringRef(A.Name).endswith(Syn)) 554 return A.ID; 555 } 556 return ARM::AK_INVALID; 557 } 558 559 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) { 560 for (const auto A : ARCHExtNames) { 561 if (ArchExt == A.Name) 562 return A.ID; 563 } 564 return ARM::AEK_INVALID; 565 } 566 567 unsigned ARMTargetParser::parseCPUArch(StringRef CPU) { 568 for (const auto C : CPUNames) { 569 if (CPU == C.Name) 570 return C.ArchID; 571 } 572 return ARM::AK_INVALID; 573 } 574 575 // ARM, Thumb, AArch64 576 unsigned ARMTargetParser::parseArchISA(StringRef Arch) { 577 return StringSwitch<unsigned>(Arch) 578 .StartsWith("aarch64", ARM::IK_AARCH64) 579 .StartsWith("arm64", ARM::IK_AARCH64) 580 .StartsWith("thumb", ARM::IK_THUMB) 581 .StartsWith("arm", ARM::IK_ARM) 582 .Default(ARM::EK_INVALID); 583 } 584 585 // Little/Big endian 586 unsigned ARMTargetParser::parseArchEndian(StringRef Arch) { 587 if (Arch.startswith("armeb") || 588 Arch.startswith("thumbeb") || 589 Arch.startswith("aarch64_be")) 590 return ARM::EK_BIG; 591 592 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 593 if (Arch.endswith("eb")) 594 return ARM::EK_BIG; 595 else 596 return ARM::EK_LITTLE; 597 } 598 599 if (Arch.startswith("aarch64")) 600 return ARM::EK_LITTLE; 601 602 return ARM::EK_INVALID; 603 } 604 605 // Profile A/R/M 606 unsigned ARMTargetParser::parseArchProfile(StringRef Arch) { 607 Arch = getCanonicalArchName(Arch); 608 switch(parseArch(Arch)) { 609 case ARM::AK_ARMV6M: 610 case ARM::AK_ARMV7M: 611 case ARM::AK_ARMV6SM: 612 case ARM::AK_ARMV7EM: 613 return ARM::PK_M; 614 case ARM::AK_ARMV7R: 615 return ARM::PK_R; 616 case ARM::AK_ARMV7: 617 case ARM::AK_ARMV7A: 618 case ARM::AK_ARMV7L: 619 case ARM::AK_ARMV8A: 620 case ARM::AK_ARMV8_1A: 621 return ARM::PK_A; 622 } 623 return ARM::PK_INVALID; 624 } 625 626 // Version number (ex. v7 = 7). 627 unsigned ARMTargetParser::parseArchVersion(StringRef Arch) { 628 Arch = getCanonicalArchName(Arch); 629 switch(parseArch(Arch)) { 630 case ARM::AK_ARMV2: 631 case ARM::AK_ARMV2A: 632 return 2; 633 case ARM::AK_ARMV3: 634 case ARM::AK_ARMV3M: 635 return 3; 636 case ARM::AK_ARMV4: 637 case ARM::AK_ARMV4T: 638 return 4; 639 case ARM::AK_ARMV5: 640 case ARM::AK_ARMV5T: 641 case ARM::AK_ARMV5TE: 642 case ARM::AK_IWMMXT: 643 case ARM::AK_IWMMXT2: 644 case ARM::AK_XSCALE: 645 case ARM::AK_ARMV5E: 646 case ARM::AK_ARMV5TEJ: 647 return 5; 648 case ARM::AK_ARMV6: 649 case ARM::AK_ARMV6J: 650 case ARM::AK_ARMV6K: 651 case ARM::AK_ARMV6T2: 652 case ARM::AK_ARMV6Z: 653 case ARM::AK_ARMV6ZK: 654 case ARM::AK_ARMV6M: 655 case ARM::AK_ARMV6SM: 656 case ARM::AK_ARMV6HL: 657 return 6; 658 case ARM::AK_ARMV7: 659 case ARM::AK_ARMV7A: 660 case ARM::AK_ARMV7R: 661 case ARM::AK_ARMV7M: 662 case ARM::AK_ARMV7L: 663 case ARM::AK_ARMV7HL: 664 case ARM::AK_ARMV7S: 665 case ARM::AK_ARMV7EM: 666 case ARM::AK_ARMV7K: 667 return 7; 668 case ARM::AK_ARMV8A: 669 case ARM::AK_ARMV8_1A: 670 return 8; 671 } 672 return 0; 673 } 674