1f5f373fcSRenato Golin //===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2f5f373fcSRenato Golin // 32946cd70SChandler Carruth // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 42946cd70SChandler Carruth // See https://llvm.org/LICENSE.txt for license information. 52946cd70SChandler Carruth // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6f5f373fcSRenato Golin // 7f5f373fcSRenato Golin //===----------------------------------------------------------------------===// 8f5f373fcSRenato Golin // 9f5f373fcSRenato Golin // This file implements a target parser to recognise hardware features such as 10f5f373fcSRenato Golin // FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 11f5f373fcSRenato Golin // 12f5f373fcSRenato Golin //===----------------------------------------------------------------------===// 13f5f373fcSRenato Golin 14f5f373fcSRenato Golin #include "llvm/Support/TargetParser.h" 157dd9d58cSMatt Arsenault #include "llvm/ADT/ArrayRef.h" 16294d1eaeSZakk Chen #include "llvm/ADT/SmallString.h" 17f5f373fcSRenato Golin #include "llvm/ADT/StringSwitch.h" 187b0a7d8dSBradley Smith #include "llvm/ADT/Twine.h" 19294d1eaeSZakk Chen #include "llvm/Support/ARMBuildAttributes.h" 20f5f373fcSRenato Golin 21f5f373fcSRenato Golin using namespace llvm; 2271e43ee4SKonstantin Zhuravlyov using namespace AMDGPU; 23f5f373fcSRenato Golin 24f5f373fcSRenato Golin namespace { 25f5f373fcSRenato Golin 267dd9d58cSMatt Arsenault struct GPUInfo { 277dd9d58cSMatt Arsenault StringLiteral Name; 287dd9d58cSMatt Arsenault StringLiteral CanonicalName; 297dd9d58cSMatt Arsenault AMDGPU::GPUKind Kind; 307dd9d58cSMatt Arsenault unsigned Features; 317dd9d58cSMatt Arsenault }; 327dd9d58cSMatt Arsenault 3371e43ee4SKonstantin Zhuravlyov constexpr GPUInfo R600GPUs[26] = { 347dd9d58cSMatt Arsenault // Name Canonical Kind Features 357dd9d58cSMatt Arsenault // Name 367dd9d58cSMatt Arsenault {{"r600"}, {"r600"}, GK_R600, FEATURE_NONE }, 377dd9d58cSMatt Arsenault {{"rv630"}, {"r600"}, GK_R600, FEATURE_NONE }, 387dd9d58cSMatt Arsenault {{"rv635"}, {"r600"}, GK_R600, FEATURE_NONE }, 397dd9d58cSMatt Arsenault {{"r630"}, {"r630"}, GK_R630, FEATURE_NONE }, 407dd9d58cSMatt Arsenault {{"rs780"}, {"rs880"}, GK_RS880, FEATURE_NONE }, 417dd9d58cSMatt Arsenault {{"rs880"}, {"rs880"}, GK_RS880, FEATURE_NONE }, 427dd9d58cSMatt Arsenault {{"rv610"}, {"rs880"}, GK_RS880, FEATURE_NONE }, 437dd9d58cSMatt Arsenault {{"rv620"}, {"rs880"}, GK_RS880, FEATURE_NONE }, 447dd9d58cSMatt Arsenault {{"rv670"}, {"rv670"}, GK_RV670, FEATURE_NONE }, 457dd9d58cSMatt Arsenault {{"rv710"}, {"rv710"}, GK_RV710, FEATURE_NONE }, 467dd9d58cSMatt Arsenault {{"rv730"}, {"rv730"}, GK_RV730, FEATURE_NONE }, 477dd9d58cSMatt Arsenault {{"rv740"}, {"rv770"}, GK_RV770, FEATURE_NONE }, 487dd9d58cSMatt Arsenault {{"rv770"}, {"rv770"}, GK_RV770, FEATURE_NONE }, 497dd9d58cSMatt Arsenault {{"cedar"}, {"cedar"}, GK_CEDAR, FEATURE_NONE }, 507dd9d58cSMatt Arsenault {{"palm"}, {"cedar"}, GK_CEDAR, FEATURE_NONE }, 517dd9d58cSMatt Arsenault {{"cypress"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA }, 527dd9d58cSMatt Arsenault {{"hemlock"}, {"cypress"}, GK_CYPRESS, FEATURE_FMA }, 537dd9d58cSMatt Arsenault {{"juniper"}, {"juniper"}, GK_JUNIPER, FEATURE_NONE }, 547dd9d58cSMatt Arsenault {{"redwood"}, {"redwood"}, GK_REDWOOD, FEATURE_NONE }, 557dd9d58cSMatt Arsenault {{"sumo"}, {"sumo"}, GK_SUMO, FEATURE_NONE }, 567dd9d58cSMatt Arsenault {{"sumo2"}, {"sumo"}, GK_SUMO, FEATURE_NONE }, 577dd9d58cSMatt Arsenault {{"barts"}, {"barts"}, GK_BARTS, FEATURE_NONE }, 587dd9d58cSMatt Arsenault {{"caicos"}, {"caicos"}, GK_CAICOS, FEATURE_NONE }, 597dd9d58cSMatt Arsenault {{"aruba"}, {"cayman"}, GK_CAYMAN, FEATURE_FMA }, 607dd9d58cSMatt Arsenault {{"cayman"}, {"cayman"}, GK_CAYMAN, FEATURE_FMA }, 617dd9d58cSMatt Arsenault {{"turks"}, {"turks"}, GK_TURKS, FEATURE_NONE } 627dd9d58cSMatt Arsenault }; 637dd9d58cSMatt Arsenault 647dd9d58cSMatt Arsenault // This table should be sorted by the value of GPUKind 657dd9d58cSMatt Arsenault // Don't bother listing the implicitly true features 66*ea7d0e29SStanislav Mekhanoshin constexpr GPUInfo AMDGCNGPUs[39] = { 677dd9d58cSMatt Arsenault // Name Canonical Kind Features 687dd9d58cSMatt Arsenault // Name 697dd9d58cSMatt Arsenault {{"gfx600"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32}, 707dd9d58cSMatt Arsenault {{"tahiti"}, {"gfx600"}, GK_GFX600, FEATURE_FAST_FMA_F32}, 717dd9d58cSMatt Arsenault {{"gfx601"}, {"gfx601"}, GK_GFX601, FEATURE_NONE}, 727dd9d58cSMatt Arsenault {{"hainan"}, {"gfx601"}, GK_GFX601, FEATURE_NONE}, 737dd9d58cSMatt Arsenault {{"oland"}, {"gfx601"}, GK_GFX601, FEATURE_NONE}, 747dd9d58cSMatt Arsenault {{"pitcairn"}, {"gfx601"}, GK_GFX601, FEATURE_NONE}, 757dd9d58cSMatt Arsenault {{"verde"}, {"gfx601"}, GK_GFX601, FEATURE_NONE}, 767dd9d58cSMatt Arsenault {{"gfx700"}, {"gfx700"}, GK_GFX700, FEATURE_NONE}, 777dd9d58cSMatt Arsenault {{"kaveri"}, {"gfx700"}, GK_GFX700, FEATURE_NONE}, 787dd9d58cSMatt Arsenault {{"gfx701"}, {"gfx701"}, GK_GFX701, FEATURE_FAST_FMA_F32}, 797dd9d58cSMatt Arsenault {{"hawaii"}, {"gfx701"}, GK_GFX701, FEATURE_FAST_FMA_F32}, 807dd9d58cSMatt Arsenault {{"gfx702"}, {"gfx702"}, GK_GFX702, FEATURE_FAST_FMA_F32}, 817dd9d58cSMatt Arsenault {{"gfx703"}, {"gfx703"}, GK_GFX703, FEATURE_NONE}, 827dd9d58cSMatt Arsenault {{"kabini"}, {"gfx703"}, GK_GFX703, FEATURE_NONE}, 837dd9d58cSMatt Arsenault {{"mullins"}, {"gfx703"}, GK_GFX703, FEATURE_NONE}, 847dd9d58cSMatt Arsenault {{"gfx704"}, {"gfx704"}, GK_GFX704, FEATURE_NONE}, 857dd9d58cSMatt Arsenault {{"bonaire"}, {"gfx704"}, GK_GFX704, FEATURE_NONE}, 867dd9d58cSMatt Arsenault {{"gfx801"}, {"gfx801"}, GK_GFX801, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 877dd9d58cSMatt Arsenault {{"carrizo"}, {"gfx801"}, GK_GFX801, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 887dd9d58cSMatt Arsenault {{"gfx802"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32}, 897dd9d58cSMatt Arsenault {{"iceland"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32}, 907dd9d58cSMatt Arsenault {{"tonga"}, {"gfx802"}, GK_GFX802, FEATURE_FAST_DENORMAL_F32}, 917dd9d58cSMatt Arsenault {{"gfx803"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32}, 927dd9d58cSMatt Arsenault {{"fiji"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32}, 937dd9d58cSMatt Arsenault {{"polaris10"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32}, 947dd9d58cSMatt Arsenault {{"polaris11"}, {"gfx803"}, GK_GFX803, FEATURE_FAST_DENORMAL_F32}, 957dd9d58cSMatt Arsenault {{"gfx810"}, {"gfx810"}, GK_GFX810, FEATURE_FAST_DENORMAL_F32}, 967dd9d58cSMatt Arsenault {{"stoney"}, {"gfx810"}, GK_GFX810, FEATURE_FAST_DENORMAL_F32}, 977dd9d58cSMatt Arsenault {{"gfx900"}, {"gfx900"}, GK_GFX900, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 987dd9d58cSMatt Arsenault {{"gfx902"}, {"gfx902"}, GK_GFX902, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 997dd9d58cSMatt Arsenault {{"gfx904"}, {"gfx904"}, GK_GFX904, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 1007dd9d58cSMatt Arsenault {{"gfx906"}, {"gfx906"}, GK_GFX906, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 10122b2c3d6SStanislav Mekhanoshin {{"gfx908"}, {"gfx908"}, GK_GFX908, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 1022a1b1d94STim Renouf {{"gfx909"}, {"gfx909"}, GK_GFX909, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32}, 1034593e413SMatt Arsenault {{"gfx1010"}, {"gfx1010"}, GK_GFX1010, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32}, 1044593e413SMatt Arsenault {{"gfx1011"}, {"gfx1011"}, GK_GFX1011, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32}, 1054593e413SMatt Arsenault {{"gfx1012"}, {"gfx1012"}, GK_GFX1012, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32}, 1069ee272f1SStanislav Mekhanoshin {{"gfx1030"}, {"gfx1030"}, GK_GFX1030, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32}, 107*ea7d0e29SStanislav Mekhanoshin {{"gfx1031"}, {"gfx1031"}, GK_GFX1031, FEATURE_FAST_FMA_F32|FEATURE_FAST_DENORMAL_F32|FEATURE_WAVE32}, 1087dd9d58cSMatt Arsenault }; 1097dd9d58cSMatt Arsenault 11071e43ee4SKonstantin Zhuravlyov const GPUInfo *getArchEntry(AMDGPU::GPUKind AK, ArrayRef<GPUInfo> Table) { 111182bab8dSMatt Arsenault GPUInfo Search = { {""}, {""}, AK, AMDGPU::FEATURE_NONE }; 1127dd9d58cSMatt Arsenault 1137dd9d58cSMatt Arsenault auto I = std::lower_bound(Table.begin(), Table.end(), Search, 1147dd9d58cSMatt Arsenault [](const GPUInfo &A, const GPUInfo &B) { 1157dd9d58cSMatt Arsenault return A.Kind < B.Kind; 1167dd9d58cSMatt Arsenault }); 1177dd9d58cSMatt Arsenault 1187dd9d58cSMatt Arsenault if (I == Table.end()) 1197dd9d58cSMatt Arsenault return nullptr; 1207dd9d58cSMatt Arsenault return I; 1217dd9d58cSMatt Arsenault } 1227dd9d58cSMatt Arsenault 12371e43ee4SKonstantin Zhuravlyov } // namespace 12471e43ee4SKonstantin Zhuravlyov 1257dd9d58cSMatt Arsenault StringRef llvm::AMDGPU::getArchNameAMDGCN(GPUKind AK) { 1267dd9d58cSMatt Arsenault if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs)) 1277dd9d58cSMatt Arsenault return Entry->CanonicalName; 1287dd9d58cSMatt Arsenault return ""; 1297dd9d58cSMatt Arsenault } 1307dd9d58cSMatt Arsenault 1317dd9d58cSMatt Arsenault StringRef llvm::AMDGPU::getArchNameR600(GPUKind AK) { 1327dd9d58cSMatt Arsenault if (const auto *Entry = getArchEntry(AK, R600GPUs)) 1337dd9d58cSMatt Arsenault return Entry->CanonicalName; 1347dd9d58cSMatt Arsenault return ""; 1357dd9d58cSMatt Arsenault } 1367dd9d58cSMatt Arsenault 1377dd9d58cSMatt Arsenault AMDGPU::GPUKind llvm::AMDGPU::parseArchAMDGCN(StringRef CPU) { 1388dc7b982SMark de Wever for (const auto &C : AMDGCNGPUs) { 1397dd9d58cSMatt Arsenault if (CPU == C.Name) 1407dd9d58cSMatt Arsenault return C.Kind; 1417dd9d58cSMatt Arsenault } 1427dd9d58cSMatt Arsenault 1437dd9d58cSMatt Arsenault return AMDGPU::GPUKind::GK_NONE; 1447dd9d58cSMatt Arsenault } 1457dd9d58cSMatt Arsenault 1467dd9d58cSMatt Arsenault AMDGPU::GPUKind llvm::AMDGPU::parseArchR600(StringRef CPU) { 1478dc7b982SMark de Wever for (const auto &C : R600GPUs) { 1487dd9d58cSMatt Arsenault if (CPU == C.Name) 1497dd9d58cSMatt Arsenault return C.Kind; 1507dd9d58cSMatt Arsenault } 1517dd9d58cSMatt Arsenault 1527dd9d58cSMatt Arsenault return AMDGPU::GPUKind::GK_NONE; 1537dd9d58cSMatt Arsenault } 1547dd9d58cSMatt Arsenault 1557dd9d58cSMatt Arsenault unsigned AMDGPU::getArchAttrAMDGCN(GPUKind AK) { 1567dd9d58cSMatt Arsenault if (const auto *Entry = getArchEntry(AK, AMDGCNGPUs)) 1577dd9d58cSMatt Arsenault return Entry->Features; 1587dd9d58cSMatt Arsenault return FEATURE_NONE; 1597dd9d58cSMatt Arsenault } 1607dd9d58cSMatt Arsenault 1617dd9d58cSMatt Arsenault unsigned AMDGPU::getArchAttrR600(GPUKind AK) { 1627dd9d58cSMatt Arsenault if (const auto *Entry = getArchEntry(AK, R600GPUs)) 1637dd9d58cSMatt Arsenault return Entry->Features; 1647dd9d58cSMatt Arsenault return FEATURE_NONE; 1657dd9d58cSMatt Arsenault } 1667dd9d58cSMatt Arsenault 1677dd9d58cSMatt Arsenault void AMDGPU::fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values) { 1687dd9d58cSMatt Arsenault // XXX: Should this only report unique canonical names? 1698dc7b982SMark de Wever for (const auto &C : AMDGCNGPUs) 1707dd9d58cSMatt Arsenault Values.push_back(C.Name); 1717dd9d58cSMatt Arsenault } 1727dd9d58cSMatt Arsenault 1737dd9d58cSMatt Arsenault void AMDGPU::fillValidArchListR600(SmallVectorImpl<StringRef> &Values) { 1748dc7b982SMark de Wever for (const auto &C : R600GPUs) 1757dd9d58cSMatt Arsenault Values.push_back(C.Name); 1767dd9d58cSMatt Arsenault } 17771e43ee4SKonstantin Zhuravlyov 17871e43ee4SKonstantin Zhuravlyov AMDGPU::IsaVersion AMDGPU::getIsaVersion(StringRef GPU) { 17971e43ee4SKonstantin Zhuravlyov AMDGPU::GPUKind AK = parseArchAMDGCN(GPU); 180e0c1f9e7SMatt Arsenault if (AK == AMDGPU::GPUKind::GK_NONE) { 181e0c1f9e7SMatt Arsenault if (GPU == "generic-hsa") 182e0c1f9e7SMatt Arsenault return {7, 0, 0}; 183e0c1f9e7SMatt Arsenault if (GPU == "generic") 184e0c1f9e7SMatt Arsenault return {6, 0, 0}; 18571e43ee4SKonstantin Zhuravlyov return {0, 0, 0}; 186e0c1f9e7SMatt Arsenault } 18771e43ee4SKonstantin Zhuravlyov 18871e43ee4SKonstantin Zhuravlyov switch (AK) { 18971e43ee4SKonstantin Zhuravlyov case GK_GFX600: return {6, 0, 0}; 19071e43ee4SKonstantin Zhuravlyov case GK_GFX601: return {6, 0, 1}; 19171e43ee4SKonstantin Zhuravlyov case GK_GFX700: return {7, 0, 0}; 19271e43ee4SKonstantin Zhuravlyov case GK_GFX701: return {7, 0, 1}; 19371e43ee4SKonstantin Zhuravlyov case GK_GFX702: return {7, 0, 2}; 19471e43ee4SKonstantin Zhuravlyov case GK_GFX703: return {7, 0, 3}; 19571e43ee4SKonstantin Zhuravlyov case GK_GFX704: return {7, 0, 4}; 19671e43ee4SKonstantin Zhuravlyov case GK_GFX801: return {8, 0, 1}; 19771e43ee4SKonstantin Zhuravlyov case GK_GFX802: return {8, 0, 2}; 19871e43ee4SKonstantin Zhuravlyov case GK_GFX803: return {8, 0, 3}; 19971e43ee4SKonstantin Zhuravlyov case GK_GFX810: return {8, 1, 0}; 20071e43ee4SKonstantin Zhuravlyov case GK_GFX900: return {9, 0, 0}; 20171e43ee4SKonstantin Zhuravlyov case GK_GFX902: return {9, 0, 2}; 20271e43ee4SKonstantin Zhuravlyov case GK_GFX904: return {9, 0, 4}; 20371e43ee4SKonstantin Zhuravlyov case GK_GFX906: return {9, 0, 6}; 20422b2c3d6SStanislav Mekhanoshin case GK_GFX908: return {9, 0, 8}; 2052a1b1d94STim Renouf case GK_GFX909: return {9, 0, 9}; 206cee607e4SStanislav Mekhanoshin case GK_GFX1010: return {10, 1, 0}; 207c43e67bfSStanislav Mekhanoshin case GK_GFX1011: return {10, 1, 1}; 208c43e67bfSStanislav Mekhanoshin case GK_GFX1012: return {10, 1, 2}; 2099ee272f1SStanislav Mekhanoshin case GK_GFX1030: return {10, 3, 0}; 210*ea7d0e29SStanislav Mekhanoshin case GK_GFX1031: return {10, 3, 1}; 21171e43ee4SKonstantin Zhuravlyov default: return {0, 0, 0}; 21271e43ee4SKonstantin Zhuravlyov } 21371e43ee4SKonstantin Zhuravlyov } 214294d1eaeSZakk Chen 215294d1eaeSZakk Chen namespace llvm { 216294d1eaeSZakk Chen namespace RISCV { 217294d1eaeSZakk Chen 218294d1eaeSZakk Chen struct CPUInfo { 219294d1eaeSZakk Chen StringLiteral Name; 220294d1eaeSZakk Chen CPUKind Kind; 221294d1eaeSZakk Chen unsigned Features; 222294d1eaeSZakk Chen StringLiteral DefaultMarch; 223294d1eaeSZakk Chen bool is64Bit() const { return (Features & FK_64BIT); } 224294d1eaeSZakk Chen }; 225294d1eaeSZakk Chen 226294d1eaeSZakk Chen constexpr CPUInfo RISCVCPUInfo[] = { 227294d1eaeSZakk Chen #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) \ 228294d1eaeSZakk Chen {NAME, CK_##ENUM, FEATURES, DEFAULT_MARCH}, 229294d1eaeSZakk Chen #include "llvm/Support/RISCVTargetParser.def" 230294d1eaeSZakk Chen }; 231294d1eaeSZakk Chen 232294d1eaeSZakk Chen bool checkCPUKind(CPUKind Kind, bool IsRV64) { 233294d1eaeSZakk Chen if (Kind == CK_INVALID) 234294d1eaeSZakk Chen return false; 235294d1eaeSZakk Chen return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64; 236294d1eaeSZakk Chen } 237294d1eaeSZakk Chen 238294d1eaeSZakk Chen CPUKind parseCPUKind(StringRef CPU) { 239294d1eaeSZakk Chen return llvm::StringSwitch<CPUKind>(CPU) 240294d1eaeSZakk Chen #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM) 241294d1eaeSZakk Chen #include "llvm/Support/RISCVTargetParser.def" 242294d1eaeSZakk Chen .Default(CK_INVALID); 243294d1eaeSZakk Chen } 244294d1eaeSZakk Chen 245294d1eaeSZakk Chen StringRef getMArchFromMcpu(StringRef CPU) { 246294d1eaeSZakk Chen CPUKind Kind = parseCPUKind(CPU); 247294d1eaeSZakk Chen return RISCVCPUInfo[static_cast<unsigned>(Kind)].DefaultMarch; 248294d1eaeSZakk Chen } 249294d1eaeSZakk Chen 250294d1eaeSZakk Chen void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64) { 251294d1eaeSZakk Chen for (const auto &C : RISCVCPUInfo) { 252294d1eaeSZakk Chen if (C.Kind != CK_INVALID && IsRV64 == C.is64Bit()) 253294d1eaeSZakk Chen Values.emplace_back(C.Name); 254294d1eaeSZakk Chen } 255294d1eaeSZakk Chen } 256294d1eaeSZakk Chen 257294d1eaeSZakk Chen // Get all features except standard extension feature 258294d1eaeSZakk Chen bool getCPUFeaturesExceptStdExt(CPUKind Kind, 259294d1eaeSZakk Chen std::vector<StringRef> &Features) { 260294d1eaeSZakk Chen unsigned CPUFeatures = RISCVCPUInfo[static_cast<unsigned>(Kind)].Features; 261294d1eaeSZakk Chen 262294d1eaeSZakk Chen if (CPUFeatures == FK_INVALID) 263294d1eaeSZakk Chen return false; 264294d1eaeSZakk Chen 265294d1eaeSZakk Chen if (CPUFeatures & FK_64BIT) 266294d1eaeSZakk Chen Features.push_back("+64bit"); 267294d1eaeSZakk Chen else 268294d1eaeSZakk Chen Features.push_back("-64bit"); 269294d1eaeSZakk Chen 270294d1eaeSZakk Chen return true; 271294d1eaeSZakk Chen } 272294d1eaeSZakk Chen 273294d1eaeSZakk Chen } // namespace RISCV 274294d1eaeSZakk Chen } // namespace llvm 275