1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise ARM hardware features 10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Support/ARMTargetParser.h" 15 #include "llvm/ADT/StringSwitch.h" 16 #include "llvm/ADT/Triple.h" 17 #include <cctype> 18 19 using namespace llvm; 20 21 static StringRef getHWDivSynonym(StringRef HWDiv) { 22 return StringSwitch<StringRef>(HWDiv) 23 .Case("thumb,arm", "arm,thumb") 24 .Default(HWDiv); 25 } 26 27 // Allows partial match, ex. "v7a" matches "armv7a". 28 ARM::ArchKind ARM::parseArch(StringRef Arch) { 29 Arch = getCanonicalArchName(Arch); 30 StringRef Syn = getArchSynonym(Arch); 31 for (const auto &A : ARCHNames) { 32 if (A.getName().endswith(Syn)) 33 return A.ID; 34 } 35 return ArchKind::INVALID; 36 } 37 38 // Version number (ex. v7 = 7). 39 unsigned ARM::parseArchVersion(StringRef Arch) { 40 Arch = getCanonicalArchName(Arch); 41 switch (parseArch(Arch)) { 42 case ArchKind::ARMV2: 43 case ArchKind::ARMV2A: 44 return 2; 45 case ArchKind::ARMV3: 46 case ArchKind::ARMV3M: 47 return 3; 48 case ArchKind::ARMV4: 49 case ArchKind::ARMV4T: 50 return 4; 51 case ArchKind::ARMV5T: 52 case ArchKind::ARMV5TE: 53 case ArchKind::IWMMXT: 54 case ArchKind::IWMMXT2: 55 case ArchKind::XSCALE: 56 case ArchKind::ARMV5TEJ: 57 return 5; 58 case ArchKind::ARMV6: 59 case ArchKind::ARMV6K: 60 case ArchKind::ARMV6T2: 61 case ArchKind::ARMV6KZ: 62 case ArchKind::ARMV6M: 63 return 6; 64 case ArchKind::ARMV7A: 65 case ArchKind::ARMV7VE: 66 case ArchKind::ARMV7R: 67 case ArchKind::ARMV7M: 68 case ArchKind::ARMV7S: 69 case ArchKind::ARMV7EM: 70 case ArchKind::ARMV7K: 71 return 7; 72 case ArchKind::ARMV8A: 73 case ArchKind::ARMV8_1A: 74 case ArchKind::ARMV8_2A: 75 case ArchKind::ARMV8_3A: 76 case ArchKind::ARMV8_4A: 77 case ArchKind::ARMV8_5A: 78 case ArchKind::ARMV8_6A: 79 case ArchKind::ARMV8R: 80 case ArchKind::ARMV8MBaseline: 81 case ArchKind::ARMV8MMainline: 82 case ArchKind::ARMV8_1MMainline: 83 return 8; 84 case ArchKind::INVALID: 85 return 0; 86 } 87 llvm_unreachable("Unhandled architecture"); 88 } 89 90 // Profile A/R/M 91 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) { 92 Arch = getCanonicalArchName(Arch); 93 switch (parseArch(Arch)) { 94 case ArchKind::ARMV6M: 95 case ArchKind::ARMV7M: 96 case ArchKind::ARMV7EM: 97 case ArchKind::ARMV8MMainline: 98 case ArchKind::ARMV8MBaseline: 99 case ArchKind::ARMV8_1MMainline: 100 return ProfileKind::M; 101 case ArchKind::ARMV7R: 102 case ArchKind::ARMV8R: 103 return ProfileKind::R; 104 case ArchKind::ARMV7A: 105 case ArchKind::ARMV7VE: 106 case ArchKind::ARMV7K: 107 case ArchKind::ARMV8A: 108 case ArchKind::ARMV8_1A: 109 case ArchKind::ARMV8_2A: 110 case ArchKind::ARMV8_3A: 111 case ArchKind::ARMV8_4A: 112 case ArchKind::ARMV8_5A: 113 case ArchKind::ARMV8_6A: 114 return ProfileKind::A; 115 case ArchKind::ARMV2: 116 case ArchKind::ARMV2A: 117 case ArchKind::ARMV3: 118 case ArchKind::ARMV3M: 119 case ArchKind::ARMV4: 120 case ArchKind::ARMV4T: 121 case ArchKind::ARMV5T: 122 case ArchKind::ARMV5TE: 123 case ArchKind::ARMV5TEJ: 124 case ArchKind::ARMV6: 125 case ArchKind::ARMV6K: 126 case ArchKind::ARMV6T2: 127 case ArchKind::ARMV6KZ: 128 case ArchKind::ARMV7S: 129 case ArchKind::IWMMXT: 130 case ArchKind::IWMMXT2: 131 case ArchKind::XSCALE: 132 case ArchKind::INVALID: 133 return ProfileKind::INVALID; 134 } 135 llvm_unreachable("Unhandled architecture"); 136 } 137 138 StringRef ARM::getArchSynonym(StringRef Arch) { 139 return StringSwitch<StringRef>(Arch) 140 .Case("v5", "v5t") 141 .Case("v5e", "v5te") 142 .Case("v6j", "v6") 143 .Case("v6hl", "v6k") 144 .Cases("v6m", "v6sm", "v6s-m", "v6-m") 145 .Cases("v6z", "v6zk", "v6kz") 146 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") 147 .Case("v7r", "v7-r") 148 .Case("v7m", "v7-m") 149 .Case("v7em", "v7e-m") 150 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a") 151 .Case("v8.1a", "v8.1-a") 152 .Case("v8.2a", "v8.2-a") 153 .Case("v8.3a", "v8.3-a") 154 .Case("v8.4a", "v8.4-a") 155 .Case("v8.5a", "v8.5-a") 156 .Case("v8.6a", "v8.6-a") 157 .Case("v8r", "v8-r") 158 .Case("v8m.base", "v8-m.base") 159 .Case("v8m.main", "v8-m.main") 160 .Case("v8.1m.main", "v8.1-m.main") 161 .Default(Arch); 162 } 163 164 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) { 165 166 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID) 167 return false; 168 169 static const struct FPUFeatureNameInfo { 170 const char *PlusName, *MinusName; 171 FPUVersion MinVersion; 172 FPURestriction MaxRestriction; 173 } FPUFeatureInfoList[] = { 174 // We have to specify the + and - versions of the name in full so 175 // that we can return them as static StringRefs. 176 // 177 // Also, the SubtargetFeatures ending in just "sp" are listed here 178 // under FPURestriction::None, which is the only FPURestriction in 179 // which they would be valid (since FPURestriction::SP doesn't 180 // exist). 181 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16}, 182 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16}, 183 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None}, 184 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16}, 185 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16}, 186 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None}, 187 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16}, 188 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None}, 189 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16}, 190 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16}, 191 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None}, 192 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None}, 193 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16}, 194 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16}, 195 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None}, 196 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16}, 197 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16}, 198 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None}, 199 }; 200 201 for (const auto &Info: FPUFeatureInfoList) { 202 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion && 203 FPUNames[FPUKind].Restriction <= Info.MaxRestriction) 204 Features.push_back(Info.PlusName); 205 else 206 Features.push_back(Info.MinusName); 207 } 208 209 static const struct NeonFeatureNameInfo { 210 const char *PlusName, *MinusName; 211 NeonSupportLevel MinSupportLevel; 212 } NeonFeatureInfoList[] = { 213 {"+neon", "-neon", NeonSupportLevel::Neon}, 214 {"+crypto", "-crypto", NeonSupportLevel::Crypto}, 215 }; 216 217 for (const auto &Info: NeonFeatureInfoList) { 218 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel) 219 Features.push_back(Info.PlusName); 220 else 221 Features.push_back(Info.MinusName); 222 } 223 224 return true; 225 } 226 227 // Little/Big endian 228 ARM::EndianKind ARM::parseArchEndian(StringRef Arch) { 229 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") || 230 Arch.startswith("aarch64_be")) 231 return EndianKind::BIG; 232 233 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 234 if (Arch.endswith("eb")) 235 return EndianKind::BIG; 236 else 237 return EndianKind::LITTLE; 238 } 239 240 if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32")) 241 return EndianKind::LITTLE; 242 243 return EndianKind::INVALID; 244 } 245 246 // ARM, Thumb, AArch64 247 ARM::ISAKind ARM::parseArchISA(StringRef Arch) { 248 return StringSwitch<ISAKind>(Arch) 249 .StartsWith("aarch64", ISAKind::AARCH64) 250 .StartsWith("arm64", ISAKind::AARCH64) 251 .StartsWith("thumb", ISAKind::THUMB) 252 .StartsWith("arm", ISAKind::ARM) 253 .Default(ISAKind::INVALID); 254 } 255 256 unsigned ARM::parseFPU(StringRef FPU) { 257 StringRef Syn = getFPUSynonym(FPU); 258 for (const auto &F : FPUNames) { 259 if (Syn == F.getName()) 260 return F.ID; 261 } 262 return FK_INVALID; 263 } 264 265 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) { 266 if (FPUKind >= FK_LAST) 267 return NeonSupportLevel::None; 268 return FPUNames[FPUKind].NeonSupport; 269 } 270 271 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 272 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 273 // "v.+", if the latter, return unmodified string, minus 'eb'. 274 // If invalid, return empty string. 275 StringRef ARM::getCanonicalArchName(StringRef Arch) { 276 size_t offset = StringRef::npos; 277 StringRef A = Arch; 278 StringRef Error = ""; 279 280 // Begins with "arm" / "thumb", move past it. 281 if (A.startswith("arm64_32")) 282 offset = 8; 283 else if (A.startswith("arm64e")) 284 offset = 6; 285 else if (A.startswith("arm64")) 286 offset = 5; 287 else if (A.startswith("aarch64_32")) 288 offset = 10; 289 else if (A.startswith("arm")) 290 offset = 3; 291 else if (A.startswith("thumb")) 292 offset = 5; 293 else if (A.startswith("aarch64")) { 294 offset = 7; 295 // AArch64 uses "_be", not "eb" suffix. 296 if (A.find("eb") != StringRef::npos) 297 return Error; 298 if (A.substr(offset, 3) == "_be") 299 offset += 3; 300 } 301 302 // Ex. "armebv7", move past the "eb". 303 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 304 offset += 2; 305 // Or, if it ends with eb ("armv7eb"), chop it off. 306 else if (A.endswith("eb")) 307 A = A.substr(0, A.size() - 2); 308 // Trim the head 309 if (offset != StringRef::npos) 310 A = A.substr(offset); 311 312 // Empty string means offset reached the end, which means it's valid. 313 if (A.empty()) 314 return Arch; 315 316 // Only match non-marketing names 317 if (offset != StringRef::npos) { 318 // Must start with 'vN'. 319 if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1]))) 320 return Error; 321 // Can't have an extra 'eb'. 322 if (A.find("eb") != StringRef::npos) 323 return Error; 324 } 325 326 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 327 return A; 328 } 329 330 StringRef ARM::getFPUSynonym(StringRef FPU) { 331 return StringSwitch<StringRef>(FPU) 332 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 333 .Case("vfp2", "vfpv2") 334 .Case("vfp3", "vfpv3") 335 .Case("vfp4", "vfpv4") 336 .Case("vfp3-d16", "vfpv3-d16") 337 .Case("vfp4-d16", "vfpv4-d16") 338 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 339 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 340 .Case("fp5-sp-d16", "fpv5-sp-d16") 341 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 342 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 343 .Case("neon-vfpv3", "neon") 344 .Default(FPU); 345 } 346 347 StringRef ARM::getFPUName(unsigned FPUKind) { 348 if (FPUKind >= FK_LAST) 349 return StringRef(); 350 return FPUNames[FPUKind].getName(); 351 } 352 353 ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) { 354 if (FPUKind >= FK_LAST) 355 return FPUVersion::NONE; 356 return FPUNames[FPUKind].FPUVer; 357 } 358 359 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) { 360 if (FPUKind >= FK_LAST) 361 return FPURestriction::None; 362 return FPUNames[FPUKind].Restriction; 363 } 364 365 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) { 366 if (CPU == "generic") 367 return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU; 368 369 return StringSwitch<unsigned>(CPU) 370 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 371 .Case(NAME, DEFAULT_FPU) 372 #include "llvm/Support/ARMTargetParser.def" 373 .Default(ARM::FK_INVALID); 374 } 375 376 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) { 377 if (CPU == "generic") 378 return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions; 379 380 return StringSwitch<uint64_t>(CPU) 381 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 382 .Case(NAME, \ 383 ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \ 384 DEFAULT_EXT) 385 #include "llvm/Support/ARMTargetParser.def" 386 .Default(ARM::AEK_INVALID); 387 } 388 389 bool ARM::getHWDivFeatures(uint64_t HWDivKind, 390 std::vector<StringRef> &Features) { 391 392 if (HWDivKind == AEK_INVALID) 393 return false; 394 395 if (HWDivKind & AEK_HWDIVARM) 396 Features.push_back("+hwdiv-arm"); 397 else 398 Features.push_back("-hwdiv-arm"); 399 400 if (HWDivKind & AEK_HWDIVTHUMB) 401 Features.push_back("+hwdiv"); 402 else 403 Features.push_back("-hwdiv"); 404 405 return true; 406 } 407 408 bool ARM::getExtensionFeatures(uint64_t Extensions, 409 std::vector<StringRef> &Features) { 410 411 if (Extensions == AEK_INVALID) 412 return false; 413 414 for (const auto &AE : ARCHExtNames) { 415 if ((Extensions & AE.ID) == AE.ID && AE.Feature) 416 Features.push_back(AE.Feature); 417 else if (AE.NegFeature) 418 Features.push_back(AE.NegFeature); 419 } 420 421 return getHWDivFeatures(Extensions, Features); 422 } 423 424 StringRef ARM::getArchName(ARM::ArchKind AK) { 425 return ARCHNames[static_cast<unsigned>(AK)].getName(); 426 } 427 428 StringRef ARM::getCPUAttr(ARM::ArchKind AK) { 429 return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr(); 430 } 431 432 StringRef ARM::getSubArch(ARM::ArchKind AK) { 433 return ARCHNames[static_cast<unsigned>(AK)].getSubArch(); 434 } 435 436 unsigned ARM::getArchAttr(ARM::ArchKind AK) { 437 return ARCHNames[static_cast<unsigned>(AK)].ArchAttr; 438 } 439 440 StringRef ARM::getArchExtName(uint64_t ArchExtKind) { 441 for (const auto &AE : ARCHExtNames) { 442 if (ArchExtKind == AE.ID) 443 return AE.getName(); 444 } 445 return StringRef(); 446 } 447 448 static bool stripNegationPrefix(StringRef &Name) { 449 if (Name.startswith("no")) { 450 Name = Name.substr(2); 451 return true; 452 } 453 return false; 454 } 455 456 StringRef ARM::getArchExtFeature(StringRef ArchExt) { 457 bool Negated = stripNegationPrefix(ArchExt); 458 for (const auto &AE : ARCHExtNames) { 459 if (AE.Feature && ArchExt == AE.getName()) 460 return StringRef(Negated ? AE.NegFeature : AE.Feature); 461 } 462 463 return StringRef(); 464 } 465 466 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) { 467 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind]; 468 469 // If the input FPU already supports double-precision, then there 470 // isn't any different FPU we can return here. 471 // 472 // The current available FPURestriction values are None (no 473 // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs 474 // and single precision only); there's no value representing 475 // SP restriction without D16. So this test just means 'is it 476 // SP only?'. 477 if (InputFPU.Restriction != ARM::FPURestriction::SP_D16) 478 return ARM::FK_INVALID; 479 480 // Otherwise, look for an FPU entry with all the same fields, except 481 // that SP_D16 has been replaced with just D16, representing adding 482 // double precision and not changing anything else. 483 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) { 484 if (CandidateFPU.FPUVer == InputFPU.FPUVer && 485 CandidateFPU.NeonSupport == InputFPU.NeonSupport && 486 CandidateFPU.Restriction == ARM::FPURestriction::D16) { 487 return CandidateFPU.ID; 488 } 489 } 490 491 // nothing found 492 return ARM::FK_INVALID; 493 } 494 495 bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, 496 StringRef ArchExt, 497 std::vector<StringRef> &Features, 498 unsigned &ArgFPUID) { 499 500 size_t StartingNumFeatures = Features.size(); 501 const bool Negated = stripNegationPrefix(ArchExt); 502 uint64_t ID = parseArchExt(ArchExt); 503 504 if (ID == AEK_INVALID) 505 return false; 506 507 for (const auto &AE : ARCHExtNames) { 508 if (Negated) { 509 if ((AE.ID & ID) == ID && AE.NegFeature) 510 Features.push_back(AE.NegFeature); 511 } else { 512 if ((AE.ID & ID) == AE.ID && AE.Feature) 513 Features.push_back(AE.Feature); 514 } 515 } 516 517 if (CPU == "") 518 CPU = "generic"; 519 520 if (ArchExt == "fp" || ArchExt == "fp.dp") { 521 unsigned FPUKind; 522 if (ArchExt == "fp.dp") { 523 if (Negated) { 524 Features.push_back("-fp64"); 525 return true; 526 } 527 FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK)); 528 } else if (Negated) { 529 FPUKind = ARM::FK_NONE; 530 } else { 531 FPUKind = getDefaultFPU(CPU, AK); 532 } 533 ArgFPUID = FPUKind; 534 return ARM::getFPUFeatures(FPUKind, Features); 535 } 536 return StartingNumFeatures != Features.size(); 537 } 538 539 StringRef ARM::getHWDivName(uint64_t HWDivKind) { 540 for (const auto &D : HWDivNames) { 541 if (HWDivKind == D.ID) 542 return D.getName(); 543 } 544 return StringRef(); 545 } 546 547 StringRef ARM::getDefaultCPU(StringRef Arch) { 548 ArchKind AK = parseArch(Arch); 549 if (AK == ArchKind::INVALID) 550 return StringRef(); 551 552 // Look for multiple AKs to find the default for pair AK+Name. 553 for (const auto &CPU : CPUNames) { 554 if (CPU.ArchID == AK && CPU.Default) 555 return CPU.getName(); 556 } 557 558 // If we can't find a default then target the architecture instead 559 return "generic"; 560 } 561 562 uint64_t ARM::parseHWDiv(StringRef HWDiv) { 563 StringRef Syn = getHWDivSynonym(HWDiv); 564 for (const auto &D : HWDivNames) { 565 if (Syn == D.getName()) 566 return D.ID; 567 } 568 return AEK_INVALID; 569 } 570 571 uint64_t ARM::parseArchExt(StringRef ArchExt) { 572 for (const auto &A : ARCHExtNames) { 573 if (ArchExt == A.getName()) 574 return A.ID; 575 } 576 return AEK_INVALID; 577 } 578 579 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) { 580 for (const auto &C : CPUNames) { 581 if (CPU == C.getName()) 582 return C.ArchID; 583 } 584 return ArchKind::INVALID; 585 } 586 587 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) { 588 for (const CpuNames<ArchKind> &Arch : CPUNames) { 589 if (Arch.ArchID != ArchKind::INVALID) 590 Values.push_back(Arch.getName()); 591 } 592 } 593 594 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) { 595 StringRef ArchName = 596 CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU)); 597 598 if (TT.isOSBinFormatMachO()) { 599 if (TT.getEnvironment() == Triple::EABI || 600 TT.getOS() == Triple::UnknownOS || 601 parseArchProfile(ArchName) == ProfileKind::M) 602 return "aapcs"; 603 if (TT.isWatchABI()) 604 return "aapcs16"; 605 return "apcs-gnu"; 606 } else if (TT.isOSWindows()) 607 // FIXME: this is invalid for WindowsCE. 608 return "aapcs"; 609 610 // Select the default based on the platform. 611 switch (TT.getEnvironment()) { 612 case Triple::Android: 613 case Triple::GNUEABI: 614 case Triple::GNUEABIHF: 615 case Triple::MuslEABI: 616 case Triple::MuslEABIHF: 617 return "aapcs-linux"; 618 case Triple::EABIHF: 619 case Triple::EABI: 620 return "aapcs"; 621 default: 622 if (TT.isOSNetBSD()) 623 return "apcs-gnu"; 624 if (TT.isOSOpenBSD()) 625 return "aapcs-linux"; 626 return "aapcs"; 627 } 628 } 629