1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise ARM hardware features 10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Support/ARMTargetParser.h" 15 #include "llvm/ADT/StringSwitch.h" 16 #include "llvm/ADT/Triple.h" 17 #include <cctype> 18 19 using namespace llvm; 20 21 static StringRef getHWDivSynonym(StringRef HWDiv) { 22 return StringSwitch<StringRef>(HWDiv) 23 .Case("thumb,arm", "arm,thumb") 24 .Default(HWDiv); 25 } 26 27 // Allows partial match, ex. "v7a" matches "armv7a". 28 ARM::ArchKind ARM::parseArch(StringRef Arch) { 29 Arch = getCanonicalArchName(Arch); 30 StringRef Syn = getArchSynonym(Arch); 31 for (const auto &A : ARCHNames) { 32 if (A.getName().endswith(Syn)) 33 return A.ID; 34 } 35 return ArchKind::INVALID; 36 } 37 38 // Version number (ex. v7 = 7). 39 unsigned ARM::parseArchVersion(StringRef Arch) { 40 Arch = getCanonicalArchName(Arch); 41 switch (parseArch(Arch)) { 42 case ArchKind::ARMV2: 43 case ArchKind::ARMV2A: 44 return 2; 45 case ArchKind::ARMV3: 46 case ArchKind::ARMV3M: 47 return 3; 48 case ArchKind::ARMV4: 49 case ArchKind::ARMV4T: 50 return 4; 51 case ArchKind::ARMV5T: 52 case ArchKind::ARMV5TE: 53 case ArchKind::IWMMXT: 54 case ArchKind::IWMMXT2: 55 case ArchKind::XSCALE: 56 case ArchKind::ARMV5TEJ: 57 return 5; 58 case ArchKind::ARMV6: 59 case ArchKind::ARMV6K: 60 case ArchKind::ARMV6T2: 61 case ArchKind::ARMV6KZ: 62 case ArchKind::ARMV6M: 63 return 6; 64 case ArchKind::ARMV7A: 65 case ArchKind::ARMV7VE: 66 case ArchKind::ARMV7R: 67 case ArchKind::ARMV7M: 68 case ArchKind::ARMV7S: 69 case ArchKind::ARMV7EM: 70 case ArchKind::ARMV7K: 71 return 7; 72 case ArchKind::ARMV8A: 73 case ArchKind::ARMV8_1A: 74 case ArchKind::ARMV8_2A: 75 case ArchKind::ARMV8_3A: 76 case ArchKind::ARMV8_4A: 77 case ArchKind::ARMV8_5A: 78 case ArchKind::ARMV8_6A: 79 case ArchKind::ARMV8_7A: 80 case ArchKind::ARMV8R: 81 case ArchKind::ARMV8MBaseline: 82 case ArchKind::ARMV8MMainline: 83 case ArchKind::ARMV8_1MMainline: 84 return 8; 85 case ArchKind::ARMV9A: 86 case ArchKind::ARMV9_1A: 87 case ArchKind::ARMV9_2A: 88 return 9; 89 case ArchKind::INVALID: 90 return 0; 91 } 92 llvm_unreachable("Unhandled architecture"); 93 } 94 95 // Profile A/R/M 96 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) { 97 Arch = getCanonicalArchName(Arch); 98 switch (parseArch(Arch)) { 99 case ArchKind::ARMV6M: 100 case ArchKind::ARMV7M: 101 case ArchKind::ARMV7EM: 102 case ArchKind::ARMV8MMainline: 103 case ArchKind::ARMV8MBaseline: 104 case ArchKind::ARMV8_1MMainline: 105 return ProfileKind::M; 106 case ArchKind::ARMV7R: 107 case ArchKind::ARMV8R: 108 return ProfileKind::R; 109 case ArchKind::ARMV7A: 110 case ArchKind::ARMV7VE: 111 case ArchKind::ARMV7K: 112 case ArchKind::ARMV8A: 113 case ArchKind::ARMV8_1A: 114 case ArchKind::ARMV8_2A: 115 case ArchKind::ARMV8_3A: 116 case ArchKind::ARMV8_4A: 117 case ArchKind::ARMV8_5A: 118 case ArchKind::ARMV8_6A: 119 case ArchKind::ARMV8_7A: 120 case ArchKind::ARMV9A: 121 case ArchKind::ARMV9_1A: 122 case ArchKind::ARMV9_2A: 123 return ProfileKind::A; 124 case ArchKind::ARMV2: 125 case ArchKind::ARMV2A: 126 case ArchKind::ARMV3: 127 case ArchKind::ARMV3M: 128 case ArchKind::ARMV4: 129 case ArchKind::ARMV4T: 130 case ArchKind::ARMV5T: 131 case ArchKind::ARMV5TE: 132 case ArchKind::ARMV5TEJ: 133 case ArchKind::ARMV6: 134 case ArchKind::ARMV6K: 135 case ArchKind::ARMV6T2: 136 case ArchKind::ARMV6KZ: 137 case ArchKind::ARMV7S: 138 case ArchKind::IWMMXT: 139 case ArchKind::IWMMXT2: 140 case ArchKind::XSCALE: 141 case ArchKind::INVALID: 142 return ProfileKind::INVALID; 143 } 144 llvm_unreachable("Unhandled architecture"); 145 } 146 147 StringRef ARM::getArchSynonym(StringRef Arch) { 148 return StringSwitch<StringRef>(Arch) 149 .Case("v5", "v5t") 150 .Case("v5e", "v5te") 151 .Case("v6j", "v6") 152 .Case("v6hl", "v6k") 153 .Cases("v6m", "v6sm", "v6s-m", "v6-m") 154 .Cases("v6z", "v6zk", "v6kz") 155 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") 156 .Case("v7r", "v7-r") 157 .Case("v7m", "v7-m") 158 .Case("v7em", "v7e-m") 159 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a") 160 .Case("v8.1a", "v8.1-a") 161 .Case("v8.2a", "v8.2-a") 162 .Case("v8.3a", "v8.3-a") 163 .Case("v8.4a", "v8.4-a") 164 .Case("v8.5a", "v8.5-a") 165 .Case("v8.6a", "v8.6-a") 166 .Case("v8.7a", "v8.7-a") 167 .Case("v8r", "v8-r") 168 .Cases("v9", "v9a", "v9-a") 169 .Case("v9.1a", "v9.1-a") 170 .Case("v9.2a", "v9.2-a") 171 .Case("v8m.base", "v8-m.base") 172 .Case("v8m.main", "v8-m.main") 173 .Case("v8.1m.main", "v8.1-m.main") 174 .Default(Arch); 175 } 176 177 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) { 178 179 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID) 180 return false; 181 182 static const struct FPUFeatureNameInfo { 183 const char *PlusName, *MinusName; 184 FPUVersion MinVersion; 185 FPURestriction MaxRestriction; 186 } FPUFeatureInfoList[] = { 187 // We have to specify the + and - versions of the name in full so 188 // that we can return them as static StringRefs. 189 // 190 // Also, the SubtargetFeatures ending in just "sp" are listed here 191 // under FPURestriction::None, which is the only FPURestriction in 192 // which they would be valid (since FPURestriction::SP doesn't 193 // exist). 194 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16}, 195 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16}, 196 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None}, 197 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16}, 198 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16}, 199 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None}, 200 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16}, 201 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None}, 202 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16}, 203 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16}, 204 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None}, 205 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None}, 206 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16}, 207 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16}, 208 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None}, 209 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16}, 210 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16}, 211 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None}, 212 }; 213 214 for (const auto &Info: FPUFeatureInfoList) { 215 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion && 216 FPUNames[FPUKind].Restriction <= Info.MaxRestriction) 217 Features.push_back(Info.PlusName); 218 else 219 Features.push_back(Info.MinusName); 220 } 221 222 static const struct NeonFeatureNameInfo { 223 const char *PlusName, *MinusName; 224 NeonSupportLevel MinSupportLevel; 225 } NeonFeatureInfoList[] = { 226 {"+neon", "-neon", NeonSupportLevel::Neon}, 227 {"+sha2", "-sha2", NeonSupportLevel::Crypto}, 228 {"+aes", "-aes", NeonSupportLevel::Crypto}, 229 }; 230 231 for (const auto &Info: NeonFeatureInfoList) { 232 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel) 233 Features.push_back(Info.PlusName); 234 else 235 Features.push_back(Info.MinusName); 236 } 237 238 return true; 239 } 240 241 // Little/Big endian 242 ARM::EndianKind ARM::parseArchEndian(StringRef Arch) { 243 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") || 244 Arch.startswith("aarch64_be")) 245 return EndianKind::BIG; 246 247 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 248 if (Arch.endswith("eb")) 249 return EndianKind::BIG; 250 else 251 return EndianKind::LITTLE; 252 } 253 254 if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32")) 255 return EndianKind::LITTLE; 256 257 return EndianKind::INVALID; 258 } 259 260 // ARM, Thumb, AArch64 261 ARM::ISAKind ARM::parseArchISA(StringRef Arch) { 262 return StringSwitch<ISAKind>(Arch) 263 .StartsWith("aarch64", ISAKind::AARCH64) 264 .StartsWith("arm64", ISAKind::AARCH64) 265 .StartsWith("thumb", ISAKind::THUMB) 266 .StartsWith("arm", ISAKind::ARM) 267 .Default(ISAKind::INVALID); 268 } 269 270 unsigned ARM::parseFPU(StringRef FPU) { 271 StringRef Syn = getFPUSynonym(FPU); 272 for (const auto &F : FPUNames) { 273 if (Syn == F.getName()) 274 return F.ID; 275 } 276 return FK_INVALID; 277 } 278 279 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) { 280 if (FPUKind >= FK_LAST) 281 return NeonSupportLevel::None; 282 return FPUNames[FPUKind].NeonSupport; 283 } 284 285 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 286 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 287 // "v.+", if the latter, return unmodified string, minus 'eb'. 288 // If invalid, return empty string. 289 StringRef ARM::getCanonicalArchName(StringRef Arch) { 290 size_t offset = StringRef::npos; 291 StringRef A = Arch; 292 StringRef Error = ""; 293 294 // Begins with "arm" / "thumb", move past it. 295 if (A.startswith("arm64_32")) 296 offset = 8; 297 else if (A.startswith("arm64e")) 298 offset = 6; 299 else if (A.startswith("arm64")) 300 offset = 5; 301 else if (A.startswith("aarch64_32")) 302 offset = 10; 303 else if (A.startswith("arm")) 304 offset = 3; 305 else if (A.startswith("thumb")) 306 offset = 5; 307 else if (A.startswith("aarch64")) { 308 offset = 7; 309 // AArch64 uses "_be", not "eb" suffix. 310 if (A.contains("eb")) 311 return Error; 312 if (A.substr(offset, 3) == "_be") 313 offset += 3; 314 } 315 316 // Ex. "armebv7", move past the "eb". 317 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 318 offset += 2; 319 // Or, if it ends with eb ("armv7eb"), chop it off. 320 else if (A.endswith("eb")) 321 A = A.substr(0, A.size() - 2); 322 // Trim the head 323 if (offset != StringRef::npos) 324 A = A.substr(offset); 325 326 // Empty string means offset reached the end, which means it's valid. 327 if (A.empty()) 328 return Arch; 329 330 // Only match non-marketing names 331 if (offset != StringRef::npos) { 332 // Must start with 'vN'. 333 if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1]))) 334 return Error; 335 // Can't have an extra 'eb'. 336 if (A.contains("eb")) 337 return Error; 338 } 339 340 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 341 return A; 342 } 343 344 StringRef ARM::getFPUSynonym(StringRef FPU) { 345 return StringSwitch<StringRef>(FPU) 346 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 347 .Case("vfp2", "vfpv2") 348 .Case("vfp3", "vfpv3") 349 .Case("vfp4", "vfpv4") 350 .Case("vfp3-d16", "vfpv3-d16") 351 .Case("vfp4-d16", "vfpv4-d16") 352 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 353 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 354 .Case("fp5-sp-d16", "fpv5-sp-d16") 355 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 356 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 357 .Case("neon-vfpv3", "neon") 358 .Default(FPU); 359 } 360 361 StringRef ARM::getFPUName(unsigned FPUKind) { 362 if (FPUKind >= FK_LAST) 363 return StringRef(); 364 return FPUNames[FPUKind].getName(); 365 } 366 367 ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) { 368 if (FPUKind >= FK_LAST) 369 return FPUVersion::NONE; 370 return FPUNames[FPUKind].FPUVer; 371 } 372 373 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) { 374 if (FPUKind >= FK_LAST) 375 return FPURestriction::None; 376 return FPUNames[FPUKind].Restriction; 377 } 378 379 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) { 380 if (CPU == "generic") 381 return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU; 382 383 return StringSwitch<unsigned>(CPU) 384 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 385 .Case(NAME, DEFAULT_FPU) 386 #include "llvm/Support/ARMTargetParser.def" 387 .Default(ARM::FK_INVALID); 388 } 389 390 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) { 391 if (CPU == "generic") 392 return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions; 393 394 return StringSwitch<uint64_t>(CPU) 395 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 396 .Case(NAME, \ 397 ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \ 398 DEFAULT_EXT) 399 #include "llvm/Support/ARMTargetParser.def" 400 .Default(ARM::AEK_INVALID); 401 } 402 403 bool ARM::getHWDivFeatures(uint64_t HWDivKind, 404 std::vector<StringRef> &Features) { 405 406 if (HWDivKind == AEK_INVALID) 407 return false; 408 409 if (HWDivKind & AEK_HWDIVARM) 410 Features.push_back("+hwdiv-arm"); 411 else 412 Features.push_back("-hwdiv-arm"); 413 414 if (HWDivKind & AEK_HWDIVTHUMB) 415 Features.push_back("+hwdiv"); 416 else 417 Features.push_back("-hwdiv"); 418 419 return true; 420 } 421 422 bool ARM::getExtensionFeatures(uint64_t Extensions, 423 std::vector<StringRef> &Features) { 424 425 if (Extensions == AEK_INVALID) 426 return false; 427 428 for (const auto &AE : ARCHExtNames) { 429 if ((Extensions & AE.ID) == AE.ID && AE.Feature) 430 Features.push_back(AE.Feature); 431 else if (AE.NegFeature) 432 Features.push_back(AE.NegFeature); 433 } 434 435 return getHWDivFeatures(Extensions, Features); 436 } 437 438 StringRef ARM::getArchName(ARM::ArchKind AK) { 439 return ARCHNames[static_cast<unsigned>(AK)].getName(); 440 } 441 442 StringRef ARM::getCPUAttr(ARM::ArchKind AK) { 443 return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr(); 444 } 445 446 StringRef ARM::getSubArch(ARM::ArchKind AK) { 447 return ARCHNames[static_cast<unsigned>(AK)].getSubArch(); 448 } 449 450 unsigned ARM::getArchAttr(ARM::ArchKind AK) { 451 return ARCHNames[static_cast<unsigned>(AK)].ArchAttr; 452 } 453 454 StringRef ARM::getArchExtName(uint64_t ArchExtKind) { 455 for (const auto &AE : ARCHExtNames) { 456 if (ArchExtKind == AE.ID) 457 return AE.getName(); 458 } 459 return StringRef(); 460 } 461 462 static bool stripNegationPrefix(StringRef &Name) { 463 if (Name.startswith("no")) { 464 Name = Name.substr(2); 465 return true; 466 } 467 return false; 468 } 469 470 StringRef ARM::getArchExtFeature(StringRef ArchExt) { 471 bool Negated = stripNegationPrefix(ArchExt); 472 for (const auto &AE : ARCHExtNames) { 473 if (AE.Feature && ArchExt == AE.getName()) 474 return StringRef(Negated ? AE.NegFeature : AE.Feature); 475 } 476 477 return StringRef(); 478 } 479 480 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) { 481 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind]; 482 483 // If the input FPU already supports double-precision, then there 484 // isn't any different FPU we can return here. 485 // 486 // The current available FPURestriction values are None (no 487 // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs 488 // and single precision only); there's no value representing 489 // SP restriction without D16. So this test just means 'is it 490 // SP only?'. 491 if (InputFPU.Restriction != ARM::FPURestriction::SP_D16) 492 return ARM::FK_INVALID; 493 494 // Otherwise, look for an FPU entry with all the same fields, except 495 // that SP_D16 has been replaced with just D16, representing adding 496 // double precision and not changing anything else. 497 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) { 498 if (CandidateFPU.FPUVer == InputFPU.FPUVer && 499 CandidateFPU.NeonSupport == InputFPU.NeonSupport && 500 CandidateFPU.Restriction == ARM::FPURestriction::D16) { 501 return CandidateFPU.ID; 502 } 503 } 504 505 // nothing found 506 return ARM::FK_INVALID; 507 } 508 509 bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, 510 StringRef ArchExt, 511 std::vector<StringRef> &Features, 512 unsigned &ArgFPUID) { 513 514 size_t StartingNumFeatures = Features.size(); 515 const bool Negated = stripNegationPrefix(ArchExt); 516 uint64_t ID = parseArchExt(ArchExt); 517 518 if (ID == AEK_INVALID) 519 return false; 520 521 for (const auto &AE : ARCHExtNames) { 522 if (Negated) { 523 if ((AE.ID & ID) == ID && AE.NegFeature) 524 Features.push_back(AE.NegFeature); 525 } else { 526 if ((AE.ID & ID) == AE.ID && AE.Feature) 527 Features.push_back(AE.Feature); 528 } 529 } 530 531 if (CPU == "") 532 CPU = "generic"; 533 534 if (ArchExt == "fp" || ArchExt == "fp.dp") { 535 unsigned FPUKind; 536 if (ArchExt == "fp.dp") { 537 if (Negated) { 538 Features.push_back("-fp64"); 539 return true; 540 } 541 FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK)); 542 } else if (Negated) { 543 FPUKind = ARM::FK_NONE; 544 } else { 545 FPUKind = getDefaultFPU(CPU, AK); 546 } 547 ArgFPUID = FPUKind; 548 return ARM::getFPUFeatures(FPUKind, Features); 549 } 550 return StartingNumFeatures != Features.size(); 551 } 552 553 StringRef ARM::getDefaultCPU(StringRef Arch) { 554 ArchKind AK = parseArch(Arch); 555 if (AK == ArchKind::INVALID) 556 return StringRef(); 557 558 // Look for multiple AKs to find the default for pair AK+Name. 559 for (const auto &CPU : CPUNames) { 560 if (CPU.ArchID == AK && CPU.Default) 561 return CPU.getName(); 562 } 563 564 // If we can't find a default then target the architecture instead 565 return "generic"; 566 } 567 568 uint64_t ARM::parseHWDiv(StringRef HWDiv) { 569 StringRef Syn = getHWDivSynonym(HWDiv); 570 for (const auto &D : HWDivNames) { 571 if (Syn == D.getName()) 572 return D.ID; 573 } 574 return AEK_INVALID; 575 } 576 577 uint64_t ARM::parseArchExt(StringRef ArchExt) { 578 for (const auto &A : ARCHExtNames) { 579 if (ArchExt == A.getName()) 580 return A.ID; 581 } 582 return AEK_INVALID; 583 } 584 585 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) { 586 for (const auto &C : CPUNames) { 587 if (CPU == C.getName()) 588 return C.ArchID; 589 } 590 return ArchKind::INVALID; 591 } 592 593 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) { 594 for (const CpuNames<ArchKind> &Arch : CPUNames) { 595 if (Arch.ArchID != ArchKind::INVALID) 596 Values.push_back(Arch.getName()); 597 } 598 } 599 600 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) { 601 StringRef ArchName = 602 CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU)); 603 604 if (TT.isOSBinFormatMachO()) { 605 if (TT.getEnvironment() == Triple::EABI || 606 TT.getOS() == Triple::UnknownOS || 607 parseArchProfile(ArchName) == ProfileKind::M) 608 return "aapcs"; 609 if (TT.isWatchABI()) 610 return "aapcs16"; 611 return "apcs-gnu"; 612 } else if (TT.isOSWindows()) 613 // FIXME: this is invalid for WindowsCE. 614 return "aapcs"; 615 616 // Select the default based on the platform. 617 switch (TT.getEnvironment()) { 618 case Triple::Android: 619 case Triple::GNUEABI: 620 case Triple::GNUEABIHF: 621 case Triple::MuslEABI: 622 case Triple::MuslEABIHF: 623 return "aapcs-linux"; 624 case Triple::EABIHF: 625 case Triple::EABI: 626 return "aapcs"; 627 default: 628 if (TT.isOSNetBSD()) 629 return "apcs-gnu"; 630 if (TT.isOSOpenBSD()) 631 return "aapcs-linux"; 632 return "aapcs"; 633 } 634 } 635