1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise ARM hardware features 10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Support/ARMTargetParser.h" 15 #include "llvm/ADT/StringSwitch.h" 16 #include "llvm/ADT/Triple.h" 17 #include <cctype> 18 19 using namespace llvm; 20 21 static StringRef getHWDivSynonym(StringRef HWDiv) { 22 return StringSwitch<StringRef>(HWDiv) 23 .Case("thumb,arm", "arm,thumb") 24 .Default(HWDiv); 25 } 26 27 // Allows partial match, ex. "v7a" matches "armv7a". 28 ARM::ArchKind ARM::parseArch(StringRef Arch) { 29 Arch = getCanonicalArchName(Arch); 30 StringRef Syn = getArchSynonym(Arch); 31 for (const auto &A : ARCHNames) { 32 if (A.getName().endswith(Syn)) 33 return A.ID; 34 } 35 return ArchKind::INVALID; 36 } 37 38 // Version number (ex. v7 = 7). 39 unsigned ARM::parseArchVersion(StringRef Arch) { 40 Arch = getCanonicalArchName(Arch); 41 switch (parseArch(Arch)) { 42 case ArchKind::ARMV2: 43 case ArchKind::ARMV2A: 44 return 2; 45 case ArchKind::ARMV3: 46 case ArchKind::ARMV3M: 47 return 3; 48 case ArchKind::ARMV4: 49 case ArchKind::ARMV4T: 50 return 4; 51 case ArchKind::ARMV5T: 52 case ArchKind::ARMV5TE: 53 case ArchKind::IWMMXT: 54 case ArchKind::IWMMXT2: 55 case ArchKind::XSCALE: 56 case ArchKind::ARMV5TEJ: 57 return 5; 58 case ArchKind::ARMV6: 59 case ArchKind::ARMV6K: 60 case ArchKind::ARMV6T2: 61 case ArchKind::ARMV6KZ: 62 case ArchKind::ARMV6M: 63 return 6; 64 case ArchKind::ARMV7A: 65 case ArchKind::ARMV7VE: 66 case ArchKind::ARMV7R: 67 case ArchKind::ARMV7M: 68 case ArchKind::ARMV7S: 69 case ArchKind::ARMV7EM: 70 case ArchKind::ARMV7K: 71 return 7; 72 case ArchKind::ARMV8A: 73 case ArchKind::ARMV8_1A: 74 case ArchKind::ARMV8_2A: 75 case ArchKind::ARMV8_3A: 76 case ArchKind::ARMV8_4A: 77 case ArchKind::ARMV8_5A: 78 case ArchKind::ARMV8_6A: 79 case ArchKind::ARMV8_7A: 80 case ArchKind::ARMV8_8A: 81 case ArchKind::ARMV8R: 82 case ArchKind::ARMV8MBaseline: 83 case ArchKind::ARMV8MMainline: 84 case ArchKind::ARMV8_1MMainline: 85 return 8; 86 case ArchKind::ARMV9A: 87 case ArchKind::ARMV9_1A: 88 case ArchKind::ARMV9_2A: 89 return 9; 90 case ArchKind::INVALID: 91 return 0; 92 } 93 llvm_unreachable("Unhandled architecture"); 94 } 95 96 // Profile A/R/M 97 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) { 98 Arch = getCanonicalArchName(Arch); 99 switch (parseArch(Arch)) { 100 case ArchKind::ARMV6M: 101 case ArchKind::ARMV7M: 102 case ArchKind::ARMV7EM: 103 case ArchKind::ARMV8MMainline: 104 case ArchKind::ARMV8MBaseline: 105 case ArchKind::ARMV8_1MMainline: 106 return ProfileKind::M; 107 case ArchKind::ARMV7R: 108 case ArchKind::ARMV8R: 109 return ProfileKind::R; 110 case ArchKind::ARMV7A: 111 case ArchKind::ARMV7VE: 112 case ArchKind::ARMV7K: 113 case ArchKind::ARMV8A: 114 case ArchKind::ARMV8_1A: 115 case ArchKind::ARMV8_2A: 116 case ArchKind::ARMV8_3A: 117 case ArchKind::ARMV8_4A: 118 case ArchKind::ARMV8_5A: 119 case ArchKind::ARMV8_6A: 120 case ArchKind::ARMV8_7A: 121 case ArchKind::ARMV8_8A: 122 case ArchKind::ARMV9A: 123 case ArchKind::ARMV9_1A: 124 case ArchKind::ARMV9_2A: 125 return ProfileKind::A; 126 case ArchKind::ARMV2: 127 case ArchKind::ARMV2A: 128 case ArchKind::ARMV3: 129 case ArchKind::ARMV3M: 130 case ArchKind::ARMV4: 131 case ArchKind::ARMV4T: 132 case ArchKind::ARMV5T: 133 case ArchKind::ARMV5TE: 134 case ArchKind::ARMV5TEJ: 135 case ArchKind::ARMV6: 136 case ArchKind::ARMV6K: 137 case ArchKind::ARMV6T2: 138 case ArchKind::ARMV6KZ: 139 case ArchKind::ARMV7S: 140 case ArchKind::IWMMXT: 141 case ArchKind::IWMMXT2: 142 case ArchKind::XSCALE: 143 case ArchKind::INVALID: 144 return ProfileKind::INVALID; 145 } 146 llvm_unreachable("Unhandled architecture"); 147 } 148 149 StringRef ARM::getArchSynonym(StringRef Arch) { 150 return StringSwitch<StringRef>(Arch) 151 .Case("v5", "v5t") 152 .Case("v5e", "v5te") 153 .Case("v6j", "v6") 154 .Case("v6hl", "v6k") 155 .Cases("v6m", "v6sm", "v6s-m", "v6-m") 156 .Cases("v6z", "v6zk", "v6kz") 157 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") 158 .Case("v7r", "v7-r") 159 .Case("v7m", "v7-m") 160 .Case("v7em", "v7e-m") 161 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a") 162 .Case("v8.1a", "v8.1-a") 163 .Case("v8.2a", "v8.2-a") 164 .Case("v8.3a", "v8.3-a") 165 .Case("v8.4a", "v8.4-a") 166 .Case("v8.5a", "v8.5-a") 167 .Case("v8.6a", "v8.6-a") 168 .Case("v8.7a", "v8.7-a") 169 .Case("v8.8a", "v8.8-a") 170 .Case("v8r", "v8-r") 171 .Cases("v9", "v9a", "v9-a") 172 .Case("v9.1a", "v9.1-a") 173 .Case("v9.2a", "v9.2-a") 174 .Case("v8m.base", "v8-m.base") 175 .Case("v8m.main", "v8-m.main") 176 .Case("v8.1m.main", "v8.1-m.main") 177 .Default(Arch); 178 } 179 180 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) { 181 182 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID) 183 return false; 184 185 static const struct FPUFeatureNameInfo { 186 const char *PlusName, *MinusName; 187 FPUVersion MinVersion; 188 FPURestriction MaxRestriction; 189 } FPUFeatureInfoList[] = { 190 // We have to specify the + and - versions of the name in full so 191 // that we can return them as static StringRefs. 192 // 193 // Also, the SubtargetFeatures ending in just "sp" are listed here 194 // under FPURestriction::None, which is the only FPURestriction in 195 // which they would be valid (since FPURestriction::SP doesn't 196 // exist). 197 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16}, 198 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16}, 199 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None}, 200 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16}, 201 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16}, 202 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None}, 203 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16}, 204 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None}, 205 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16}, 206 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16}, 207 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None}, 208 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None}, 209 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16}, 210 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16}, 211 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None}, 212 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16}, 213 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16}, 214 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None}, 215 }; 216 217 for (const auto &Info: FPUFeatureInfoList) { 218 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion && 219 FPUNames[FPUKind].Restriction <= Info.MaxRestriction) 220 Features.push_back(Info.PlusName); 221 else 222 Features.push_back(Info.MinusName); 223 } 224 225 static const struct NeonFeatureNameInfo { 226 const char *PlusName, *MinusName; 227 NeonSupportLevel MinSupportLevel; 228 } NeonFeatureInfoList[] = { 229 {"+neon", "-neon", NeonSupportLevel::Neon}, 230 {"+sha2", "-sha2", NeonSupportLevel::Crypto}, 231 {"+aes", "-aes", NeonSupportLevel::Crypto}, 232 }; 233 234 for (const auto &Info: NeonFeatureInfoList) { 235 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel) 236 Features.push_back(Info.PlusName); 237 else 238 Features.push_back(Info.MinusName); 239 } 240 241 return true; 242 } 243 244 // Little/Big endian 245 ARM::EndianKind ARM::parseArchEndian(StringRef Arch) { 246 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") || 247 Arch.startswith("aarch64_be")) 248 return EndianKind::BIG; 249 250 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 251 if (Arch.endswith("eb")) 252 return EndianKind::BIG; 253 else 254 return EndianKind::LITTLE; 255 } 256 257 if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32")) 258 return EndianKind::LITTLE; 259 260 return EndianKind::INVALID; 261 } 262 263 // ARM, Thumb, AArch64 264 ARM::ISAKind ARM::parseArchISA(StringRef Arch) { 265 return StringSwitch<ISAKind>(Arch) 266 .StartsWith("aarch64", ISAKind::AARCH64) 267 .StartsWith("arm64", ISAKind::AARCH64) 268 .StartsWith("thumb", ISAKind::THUMB) 269 .StartsWith("arm", ISAKind::ARM) 270 .Default(ISAKind::INVALID); 271 } 272 273 unsigned ARM::parseFPU(StringRef FPU) { 274 StringRef Syn = getFPUSynonym(FPU); 275 for (const auto &F : FPUNames) { 276 if (Syn == F.getName()) 277 return F.ID; 278 } 279 return FK_INVALID; 280 } 281 282 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) { 283 if (FPUKind >= FK_LAST) 284 return NeonSupportLevel::None; 285 return FPUNames[FPUKind].NeonSupport; 286 } 287 288 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 289 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 290 // "v.+", if the latter, return unmodified string, minus 'eb'. 291 // If invalid, return empty string. 292 StringRef ARM::getCanonicalArchName(StringRef Arch) { 293 size_t offset = StringRef::npos; 294 StringRef A = Arch; 295 StringRef Error = ""; 296 297 // Begins with "arm" / "thumb", move past it. 298 if (A.startswith("arm64_32")) 299 offset = 8; 300 else if (A.startswith("arm64e")) 301 offset = 6; 302 else if (A.startswith("arm64")) 303 offset = 5; 304 else if (A.startswith("aarch64_32")) 305 offset = 10; 306 else if (A.startswith("arm")) 307 offset = 3; 308 else if (A.startswith("thumb")) 309 offset = 5; 310 else if (A.startswith("aarch64")) { 311 offset = 7; 312 // AArch64 uses "_be", not "eb" suffix. 313 if (A.contains("eb")) 314 return Error; 315 if (A.substr(offset, 3) == "_be") 316 offset += 3; 317 } 318 319 // Ex. "armebv7", move past the "eb". 320 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 321 offset += 2; 322 // Or, if it ends with eb ("armv7eb"), chop it off. 323 else if (A.endswith("eb")) 324 A = A.substr(0, A.size() - 2); 325 // Trim the head 326 if (offset != StringRef::npos) 327 A = A.substr(offset); 328 329 // Empty string means offset reached the end, which means it's valid. 330 if (A.empty()) 331 return Arch; 332 333 // Only match non-marketing names 334 if (offset != StringRef::npos) { 335 // Must start with 'vN'. 336 if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1]))) 337 return Error; 338 // Can't have an extra 'eb'. 339 if (A.contains("eb")) 340 return Error; 341 } 342 343 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 344 return A; 345 } 346 347 StringRef ARM::getFPUSynonym(StringRef FPU) { 348 return StringSwitch<StringRef>(FPU) 349 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 350 .Case("vfp2", "vfpv2") 351 .Case("vfp3", "vfpv3") 352 .Case("vfp4", "vfpv4") 353 .Case("vfp3-d16", "vfpv3-d16") 354 .Case("vfp4-d16", "vfpv4-d16") 355 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 356 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 357 .Case("fp5-sp-d16", "fpv5-sp-d16") 358 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 359 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 360 .Case("neon-vfpv3", "neon") 361 .Default(FPU); 362 } 363 364 StringRef ARM::getFPUName(unsigned FPUKind) { 365 if (FPUKind >= FK_LAST) 366 return StringRef(); 367 return FPUNames[FPUKind].getName(); 368 } 369 370 ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) { 371 if (FPUKind >= FK_LAST) 372 return FPUVersion::NONE; 373 return FPUNames[FPUKind].FPUVer; 374 } 375 376 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) { 377 if (FPUKind >= FK_LAST) 378 return FPURestriction::None; 379 return FPUNames[FPUKind].Restriction; 380 } 381 382 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) { 383 if (CPU == "generic") 384 return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU; 385 386 return StringSwitch<unsigned>(CPU) 387 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 388 .Case(NAME, DEFAULT_FPU) 389 #include "llvm/Support/ARMTargetParser.def" 390 .Default(ARM::FK_INVALID); 391 } 392 393 uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) { 394 if (CPU == "generic") 395 return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions; 396 397 return StringSwitch<uint64_t>(CPU) 398 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 399 .Case(NAME, \ 400 ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \ 401 DEFAULT_EXT) 402 #include "llvm/Support/ARMTargetParser.def" 403 .Default(ARM::AEK_INVALID); 404 } 405 406 bool ARM::getHWDivFeatures(uint64_t HWDivKind, 407 std::vector<StringRef> &Features) { 408 409 if (HWDivKind == AEK_INVALID) 410 return false; 411 412 if (HWDivKind & AEK_HWDIVARM) 413 Features.push_back("+hwdiv-arm"); 414 else 415 Features.push_back("-hwdiv-arm"); 416 417 if (HWDivKind & AEK_HWDIVTHUMB) 418 Features.push_back("+hwdiv"); 419 else 420 Features.push_back("-hwdiv"); 421 422 return true; 423 } 424 425 bool ARM::getExtensionFeatures(uint64_t Extensions, 426 std::vector<StringRef> &Features) { 427 428 if (Extensions == AEK_INVALID) 429 return false; 430 431 for (const auto &AE : ARCHExtNames) { 432 if ((Extensions & AE.ID) == AE.ID && AE.Feature) 433 Features.push_back(AE.Feature); 434 else if (AE.NegFeature) 435 Features.push_back(AE.NegFeature); 436 } 437 438 return getHWDivFeatures(Extensions, Features); 439 } 440 441 StringRef ARM::getArchName(ARM::ArchKind AK) { 442 return ARCHNames[static_cast<unsigned>(AK)].getName(); 443 } 444 445 StringRef ARM::getCPUAttr(ARM::ArchKind AK) { 446 return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr(); 447 } 448 449 StringRef ARM::getSubArch(ARM::ArchKind AK) { 450 return ARCHNames[static_cast<unsigned>(AK)].getSubArch(); 451 } 452 453 unsigned ARM::getArchAttr(ARM::ArchKind AK) { 454 return ARCHNames[static_cast<unsigned>(AK)].ArchAttr; 455 } 456 457 StringRef ARM::getArchExtName(uint64_t ArchExtKind) { 458 for (const auto &AE : ARCHExtNames) { 459 if (ArchExtKind == AE.ID) 460 return AE.getName(); 461 } 462 return StringRef(); 463 } 464 465 static bool stripNegationPrefix(StringRef &Name) { 466 if (Name.startswith("no")) { 467 Name = Name.substr(2); 468 return true; 469 } 470 return false; 471 } 472 473 StringRef ARM::getArchExtFeature(StringRef ArchExt) { 474 bool Negated = stripNegationPrefix(ArchExt); 475 for (const auto &AE : ARCHExtNames) { 476 if (AE.Feature && ArchExt == AE.getName()) 477 return StringRef(Negated ? AE.NegFeature : AE.Feature); 478 } 479 480 return StringRef(); 481 } 482 483 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) { 484 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind]; 485 486 // If the input FPU already supports double-precision, then there 487 // isn't any different FPU we can return here. 488 // 489 // The current available FPURestriction values are None (no 490 // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs 491 // and single precision only); there's no value representing 492 // SP restriction without D16. So this test just means 'is it 493 // SP only?'. 494 if (InputFPU.Restriction != ARM::FPURestriction::SP_D16) 495 return ARM::FK_INVALID; 496 497 // Otherwise, look for an FPU entry with all the same fields, except 498 // that SP_D16 has been replaced with just D16, representing adding 499 // double precision and not changing anything else. 500 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) { 501 if (CandidateFPU.FPUVer == InputFPU.FPUVer && 502 CandidateFPU.NeonSupport == InputFPU.NeonSupport && 503 CandidateFPU.Restriction == ARM::FPURestriction::D16) { 504 return CandidateFPU.ID; 505 } 506 } 507 508 // nothing found 509 return ARM::FK_INVALID; 510 } 511 512 bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, 513 StringRef ArchExt, 514 std::vector<StringRef> &Features, 515 unsigned &ArgFPUID) { 516 517 size_t StartingNumFeatures = Features.size(); 518 const bool Negated = stripNegationPrefix(ArchExt); 519 uint64_t ID = parseArchExt(ArchExt); 520 521 if (ID == AEK_INVALID) 522 return false; 523 524 for (const auto &AE : ARCHExtNames) { 525 if (Negated) { 526 if ((AE.ID & ID) == ID && AE.NegFeature) 527 Features.push_back(AE.NegFeature); 528 } else { 529 if ((AE.ID & ID) == AE.ID && AE.Feature) 530 Features.push_back(AE.Feature); 531 } 532 } 533 534 if (CPU == "") 535 CPU = "generic"; 536 537 if (ArchExt == "fp" || ArchExt == "fp.dp") { 538 unsigned FPUKind; 539 if (ArchExt == "fp.dp") { 540 if (Negated) { 541 Features.push_back("-fp64"); 542 return true; 543 } 544 FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK)); 545 } else if (Negated) { 546 FPUKind = ARM::FK_NONE; 547 } else { 548 FPUKind = getDefaultFPU(CPU, AK); 549 } 550 ArgFPUID = FPUKind; 551 return ARM::getFPUFeatures(FPUKind, Features); 552 } 553 return StartingNumFeatures != Features.size(); 554 } 555 556 StringRef ARM::getDefaultCPU(StringRef Arch) { 557 ArchKind AK = parseArch(Arch); 558 if (AK == ArchKind::INVALID) 559 return StringRef(); 560 561 // Look for multiple AKs to find the default for pair AK+Name. 562 for (const auto &CPU : CPUNames) { 563 if (CPU.ArchID == AK && CPU.Default) 564 return CPU.getName(); 565 } 566 567 // If we can't find a default then target the architecture instead 568 return "generic"; 569 } 570 571 uint64_t ARM::parseHWDiv(StringRef HWDiv) { 572 StringRef Syn = getHWDivSynonym(HWDiv); 573 for (const auto &D : HWDivNames) { 574 if (Syn == D.getName()) 575 return D.ID; 576 } 577 return AEK_INVALID; 578 } 579 580 uint64_t ARM::parseArchExt(StringRef ArchExt) { 581 for (const auto &A : ARCHExtNames) { 582 if (ArchExt == A.getName()) 583 return A.ID; 584 } 585 return AEK_INVALID; 586 } 587 588 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) { 589 for (const auto &C : CPUNames) { 590 if (CPU == C.getName()) 591 return C.ArchID; 592 } 593 return ArchKind::INVALID; 594 } 595 596 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) { 597 for (const CpuNames<ArchKind> &Arch : CPUNames) { 598 if (Arch.ArchID != ArchKind::INVALID) 599 Values.push_back(Arch.getName()); 600 } 601 } 602 603 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) { 604 StringRef ArchName = 605 CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU)); 606 607 if (TT.isOSBinFormatMachO()) { 608 if (TT.getEnvironment() == Triple::EABI || 609 TT.getOS() == Triple::UnknownOS || 610 parseArchProfile(ArchName) == ProfileKind::M) 611 return "aapcs"; 612 if (TT.isWatchABI()) 613 return "aapcs16"; 614 return "apcs-gnu"; 615 } else if (TT.isOSWindows()) 616 // FIXME: this is invalid for WindowsCE. 617 return "aapcs"; 618 619 // Select the default based on the platform. 620 switch (TT.getEnvironment()) { 621 case Triple::Android: 622 case Triple::GNUEABI: 623 case Triple::GNUEABIHF: 624 case Triple::MuslEABI: 625 case Triple::MuslEABIHF: 626 return "aapcs-linux"; 627 case Triple::EABIHF: 628 case Triple::EABI: 629 return "aapcs"; 630 default: 631 if (TT.isOSNetBSD()) 632 return "apcs-gnu"; 633 if (TT.isOSOpenBSD()) 634 return "aapcs-linux"; 635 return "aapcs"; 636 } 637 } 638