1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise ARM hardware features 10 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Support/ARMTargetParser.h" 15 #include "llvm/ADT/StringSwitch.h" 16 #include <cctype> 17 18 using namespace llvm; 19 20 static StringRef getHWDivSynonym(StringRef HWDiv) { 21 return StringSwitch<StringRef>(HWDiv) 22 .Case("thumb,arm", "arm,thumb") 23 .Default(HWDiv); 24 } 25 26 // Allows partial match, ex. "v7a" matches "armv7a". 27 ARM::ArchKind ARM::parseArch(StringRef Arch) { 28 Arch = getCanonicalArchName(Arch); 29 StringRef Syn = getArchSynonym(Arch); 30 for (const auto A : ARCHNames) { 31 if (A.getName().endswith(Syn)) 32 return A.ID; 33 } 34 return ArchKind::INVALID; 35 } 36 37 // Version number (ex. v7 = 7). 38 unsigned ARM::parseArchVersion(StringRef Arch) { 39 Arch = getCanonicalArchName(Arch); 40 switch (parseArch(Arch)) { 41 case ArchKind::ARMV2: 42 case ArchKind::ARMV2A: 43 return 2; 44 case ArchKind::ARMV3: 45 case ArchKind::ARMV3M: 46 return 3; 47 case ArchKind::ARMV4: 48 case ArchKind::ARMV4T: 49 return 4; 50 case ArchKind::ARMV5T: 51 case ArchKind::ARMV5TE: 52 case ArchKind::IWMMXT: 53 case ArchKind::IWMMXT2: 54 case ArchKind::XSCALE: 55 case ArchKind::ARMV5TEJ: 56 return 5; 57 case ArchKind::ARMV6: 58 case ArchKind::ARMV6K: 59 case ArchKind::ARMV6T2: 60 case ArchKind::ARMV6KZ: 61 case ArchKind::ARMV6M: 62 return 6; 63 case ArchKind::ARMV7A: 64 case ArchKind::ARMV7VE: 65 case ArchKind::ARMV7R: 66 case ArchKind::ARMV7M: 67 case ArchKind::ARMV7S: 68 case ArchKind::ARMV7EM: 69 case ArchKind::ARMV7K: 70 return 7; 71 case ArchKind::ARMV8A: 72 case ArchKind::ARMV8_1A: 73 case ArchKind::ARMV8_2A: 74 case ArchKind::ARMV8_3A: 75 case ArchKind::ARMV8_4A: 76 case ArchKind::ARMV8_5A: 77 case ArchKind::ARMV8R: 78 case ArchKind::ARMV8MBaseline: 79 case ArchKind::ARMV8MMainline: 80 case ArchKind::ARMV8_1MMainline: 81 return 8; 82 case ArchKind::INVALID: 83 return 0; 84 } 85 llvm_unreachable("Unhandled architecture"); 86 } 87 88 // Profile A/R/M 89 ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) { 90 Arch = getCanonicalArchName(Arch); 91 switch (parseArch(Arch)) { 92 case ArchKind::ARMV6M: 93 case ArchKind::ARMV7M: 94 case ArchKind::ARMV7EM: 95 case ArchKind::ARMV8MMainline: 96 case ArchKind::ARMV8MBaseline: 97 case ArchKind::ARMV8_1MMainline: 98 return ProfileKind::M; 99 case ArchKind::ARMV7R: 100 case ArchKind::ARMV8R: 101 return ProfileKind::R; 102 case ArchKind::ARMV7A: 103 case ArchKind::ARMV7VE: 104 case ArchKind::ARMV7K: 105 case ArchKind::ARMV8A: 106 case ArchKind::ARMV8_1A: 107 case ArchKind::ARMV8_2A: 108 case ArchKind::ARMV8_3A: 109 case ArchKind::ARMV8_4A: 110 case ArchKind::ARMV8_5A: 111 return ProfileKind::A; 112 case ArchKind::ARMV2: 113 case ArchKind::ARMV2A: 114 case ArchKind::ARMV3: 115 case ArchKind::ARMV3M: 116 case ArchKind::ARMV4: 117 case ArchKind::ARMV4T: 118 case ArchKind::ARMV5T: 119 case ArchKind::ARMV5TE: 120 case ArchKind::ARMV5TEJ: 121 case ArchKind::ARMV6: 122 case ArchKind::ARMV6K: 123 case ArchKind::ARMV6T2: 124 case ArchKind::ARMV6KZ: 125 case ArchKind::ARMV7S: 126 case ArchKind::IWMMXT: 127 case ArchKind::IWMMXT2: 128 case ArchKind::XSCALE: 129 case ArchKind::INVALID: 130 return ProfileKind::INVALID; 131 } 132 llvm_unreachable("Unhandled architecture"); 133 } 134 135 StringRef ARM::getArchSynonym(StringRef Arch) { 136 return StringSwitch<StringRef>(Arch) 137 .Case("v5", "v5t") 138 .Case("v5e", "v5te") 139 .Case("v6j", "v6") 140 .Case("v6hl", "v6k") 141 .Cases("v6m", "v6sm", "v6s-m", "v6-m") 142 .Cases("v6z", "v6zk", "v6kz") 143 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a") 144 .Case("v7r", "v7-r") 145 .Case("v7m", "v7-m") 146 .Case("v7em", "v7e-m") 147 .Cases("v8", "v8a", "v8l", "aarch64", "arm64", "v8-a") 148 .Case("v8.1a", "v8.1-a") 149 .Case("v8.2a", "v8.2-a") 150 .Case("v8.3a", "v8.3-a") 151 .Case("v8.4a", "v8.4-a") 152 .Case("v8.5a", "v8.5-a") 153 .Case("v8r", "v8-r") 154 .Case("v8m.base", "v8-m.base") 155 .Case("v8m.main", "v8-m.main") 156 .Case("v8.1m.main", "v8.1-m.main") 157 .Default(Arch); 158 } 159 160 bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) { 161 162 if (FPUKind >= FK_LAST || FPUKind == FK_INVALID) 163 return false; 164 165 static const struct FPUFeatureNameInfo { 166 const char *PlusName, *MinusName; 167 FPUVersion MinVersion; 168 FPURestriction MaxRestriction; 169 } FPUFeatureInfoList[] = { 170 // We have to specify the + and - versions of the name in full so 171 // that we can return them as static StringRefs. 172 // 173 // Also, the SubtargetFeatures ending in just "sp" are listed here 174 // under FPURestriction::None, which is the only FPURestriction in 175 // which they would be valid (since FPURestriction::SP doesn't 176 // exist). 177 178 {"+fpregs", "-fpregs", FPUVersion::VFPV2, FPURestriction::SP_D16}, 179 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16}, 180 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16}, 181 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None}, 182 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16}, 183 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16}, 184 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None}, 185 {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16}, 186 {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None}, 187 {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16}, 188 {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16}, 189 {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None}, 190 {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None}, 191 {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16}, 192 {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16}, 193 {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None}, 194 {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16}, 195 {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16}, 196 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None}, 197 }; 198 199 for (const auto &Info: FPUFeatureInfoList) { 200 if (FPUNames[FPUKind].FPUVer >= Info.MinVersion && 201 FPUNames[FPUKind].Restriction <= Info.MaxRestriction) 202 Features.push_back(Info.PlusName); 203 else 204 Features.push_back(Info.MinusName); 205 } 206 207 static const struct NeonFeatureNameInfo { 208 const char *PlusName, *MinusName; 209 NeonSupportLevel MinSupportLevel; 210 } NeonFeatureInfoList[] = { 211 {"+neon", "-neon", NeonSupportLevel::Neon}, 212 {"+crypto", "-crypto", NeonSupportLevel::Crypto}, 213 }; 214 215 for (const auto &Info: NeonFeatureInfoList) { 216 if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel) 217 Features.push_back(Info.PlusName); 218 else 219 Features.push_back(Info.MinusName); 220 } 221 222 return true; 223 } 224 225 // Little/Big endian 226 ARM::EndianKind ARM::parseArchEndian(StringRef Arch) { 227 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") || 228 Arch.startswith("aarch64_be")) 229 return EndianKind::BIG; 230 231 if (Arch.startswith("arm") || Arch.startswith("thumb")) { 232 if (Arch.endswith("eb")) 233 return EndianKind::BIG; 234 else 235 return EndianKind::LITTLE; 236 } 237 238 if (Arch.startswith("aarch64") || Arch.startswith("aarch64_32")) 239 return EndianKind::LITTLE; 240 241 return EndianKind::INVALID; 242 } 243 244 // ARM, Thumb, AArch64 245 ARM::ISAKind ARM::parseArchISA(StringRef Arch) { 246 return StringSwitch<ISAKind>(Arch) 247 .StartsWith("aarch64", ISAKind::AARCH64) 248 .StartsWith("arm64", ISAKind::AARCH64) 249 .StartsWith("thumb", ISAKind::THUMB) 250 .StartsWith("arm", ISAKind::ARM) 251 .Default(ISAKind::INVALID); 252 } 253 254 unsigned ARM::parseFPU(StringRef FPU) { 255 StringRef Syn = getFPUSynonym(FPU); 256 for (const auto F : FPUNames) { 257 if (Syn == F.getName()) 258 return F.ID; 259 } 260 return FK_INVALID; 261 } 262 263 ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) { 264 if (FPUKind >= FK_LAST) 265 return NeonSupportLevel::None; 266 return FPUNames[FPUKind].NeonSupport; 267 } 268 269 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 270 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return 271 // "v.+", if the latter, return unmodified string, minus 'eb'. 272 // If invalid, return empty string. 273 StringRef ARM::getCanonicalArchName(StringRef Arch) { 274 size_t offset = StringRef::npos; 275 StringRef A = Arch; 276 StringRef Error = ""; 277 278 // Begins with "arm" / "thumb", move past it. 279 if (A.startswith("arm64_32")) 280 offset = 8; 281 else if (A.startswith("arm64")) 282 offset = 5; 283 else if (A.startswith("aarch64_32")) 284 offset = 10; 285 else if (A.startswith("arm")) 286 offset = 3; 287 else if (A.startswith("thumb")) 288 offset = 5; 289 else if (A.startswith("aarch64")) { 290 offset = 7; 291 // AArch64 uses "_be", not "eb" suffix. 292 if (A.find("eb") != StringRef::npos) 293 return Error; 294 if (A.substr(offset, 3) == "_be") 295 offset += 3; 296 } 297 298 // Ex. "armebv7", move past the "eb". 299 if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 300 offset += 2; 301 // Or, if it ends with eb ("armv7eb"), chop it off. 302 else if (A.endswith("eb")) 303 A = A.substr(0, A.size() - 2); 304 // Trim the head 305 if (offset != StringRef::npos) 306 A = A.substr(offset); 307 308 // Empty string means offset reached the end, which means it's valid. 309 if (A.empty()) 310 return Arch; 311 312 // Only match non-marketing names 313 if (offset != StringRef::npos) { 314 // Must start with 'vN'. 315 if (A.size() >= 2 && (A[0] != 'v' || !std::isdigit(A[1]))) 316 return Error; 317 // Can't have an extra 'eb'. 318 if (A.find("eb") != StringRef::npos) 319 return Error; 320 } 321 322 // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 323 return A; 324 } 325 326 StringRef ARM::getFPUSynonym(StringRef FPU) { 327 return StringSwitch<StringRef>(FPU) 328 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 329 .Case("vfp2", "vfpv2") 330 .Case("vfp3", "vfpv3") 331 .Case("vfp4", "vfpv4") 332 .Case("vfp3-d16", "vfpv3-d16") 333 .Case("vfp4-d16", "vfpv4-d16") 334 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") 335 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 336 .Case("fp5-sp-d16", "fpv5-sp-d16") 337 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 338 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 339 .Case("neon-vfpv3", "neon") 340 .Default(FPU); 341 } 342 343 StringRef ARM::getFPUName(unsigned FPUKind) { 344 if (FPUKind >= FK_LAST) 345 return StringRef(); 346 return FPUNames[FPUKind].getName(); 347 } 348 349 ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) { 350 if (FPUKind >= FK_LAST) 351 return FPUVersion::NONE; 352 return FPUNames[FPUKind].FPUVer; 353 } 354 355 ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) { 356 if (FPUKind >= FK_LAST) 357 return FPURestriction::None; 358 return FPUNames[FPUKind].Restriction; 359 } 360 361 unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) { 362 if (CPU == "generic") 363 return ARM::ARCHNames[static_cast<unsigned>(AK)].DefaultFPU; 364 365 return StringSwitch<unsigned>(CPU) 366 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 367 .Case(NAME, DEFAULT_FPU) 368 #include "llvm/Support/ARMTargetParser.def" 369 .Default(ARM::FK_INVALID); 370 } 371 372 unsigned ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) { 373 if (CPU == "generic") 374 return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions; 375 376 return StringSwitch<unsigned>(CPU) 377 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 378 .Case(NAME, \ 379 ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \ 380 DEFAULT_EXT) 381 #include "llvm/Support/ARMTargetParser.def" 382 .Default(ARM::AEK_INVALID); 383 } 384 385 bool ARM::getHWDivFeatures(unsigned HWDivKind, 386 std::vector<StringRef> &Features) { 387 388 if (HWDivKind == AEK_INVALID) 389 return false; 390 391 if (HWDivKind & AEK_HWDIVARM) 392 Features.push_back("+hwdiv-arm"); 393 else 394 Features.push_back("-hwdiv-arm"); 395 396 if (HWDivKind & AEK_HWDIVTHUMB) 397 Features.push_back("+hwdiv"); 398 else 399 Features.push_back("-hwdiv"); 400 401 return true; 402 } 403 404 bool ARM::getExtensionFeatures(unsigned Extensions, 405 std::vector<StringRef> &Features) { 406 407 if (Extensions == AEK_INVALID) 408 return false; 409 410 for (const auto AE : ARCHExtNames) { 411 if ((Extensions & AE.ID) == AE.ID && AE.Feature) 412 Features.push_back(AE.Feature); 413 else if (AE.NegFeature) 414 Features.push_back(AE.NegFeature); 415 } 416 417 return getHWDivFeatures(Extensions, Features); 418 } 419 420 StringRef ARM::getArchName(ARM::ArchKind AK) { 421 return ARCHNames[static_cast<unsigned>(AK)].getName(); 422 } 423 424 StringRef ARM::getCPUAttr(ARM::ArchKind AK) { 425 return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr(); 426 } 427 428 StringRef ARM::getSubArch(ARM::ArchKind AK) { 429 return ARCHNames[static_cast<unsigned>(AK)].getSubArch(); 430 } 431 432 unsigned ARM::getArchAttr(ARM::ArchKind AK) { 433 return ARCHNames[static_cast<unsigned>(AK)].ArchAttr; 434 } 435 436 StringRef ARM::getArchExtName(unsigned ArchExtKind) { 437 for (const auto AE : ARCHExtNames) { 438 if (ArchExtKind == AE.ID) 439 return AE.getName(); 440 } 441 return StringRef(); 442 } 443 444 static bool stripNegationPrefix(StringRef &Name) { 445 if (Name.startswith("no")) { 446 Name = Name.substr(2); 447 return true; 448 } 449 return false; 450 } 451 452 StringRef ARM::getArchExtFeature(StringRef ArchExt) { 453 bool Negated = stripNegationPrefix(ArchExt); 454 for (const auto AE : ARCHExtNames) { 455 if (AE.Feature && ArchExt == AE.getName()) 456 return StringRef(Negated ? AE.NegFeature : AE.Feature); 457 } 458 459 return StringRef(); 460 } 461 462 static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) { 463 const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind]; 464 465 // If the input FPU already supports double-precision, then there 466 // isn't any different FPU we can return here. 467 // 468 // The current available FPURestriction values are None (no 469 // restriction), D16 (only 16 d-regs) and SP_D16 (16 d-regs 470 // and single precision only); there's no value representing 471 // SP restriction without D16. So this test just means 'is it 472 // SP only?'. 473 if (InputFPU.Restriction != ARM::FPURestriction::SP_D16) 474 return ARM::FK_INVALID; 475 476 // Otherwise, look for an FPU entry with all the same fields, except 477 // that SP_D16 has been replaced with just D16, representing adding 478 // double precision and not changing anything else. 479 for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) { 480 if (CandidateFPU.FPUVer == InputFPU.FPUVer && 481 CandidateFPU.NeonSupport == InputFPU.NeonSupport && 482 CandidateFPU.Restriction == ARM::FPURestriction::D16) { 483 return CandidateFPU.ID; 484 } 485 } 486 487 // nothing found 488 return ARM::FK_INVALID; 489 } 490 491 static unsigned getAEKID(StringRef ArchExtName) { 492 for (const auto AE : ARM::ARCHExtNames) 493 if (AE.getName() == ArchExtName) 494 return AE.ID; 495 return ARM::AEK_INVALID; 496 } 497 498 bool ARM::appendArchExtFeatures( 499 StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, 500 std::vector<StringRef> &Features) { 501 502 size_t StartingNumFeatures = Features.size(); 503 const bool Negated = stripNegationPrefix(ArchExt); 504 unsigned ID = getAEKID(ArchExt); 505 506 if (ID == AEK_INVALID) 507 return false; 508 509 for (const auto AE : ARCHExtNames) { 510 if (Negated && (AE.ID & ID) == ID && AE.NegFeature) 511 Features.push_back(AE.NegFeature); 512 else if (AE.ID == ID && AE.Feature) 513 Features.push_back(AE.Feature); 514 } 515 516 if (CPU == "") 517 CPU = "generic"; 518 519 if (ArchExt == "fp" || ArchExt == "fp.dp") { 520 unsigned FPUKind; 521 if (ArchExt == "fp.dp") { 522 if (Negated) { 523 Features.push_back("-fp64"); 524 return true; 525 } 526 FPUKind = findDoublePrecisionFPU(getDefaultFPU(CPU, AK)); 527 } else if (Negated) { 528 FPUKind = ARM::FK_NONE; 529 } else { 530 FPUKind = getDefaultFPU(CPU, AK); 531 } 532 return ARM::getFPUFeatures(FPUKind, Features); 533 } 534 return StartingNumFeatures != Features.size(); 535 } 536 537 StringRef ARM::getHWDivName(unsigned HWDivKind) { 538 for (const auto D : HWDivNames) { 539 if (HWDivKind == D.ID) 540 return D.getName(); 541 } 542 return StringRef(); 543 } 544 545 StringRef ARM::getDefaultCPU(StringRef Arch) { 546 ArchKind AK = parseArch(Arch); 547 if (AK == ArchKind::INVALID) 548 return StringRef(); 549 550 // Look for multiple AKs to find the default for pair AK+Name. 551 for (const auto CPU : CPUNames) { 552 if (CPU.ArchID == AK && CPU.Default) 553 return CPU.getName(); 554 } 555 556 // If we can't find a default then target the architecture instead 557 return "generic"; 558 } 559 560 unsigned ARM::parseHWDiv(StringRef HWDiv) { 561 StringRef Syn = getHWDivSynonym(HWDiv); 562 for (const auto D : HWDivNames) { 563 if (Syn == D.getName()) 564 return D.ID; 565 } 566 return AEK_INVALID; 567 } 568 569 unsigned ARM::parseArchExt(StringRef ArchExt) { 570 for (const auto A : ARCHExtNames) { 571 if (ArchExt == A.getName()) 572 return A.ID; 573 } 574 return AEK_INVALID; 575 } 576 577 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) { 578 for (const auto C : CPUNames) { 579 if (CPU == C.getName()) 580 return C.ArchID; 581 } 582 return ArchKind::INVALID; 583 } 584 585 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) { 586 for (const CpuNames<ArchKind> &Arch : CPUNames) { 587 if (Arch.ArchID != ArchKind::INVALID) 588 Values.push_back(Arch.getName()); 589 } 590 } 591 592 StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) { 593 StringRef ArchName = 594 CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU)); 595 596 if (TT.isOSBinFormatMachO()) { 597 if (TT.getEnvironment() == Triple::EABI || 598 TT.getOS() == Triple::UnknownOS || 599 parseArchProfile(ArchName) == ProfileKind::M) 600 return "aapcs"; 601 if (TT.isWatchABI()) 602 return "aapcs16"; 603 return "apcs-gnu"; 604 } else if (TT.isOSWindows()) 605 // FIXME: this is invalid for WindowsCE. 606 return "aapcs"; 607 608 // Select the default based on the platform. 609 switch (TT.getEnvironment()) { 610 case Triple::Android: 611 case Triple::GNUEABI: 612 case Triple::GNUEABIHF: 613 case Triple::MuslEABI: 614 case Triple::MuslEABIHF: 615 return "aapcs-linux"; 616 case Triple::EABIHF: 617 case Triple::EABI: 618 return "aapcs"; 619 default: 620 if (TT.isOSNetBSD()) 621 return "apcs-gnu"; 622 if (TT.isOSOpenBSD()) 623 return "aapcs-linux"; 624 return "aapcs"; 625 } 626 } 627