1 //===- ELFYAML.cpp - ELF YAMLIO implementation ----------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines classes for handling the YAML representation of ELF. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/ObjectYAML/ELFYAML.h" 15 #include "llvm/Support/Casting.h" 16 #include "llvm/Support/MipsABIFlags.h" 17 18 namespace llvm { 19 20 ELFYAML::Section::~Section() {} 21 22 namespace yaml { 23 24 void ScalarEnumerationTraits<ELFYAML::ELF_ET>::enumeration( 25 IO &IO, ELFYAML::ELF_ET &Value) { 26 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 27 ECase(ET_NONE); 28 ECase(ET_REL); 29 ECase(ET_EXEC); 30 ECase(ET_DYN); 31 ECase(ET_CORE); 32 #undef ECase 33 IO.enumFallback<Hex16>(Value); 34 } 35 36 void ScalarEnumerationTraits<ELFYAML::ELF_EM>::enumeration( 37 IO &IO, ELFYAML::ELF_EM &Value) { 38 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 39 ECase(EM_NONE); 40 ECase(EM_M32); 41 ECase(EM_SPARC); 42 ECase(EM_386); 43 ECase(EM_68K); 44 ECase(EM_88K); 45 ECase(EM_IAMCU); 46 ECase(EM_860); 47 ECase(EM_MIPS); 48 ECase(EM_S370); 49 ECase(EM_MIPS_RS3_LE); 50 ECase(EM_PARISC); 51 ECase(EM_VPP500); 52 ECase(EM_SPARC32PLUS); 53 ECase(EM_960); 54 ECase(EM_PPC); 55 ECase(EM_PPC64); 56 ECase(EM_S390); 57 ECase(EM_SPU); 58 ECase(EM_V800); 59 ECase(EM_FR20); 60 ECase(EM_RH32); 61 ECase(EM_RCE); 62 ECase(EM_ARM); 63 ECase(EM_ALPHA); 64 ECase(EM_SH); 65 ECase(EM_SPARCV9); 66 ECase(EM_TRICORE); 67 ECase(EM_ARC); 68 ECase(EM_H8_300); 69 ECase(EM_H8_300H); 70 ECase(EM_H8S); 71 ECase(EM_H8_500); 72 ECase(EM_IA_64); 73 ECase(EM_MIPS_X); 74 ECase(EM_COLDFIRE); 75 ECase(EM_68HC12); 76 ECase(EM_MMA); 77 ECase(EM_PCP); 78 ECase(EM_NCPU); 79 ECase(EM_NDR1); 80 ECase(EM_STARCORE); 81 ECase(EM_ME16); 82 ECase(EM_ST100); 83 ECase(EM_TINYJ); 84 ECase(EM_X86_64); 85 ECase(EM_PDSP); 86 ECase(EM_PDP10); 87 ECase(EM_PDP11); 88 ECase(EM_FX66); 89 ECase(EM_ST9PLUS); 90 ECase(EM_ST7); 91 ECase(EM_68HC16); 92 ECase(EM_68HC11); 93 ECase(EM_68HC08); 94 ECase(EM_68HC05); 95 ECase(EM_SVX); 96 ECase(EM_ST19); 97 ECase(EM_VAX); 98 ECase(EM_CRIS); 99 ECase(EM_JAVELIN); 100 ECase(EM_FIREPATH); 101 ECase(EM_ZSP); 102 ECase(EM_MMIX); 103 ECase(EM_HUANY); 104 ECase(EM_PRISM); 105 ECase(EM_AVR); 106 ECase(EM_FR30); 107 ECase(EM_D10V); 108 ECase(EM_D30V); 109 ECase(EM_V850); 110 ECase(EM_M32R); 111 ECase(EM_MN10300); 112 ECase(EM_MN10200); 113 ECase(EM_PJ); 114 ECase(EM_OPENRISC); 115 ECase(EM_ARC_COMPACT); 116 ECase(EM_XTENSA); 117 ECase(EM_VIDEOCORE); 118 ECase(EM_TMM_GPP); 119 ECase(EM_NS32K); 120 ECase(EM_TPC); 121 ECase(EM_SNP1K); 122 ECase(EM_ST200); 123 ECase(EM_IP2K); 124 ECase(EM_MAX); 125 ECase(EM_CR); 126 ECase(EM_F2MC16); 127 ECase(EM_MSP430); 128 ECase(EM_BLACKFIN); 129 ECase(EM_SE_C33); 130 ECase(EM_SEP); 131 ECase(EM_ARCA); 132 ECase(EM_UNICORE); 133 ECase(EM_EXCESS); 134 ECase(EM_DXP); 135 ECase(EM_ALTERA_NIOS2); 136 ECase(EM_CRX); 137 ECase(EM_XGATE); 138 ECase(EM_C166); 139 ECase(EM_M16C); 140 ECase(EM_DSPIC30F); 141 ECase(EM_CE); 142 ECase(EM_M32C); 143 ECase(EM_TSK3000); 144 ECase(EM_RS08); 145 ECase(EM_SHARC); 146 ECase(EM_ECOG2); 147 ECase(EM_SCORE7); 148 ECase(EM_DSP24); 149 ECase(EM_VIDEOCORE3); 150 ECase(EM_LATTICEMICO32); 151 ECase(EM_SE_C17); 152 ECase(EM_TI_C6000); 153 ECase(EM_TI_C2000); 154 ECase(EM_TI_C5500); 155 ECase(EM_MMDSP_PLUS); 156 ECase(EM_CYPRESS_M8C); 157 ECase(EM_R32C); 158 ECase(EM_TRIMEDIA); 159 ECase(EM_HEXAGON); 160 ECase(EM_8051); 161 ECase(EM_STXP7X); 162 ECase(EM_NDS32); 163 ECase(EM_ECOG1); 164 ECase(EM_ECOG1X); 165 ECase(EM_MAXQ30); 166 ECase(EM_XIMO16); 167 ECase(EM_MANIK); 168 ECase(EM_CRAYNV2); 169 ECase(EM_RX); 170 ECase(EM_METAG); 171 ECase(EM_MCST_ELBRUS); 172 ECase(EM_ECOG16); 173 ECase(EM_CR16); 174 ECase(EM_ETPU); 175 ECase(EM_SLE9X); 176 ECase(EM_L10M); 177 ECase(EM_K10M); 178 ECase(EM_AARCH64); 179 ECase(EM_AVR32); 180 ECase(EM_STM8); 181 ECase(EM_TILE64); 182 ECase(EM_TILEPRO); 183 ECase(EM_CUDA); 184 ECase(EM_TILEGX); 185 ECase(EM_CLOUDSHIELD); 186 ECase(EM_COREA_1ST); 187 ECase(EM_COREA_2ND); 188 ECase(EM_ARC_COMPACT2); 189 ECase(EM_OPEN8); 190 ECase(EM_RL78); 191 ECase(EM_VIDEOCORE5); 192 ECase(EM_78KOR); 193 ECase(EM_56800EX); 194 ECase(EM_AMDGPU); 195 ECase(EM_RISCV); 196 ECase(EM_LANAI); 197 ECase(EM_BPF); 198 #undef ECase 199 } 200 201 void ScalarEnumerationTraits<ELFYAML::ELF_ELFCLASS>::enumeration( 202 IO &IO, ELFYAML::ELF_ELFCLASS &Value) { 203 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 204 // Since the semantics of ELFCLASSNONE is "invalid", just don't accept it 205 // here. 206 ECase(ELFCLASS32); 207 ECase(ELFCLASS64); 208 #undef ECase 209 } 210 211 void ScalarEnumerationTraits<ELFYAML::ELF_ELFDATA>::enumeration( 212 IO &IO, ELFYAML::ELF_ELFDATA &Value) { 213 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 214 // Since the semantics of ELFDATANONE is "invalid", just don't accept it 215 // here. 216 ECase(ELFDATA2LSB); 217 ECase(ELFDATA2MSB); 218 #undef ECase 219 } 220 221 void ScalarEnumerationTraits<ELFYAML::ELF_ELFOSABI>::enumeration( 222 IO &IO, ELFYAML::ELF_ELFOSABI &Value) { 223 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 224 ECase(ELFOSABI_NONE); 225 ECase(ELFOSABI_HPUX); 226 ECase(ELFOSABI_NETBSD); 227 ECase(ELFOSABI_GNU); 228 ECase(ELFOSABI_GNU); 229 ECase(ELFOSABI_HURD); 230 ECase(ELFOSABI_SOLARIS); 231 ECase(ELFOSABI_AIX); 232 ECase(ELFOSABI_IRIX); 233 ECase(ELFOSABI_FREEBSD); 234 ECase(ELFOSABI_TRU64); 235 ECase(ELFOSABI_MODESTO); 236 ECase(ELFOSABI_OPENBSD); 237 ECase(ELFOSABI_OPENVMS); 238 ECase(ELFOSABI_NSK); 239 ECase(ELFOSABI_AROS); 240 ECase(ELFOSABI_FENIXOS); 241 ECase(ELFOSABI_CLOUDABI); 242 ECase(ELFOSABI_C6000_ELFABI); 243 ECase(ELFOSABI_AMDGPU_HSA); 244 ECase(ELFOSABI_C6000_LINUX); 245 ECase(ELFOSABI_ARM); 246 ECase(ELFOSABI_STANDALONE); 247 #undef ECase 248 } 249 250 void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO, 251 ELFYAML::ELF_EF &Value) { 252 const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext()); 253 assert(Object && "The IO context is not initialized"); 254 #define BCase(X) IO.bitSetCase(Value, #X, ELF::X) 255 #define BCaseMask(X, M) IO.maskedBitSetCase(Value, #X, ELF::X, ELF::M) 256 switch (Object->Header.Machine) { 257 case ELF::EM_ARM: 258 BCase(EF_ARM_SOFT_FLOAT); 259 BCase(EF_ARM_VFP_FLOAT); 260 BCaseMask(EF_ARM_EABI_UNKNOWN, EF_ARM_EABIMASK); 261 BCaseMask(EF_ARM_EABI_VER1, EF_ARM_EABIMASK); 262 BCaseMask(EF_ARM_EABI_VER2, EF_ARM_EABIMASK); 263 BCaseMask(EF_ARM_EABI_VER3, EF_ARM_EABIMASK); 264 BCaseMask(EF_ARM_EABI_VER4, EF_ARM_EABIMASK); 265 BCaseMask(EF_ARM_EABI_VER5, EF_ARM_EABIMASK); 266 break; 267 case ELF::EM_MIPS: 268 BCase(EF_MIPS_NOREORDER); 269 BCase(EF_MIPS_PIC); 270 BCase(EF_MIPS_CPIC); 271 BCase(EF_MIPS_ABI2); 272 BCase(EF_MIPS_32BITMODE); 273 BCase(EF_MIPS_FP64); 274 BCase(EF_MIPS_NAN2008); 275 BCase(EF_MIPS_MICROMIPS); 276 BCase(EF_MIPS_ARCH_ASE_M16); 277 BCase(EF_MIPS_ARCH_ASE_MDMX); 278 BCaseMask(EF_MIPS_ABI_O32, EF_MIPS_ABI); 279 BCaseMask(EF_MIPS_ABI_O64, EF_MIPS_ABI); 280 BCaseMask(EF_MIPS_ABI_EABI32, EF_MIPS_ABI); 281 BCaseMask(EF_MIPS_ABI_EABI64, EF_MIPS_ABI); 282 BCaseMask(EF_MIPS_MACH_3900, EF_MIPS_MACH); 283 BCaseMask(EF_MIPS_MACH_4010, EF_MIPS_MACH); 284 BCaseMask(EF_MIPS_MACH_4100, EF_MIPS_MACH); 285 BCaseMask(EF_MIPS_MACH_4650, EF_MIPS_MACH); 286 BCaseMask(EF_MIPS_MACH_4120, EF_MIPS_MACH); 287 BCaseMask(EF_MIPS_MACH_4111, EF_MIPS_MACH); 288 BCaseMask(EF_MIPS_MACH_SB1, EF_MIPS_MACH); 289 BCaseMask(EF_MIPS_MACH_OCTEON, EF_MIPS_MACH); 290 BCaseMask(EF_MIPS_MACH_XLR, EF_MIPS_MACH); 291 BCaseMask(EF_MIPS_MACH_OCTEON2, EF_MIPS_MACH); 292 BCaseMask(EF_MIPS_MACH_OCTEON3, EF_MIPS_MACH); 293 BCaseMask(EF_MIPS_MACH_5400, EF_MIPS_MACH); 294 BCaseMask(EF_MIPS_MACH_5900, EF_MIPS_MACH); 295 BCaseMask(EF_MIPS_MACH_5500, EF_MIPS_MACH); 296 BCaseMask(EF_MIPS_MACH_9000, EF_MIPS_MACH); 297 BCaseMask(EF_MIPS_MACH_LS2E, EF_MIPS_MACH); 298 BCaseMask(EF_MIPS_MACH_LS2F, EF_MIPS_MACH); 299 BCaseMask(EF_MIPS_MACH_LS3A, EF_MIPS_MACH); 300 BCaseMask(EF_MIPS_ARCH_1, EF_MIPS_ARCH); 301 BCaseMask(EF_MIPS_ARCH_2, EF_MIPS_ARCH); 302 BCaseMask(EF_MIPS_ARCH_3, EF_MIPS_ARCH); 303 BCaseMask(EF_MIPS_ARCH_4, EF_MIPS_ARCH); 304 BCaseMask(EF_MIPS_ARCH_5, EF_MIPS_ARCH); 305 BCaseMask(EF_MIPS_ARCH_32, EF_MIPS_ARCH); 306 BCaseMask(EF_MIPS_ARCH_64, EF_MIPS_ARCH); 307 BCaseMask(EF_MIPS_ARCH_32R2, EF_MIPS_ARCH); 308 BCaseMask(EF_MIPS_ARCH_64R2, EF_MIPS_ARCH); 309 BCaseMask(EF_MIPS_ARCH_32R6, EF_MIPS_ARCH); 310 BCaseMask(EF_MIPS_ARCH_64R6, EF_MIPS_ARCH); 311 break; 312 case ELF::EM_HEXAGON: 313 BCase(EF_HEXAGON_MACH_V2); 314 BCase(EF_HEXAGON_MACH_V3); 315 BCase(EF_HEXAGON_MACH_V4); 316 BCase(EF_HEXAGON_MACH_V5); 317 BCase(EF_HEXAGON_ISA_V2); 318 BCase(EF_HEXAGON_ISA_V3); 319 BCase(EF_HEXAGON_ISA_V4); 320 BCase(EF_HEXAGON_ISA_V5); 321 break; 322 case ELF::EM_AVR: 323 BCase(EF_AVR_ARCH_AVR1); 324 BCase(EF_AVR_ARCH_AVR2); 325 BCase(EF_AVR_ARCH_AVR25); 326 BCase(EF_AVR_ARCH_AVR3); 327 BCase(EF_AVR_ARCH_AVR31); 328 BCase(EF_AVR_ARCH_AVR35); 329 BCase(EF_AVR_ARCH_AVR4); 330 BCase(EF_AVR_ARCH_AVR51); 331 BCase(EF_AVR_ARCH_AVR6); 332 BCase(EF_AVR_ARCH_AVRTINY); 333 BCase(EF_AVR_ARCH_XMEGA1); 334 BCase(EF_AVR_ARCH_XMEGA2); 335 BCase(EF_AVR_ARCH_XMEGA3); 336 BCase(EF_AVR_ARCH_XMEGA4); 337 BCase(EF_AVR_ARCH_XMEGA5); 338 BCase(EF_AVR_ARCH_XMEGA6); 339 BCase(EF_AVR_ARCH_XMEGA7); 340 break; 341 case ELF::EM_AMDGPU: 342 case ELF::EM_X86_64: 343 break; 344 default: 345 llvm_unreachable("Unsupported architecture"); 346 } 347 #undef BCase 348 #undef BCaseMask 349 } 350 351 void ScalarEnumerationTraits<ELFYAML::ELF_SHT>::enumeration( 352 IO &IO, ELFYAML::ELF_SHT &Value) { 353 const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext()); 354 assert(Object && "The IO context is not initialized"); 355 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 356 ECase(SHT_NULL); 357 ECase(SHT_PROGBITS); 358 // No SHT_SYMTAB. Use the top-level `Symbols` key instead. 359 // FIXME: Issue a diagnostic with this information. 360 ECase(SHT_STRTAB); 361 ECase(SHT_RELA); 362 ECase(SHT_HASH); 363 ECase(SHT_DYNAMIC); 364 ECase(SHT_NOTE); 365 ECase(SHT_NOBITS); 366 ECase(SHT_REL); 367 ECase(SHT_SHLIB); 368 ECase(SHT_DYNSYM); 369 ECase(SHT_INIT_ARRAY); 370 ECase(SHT_FINI_ARRAY); 371 ECase(SHT_PREINIT_ARRAY); 372 ECase(SHT_GROUP); 373 ECase(SHT_SYMTAB_SHNDX); 374 ECase(SHT_LOOS); 375 ECase(SHT_GNU_ATTRIBUTES); 376 ECase(SHT_GNU_HASH); 377 ECase(SHT_GNU_verdef); 378 ECase(SHT_GNU_verneed); 379 ECase(SHT_GNU_versym); 380 ECase(SHT_HIOS); 381 ECase(SHT_LOPROC); 382 switch (Object->Header.Machine) { 383 case ELF::EM_ARM: 384 ECase(SHT_ARM_EXIDX); 385 ECase(SHT_ARM_PREEMPTMAP); 386 ECase(SHT_ARM_ATTRIBUTES); 387 ECase(SHT_ARM_DEBUGOVERLAY); 388 ECase(SHT_ARM_OVERLAYSECTION); 389 break; 390 case ELF::EM_HEXAGON: 391 ECase(SHT_HEX_ORDERED); 392 break; 393 case ELF::EM_X86_64: 394 ECase(SHT_X86_64_UNWIND); 395 break; 396 case ELF::EM_MIPS: 397 ECase(SHT_MIPS_REGINFO); 398 ECase(SHT_MIPS_OPTIONS); 399 ECase(SHT_MIPS_ABIFLAGS); 400 break; 401 default: 402 // Nothing to do. 403 break; 404 } 405 #undef ECase 406 } 407 408 void ScalarBitSetTraits<ELFYAML::ELF_SHF>::bitset(IO &IO, 409 ELFYAML::ELF_SHF &Value) { 410 const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext()); 411 #define BCase(X) IO.bitSetCase(Value, #X, ELF::X) 412 BCase(SHF_WRITE); 413 BCase(SHF_ALLOC); 414 BCase(SHF_EXCLUDE); 415 BCase(SHF_EXECINSTR); 416 BCase(SHF_MERGE); 417 BCase(SHF_STRINGS); 418 BCase(SHF_INFO_LINK); 419 BCase(SHF_LINK_ORDER); 420 BCase(SHF_OS_NONCONFORMING); 421 BCase(SHF_GROUP); 422 BCase(SHF_TLS); 423 switch (Object->Header.Machine) { 424 case ELF::EM_ARM: 425 BCase(SHF_ARM_PURECODE); 426 break; 427 case ELF::EM_AMDGPU: 428 BCase(SHF_AMDGPU_HSA_GLOBAL); 429 BCase(SHF_AMDGPU_HSA_READONLY); 430 BCase(SHF_AMDGPU_HSA_CODE); 431 BCase(SHF_AMDGPU_HSA_AGENT); 432 break; 433 case ELF::EM_HEXAGON: 434 BCase(SHF_HEX_GPREL); 435 break; 436 case ELF::EM_MIPS: 437 BCase(SHF_MIPS_NODUPES); 438 BCase(SHF_MIPS_NAMES); 439 BCase(SHF_MIPS_LOCAL); 440 BCase(SHF_MIPS_NOSTRIP); 441 BCase(SHF_MIPS_GPREL); 442 BCase(SHF_MIPS_MERGE); 443 BCase(SHF_MIPS_ADDR); 444 BCase(SHF_MIPS_STRING); 445 break; 446 case ELF::EM_X86_64: 447 BCase(SHF_X86_64_LARGE); 448 break; 449 default: 450 // Nothing to do. 451 break; 452 } 453 #undef BCase 454 } 455 456 void ScalarEnumerationTraits<ELFYAML::ELF_STT>::enumeration( 457 IO &IO, ELFYAML::ELF_STT &Value) { 458 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 459 ECase(STT_NOTYPE); 460 ECase(STT_OBJECT); 461 ECase(STT_FUNC); 462 ECase(STT_SECTION); 463 ECase(STT_FILE); 464 ECase(STT_COMMON); 465 ECase(STT_TLS); 466 ECase(STT_GNU_IFUNC); 467 #undef ECase 468 } 469 470 void ScalarEnumerationTraits<ELFYAML::ELF_STV>::enumeration( 471 IO &IO, ELFYAML::ELF_STV &Value) { 472 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 473 ECase(STV_DEFAULT); 474 ECase(STV_INTERNAL); 475 ECase(STV_HIDDEN); 476 ECase(STV_PROTECTED); 477 #undef ECase 478 } 479 480 void ScalarBitSetTraits<ELFYAML::ELF_STO>::bitset(IO &IO, 481 ELFYAML::ELF_STO &Value) { 482 const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext()); 483 assert(Object && "The IO context is not initialized"); 484 #define BCase(X) IO.bitSetCase(Value, #X, ELF::X) 485 switch (Object->Header.Machine) { 486 case ELF::EM_MIPS: 487 BCase(STO_MIPS_OPTIONAL); 488 BCase(STO_MIPS_PLT); 489 BCase(STO_MIPS_PIC); 490 BCase(STO_MIPS_MICROMIPS); 491 break; 492 default: 493 break; // Nothing to do 494 } 495 #undef BCase 496 #undef BCaseMask 497 } 498 499 void ScalarEnumerationTraits<ELFYAML::ELF_RSS>::enumeration( 500 IO &IO, ELFYAML::ELF_RSS &Value) { 501 #define ECase(X) IO.enumCase(Value, #X, ELF::X) 502 ECase(RSS_UNDEF); 503 ECase(RSS_GP); 504 ECase(RSS_GP0); 505 ECase(RSS_LOC); 506 #undef ECase 507 } 508 509 void ScalarEnumerationTraits<ELFYAML::ELF_REL>::enumeration( 510 IO &IO, ELFYAML::ELF_REL &Value) { 511 const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext()); 512 assert(Object && "The IO context is not initialized"); 513 #define ELF_RELOC(X, Y) IO.enumCase(Value, #X, ELF::X); 514 switch (Object->Header.Machine) { 515 case ELF::EM_X86_64: 516 #include "llvm/Support/ELFRelocs/x86_64.def" 517 break; 518 case ELF::EM_MIPS: 519 #include "llvm/Support/ELFRelocs/Mips.def" 520 break; 521 case ELF::EM_HEXAGON: 522 #include "llvm/Support/ELFRelocs/Hexagon.def" 523 break; 524 case ELF::EM_386: 525 case ELF::EM_IAMCU: 526 #include "llvm/Support/ELFRelocs/i386.def" 527 break; 528 case ELF::EM_AARCH64: 529 #include "llvm/Support/ELFRelocs/AArch64.def" 530 break; 531 case ELF::EM_ARM: 532 #include "llvm/Support/ELFRelocs/ARM.def" 533 break; 534 case ELF::EM_RISCV: 535 #include "llvm/Support/ELFRelocs/RISCV.def" 536 break; 537 case ELF::EM_LANAI: 538 #include "llvm/Support/ELFRelocs/Lanai.def" 539 break; 540 case ELF::EM_AMDGPU: 541 #include "llvm/Support/ELFRelocs/AMDGPU.def" 542 break; 543 case ELF::EM_BPF: 544 #include "llvm/Support/ELFRelocs/BPF.def" 545 break; 546 default: 547 llvm_unreachable("Unsupported architecture"); 548 } 549 #undef ELF_RELOC 550 } 551 552 void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_REG>::enumeration( 553 IO &IO, ELFYAML::MIPS_AFL_REG &Value) { 554 #define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X) 555 ECase(REG_NONE); 556 ECase(REG_32); 557 ECase(REG_64); 558 ECase(REG_128); 559 #undef ECase 560 } 561 562 void ScalarEnumerationTraits<ELFYAML::MIPS_ABI_FP>::enumeration( 563 IO &IO, ELFYAML::MIPS_ABI_FP &Value) { 564 #define ECase(X) IO.enumCase(Value, #X, Mips::Val_GNU_MIPS_ABI_##X) 565 ECase(FP_ANY); 566 ECase(FP_DOUBLE); 567 ECase(FP_SINGLE); 568 ECase(FP_SOFT); 569 ECase(FP_OLD_64); 570 ECase(FP_XX); 571 ECase(FP_64); 572 ECase(FP_64A); 573 #undef ECase 574 } 575 576 void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_EXT>::enumeration( 577 IO &IO, ELFYAML::MIPS_AFL_EXT &Value) { 578 #define ECase(X) IO.enumCase(Value, #X, Mips::AFL_##X) 579 ECase(EXT_NONE); 580 ECase(EXT_XLR); 581 ECase(EXT_OCTEON2); 582 ECase(EXT_OCTEONP); 583 ECase(EXT_LOONGSON_3A); 584 ECase(EXT_OCTEON); 585 ECase(EXT_5900); 586 ECase(EXT_4650); 587 ECase(EXT_4010); 588 ECase(EXT_4100); 589 ECase(EXT_3900); 590 ECase(EXT_10000); 591 ECase(EXT_SB1); 592 ECase(EXT_4111); 593 ECase(EXT_4120); 594 ECase(EXT_5400); 595 ECase(EXT_5500); 596 ECase(EXT_LOONGSON_2E); 597 ECase(EXT_LOONGSON_2F); 598 ECase(EXT_OCTEON3); 599 #undef ECase 600 } 601 602 void ScalarEnumerationTraits<ELFYAML::MIPS_ISA>::enumeration( 603 IO &IO, ELFYAML::MIPS_ISA &Value) { 604 IO.enumCase(Value, "MIPS1", 1); 605 IO.enumCase(Value, "MIPS2", 2); 606 IO.enumCase(Value, "MIPS3", 3); 607 IO.enumCase(Value, "MIPS4", 4); 608 IO.enumCase(Value, "MIPS5", 5); 609 IO.enumCase(Value, "MIPS32", 32); 610 IO.enumCase(Value, "MIPS64", 64); 611 } 612 613 void ScalarBitSetTraits<ELFYAML::MIPS_AFL_ASE>::bitset( 614 IO &IO, ELFYAML::MIPS_AFL_ASE &Value) { 615 #define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_ASE_##X) 616 BCase(DSP); 617 BCase(DSPR2); 618 BCase(EVA); 619 BCase(MCU); 620 BCase(MDMX); 621 BCase(MIPS3D); 622 BCase(MT); 623 BCase(SMARTMIPS); 624 BCase(VIRT); 625 BCase(MSA); 626 BCase(MIPS16); 627 BCase(MICROMIPS); 628 BCase(XPA); 629 #undef BCase 630 } 631 632 void ScalarBitSetTraits<ELFYAML::MIPS_AFL_FLAGS1>::bitset( 633 IO &IO, ELFYAML::MIPS_AFL_FLAGS1 &Value) { 634 #define BCase(X) IO.bitSetCase(Value, #X, Mips::AFL_FLAGS1_##X) 635 BCase(ODDSPREG); 636 #undef BCase 637 } 638 639 void MappingTraits<ELFYAML::FileHeader>::mapping(IO &IO, 640 ELFYAML::FileHeader &FileHdr) { 641 IO.mapRequired("Class", FileHdr.Class); 642 IO.mapRequired("Data", FileHdr.Data); 643 IO.mapOptional("OSABI", FileHdr.OSABI, ELFYAML::ELF_ELFOSABI(0)); 644 IO.mapRequired("Type", FileHdr.Type); 645 IO.mapRequired("Machine", FileHdr.Machine); 646 IO.mapOptional("Flags", FileHdr.Flags, ELFYAML::ELF_EF(0)); 647 IO.mapOptional("Entry", FileHdr.Entry, Hex64(0)); 648 } 649 650 namespace { 651 struct NormalizedOther { 652 NormalizedOther(IO &) 653 : Visibility(ELFYAML::ELF_STV(0)), Other(ELFYAML::ELF_STO(0)) {} 654 NormalizedOther(IO &, uint8_t Original) 655 : Visibility(Original & 0x3), Other(Original & ~0x3) {} 656 657 uint8_t denormalize(IO &) { return Visibility | Other; } 658 659 ELFYAML::ELF_STV Visibility; 660 ELFYAML::ELF_STO Other; 661 }; 662 } 663 664 void MappingTraits<ELFYAML::Symbol>::mapping(IO &IO, ELFYAML::Symbol &Symbol) { 665 IO.mapOptional("Name", Symbol.Name, StringRef()); 666 IO.mapOptional("Type", Symbol.Type, ELFYAML::ELF_STT(0)); 667 IO.mapOptional("Section", Symbol.Section, StringRef()); 668 IO.mapOptional("Value", Symbol.Value, Hex64(0)); 669 IO.mapOptional("Size", Symbol.Size, Hex64(0)); 670 671 MappingNormalization<NormalizedOther, uint8_t> Keys(IO, Symbol.Other); 672 IO.mapOptional("Visibility", Keys->Visibility, ELFYAML::ELF_STV(0)); 673 IO.mapOptional("Other", Keys->Other, ELFYAML::ELF_STO(0)); 674 } 675 676 void MappingTraits<ELFYAML::LocalGlobalWeakSymbols>::mapping( 677 IO &IO, ELFYAML::LocalGlobalWeakSymbols &Symbols) { 678 IO.mapOptional("Local", Symbols.Local); 679 IO.mapOptional("Global", Symbols.Global); 680 IO.mapOptional("Weak", Symbols.Weak); 681 } 682 683 static void commonSectionMapping(IO &IO, ELFYAML::Section &Section) { 684 IO.mapOptional("Name", Section.Name, StringRef()); 685 IO.mapRequired("Type", Section.Type); 686 IO.mapOptional("Flags", Section.Flags, ELFYAML::ELF_SHF(0)); 687 IO.mapOptional("Address", Section.Address, Hex64(0)); 688 IO.mapOptional("Link", Section.Link, StringRef()); 689 IO.mapOptional("AddressAlign", Section.AddressAlign, Hex64(0)); 690 IO.mapOptional("Info", Section.Info, StringRef()); 691 } 692 693 static void sectionMapping(IO &IO, ELFYAML::RawContentSection &Section) { 694 commonSectionMapping(IO, Section); 695 IO.mapOptional("Content", Section.Content); 696 IO.mapOptional("Size", Section.Size, Hex64(Section.Content.binary_size())); 697 } 698 699 static void sectionMapping(IO &IO, ELFYAML::NoBitsSection &Section) { 700 commonSectionMapping(IO, Section); 701 IO.mapOptional("Size", Section.Size, Hex64(0)); 702 } 703 704 static void sectionMapping(IO &IO, ELFYAML::RelocationSection &Section) { 705 commonSectionMapping(IO, Section); 706 IO.mapOptional("Relocations", Section.Relocations); 707 } 708 709 static void groupSectionMapping(IO &IO, ELFYAML::Group &group) { 710 commonSectionMapping(IO, group); 711 IO.mapRequired("Members", group.Members); 712 } 713 714 void MappingTraits<ELFYAML::SectionOrType>::mapping( 715 IO &IO, ELFYAML::SectionOrType §ionOrType) { 716 IO.mapRequired("SectionOrType", sectionOrType.sectionNameOrType); 717 } 718 719 static void sectionMapping(IO &IO, ELFYAML::MipsABIFlags &Section) { 720 commonSectionMapping(IO, Section); 721 IO.mapOptional("Version", Section.Version, Hex16(0)); 722 IO.mapRequired("ISA", Section.ISALevel); 723 IO.mapOptional("ISARevision", Section.ISARevision, Hex8(0)); 724 IO.mapOptional("ISAExtension", Section.ISAExtension, 725 ELFYAML::MIPS_AFL_EXT(Mips::AFL_EXT_NONE)); 726 IO.mapOptional("ASEs", Section.ASEs, ELFYAML::MIPS_AFL_ASE(0)); 727 IO.mapOptional("FpABI", Section.FpABI, 728 ELFYAML::MIPS_ABI_FP(Mips::Val_GNU_MIPS_ABI_FP_ANY)); 729 IO.mapOptional("GPRSize", Section.GPRSize, 730 ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE)); 731 IO.mapOptional("CPR1Size", Section.CPR1Size, 732 ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE)); 733 IO.mapOptional("CPR2Size", Section.CPR2Size, 734 ELFYAML::MIPS_AFL_REG(Mips::AFL_REG_NONE)); 735 IO.mapOptional("Flags1", Section.Flags1, ELFYAML::MIPS_AFL_FLAGS1(0)); 736 IO.mapOptional("Flags2", Section.Flags2, Hex32(0)); 737 } 738 739 void MappingTraits<std::unique_ptr<ELFYAML::Section>>::mapping( 740 IO &IO, std::unique_ptr<ELFYAML::Section> &Section) { 741 ELFYAML::ELF_SHT sectionType; 742 if (IO.outputting()) 743 sectionType = Section->Type; 744 else 745 IO.mapRequired("Type", sectionType); 746 747 switch (sectionType) { 748 case ELF::SHT_REL: 749 case ELF::SHT_RELA: 750 if (!IO.outputting()) 751 Section.reset(new ELFYAML::RelocationSection()); 752 sectionMapping(IO, *cast<ELFYAML::RelocationSection>(Section.get())); 753 break; 754 case ELF::SHT_GROUP: 755 if (!IO.outputting()) 756 Section.reset(new ELFYAML::Group()); 757 groupSectionMapping(IO, *cast<ELFYAML::Group>(Section.get())); 758 break; 759 case ELF::SHT_NOBITS: 760 if (!IO.outputting()) 761 Section.reset(new ELFYAML::NoBitsSection()); 762 sectionMapping(IO, *cast<ELFYAML::NoBitsSection>(Section.get())); 763 break; 764 case ELF::SHT_MIPS_ABIFLAGS: 765 if (!IO.outputting()) 766 Section.reset(new ELFYAML::MipsABIFlags()); 767 sectionMapping(IO, *cast<ELFYAML::MipsABIFlags>(Section.get())); 768 break; 769 default: 770 if (!IO.outputting()) 771 Section.reset(new ELFYAML::RawContentSection()); 772 sectionMapping(IO, *cast<ELFYAML::RawContentSection>(Section.get())); 773 } 774 } 775 776 StringRef MappingTraits<std::unique_ptr<ELFYAML::Section>>::validate( 777 IO &io, std::unique_ptr<ELFYAML::Section> &Section) { 778 const auto *RawSection = dyn_cast<ELFYAML::RawContentSection>(Section.get()); 779 if (!RawSection || RawSection->Size >= RawSection->Content.binary_size()) 780 return StringRef(); 781 return "Section size must be greater or equal to the content size"; 782 } 783 784 namespace { 785 struct NormalizedMips64RelType { 786 NormalizedMips64RelType(IO &) 787 : Type(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)), 788 Type2(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)), 789 Type3(ELFYAML::ELF_REL(ELF::R_MIPS_NONE)), 790 SpecSym(ELFYAML::ELF_REL(ELF::RSS_UNDEF)) {} 791 NormalizedMips64RelType(IO &, ELFYAML::ELF_REL Original) 792 : Type(Original & 0xFF), Type2(Original >> 8 & 0xFF), 793 Type3(Original >> 16 & 0xFF), SpecSym(Original >> 24 & 0xFF) {} 794 795 ELFYAML::ELF_REL denormalize(IO &) { 796 ELFYAML::ELF_REL Res = Type | Type2 << 8 | Type3 << 16 | SpecSym << 24; 797 return Res; 798 } 799 800 ELFYAML::ELF_REL Type; 801 ELFYAML::ELF_REL Type2; 802 ELFYAML::ELF_REL Type3; 803 ELFYAML::ELF_RSS SpecSym; 804 }; 805 } 806 807 void MappingTraits<ELFYAML::Relocation>::mapping(IO &IO, 808 ELFYAML::Relocation &Rel) { 809 const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext()); 810 assert(Object && "The IO context is not initialized"); 811 812 IO.mapRequired("Offset", Rel.Offset); 813 IO.mapRequired("Symbol", Rel.Symbol); 814 815 if (Object->Header.Machine == ELFYAML::ELF_EM(ELF::EM_MIPS) && 816 Object->Header.Class == ELFYAML::ELF_ELFCLASS(ELF::ELFCLASS64)) { 817 MappingNormalization<NormalizedMips64RelType, ELFYAML::ELF_REL> Key( 818 IO, Rel.Type); 819 IO.mapRequired("Type", Key->Type); 820 IO.mapOptional("Type2", Key->Type2, ELFYAML::ELF_REL(ELF::R_MIPS_NONE)); 821 IO.mapOptional("Type3", Key->Type3, ELFYAML::ELF_REL(ELF::R_MIPS_NONE)); 822 IO.mapOptional("SpecSym", Key->SpecSym, ELFYAML::ELF_RSS(ELF::RSS_UNDEF)); 823 } else 824 IO.mapRequired("Type", Rel.Type); 825 826 IO.mapOptional("Addend", Rel.Addend, (int64_t)0); 827 } 828 829 void MappingTraits<ELFYAML::Object>::mapping(IO &IO, ELFYAML::Object &Object) { 830 assert(!IO.getContext() && "The IO context is initialized already"); 831 IO.setContext(&Object); 832 IO.mapTag("!ELF", true); 833 IO.mapRequired("FileHeader", Object.Header); 834 IO.mapOptional("Sections", Object.Sections); 835 IO.mapOptional("Symbols", Object.Symbols); 836 IO.setContext(nullptr); 837 } 838 839 LLVM_YAML_STRONG_TYPEDEF(uint8_t, MIPS_AFL_REG) 840 LLVM_YAML_STRONG_TYPEDEF(uint8_t, MIPS_ABI_FP) 841 LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_EXT) 842 LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_ASE) 843 LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_AFL_FLAGS1) 844 845 } // end namespace yaml 846 } // end namespace llvm 847