xref: /llvm-project-15.0.7/llvm/lib/Object/ELF.cpp (revision ac9b6adf)
1 //===- ELF.cpp - ELF object file implementation ---------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/Object/ELF.h"
11 #include "llvm/BinaryFormat/ELF.h"
12 #include "llvm/Support/LEB128.h"
13 
14 using namespace llvm;
15 using namespace object;
16 
17 #define STRINGIFY_ENUM_CASE(ns, name)                                          \
18   case ns::name:                                                               \
19     return #name;
20 
21 #define ELF_RELOC(name, value) STRINGIFY_ENUM_CASE(ELF, name)
22 
23 StringRef llvm::object::getELFRelocationTypeName(uint32_t Machine,
24                                                  uint32_t Type) {
25   switch (Machine) {
26   case ELF::EM_X86_64:
27     switch (Type) {
28 #include "llvm/BinaryFormat/ELFRelocs/x86_64.def"
29     default:
30       break;
31     }
32     break;
33   case ELF::EM_386:
34   case ELF::EM_IAMCU:
35     switch (Type) {
36 #include "llvm/BinaryFormat/ELFRelocs/i386.def"
37     default:
38       break;
39     }
40     break;
41   case ELF::EM_MIPS:
42     switch (Type) {
43 #include "llvm/BinaryFormat/ELFRelocs/Mips.def"
44     default:
45       break;
46     }
47     break;
48   case ELF::EM_AARCH64:
49     switch (Type) {
50 #include "llvm/BinaryFormat/ELFRelocs/AArch64.def"
51     default:
52       break;
53     }
54     break;
55   case ELF::EM_ARM:
56     switch (Type) {
57 #include "llvm/BinaryFormat/ELFRelocs/ARM.def"
58     default:
59       break;
60     }
61     break;
62   case ELF::EM_ARC_COMPACT:
63   case ELF::EM_ARC_COMPACT2:
64     switch (Type) {
65 #include "llvm/BinaryFormat/ELFRelocs/ARC.def"
66     default:
67       break;
68     }
69     break;
70   case ELF::EM_AVR:
71     switch (Type) {
72 #include "llvm/BinaryFormat/ELFRelocs/AVR.def"
73     default:
74       break;
75     }
76     break;
77   case ELF::EM_HEXAGON:
78     switch (Type) {
79 #include "llvm/BinaryFormat/ELFRelocs/Hexagon.def"
80     default:
81       break;
82     }
83     break;
84   case ELF::EM_LANAI:
85     switch (Type) {
86 #include "llvm/BinaryFormat/ELFRelocs/Lanai.def"
87     default:
88       break;
89     }
90     break;
91   case ELF::EM_PPC:
92     switch (Type) {
93 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
94     default:
95       break;
96     }
97     break;
98   case ELF::EM_PPC64:
99     switch (Type) {
100 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
101     default:
102       break;
103     }
104     break;
105   case ELF::EM_RISCV:
106     switch (Type) {
107 #include "llvm/BinaryFormat/ELFRelocs/RISCV.def"
108     default:
109       break;
110     }
111     break;
112   case ELF::EM_S390:
113     switch (Type) {
114 #include "llvm/BinaryFormat/ELFRelocs/SystemZ.def"
115     default:
116       break;
117     }
118     break;
119   case ELF::EM_SPARC:
120   case ELF::EM_SPARC32PLUS:
121   case ELF::EM_SPARCV9:
122     switch (Type) {
123 #include "llvm/BinaryFormat/ELFRelocs/Sparc.def"
124     default:
125       break;
126     }
127     break;
128   case ELF::EM_WEBASSEMBLY:
129     switch (Type) {
130 #include "llvm/BinaryFormat/ELFRelocs/WebAssembly.def"
131     default:
132       break;
133     }
134     break;
135   case ELF::EM_AMDGPU:
136     switch (Type) {
137 #include "llvm/BinaryFormat/ELFRelocs/AMDGPU.def"
138     default:
139       break;
140     }
141     break;
142   case ELF::EM_BPF:
143     switch (Type) {
144 #include "llvm/BinaryFormat/ELFRelocs/BPF.def"
145     default:
146       break;
147     }
148     break;
149   default:
150     break;
151   }
152   return "Unknown";
153 }
154 
155 #undef ELF_RELOC
156 
157 uint32_t llvm::object::getELFRelrRelocationType(uint32_t Machine) {
158   switch (Machine) {
159   case ELF::EM_X86_64:
160     return ELF::R_X86_64_RELATIVE;
161   case ELF::EM_386:
162   case ELF::EM_IAMCU:
163     return ELF::R_386_RELATIVE;
164   case ELF::EM_MIPS:
165     break;
166   case ELF::EM_AARCH64:
167     return ELF::R_AARCH64_RELATIVE;
168   case ELF::EM_ARM:
169     return ELF::R_ARM_RELATIVE;
170   case ELF::EM_ARC_COMPACT:
171   case ELF::EM_ARC_COMPACT2:
172     return ELF::R_ARC_RELATIVE;
173   case ELF::EM_AVR:
174     break;
175   case ELF::EM_HEXAGON:
176     return ELF::R_HEX_RELATIVE;
177   case ELF::EM_LANAI:
178     break;
179   case ELF::EM_PPC:
180     break;
181   case ELF::EM_PPC64:
182     return ELF::R_PPC64_RELATIVE;
183   case ELF::EM_RISCV:
184     return ELF::R_RISCV_RELATIVE;
185   case ELF::EM_S390:
186     return ELF::R_390_RELATIVE;
187   case ELF::EM_SPARC:
188   case ELF::EM_SPARC32PLUS:
189   case ELF::EM_SPARCV9:
190     return ELF::R_SPARC_RELATIVE;
191   case ELF::EM_WEBASSEMBLY:
192     break;
193   case ELF::EM_AMDGPU:
194     break;
195   case ELF::EM_BPF:
196     break;
197   default:
198     break;
199   }
200   return 0;
201 }
202 
203 StringRef llvm::object::getELFSectionTypeName(uint32_t Machine, unsigned Type) {
204   switch (Machine) {
205   case ELF::EM_ARM:
206     switch (Type) {
207       STRINGIFY_ENUM_CASE(ELF, SHT_ARM_EXIDX);
208       STRINGIFY_ENUM_CASE(ELF, SHT_ARM_PREEMPTMAP);
209       STRINGIFY_ENUM_CASE(ELF, SHT_ARM_ATTRIBUTES);
210       STRINGIFY_ENUM_CASE(ELF, SHT_ARM_DEBUGOVERLAY);
211       STRINGIFY_ENUM_CASE(ELF, SHT_ARM_OVERLAYSECTION);
212     }
213     break;
214   case ELF::EM_HEXAGON:
215     switch (Type) { STRINGIFY_ENUM_CASE(ELF, SHT_HEX_ORDERED); }
216     break;
217   case ELF::EM_X86_64:
218     switch (Type) { STRINGIFY_ENUM_CASE(ELF, SHT_X86_64_UNWIND); }
219     break;
220   case ELF::EM_MIPS:
221   case ELF::EM_MIPS_RS3_LE:
222     switch (Type) {
223       STRINGIFY_ENUM_CASE(ELF, SHT_MIPS_REGINFO);
224       STRINGIFY_ENUM_CASE(ELF, SHT_MIPS_OPTIONS);
225       STRINGIFY_ENUM_CASE(ELF, SHT_MIPS_ABIFLAGS);
226       STRINGIFY_ENUM_CASE(ELF, SHT_MIPS_DWARF);
227     }
228     break;
229   default:
230     break;
231   }
232 
233   switch (Type) {
234     STRINGIFY_ENUM_CASE(ELF, SHT_NULL);
235     STRINGIFY_ENUM_CASE(ELF, SHT_PROGBITS);
236     STRINGIFY_ENUM_CASE(ELF, SHT_SYMTAB);
237     STRINGIFY_ENUM_CASE(ELF, SHT_STRTAB);
238     STRINGIFY_ENUM_CASE(ELF, SHT_RELA);
239     STRINGIFY_ENUM_CASE(ELF, SHT_HASH);
240     STRINGIFY_ENUM_CASE(ELF, SHT_DYNAMIC);
241     STRINGIFY_ENUM_CASE(ELF, SHT_NOTE);
242     STRINGIFY_ENUM_CASE(ELF, SHT_NOBITS);
243     STRINGIFY_ENUM_CASE(ELF, SHT_REL);
244     STRINGIFY_ENUM_CASE(ELF, SHT_SHLIB);
245     STRINGIFY_ENUM_CASE(ELF, SHT_DYNSYM);
246     STRINGIFY_ENUM_CASE(ELF, SHT_INIT_ARRAY);
247     STRINGIFY_ENUM_CASE(ELF, SHT_FINI_ARRAY);
248     STRINGIFY_ENUM_CASE(ELF, SHT_PREINIT_ARRAY);
249     STRINGIFY_ENUM_CASE(ELF, SHT_GROUP);
250     STRINGIFY_ENUM_CASE(ELF, SHT_SYMTAB_SHNDX);
251     STRINGIFY_ENUM_CASE(ELF, SHT_RELR);
252     STRINGIFY_ENUM_CASE(ELF, SHT_ANDROID_REL);
253     STRINGIFY_ENUM_CASE(ELF, SHT_ANDROID_RELA);
254     STRINGIFY_ENUM_CASE(ELF, SHT_ANDROID_RELR);
255     STRINGIFY_ENUM_CASE(ELF, SHT_LLVM_ODRTAB);
256     STRINGIFY_ENUM_CASE(ELF, SHT_LLVM_LINKER_OPTIONS);
257     STRINGIFY_ENUM_CASE(ELF, SHT_LLVM_CALL_GRAPH_PROFILE);
258     STRINGIFY_ENUM_CASE(ELF, SHT_GNU_ATTRIBUTES);
259     STRINGIFY_ENUM_CASE(ELF, SHT_GNU_HASH);
260     STRINGIFY_ENUM_CASE(ELF, SHT_GNU_verdef);
261     STRINGIFY_ENUM_CASE(ELF, SHT_GNU_verneed);
262     STRINGIFY_ENUM_CASE(ELF, SHT_GNU_versym);
263   default:
264     return "Unknown";
265   }
266 }
267 
268 template <class ELFT>
269 Expected<std::vector<typename ELFT::Rela>>
270 ELFFile<ELFT>::decode_relrs(Elf_Relr_Range relrs) const {
271   // This function decodes the contents of an SHT_RELR packed relocation
272   // section.
273   //
274   // Proposal for adding SHT_RELR sections to generic-abi is here:
275   //   https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
276   //
277   // The encoded sequence of Elf64_Relr entries in a SHT_RELR section looks
278   // like [ AAAAAAAA BBBBBBB1 BBBBBBB1 ... AAAAAAAA BBBBBB1 ... ]
279   //
280   // i.e. start with an address, followed by any number of bitmaps. The address
281   // entry encodes 1 relocation. The subsequent bitmap entries encode up to 63
282   // relocations each, at subsequent offsets following the last address entry.
283   //
284   // The bitmap entries must have 1 in the least significant bit. The assumption
285   // here is that an address cannot have 1 in lsb. Odd addresses are not
286   // supported.
287   //
288   // Excluding the least significant bit in the bitmap, each non-zero bit in
289   // the bitmap represents a relocation to be applied to a corresponding machine
290   // word that follows the base address word. The second least significant bit
291   // represents the machine word immediately following the initial address, and
292   // each bit that follows represents the next word, in linear order. As such,
293   // a single bitmap can encode up to 31 relocations in a 32-bit object, and
294   // 63 relocations in a 64-bit object.
295   //
296   // This encoding has a couple of interesting properties:
297   // 1. Looking at any entry, it is clear whether it's an address or a bitmap:
298   //    even means address, odd means bitmap.
299   // 2. Just a simple list of addresses is a valid encoding.
300 
301   Elf_Rela Rela;
302   Rela.r_info = 0;
303   Rela.r_addend = 0;
304   Rela.setType(getRelrRelocationType(), false);
305   std::vector<Elf_Rela> Relocs;
306 
307   // Word type: uint32_t for Elf32, and uint64_t for Elf64.
308   typedef typename ELFT::uint Word;
309 
310   // Word size in number of bytes.
311   const size_t WordSize = sizeof(Word);
312 
313   // Number of bits used for the relocation offsets bitmap.
314   // These many relative relocations can be encoded in a single entry.
315   const size_t NBits = 8*WordSize - 1;
316 
317   Word Base = 0;
318   for (const Elf_Relr &R : relrs) {
319     Word Entry = R;
320     if ((Entry&1) == 0) {
321       // Even entry: encodes the offset for next relocation.
322       Rela.r_offset = Entry;
323       Relocs.push_back(Rela);
324       // Set base offset for subsequent bitmap entries.
325       Base = Entry + WordSize;
326       continue;
327     }
328 
329     // Odd entry: encodes bitmap for relocations starting at base.
330     Word Offset = Base;
331     while (Entry != 0) {
332       Entry >>= 1;
333       if ((Entry&1) != 0) {
334         Rela.r_offset = Offset;
335         Relocs.push_back(Rela);
336       }
337       Offset += WordSize;
338     }
339 
340     // Advance base offset by NBits words.
341     Base += NBits * WordSize;
342   }
343 
344   return Relocs;
345 }
346 
347 template <class ELFT>
348 Expected<std::vector<typename ELFT::Rela>>
349 ELFFile<ELFT>::android_relas(const Elf_Shdr *Sec) const {
350   // This function reads relocations in Android's packed relocation format,
351   // which is based on SLEB128 and delta encoding.
352   Expected<ArrayRef<uint8_t>> ContentsOrErr = getSectionContents(Sec);
353   if (!ContentsOrErr)
354     return ContentsOrErr.takeError();
355   const uint8_t *Cur = ContentsOrErr->begin();
356   const uint8_t *End = ContentsOrErr->end();
357   if (ContentsOrErr->size() < 4 || Cur[0] != 'A' || Cur[1] != 'P' ||
358       Cur[2] != 'S' || Cur[3] != '2')
359     return createError("invalid packed relocation header");
360   Cur += 4;
361 
362   const char *ErrStr = nullptr;
363   auto ReadSLEB = [&]() -> int64_t {
364     if (ErrStr)
365       return 0;
366     unsigned Len;
367     int64_t Result = decodeSLEB128(Cur, &Len, End, &ErrStr);
368     Cur += Len;
369     return Result;
370   };
371 
372   uint64_t NumRelocs = ReadSLEB();
373   uint64_t Offset = ReadSLEB();
374   uint64_t Addend = 0;
375 
376   if (ErrStr)
377     return createError(ErrStr);
378 
379   std::vector<Elf_Rela> Relocs;
380   Relocs.reserve(NumRelocs);
381   while (NumRelocs) {
382     uint64_t NumRelocsInGroup = ReadSLEB();
383     if (NumRelocsInGroup > NumRelocs)
384       return createError("relocation group unexpectedly large");
385     NumRelocs -= NumRelocsInGroup;
386 
387     uint64_t GroupFlags = ReadSLEB();
388     bool GroupedByInfo = GroupFlags & ELF::RELOCATION_GROUPED_BY_INFO_FLAG;
389     bool GroupedByOffsetDelta = GroupFlags & ELF::RELOCATION_GROUPED_BY_OFFSET_DELTA_FLAG;
390     bool GroupedByAddend = GroupFlags & ELF::RELOCATION_GROUPED_BY_ADDEND_FLAG;
391     bool GroupHasAddend = GroupFlags & ELF::RELOCATION_GROUP_HAS_ADDEND_FLAG;
392 
393     uint64_t GroupOffsetDelta;
394     if (GroupedByOffsetDelta)
395       GroupOffsetDelta = ReadSLEB();
396 
397     uint64_t GroupRInfo;
398     if (GroupedByInfo)
399       GroupRInfo = ReadSLEB();
400 
401     if (GroupedByAddend && GroupHasAddend)
402       Addend += ReadSLEB();
403 
404     for (uint64_t I = 0; I != NumRelocsInGroup; ++I) {
405       Elf_Rela R;
406       Offset += GroupedByOffsetDelta ? GroupOffsetDelta : ReadSLEB();
407       R.r_offset = Offset;
408       R.r_info = GroupedByInfo ? GroupRInfo : ReadSLEB();
409 
410       if (GroupHasAddend) {
411         if (!GroupedByAddend)
412           Addend += ReadSLEB();
413         R.r_addend = Addend;
414       } else {
415         R.r_addend = 0;
416       }
417 
418       Relocs.push_back(R);
419 
420       if (ErrStr)
421         return createError(ErrStr);
422     }
423 
424     if (ErrStr)
425       return createError(ErrStr);
426   }
427 
428   return Relocs;
429 }
430 
431 template class llvm::object::ELFFile<ELF32LE>;
432 template class llvm::object::ELFFile<ELF32BE>;
433 template class llvm::object::ELFFile<ELF64LE>;
434 template class llvm::object::ELFFile<ELF64BE>;
435