1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the auto-upgrade helper functions.
11 // This is where deprecated IR intrinsics and other IR features are updated to
12 // current specifications.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "llvm/IR/AutoUpgrade.h"
17 #include "llvm/IR/CFG.h"
18 #include "llvm/IR/CallSite.h"
19 #include "llvm/IR/Constants.h"
20 #include "llvm/IR/DIBuilder.h"
21 #include "llvm/IR/DebugInfo.h"
22 #include "llvm/IR/DiagnosticInfo.h"
23 #include "llvm/IR/Function.h"
24 #include "llvm/IR/IRBuilder.h"
25 #include "llvm/IR/Instruction.h"
26 #include "llvm/IR/IntrinsicInst.h"
27 #include "llvm/IR/LLVMContext.h"
28 #include "llvm/IR/Module.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/Regex.h"
31 #include <cstring>
32 using namespace llvm;
33 
34 // Upgrade the declarations of the SSE4.1 functions whose arguments have
35 // changed their type from v4f32 to v2i64.
36 static bool UpgradeSSE41Function(Function* F, Intrinsic::ID IID,
37                                  Function *&NewFn) {
38   // Check whether this is an old version of the function, which received
39   // v4f32 arguments.
40   Type *Arg0Type = F->getFunctionType()->getParamType(0);
41   if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4))
42     return false;
43 
44   // Yes, it's old, replace it with new version.
45   F->setName(F->getName() + ".old");
46   NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
47   return true;
48 }
49 
50 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask
51 // arguments have changed their type from i32 to i8.
52 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID,
53                                              Function *&NewFn) {
54   // Check that the last argument is an i32.
55   Type *LastArgType = F->getFunctionType()->getParamType(
56      F->getFunctionType()->getNumParams() - 1);
57   if (!LastArgType->isIntegerTy(32))
58     return false;
59 
60   // Move this function aside and map down.
61   F->setName(F->getName() + ".old");
62   NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
63   return true;
64 }
65 
66 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
67   assert(F && "Illegal to upgrade a non-existent Function.");
68 
69   // Quickly eliminate it, if it's not a candidate.
70   StringRef Name = F->getName();
71   if (Name.size() <= 8 || !Name.startswith("llvm."))
72     return false;
73   Name = Name.substr(5); // Strip off "llvm."
74 
75   switch (Name[0]) {
76   default: break;
77   case 'a': {
78     if (Name.startswith("arm.neon.vclz")) {
79       Type* args[2] = {
80         F->arg_begin()->getType(),
81         Type::getInt1Ty(F->getContext())
82       };
83       // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to
84       // the end of the name. Change name from llvm.arm.neon.vclz.* to
85       //  llvm.ctlz.*
86       FunctionType* fType = FunctionType::get(F->getReturnType(), args, false);
87       NewFn = Function::Create(fType, F->getLinkage(),
88                                "llvm.ctlz." + Name.substr(14), F->getParent());
89       return true;
90     }
91     if (Name.startswith("arm.neon.vcnt")) {
92       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
93                                         F->arg_begin()->getType());
94       return true;
95     }
96     Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$");
97     if (vldRegex.match(Name)) {
98       auto fArgs = F->getFunctionType()->params();
99       SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end());
100       // Can't use Intrinsic::getDeclaration here as the return types might
101       // then only be structurally equal.
102       FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false);
103       NewFn = Function::Create(fType, F->getLinkage(),
104                                "llvm." + Name + ".p0i8", F->getParent());
105       return true;
106     }
107     Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
108     if (vstRegex.match(Name)) {
109       static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
110                                                 Intrinsic::arm_neon_vst2,
111                                                 Intrinsic::arm_neon_vst3,
112                                                 Intrinsic::arm_neon_vst4};
113 
114       static const Intrinsic::ID StoreLaneInts[] = {
115         Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
116         Intrinsic::arm_neon_vst4lane
117       };
118 
119       auto fArgs = F->getFunctionType()->params();
120       Type *Tys[] = {fArgs[0], fArgs[1]};
121       if (Name.find("lane") == StringRef::npos)
122         NewFn = Intrinsic::getDeclaration(F->getParent(),
123                                           StoreInts[fArgs.size() - 3], Tys);
124       else
125         NewFn = Intrinsic::getDeclaration(F->getParent(),
126                                           StoreLaneInts[fArgs.size() - 5], Tys);
127       return true;
128     }
129     if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") {
130       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer);
131       return true;
132     }
133     break;
134   }
135 
136   case 'c': {
137     if (Name.startswith("ctlz.") && F->arg_size() == 1) {
138       F->setName(Name + ".old");
139       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
140                                         F->arg_begin()->getType());
141       return true;
142     }
143     if (Name.startswith("cttz.") && F->arg_size() == 1) {
144       F->setName(Name + ".old");
145       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz,
146                                         F->arg_begin()->getType());
147       return true;
148     }
149     break;
150   }
151   case 'i': {
152     if (Name.startswith("invariant.start")) {
153       auto Args = F->getFunctionType()->params();
154       Type* ObjectPtr[1] = {Args[1]};
155       if (F->getName() !=
156           Intrinsic::getName(Intrinsic::invariant_start, ObjectPtr)) {
157         F->setName(Name + ".old");
158         NewFn = Intrinsic::getDeclaration(
159             F->getParent(), Intrinsic::invariant_start, ObjectPtr);
160         return true;
161       }
162     }
163     if (Name.startswith("invariant.end")) {
164       auto Args = F->getFunctionType()->params();
165       Type* ObjectPtr[1] = {Args[2]};
166       if (F->getName() !=
167           Intrinsic::getName(Intrinsic::invariant_end, ObjectPtr)) {
168         F->setName(Name + ".old");
169         NewFn = Intrinsic::getDeclaration(F->getParent(),
170                                           Intrinsic::invariant_end, ObjectPtr);
171         return true;
172       }
173     }
174     break;
175   }
176   case 'm': {
177     if (Name.startswith("masked.load.")) {
178       Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() };
179       if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) {
180         F->setName(Name + ".old");
181         NewFn = Intrinsic::getDeclaration(F->getParent(),
182                                           Intrinsic::masked_load,
183                                           Tys);
184         return true;
185       }
186     }
187     if (Name.startswith("masked.store.")) {
188       auto Args = F->getFunctionType()->params();
189       Type *Tys[] = { Args[0], Args[1] };
190       if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) {
191         F->setName(Name + ".old");
192         NewFn = Intrinsic::getDeclaration(F->getParent(),
193                                           Intrinsic::masked_store,
194                                           Tys);
195         return true;
196       }
197     }
198     break;
199   }
200 
201   case 'o':
202     // We only need to change the name to match the mangling including the
203     // address space.
204     if (F->arg_size() == 2 && Name.startswith("objectsize.")) {
205       Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() };
206       if (F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) {
207         F->setName(Name + ".old");
208         NewFn = Intrinsic::getDeclaration(F->getParent(),
209                                           Intrinsic::objectsize, Tys);
210         return true;
211       }
212     }
213     break;
214 
215   case 's':
216     if (Name == "stackprotectorcheck") {
217       NewFn = nullptr;
218       return true;
219     }
220 
221   case 'x': {
222     bool IsX86 = Name.startswith("x86.");
223     if (IsX86)
224       Name = Name.substr(4);
225 
226     if (IsX86 &&
227         (Name.startswith("sse2.pcmpeq.") ||
228          Name.startswith("sse2.pcmpgt.") ||
229          Name.startswith("avx2.pcmpeq.") ||
230          Name.startswith("avx2.pcmpgt.") ||
231          Name.startswith("avx512.mask.pcmpeq.") ||
232          Name.startswith("avx512.mask.pcmpgt.") ||
233          Name == "sse41.pmaxsb" ||
234          Name == "sse2.pmaxs.w" ||
235          Name == "sse41.pmaxsd" ||
236          Name == "sse2.pmaxu.b" ||
237          Name == "sse41.pmaxuw" ||
238          Name == "sse41.pmaxud" ||
239          Name == "sse41.pminsb" ||
240          Name == "sse2.pmins.w" ||
241          Name == "sse41.pminsd" ||
242          Name == "sse2.pminu.b" ||
243          Name == "sse41.pminuw" ||
244          Name == "sse41.pminud" ||
245          Name.startswith("avx2.pmax") ||
246          Name.startswith("avx2.pmin") ||
247          Name.startswith("avx2.vbroadcast") ||
248          Name.startswith("avx2.pbroadcast") ||
249          Name.startswith("avx.vpermil.") ||
250          Name.startswith("sse2.pshuf") ||
251          Name.startswith("avx512.pbroadcast") ||
252          Name.startswith("avx512.mask.broadcast.s") ||
253          Name.startswith("avx512.mask.movddup") ||
254          Name.startswith("avx512.mask.movshdup") ||
255          Name.startswith("avx512.mask.movsldup") ||
256          Name.startswith("avx512.mask.pshuf.d.") ||
257          Name.startswith("avx512.mask.pshufl.w.") ||
258          Name.startswith("avx512.mask.pshufh.w.") ||
259          Name.startswith("avx512.mask.vpermil.p") ||
260          Name.startswith("avx512.mask.perm.df.") ||
261          Name.startswith("avx512.mask.perm.di.") ||
262          Name.startswith("avx512.mask.punpckl") ||
263          Name.startswith("avx512.mask.punpckh") ||
264          Name.startswith("avx512.mask.unpckl.") ||
265          Name.startswith("avx512.mask.unpckh.") ||
266          Name.startswith("avx512.mask.pand.") ||
267          Name.startswith("avx512.mask.pandn.") ||
268          Name.startswith("avx512.mask.por.") ||
269          Name.startswith("avx512.mask.pxor.") ||
270          Name.startswith("avx512.mask.and.") ||
271          Name.startswith("avx512.mask.andn.") ||
272          Name.startswith("avx512.mask.or.") ||
273          Name.startswith("avx512.mask.xor.") ||
274          Name.startswith("avx512.mask.padd.") ||
275          Name.startswith("avx512.mask.psub.") ||
276          Name.startswith("avx512.mask.pmull.") ||
277          Name.startswith("avx512.mask.add.pd.128") ||
278          Name.startswith("avx512.mask.add.pd.256") ||
279          Name.startswith("avx512.mask.add.ps.128") ||
280          Name.startswith("avx512.mask.add.ps.256") ||
281          Name.startswith("avx512.mask.div.pd.128") ||
282          Name.startswith("avx512.mask.div.pd.256") ||
283          Name.startswith("avx512.mask.div.ps.128") ||
284          Name.startswith("avx512.mask.div.ps.256") ||
285          Name.startswith("avx512.mask.mul.pd.128") ||
286          Name.startswith("avx512.mask.mul.pd.256") ||
287          Name.startswith("avx512.mask.mul.ps.128") ||
288          Name.startswith("avx512.mask.mul.ps.256") ||
289          Name.startswith("avx512.mask.sub.pd.128") ||
290          Name.startswith("avx512.mask.sub.pd.256") ||
291          Name.startswith("avx512.mask.sub.ps.128") ||
292          Name.startswith("avx512.mask.sub.ps.256") ||
293          Name.startswith("sse41.pmovsx") ||
294          Name.startswith("sse41.pmovzx") ||
295          Name.startswith("avx2.pmovsx") ||
296          Name.startswith("avx2.pmovzx") ||
297          Name == "sse2.cvtdq2pd" ||
298          Name == "sse2.cvtps2pd" ||
299          Name == "avx.cvtdq2.pd.256" ||
300          Name == "avx.cvt.ps2.pd.256" ||
301          Name.startswith("avx.vinsertf128.") ||
302          Name == "avx2.vinserti128" ||
303          Name.startswith("avx.vextractf128.") ||
304          Name == "avx2.vextracti128" ||
305          Name.startswith("sse4a.movnt.") ||
306          Name.startswith("avx.movnt.") ||
307          Name.startswith("avx512.storent.") ||
308          Name == "sse2.storel.dq" ||
309          Name.startswith("sse.storeu.") ||
310          Name.startswith("sse2.storeu.") ||
311          Name.startswith("avx.storeu.") ||
312          Name.startswith("avx512.mask.storeu.") ||
313          Name.startswith("avx512.mask.store.p") ||
314          Name.startswith("avx512.mask.store.b.") ||
315          Name.startswith("avx512.mask.store.w.") ||
316          Name.startswith("avx512.mask.store.d.") ||
317          Name.startswith("avx512.mask.store.q.") ||
318          Name.startswith("avx512.mask.loadu.") ||
319          Name.startswith("avx512.mask.load.") ||
320          Name == "sse42.crc32.64.8" ||
321          Name.startswith("avx.vbroadcast.s") ||
322          Name.startswith("avx512.mask.palignr.") ||
323          Name.startswith("sse2.psll.dq") ||
324          Name.startswith("sse2.psrl.dq") ||
325          Name.startswith("avx2.psll.dq") ||
326          Name.startswith("avx2.psrl.dq") ||
327          Name.startswith("avx512.psll.dq") ||
328          Name.startswith("avx512.psrl.dq") ||
329          Name == "sse41.pblendw" ||
330          Name.startswith("sse41.blendp") ||
331          Name.startswith("avx.blend.p") ||
332          Name == "avx2.pblendw" ||
333          Name.startswith("avx2.pblendd.") ||
334          Name.startswith("avx.vbroadcastf128") ||
335          Name == "avx2.vbroadcasti128" ||
336          Name == "xop.vpcmov" ||
337          (Name.startswith("xop.vpcom") && F->arg_size() == 2))) {
338       NewFn = nullptr;
339       return true;
340     }
341     // SSE4.1 ptest functions may have an old signature.
342     if (IsX86 && Name.startswith("sse41.ptest")) {
343       if (Name.substr(11) == "c")
344         return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestc, NewFn);
345       if (Name.substr(11) == "z")
346         return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestz, NewFn);
347       if (Name.substr(11) == "nzc")
348         return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestnzc, NewFn);
349     }
350     // Several blend and other instructions with masks used the wrong number of
351     // bits.
352     if (IsX86 && Name == "sse41.insertps")
353       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps,
354                                               NewFn);
355     if (IsX86 && Name == "sse41.dppd")
356       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd,
357                                               NewFn);
358     if (IsX86 && Name == "sse41.dpps")
359       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps,
360                                               NewFn);
361     if (IsX86 && Name == "sse41.mpsadbw")
362       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw,
363                                               NewFn);
364     if (IsX86 && Name == "avx.dp.ps.256")
365       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256,
366                                               NewFn);
367     if (IsX86 && Name == "avx2.mpsadbw")
368       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw,
369                                               NewFn);
370 
371     // frcz.ss/sd may need to have an argument dropped
372     if (IsX86 && Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) {
373       F->setName(Name + ".old");
374       NewFn = Intrinsic::getDeclaration(F->getParent(),
375                                         Intrinsic::x86_xop_vfrcz_ss);
376       return true;
377     }
378     if (IsX86 && Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) {
379       F->setName(Name + ".old");
380       NewFn = Intrinsic::getDeclaration(F->getParent(),
381                                         Intrinsic::x86_xop_vfrcz_sd);
382       return true;
383     }
384     if (IsX86 && (Name.startswith("avx512.mask.pslli.") ||
385                   Name.startswith("avx512.mask.psrai.") ||
386                   Name.startswith("avx512.mask.psrli."))) {
387       Intrinsic::ID ShiftID;
388       if (Name.slice(12, 16) == "psll")
389         ShiftID = Name[18] == 'd' ? Intrinsic::x86_avx512_mask_psll_di_512
390                                   : Intrinsic::x86_avx512_mask_psll_qi_512;
391       else if (Name.slice(12, 16) == "psra")
392         ShiftID = Name[18] == 'd' ? Intrinsic::x86_avx512_mask_psra_di_512
393                                   : Intrinsic::x86_avx512_mask_psra_qi_512;
394       else
395         ShiftID = Name[18] == 'd' ? Intrinsic::x86_avx512_mask_psrl_di_512
396                                   : Intrinsic::x86_avx512_mask_psrl_qi_512;
397       F->setName("llvm.x86." + Name + ".old");
398       NewFn = Intrinsic::getDeclaration(F->getParent(), ShiftID);
399       return true;
400     }
401     // Fix the FMA4 intrinsics to remove the 4
402     if (IsX86 && Name.startswith("fma4.")) {
403       F->setName("llvm.x86.fma" + Name.substr(5));
404       NewFn = F;
405       return true;
406     }
407     // Upgrade any XOP PERMIL2 index operand still using a float/double vector.
408     if (IsX86 && Name.startswith("xop.vpermil2")) {
409       auto Params = F->getFunctionType()->params();
410       auto Idx = Params[2];
411       if (Idx->getScalarType()->isFloatingPointTy()) {
412         F->setName("llvm.x86." + Name + ".old");
413         unsigned IdxSize = Idx->getPrimitiveSizeInBits();
414         unsigned EltSize = Idx->getScalarSizeInBits();
415         Intrinsic::ID Permil2ID;
416         if (EltSize == 64 && IdxSize == 128)
417           Permil2ID = Intrinsic::x86_xop_vpermil2pd;
418         else if (EltSize == 32 && IdxSize == 128)
419           Permil2ID = Intrinsic::x86_xop_vpermil2ps;
420         else if (EltSize == 64 && IdxSize == 256)
421           Permil2ID = Intrinsic::x86_xop_vpermil2pd_256;
422         else
423           Permil2ID = Intrinsic::x86_xop_vpermil2ps_256;
424         NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID);
425         return true;
426       }
427     }
428     break;
429   }
430   }
431 
432   //  This may not belong here. This function is effectively being overloaded
433   //  to both detect an intrinsic which needs upgrading, and to provide the
434   //  upgraded form of the intrinsic. We should perhaps have two separate
435   //  functions for this.
436   return false;
437 }
438 
439 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) {
440   NewFn = nullptr;
441   bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn);
442   assert(F != NewFn && "Intrinsic function upgraded to the same function");
443 
444   // Upgrade intrinsic attributes.  This does not change the function.
445   if (NewFn)
446     F = NewFn;
447   if (Intrinsic::ID id = F->getIntrinsicID())
448     F->setAttributes(Intrinsic::getAttributes(F->getContext(), id));
449   return Upgraded;
450 }
451 
452 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) {
453   // Nothing to do yet.
454   return false;
455 }
456 
457 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them
458 // to byte shuffles.
459 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder,
460                                          Value *Op, unsigned Shift) {
461   Type *ResultTy = Op->getType();
462   unsigned NumElts = ResultTy->getVectorNumElements() * 8;
463 
464   // Bitcast from a 64-bit element type to a byte element type.
465   Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
466   Op = Builder.CreateBitCast(Op, VecTy, "cast");
467 
468   // We'll be shuffling in zeroes.
469   Value *Res = Constant::getNullValue(VecTy);
470 
471   // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
472   // we'll just return the zero vector.
473   if (Shift < 16) {
474     uint32_t Idxs[64];
475     // 256/512-bit version is split into 2/4 16-byte lanes.
476     for (unsigned l = 0; l != NumElts; l += 16)
477       for (unsigned i = 0; i != 16; ++i) {
478         unsigned Idx = NumElts + i - Shift;
479         if (Idx < NumElts)
480           Idx -= NumElts - 16; // end of lane, switch operand.
481         Idxs[l + i] = Idx + l;
482       }
483 
484     Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
485   }
486 
487   // Bitcast back to a 64-bit element type.
488   return Builder.CreateBitCast(Res, ResultTy, "cast");
489 }
490 
491 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them
492 // to byte shuffles.
493 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op,
494                                          unsigned Shift) {
495   Type *ResultTy = Op->getType();
496   unsigned NumElts = ResultTy->getVectorNumElements() * 8;
497 
498   // Bitcast from a 64-bit element type to a byte element type.
499   Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
500   Op = Builder.CreateBitCast(Op, VecTy, "cast");
501 
502   // We'll be shuffling in zeroes.
503   Value *Res = Constant::getNullValue(VecTy);
504 
505   // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
506   // we'll just return the zero vector.
507   if (Shift < 16) {
508     uint32_t Idxs[64];
509     // 256/512-bit version is split into 2/4 16-byte lanes.
510     for (unsigned l = 0; l != NumElts; l += 16)
511       for (unsigned i = 0; i != 16; ++i) {
512         unsigned Idx = i + Shift;
513         if (Idx >= 16)
514           Idx += NumElts - 16; // end of lane, switch operand.
515         Idxs[l + i] = Idx + l;
516       }
517 
518     Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts));
519   }
520 
521   // Bitcast back to a 64-bit element type.
522   return Builder.CreateBitCast(Res, ResultTy, "cast");
523 }
524 
525 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask,
526                             unsigned NumElts) {
527   llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(),
528                              cast<IntegerType>(Mask->getType())->getBitWidth());
529   Mask = Builder.CreateBitCast(Mask, MaskTy);
530 
531   // If we have less than 8 elements, then the starting mask was an i8 and
532   // we need to extract down to the right number of elements.
533   if (NumElts < 8) {
534     uint32_t Indices[4];
535     for (unsigned i = 0; i != NumElts; ++i)
536       Indices[i] = i;
537     Mask = Builder.CreateShuffleVector(Mask, Mask,
538                                        makeArrayRef(Indices, NumElts),
539                                        "extract");
540   }
541 
542   return Mask;
543 }
544 
545 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask,
546                             Value *Op0, Value *Op1) {
547   // If the mask is all ones just emit the align operation.
548   if (const auto *C = dyn_cast<Constant>(Mask))
549     if (C->isAllOnesValue())
550       return Op0;
551 
552   Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements());
553   return Builder.CreateSelect(Mask, Op0, Op1);
554 }
555 
556 static Value *UpgradeX86PALIGNRIntrinsics(IRBuilder<> &Builder,
557                                           Value *Op0, Value *Op1, Value *Shift,
558                                           Value *Passthru, Value *Mask) {
559   unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue();
560 
561   unsigned NumElts = Op0->getType()->getVectorNumElements();
562   assert(NumElts % 16 == 0);
563 
564   // If palignr is shifting the pair of vectors more than the size of two
565   // lanes, emit zero.
566   if (ShiftVal >= 32)
567     return llvm::Constant::getNullValue(Op0->getType());
568 
569   // If palignr is shifting the pair of input vectors more than one lane,
570   // but less than two lanes, convert to shifting in zeroes.
571   if (ShiftVal > 16) {
572     ShiftVal -= 16;
573     Op1 = Op0;
574     Op0 = llvm::Constant::getNullValue(Op0->getType());
575   }
576 
577   uint32_t Indices[64];
578   // 256-bit palignr operates on 128-bit lanes so we need to handle that
579   for (unsigned l = 0; l != NumElts; l += 16) {
580     for (unsigned i = 0; i != 16; ++i) {
581       unsigned Idx = ShiftVal + i;
582       if (Idx >= 16)
583         Idx += NumElts - 16; // End of lane, switch operand.
584       Indices[l + i] = Idx + l;
585     }
586   }
587 
588   Value *Align = Builder.CreateShuffleVector(Op1, Op0,
589                                              makeArrayRef(Indices, NumElts),
590                                              "palignr");
591 
592   return EmitX86Select(Builder, Mask, Align, Passthru);
593 }
594 
595 static Value *UpgradeMaskedStore(IRBuilder<> &Builder,
596                                  Value *Ptr, Value *Data, Value *Mask,
597                                  bool Aligned) {
598   // Cast the pointer to the right type.
599   Ptr = Builder.CreateBitCast(Ptr,
600                               llvm::PointerType::getUnqual(Data->getType()));
601   unsigned Align =
602     Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1;
603 
604   // If the mask is all ones just emit a regular store.
605   if (const auto *C = dyn_cast<Constant>(Mask))
606     if (C->isAllOnesValue())
607       return Builder.CreateAlignedStore(Data, Ptr, Align);
608 
609   // Convert the mask from an integer type to a vector of i1.
610   unsigned NumElts = Data->getType()->getVectorNumElements();
611   Mask = getX86MaskVec(Builder, Mask, NumElts);
612   return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
613 }
614 
615 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder,
616                                 Value *Ptr, Value *Passthru, Value *Mask,
617                                 bool Aligned) {
618   // Cast the pointer to the right type.
619   Ptr = Builder.CreateBitCast(Ptr,
620                              llvm::PointerType::getUnqual(Passthru->getType()));
621   unsigned Align =
622     Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1;
623 
624   // If the mask is all ones just emit a regular store.
625   if (const auto *C = dyn_cast<Constant>(Mask))
626     if (C->isAllOnesValue())
627       return Builder.CreateAlignedLoad(Ptr, Align);
628 
629   // Convert the mask from an integer type to a vector of i1.
630   unsigned NumElts = Passthru->getType()->getVectorNumElements();
631   Mask = getX86MaskVec(Builder, Mask, NumElts);
632   return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
633 }
634 
635 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI,
636                                ICmpInst::Predicate Pred) {
637   Value *Op0 = CI.getArgOperand(0);
638   Value *Op1 = CI.getArgOperand(1);
639   Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1);
640   return Builder.CreateSelect(Cmp, Op0, Op1);
641 }
642 
643 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI,
644                                    ICmpInst::Predicate Pred) {
645   Value *Op0 = CI.getArgOperand(0);
646   unsigned NumElts = Op0->getType()->getVectorNumElements();
647   Value *Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1));
648 
649   Value *Mask = CI.getArgOperand(2);
650   const auto *C = dyn_cast<Constant>(Mask);
651   if (!C || !C->isAllOnesValue())
652     Cmp = Builder.CreateAnd(Cmp, getX86MaskVec(Builder, Mask, NumElts));
653 
654   if (NumElts < 8) {
655     uint32_t Indices[8];
656     for (unsigned i = 0; i != NumElts; ++i)
657       Indices[i] = i;
658     for (unsigned i = NumElts; i != 8; ++i)
659       Indices[i] = NumElts + i % NumElts;
660     Cmp = Builder.CreateShuffleVector(Cmp,
661                                       Constant::getNullValue(Cmp->getType()),
662                                       Indices);
663   }
664   return Builder.CreateBitCast(Cmp, IntegerType::get(CI.getContext(),
665                                                      std::max(NumElts, 8U)));
666 }
667 
668 /// Upgrade a call to an old intrinsic. All argument and return casting must be
669 /// provided to seamlessly integrate with existing context.
670 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
671   Function *F = CI->getCalledFunction();
672   LLVMContext &C = CI->getContext();
673   IRBuilder<> Builder(C);
674   Builder.SetInsertPoint(CI->getParent(), CI->getIterator());
675 
676   assert(F && "Intrinsic call is not direct?");
677 
678   if (!NewFn) {
679     // Get the Function's name.
680     StringRef Name = F->getName();
681 
682     assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'");
683     Name = Name.substr(5);
684 
685     bool IsX86 = Name.startswith("x86.");
686     if (IsX86)
687       Name = Name.substr(4);
688 
689     Value *Rep;
690     // Upgrade packed integer vector compare intrinsics to compare instructions.
691     if (IsX86 && (Name.startswith("sse2.pcmpeq.") ||
692                   Name.startswith("avx2.pcmpeq."))) {
693       Rep = Builder.CreateICmpEQ(CI->getArgOperand(0), CI->getArgOperand(1),
694                                  "pcmpeq");
695       Rep = Builder.CreateSExt(Rep, CI->getType(), "");
696     } else if (IsX86 && (Name.startswith("sse2.pcmpgt.") ||
697                          Name.startswith("avx2.pcmpgt."))) {
698       Rep = Builder.CreateICmpSGT(CI->getArgOperand(0), CI->getArgOperand(1),
699                                   "pcmpgt");
700       Rep = Builder.CreateSExt(Rep, CI->getType(), "");
701     } else if (IsX86 && Name.startswith("avx512.mask.pcmpeq.")) {
702       Rep = upgradeMaskedCompare(Builder, *CI, ICmpInst::ICMP_EQ);
703     } else if (IsX86 && Name.startswith("avx512.mask.pcmpgt.")) {
704       Rep = upgradeMaskedCompare(Builder, *CI, ICmpInst::ICMP_SGT);
705     } else if (IsX86 && (Name == "sse41.pmaxsb" ||
706                          Name == "sse2.pmaxs.w" ||
707                          Name == "sse41.pmaxsd" ||
708                          Name.startswith("avx2.pmaxs"))) {
709       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT);
710     } else if (IsX86 && (Name == "sse2.pmaxu.b" ||
711                          Name == "sse41.pmaxuw" ||
712                          Name == "sse41.pmaxud" ||
713                          Name.startswith("avx2.pmaxu"))) {
714       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT);
715     } else if (IsX86 && (Name == "sse41.pminsb" ||
716                          Name == "sse2.pmins.w" ||
717                          Name == "sse41.pminsd" ||
718                          Name.startswith("avx2.pmins"))) {
719       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT);
720     } else if (IsX86 && (Name == "sse2.pminu.b" ||
721                          Name == "sse41.pminuw" ||
722                          Name == "sse41.pminud" ||
723                          Name.startswith("avx2.pminu"))) {
724       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT);
725     } else if (IsX86 && (Name == "sse2.cvtdq2pd" ||
726                          Name == "sse2.cvtps2pd" ||
727                          Name == "avx.cvtdq2.pd.256" ||
728                          Name == "avx.cvt.ps2.pd.256")) {
729       // Lossless i32/float to double conversion.
730       // Extract the bottom elements if necessary and convert to double vector.
731       Value *Src = CI->getArgOperand(0);
732       VectorType *SrcTy = cast<VectorType>(Src->getType());
733       VectorType *DstTy = cast<VectorType>(CI->getType());
734       Rep = CI->getArgOperand(0);
735 
736       unsigned NumDstElts = DstTy->getNumElements();
737       if (NumDstElts < SrcTy->getNumElements()) {
738         assert(NumDstElts == 2 && "Unexpected vector size");
739         uint32_t ShuffleMask[2] = { 0, 1 };
740         Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy),
741                                           ShuffleMask);
742       }
743 
744       bool Int2Double = (StringRef::npos != Name.find("cvtdq2"));
745       if (Int2Double)
746         Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd");
747       else
748         Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd");
749     } else if (IsX86 && Name.startswith("sse4a.movnt.")) {
750       Module *M = F->getParent();
751       SmallVector<Metadata *, 1> Elts;
752       Elts.push_back(
753           ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1)));
754       MDNode *Node = MDNode::get(C, Elts);
755 
756       Value *Arg0 = CI->getArgOperand(0);
757       Value *Arg1 = CI->getArgOperand(1);
758 
759       // Nontemporal (unaligned) store of the 0'th element of the float/double
760       // vector.
761       Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType();
762       PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy);
763       Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast");
764       Value *Extract =
765           Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement");
766 
767       StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1);
768       SI->setMetadata(M->getMDKindID("nontemporal"), Node);
769 
770       // Remove intrinsic.
771       CI->eraseFromParent();
772       return;
773     } else if (IsX86 && (Name.startswith("avx.movnt.") ||
774                          Name.startswith("avx512.storent."))) {
775       Module *M = F->getParent();
776       SmallVector<Metadata *, 1> Elts;
777       Elts.push_back(
778           ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1)));
779       MDNode *Node = MDNode::get(C, Elts);
780 
781       Value *Arg0 = CI->getArgOperand(0);
782       Value *Arg1 = CI->getArgOperand(1);
783 
784       // Convert the type of the pointer to a pointer to the stored type.
785       Value *BC = Builder.CreateBitCast(Arg0,
786                                         PointerType::getUnqual(Arg1->getType()),
787                                         "cast");
788       VectorType *VTy = cast<VectorType>(Arg1->getType());
789       StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC,
790                                                  VTy->getBitWidth() / 8);
791       SI->setMetadata(M->getMDKindID("nontemporal"), Node);
792 
793       // Remove intrinsic.
794       CI->eraseFromParent();
795       return;
796     } else if (IsX86 && Name == "sse2.storel.dq") {
797       Value *Arg0 = CI->getArgOperand(0);
798       Value *Arg1 = CI->getArgOperand(1);
799 
800       Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
801       Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
802       Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0);
803       Value *BC = Builder.CreateBitCast(Arg0,
804                                         PointerType::getUnqual(Elt->getType()),
805                                         "cast");
806       Builder.CreateAlignedStore(Elt, BC, 1);
807 
808       // Remove intrinsic.
809       CI->eraseFromParent();
810       return;
811     } else if (IsX86 && (Name.startswith("sse.storeu.") ||
812                          Name.startswith("sse2.storeu.") ||
813                          Name.startswith("avx.storeu."))) {
814       Value *Arg0 = CI->getArgOperand(0);
815       Value *Arg1 = CI->getArgOperand(1);
816 
817       Arg0 = Builder.CreateBitCast(Arg0,
818                                    PointerType::getUnqual(Arg1->getType()),
819                                    "cast");
820       Builder.CreateAlignedStore(Arg1, Arg0, 1);
821 
822       // Remove intrinsic.
823       CI->eraseFromParent();
824       return;
825     } else if (IsX86 && (Name.startswith("avx512.mask.storeu."))) {
826       UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
827                          CI->getArgOperand(2), /*Aligned*/false);
828 
829       // Remove intrinsic.
830       CI->eraseFromParent();
831       return;
832     } else if (IsX86 && (Name.startswith("avx512.mask.store."))) {
833       UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
834                          CI->getArgOperand(2), /*Aligned*/true);
835 
836       // Remove intrinsic.
837       CI->eraseFromParent();
838       return;
839     } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) {
840       Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
841                               CI->getArgOperand(1), CI->getArgOperand(2),
842                               /*Aligned*/false);
843     } else if (IsX86 && (Name.startswith("avx512.mask.load."))) {
844       Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
845                               CI->getArgOperand(1),CI->getArgOperand(2),
846                               /*Aligned*/true);
847     } else if (IsX86 && Name.startswith("xop.vpcom")) {
848       Intrinsic::ID intID;
849       if (Name.endswith("ub"))
850         intID = Intrinsic::x86_xop_vpcomub;
851       else if (Name.endswith("uw"))
852         intID = Intrinsic::x86_xop_vpcomuw;
853       else if (Name.endswith("ud"))
854         intID = Intrinsic::x86_xop_vpcomud;
855       else if (Name.endswith("uq"))
856         intID = Intrinsic::x86_xop_vpcomuq;
857       else if (Name.endswith("b"))
858         intID = Intrinsic::x86_xop_vpcomb;
859       else if (Name.endswith("w"))
860         intID = Intrinsic::x86_xop_vpcomw;
861       else if (Name.endswith("d"))
862         intID = Intrinsic::x86_xop_vpcomd;
863       else if (Name.endswith("q"))
864         intID = Intrinsic::x86_xop_vpcomq;
865       else
866         llvm_unreachable("Unknown suffix");
867 
868       Name = Name.substr(9); // strip off "xop.vpcom"
869       unsigned Imm;
870       if (Name.startswith("lt"))
871         Imm = 0;
872       else if (Name.startswith("le"))
873         Imm = 1;
874       else if (Name.startswith("gt"))
875         Imm = 2;
876       else if (Name.startswith("ge"))
877         Imm = 3;
878       else if (Name.startswith("eq"))
879         Imm = 4;
880       else if (Name.startswith("ne"))
881         Imm = 5;
882       else if (Name.startswith("false"))
883         Imm = 6;
884       else if (Name.startswith("true"))
885         Imm = 7;
886       else
887         llvm_unreachable("Unknown condition");
888 
889       Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID);
890       Rep =
891           Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1),
892                                      Builder.getInt8(Imm)});
893     } else if (IsX86 && Name == "xop.vpcmov") {
894       Value *Arg0 = CI->getArgOperand(0);
895       Value *Arg1 = CI->getArgOperand(1);
896       Value *Sel = CI->getArgOperand(2);
897       unsigned NumElts = CI->getType()->getVectorNumElements();
898       Constant *MinusOne = ConstantVector::getSplat(NumElts, Builder.getInt64(-1));
899       Value *NotSel = Builder.CreateXor(Sel, MinusOne);
900       Value *Sel0 = Builder.CreateAnd(Arg0, Sel);
901       Value *Sel1 = Builder.CreateAnd(Arg1, NotSel);
902       Rep = Builder.CreateOr(Sel0, Sel1);
903     } else if (IsX86 && Name == "sse42.crc32.64.8") {
904       Function *CRC32 = Intrinsic::getDeclaration(F->getParent(),
905                                                Intrinsic::x86_sse42_crc32_32_8);
906       Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C));
907       Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)});
908       Rep = Builder.CreateZExt(Rep, CI->getType(), "");
909     } else if (IsX86 && Name.startswith("avx.vbroadcast.s")) {
910       // Replace broadcasts with a series of insertelements.
911       Type *VecTy = CI->getType();
912       Type *EltTy = VecTy->getVectorElementType();
913       unsigned EltNum = VecTy->getVectorNumElements();
914       Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0),
915                                           EltTy->getPointerTo());
916       Value *Load = Builder.CreateLoad(EltTy, Cast);
917       Type *I32Ty = Type::getInt32Ty(C);
918       Rep = UndefValue::get(VecTy);
919       for (unsigned I = 0; I < EltNum; ++I)
920         Rep = Builder.CreateInsertElement(Rep, Load,
921                                           ConstantInt::get(I32Ty, I));
922     } else if (IsX86 && (Name.startswith("sse41.pmovsx") ||
923                          Name.startswith("sse41.pmovzx") ||
924                          Name.startswith("avx2.pmovsx") ||
925                          Name.startswith("avx2.pmovzx"))) {
926       VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType());
927       VectorType *DstTy = cast<VectorType>(CI->getType());
928       unsigned NumDstElts = DstTy->getNumElements();
929 
930       // Extract a subvector of the first NumDstElts lanes and sign/zero extend.
931       SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
932       for (unsigned i = 0; i != NumDstElts; ++i)
933         ShuffleMask[i] = i;
934 
935       Value *SV = Builder.CreateShuffleVector(
936           CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask);
937 
938       bool DoSext = (StringRef::npos != Name.find("pmovsx"));
939       Rep = DoSext ? Builder.CreateSExt(SV, DstTy)
940                    : Builder.CreateZExt(SV, DstTy);
941     } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") ||
942                          Name == "avx2.vbroadcasti128")) {
943       // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle.
944       Type *EltTy = CI->getType()->getVectorElementType();
945       unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits();
946       Type *VT = VectorType::get(EltTy, NumSrcElts);
947       Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
948                                             PointerType::getUnqual(VT));
949       Value *Load = Builder.CreateAlignedLoad(Op, 1);
950       if (NumSrcElts == 2)
951         Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
952                                           { 0, 1, 0, 1 });
953       else
954         Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
955                                           { 0, 1, 2, 3, 0, 1, 2, 3 });
956     } else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
957                          Name.startswith("avx2.vbroadcast") ||
958                          Name.startswith("avx512.pbroadcast") ||
959                          Name.startswith("avx512.mask.broadcast.s"))) {
960       // Replace vp?broadcasts with a vector shuffle.
961       Value *Op = CI->getArgOperand(0);
962       unsigned NumElts = CI->getType()->getVectorNumElements();
963       Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts);
964       Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()),
965                                         Constant::getNullValue(MaskTy));
966 
967       if (CI->getNumArgOperands() == 3)
968         Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
969                             CI->getArgOperand(1));
970     } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) {
971       Rep = UpgradeX86PALIGNRIntrinsics(Builder, CI->getArgOperand(0),
972                                         CI->getArgOperand(1),
973                                         CI->getArgOperand(2),
974                                         CI->getArgOperand(3),
975                                         CI->getArgOperand(4));
976     } else if (IsX86 && (Name == "sse2.psll.dq" ||
977                          Name == "avx2.psll.dq")) {
978       // 128/256-bit shift left specified in bits.
979       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
980       Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0),
981                                        Shift / 8); // Shift is in bits.
982     } else if (IsX86 && (Name == "sse2.psrl.dq" ||
983                          Name == "avx2.psrl.dq")) {
984       // 128/256-bit shift right specified in bits.
985       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
986       Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0),
987                                        Shift / 8); // Shift is in bits.
988     } else if (IsX86 && (Name == "sse2.psll.dq.bs" ||
989                          Name == "avx2.psll.dq.bs" ||
990                          Name == "avx512.psll.dq.512")) {
991       // 128/256/512-bit shift left specified in bytes.
992       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
993       Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
994     } else if (IsX86 && (Name == "sse2.psrl.dq.bs" ||
995                          Name == "avx2.psrl.dq.bs" ||
996                          Name == "avx512.psrl.dq.512")) {
997       // 128/256/512-bit shift right specified in bytes.
998       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
999       Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
1000     } else if (IsX86 && (Name == "sse41.pblendw" ||
1001                          Name.startswith("sse41.blendp") ||
1002                          Name.startswith("avx.blend.p") ||
1003                          Name == "avx2.pblendw" ||
1004                          Name.startswith("avx2.pblendd."))) {
1005       Value *Op0 = CI->getArgOperand(0);
1006       Value *Op1 = CI->getArgOperand(1);
1007       unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1008       VectorType *VecTy = cast<VectorType>(CI->getType());
1009       unsigned NumElts = VecTy->getNumElements();
1010 
1011       SmallVector<uint32_t, 16> Idxs(NumElts);
1012       for (unsigned i = 0; i != NumElts; ++i)
1013         Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i;
1014 
1015       Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1016     } else if (IsX86 && (Name.startswith("avx.vinsertf128.") ||
1017                          Name == "avx2.vinserti128")) {
1018       Value *Op0 = CI->getArgOperand(0);
1019       Value *Op1 = CI->getArgOperand(1);
1020       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1021       VectorType *VecTy = cast<VectorType>(CI->getType());
1022       unsigned NumElts = VecTy->getNumElements();
1023 
1024       // Mask off the high bits of the immediate value; hardware ignores those.
1025       Imm = Imm & 1;
1026 
1027       // Extend the second operand into a vector that is twice as big.
1028       Value *UndefV = UndefValue::get(Op1->getType());
1029       SmallVector<uint32_t, 8> Idxs(NumElts);
1030       for (unsigned i = 0; i != NumElts; ++i)
1031         Idxs[i] = i;
1032       Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs);
1033 
1034       // Insert the second operand into the first operand.
1035 
1036       // Note that there is no guarantee that instruction lowering will actually
1037       // produce a vinsertf128 instruction for the created shuffles. In
1038       // particular, the 0 immediate case involves no lane changes, so it can
1039       // be handled as a blend.
1040 
1041       // Example of shuffle mask for 32-bit elements:
1042       // Imm = 1  <i32 0, i32 1, i32 2,  i32 3,  i32 8, i32 9, i32 10, i32 11>
1043       // Imm = 0  <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6,  i32 7 >
1044 
1045       // The low half of the result is either the low half of the 1st operand
1046       // or the low half of the 2nd operand (the inserted vector).
1047       for (unsigned i = 0; i != NumElts / 2; ++i)
1048         Idxs[i] = Imm ? i : (i + NumElts);
1049       // The high half of the result is either the low half of the 2nd operand
1050       // (the inserted vector) or the high half of the 1st operand.
1051       for (unsigned i = NumElts / 2; i != NumElts; ++i)
1052         Idxs[i] = Imm ? (i + NumElts / 2) : i;
1053       Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs);
1054     } else if (IsX86 && (Name.startswith("avx.vextractf128.") ||
1055                          Name == "avx2.vextracti128")) {
1056       Value *Op0 = CI->getArgOperand(0);
1057       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1058       VectorType *VecTy = cast<VectorType>(CI->getType());
1059       unsigned NumElts = VecTy->getNumElements();
1060 
1061       // Mask off the high bits of the immediate value; hardware ignores those.
1062       Imm = Imm & 1;
1063 
1064       // Get indexes for either the high half or low half of the input vector.
1065       SmallVector<uint32_t, 4> Idxs(NumElts);
1066       for (unsigned i = 0; i != NumElts; ++i) {
1067         Idxs[i] = Imm ? (i + NumElts) : i;
1068       }
1069 
1070       Value *UndefV = UndefValue::get(Op0->getType());
1071       Rep = Builder.CreateShuffleVector(Op0, UndefV, Idxs);
1072     } else if (!IsX86 && Name == "stackprotectorcheck") {
1073       Rep = nullptr;
1074     } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") ||
1075                          Name.startswith("avx512.mask.perm.di."))) {
1076       Value *Op0 = CI->getArgOperand(0);
1077       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1078       VectorType *VecTy = cast<VectorType>(CI->getType());
1079       unsigned NumElts = VecTy->getNumElements();
1080 
1081       SmallVector<uint32_t, 8> Idxs(NumElts);
1082       for (unsigned i = 0; i != NumElts; ++i)
1083         Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3);
1084 
1085       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1086 
1087       if (CI->getNumArgOperands() == 4)
1088         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1089                             CI->getArgOperand(2));
1090     } else if (IsX86 && (Name.startswith("avx.vpermil.") ||
1091                          Name == "sse2.pshuf.d" ||
1092                          Name.startswith("avx512.mask.vpermil.p") ||
1093                          Name.startswith("avx512.mask.pshuf.d."))) {
1094       Value *Op0 = CI->getArgOperand(0);
1095       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1096       VectorType *VecTy = cast<VectorType>(CI->getType());
1097       unsigned NumElts = VecTy->getNumElements();
1098       // Calculate the size of each index in the immediate.
1099       unsigned IdxSize = 64 / VecTy->getScalarSizeInBits();
1100       unsigned IdxMask = ((1 << IdxSize) - 1);
1101 
1102       SmallVector<uint32_t, 8> Idxs(NumElts);
1103       // Lookup the bits for this element, wrapping around the immediate every
1104       // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need
1105       // to offset by the first index of each group.
1106       for (unsigned i = 0; i != NumElts; ++i)
1107         Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask);
1108 
1109       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1110 
1111       if (CI->getNumArgOperands() == 4)
1112         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1113                             CI->getArgOperand(2));
1114     } else if (IsX86 && (Name == "sse2.pshufl.w" ||
1115                          Name.startswith("avx512.mask.pshufl.w."))) {
1116       Value *Op0 = CI->getArgOperand(0);
1117       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1118       unsigned NumElts = CI->getType()->getVectorNumElements();
1119 
1120       SmallVector<uint32_t, 16> Idxs(NumElts);
1121       for (unsigned l = 0; l != NumElts; l += 8) {
1122         for (unsigned i = 0; i != 4; ++i)
1123           Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l;
1124         for (unsigned i = 4; i != 8; ++i)
1125           Idxs[i + l] = i + l;
1126       }
1127 
1128       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1129 
1130       if (CI->getNumArgOperands() == 4)
1131         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1132                             CI->getArgOperand(2));
1133     } else if (IsX86 && (Name == "sse2.pshufh.w" ||
1134                          Name.startswith("avx512.mask.pshufh.w."))) {
1135       Value *Op0 = CI->getArgOperand(0);
1136       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1137       unsigned NumElts = CI->getType()->getVectorNumElements();
1138 
1139       SmallVector<uint32_t, 16> Idxs(NumElts);
1140       for (unsigned l = 0; l != NumElts; l += 8) {
1141         for (unsigned i = 0; i != 4; ++i)
1142           Idxs[i + l] = i + l;
1143         for (unsigned i = 0; i != 4; ++i)
1144           Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l;
1145       }
1146 
1147       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1148 
1149       if (CI->getNumArgOperands() == 4)
1150         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1151                             CI->getArgOperand(2));
1152     } else if (IsX86 && (Name.startswith("avx512.mask.movddup") ||
1153                          Name.startswith("avx512.mask.movshdup") ||
1154                          Name.startswith("avx512.mask.movsldup"))) {
1155       Value *Op0 = CI->getArgOperand(0);
1156       unsigned NumElts = CI->getType()->getVectorNumElements();
1157       unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1158 
1159       unsigned Offset = 0;
1160       if (Name.startswith("avx512.mask.movshdup."))
1161         Offset = 1;
1162 
1163       SmallVector<uint32_t, 16> Idxs(NumElts);
1164       for (unsigned l = 0; l != NumElts; l += NumLaneElts)
1165         for (unsigned i = 0; i != NumLaneElts; i += 2) {
1166           Idxs[i + l + 0] = i + l + Offset;
1167           Idxs[i + l + 1] = i + l + Offset;
1168         }
1169 
1170       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1171 
1172       Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1173                           CI->getArgOperand(1));
1174     } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") ||
1175                          Name.startswith("avx512.mask.unpckl."))) {
1176       Value *Op0 = CI->getArgOperand(0);
1177       Value *Op1 = CI->getArgOperand(1);
1178       int NumElts = CI->getType()->getVectorNumElements();
1179       int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1180 
1181       SmallVector<uint32_t, 64> Idxs(NumElts);
1182       for (int l = 0; l != NumElts; l += NumLaneElts)
1183         for (int i = 0; i != NumLaneElts; ++i)
1184           Idxs[i + l] = l + (i / 2) + NumElts * (i % 2);
1185 
1186       Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1187 
1188       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1189                           CI->getArgOperand(2));
1190     } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") ||
1191                          Name.startswith("avx512.mask.unpckh."))) {
1192       Value *Op0 = CI->getArgOperand(0);
1193       Value *Op1 = CI->getArgOperand(1);
1194       int NumElts = CI->getType()->getVectorNumElements();
1195       int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1196 
1197       SmallVector<uint32_t, 64> Idxs(NumElts);
1198       for (int l = 0; l != NumElts; l += NumLaneElts)
1199         for (int i = 0; i != NumLaneElts; ++i)
1200           Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2);
1201 
1202       Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1203 
1204       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1205                           CI->getArgOperand(2));
1206     } else if (IsX86 && Name.startswith("avx512.mask.pand.")) {
1207       Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1));
1208       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1209                           CI->getArgOperand(2));
1210     } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) {
1211       Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)),
1212                               CI->getArgOperand(1));
1213       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1214                           CI->getArgOperand(2));
1215     } else if (IsX86 && Name.startswith("avx512.mask.por.")) {
1216       Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1));
1217       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1218                           CI->getArgOperand(2));
1219     } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) {
1220       Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1));
1221       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1222                           CI->getArgOperand(2));
1223     } else if (IsX86 && Name.startswith("avx512.mask.and.")) {
1224       VectorType *FTy = cast<VectorType>(CI->getType());
1225       VectorType *ITy = VectorType::getInteger(FTy);
1226       Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
1227                               Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1228       Rep = Builder.CreateBitCast(Rep, FTy);
1229       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1230                           CI->getArgOperand(2));
1231     } else if (IsX86 && Name.startswith("avx512.mask.andn.")) {
1232       VectorType *FTy = cast<VectorType>(CI->getType());
1233       VectorType *ITy = VectorType::getInteger(FTy);
1234       Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy));
1235       Rep = Builder.CreateAnd(Rep,
1236                               Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1237       Rep = Builder.CreateBitCast(Rep, FTy);
1238       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1239                           CI->getArgOperand(2));
1240     } else if (IsX86 && Name.startswith("avx512.mask.or.")) {
1241       VectorType *FTy = cast<VectorType>(CI->getType());
1242       VectorType *ITy = VectorType::getInteger(FTy);
1243       Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
1244                              Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1245       Rep = Builder.CreateBitCast(Rep, FTy);
1246       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1247                           CI->getArgOperand(2));
1248     } else if (IsX86 && Name.startswith("avx512.mask.xor.")) {
1249       VectorType *FTy = cast<VectorType>(CI->getType());
1250       VectorType *ITy = VectorType::getInteger(FTy);
1251       Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy),
1252                               Builder.CreateBitCast(CI->getArgOperand(1), ITy));
1253       Rep = Builder.CreateBitCast(Rep, FTy);
1254       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1255                           CI->getArgOperand(2));
1256     } else if (IsX86 && Name.startswith("avx512.mask.padd.")) {
1257       Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1));
1258       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1259                           CI->getArgOperand(2));
1260     } else if (IsX86 && Name.startswith("avx512.mask.psub.")) {
1261       Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1));
1262       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1263                           CI->getArgOperand(2));
1264     } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) {
1265       Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1));
1266       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1267                           CI->getArgOperand(2));
1268     } else if (IsX86 && (Name.startswith("avx512.mask.add.pd.128") ||
1269                          Name.startswith("avx512.mask.add.pd.256") ||
1270                          Name.startswith("avx512.mask.add.ps.128") ||
1271                          Name.startswith("avx512.mask.add.ps.256"))) {
1272       Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1));
1273       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1274                           CI->getArgOperand(2));
1275     } else if (IsX86 && (Name.startswith("avx512.mask.div.pd.128") ||
1276                          Name.startswith("avx512.mask.div.pd.256") ||
1277                          Name.startswith("avx512.mask.div.ps.128") ||
1278                          Name.startswith("avx512.mask.div.ps.256"))) {
1279       Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1));
1280       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1281                           CI->getArgOperand(2));
1282     } else if (IsX86 && (Name.startswith("avx512.mask.mul.pd.128") ||
1283                          Name.startswith("avx512.mask.mul.pd.256") ||
1284                          Name.startswith("avx512.mask.mul.ps.128") ||
1285                          Name.startswith("avx512.mask.mul.ps.256"))) {
1286       Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1));
1287       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1288                           CI->getArgOperand(2));
1289     } else if (IsX86 && (Name.startswith("avx512.mask.sub.pd.128") ||
1290                          Name.startswith("avx512.mask.sub.pd.256") ||
1291                          Name.startswith("avx512.mask.sub.ps.128") ||
1292                          Name.startswith("avx512.mask.sub.ps.256"))) {
1293       Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1));
1294       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1295                           CI->getArgOperand(2));
1296     } else {
1297       llvm_unreachable("Unknown function for CallInst upgrade.");
1298     }
1299 
1300     if (Rep)
1301       CI->replaceAllUsesWith(Rep);
1302     CI->eraseFromParent();
1303     return;
1304   }
1305 
1306   std::string Name = CI->getName();
1307   if (!Name.empty())
1308     CI->setName(Name + ".old");
1309 
1310   switch (NewFn->getIntrinsicID()) {
1311   default:
1312     llvm_unreachable("Unknown function for CallInst upgrade.");
1313 
1314   case Intrinsic::x86_avx512_mask_psll_di_512:
1315   case Intrinsic::x86_avx512_mask_psra_di_512:
1316   case Intrinsic::x86_avx512_mask_psrl_di_512:
1317   case Intrinsic::x86_avx512_mask_psll_qi_512:
1318   case Intrinsic::x86_avx512_mask_psra_qi_512:
1319   case Intrinsic::x86_avx512_mask_psrl_qi_512:
1320   case Intrinsic::arm_neon_vld1:
1321   case Intrinsic::arm_neon_vld2:
1322   case Intrinsic::arm_neon_vld3:
1323   case Intrinsic::arm_neon_vld4:
1324   case Intrinsic::arm_neon_vld2lane:
1325   case Intrinsic::arm_neon_vld3lane:
1326   case Intrinsic::arm_neon_vld4lane:
1327   case Intrinsic::arm_neon_vst1:
1328   case Intrinsic::arm_neon_vst2:
1329   case Intrinsic::arm_neon_vst3:
1330   case Intrinsic::arm_neon_vst4:
1331   case Intrinsic::arm_neon_vst2lane:
1332   case Intrinsic::arm_neon_vst3lane:
1333   case Intrinsic::arm_neon_vst4lane: {
1334     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1335                                  CI->arg_operands().end());
1336     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args));
1337     CI->eraseFromParent();
1338     return;
1339   }
1340 
1341   case Intrinsic::ctlz:
1342   case Intrinsic::cttz:
1343     assert(CI->getNumArgOperands() == 1 &&
1344            "Mismatch between function args and call args");
1345     CI->replaceAllUsesWith(Builder.CreateCall(
1346         NewFn, {CI->getArgOperand(0), Builder.getFalse()}, Name));
1347     CI->eraseFromParent();
1348     return;
1349 
1350   case Intrinsic::objectsize:
1351     CI->replaceAllUsesWith(Builder.CreateCall(
1352         NewFn, {CI->getArgOperand(0), CI->getArgOperand(1)}, Name));
1353     CI->eraseFromParent();
1354     return;
1355 
1356   case Intrinsic::ctpop: {
1357     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)}));
1358     CI->eraseFromParent();
1359     return;
1360   }
1361 
1362   case Intrinsic::x86_xop_vfrcz_ss:
1363   case Intrinsic::x86_xop_vfrcz_sd:
1364     CI->replaceAllUsesWith(
1365         Builder.CreateCall(NewFn, {CI->getArgOperand(1)}, Name));
1366     CI->eraseFromParent();
1367     return;
1368 
1369   case Intrinsic::x86_xop_vpermil2pd:
1370   case Intrinsic::x86_xop_vpermil2ps:
1371   case Intrinsic::x86_xop_vpermil2pd_256:
1372   case Intrinsic::x86_xop_vpermil2ps_256: {
1373     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1374                                  CI->arg_operands().end());
1375     VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType());
1376     VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy);
1377     Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy);
1378     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args, Name));
1379     CI->eraseFromParent();
1380     return;
1381   }
1382 
1383   case Intrinsic::x86_sse41_ptestc:
1384   case Intrinsic::x86_sse41_ptestz:
1385   case Intrinsic::x86_sse41_ptestnzc: {
1386     // The arguments for these intrinsics used to be v4f32, and changed
1387     // to v2i64. This is purely a nop, since those are bitwise intrinsics.
1388     // So, the only thing required is a bitcast for both arguments.
1389     // First, check the arguments have the old type.
1390     Value *Arg0 = CI->getArgOperand(0);
1391     if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4))
1392       return;
1393 
1394     // Old intrinsic, add bitcasts
1395     Value *Arg1 = CI->getArgOperand(1);
1396 
1397     Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
1398 
1399     Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast");
1400     Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
1401 
1402     CallInst *NewCall = Builder.CreateCall(NewFn, {BC0, BC1}, Name);
1403     CI->replaceAllUsesWith(NewCall);
1404     CI->eraseFromParent();
1405     return;
1406   }
1407 
1408   case Intrinsic::x86_sse41_insertps:
1409   case Intrinsic::x86_sse41_dppd:
1410   case Intrinsic::x86_sse41_dpps:
1411   case Intrinsic::x86_sse41_mpsadbw:
1412   case Intrinsic::x86_avx_dp_ps_256:
1413   case Intrinsic::x86_avx2_mpsadbw: {
1414     // Need to truncate the last argument from i32 to i8 -- this argument models
1415     // an inherently 8-bit immediate operand to these x86 instructions.
1416     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1417                                  CI->arg_operands().end());
1418 
1419     // Replace the last argument with a trunc.
1420     Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc");
1421 
1422     CallInst *NewCall = Builder.CreateCall(NewFn, Args);
1423     CI->replaceAllUsesWith(NewCall);
1424     CI->eraseFromParent();
1425     return;
1426   }
1427 
1428   case Intrinsic::thread_pointer: {
1429     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {}));
1430     CI->eraseFromParent();
1431     return;
1432   }
1433 
1434   case Intrinsic::invariant_start:
1435   case Intrinsic::invariant_end:
1436   case Intrinsic::masked_load:
1437   case Intrinsic::masked_store: {
1438     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1439                                  CI->arg_operands().end());
1440     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args));
1441     CI->eraseFromParent();
1442     return;
1443   }
1444   }
1445 }
1446 
1447 void llvm::UpgradeCallsToIntrinsic(Function *F) {
1448   assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
1449 
1450   // Check if this function should be upgraded and get the replacement function
1451   // if there is one.
1452   Function *NewFn;
1453   if (UpgradeIntrinsicFunction(F, NewFn)) {
1454     // Replace all users of the old function with the new function or new
1455     // instructions. This is not a range loop because the call is deleted.
1456     for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; )
1457       if (CallInst *CI = dyn_cast<CallInst>(*UI++))
1458         UpgradeIntrinsicCall(CI, NewFn);
1459 
1460     // Remove old function, no longer used, from the module.
1461     F->eraseFromParent();
1462   }
1463 }
1464 
1465 void llvm::UpgradeInstWithTBAATag(Instruction *I) {
1466   MDNode *MD = I->getMetadata(LLVMContext::MD_tbaa);
1467   assert(MD && "UpgradeInstWithTBAATag should have a TBAA tag");
1468   // Check if the tag uses struct-path aware TBAA format.
1469   if (isa<MDNode>(MD->getOperand(0)) && MD->getNumOperands() >= 3)
1470     return;
1471 
1472   if (MD->getNumOperands() == 3) {
1473     Metadata *Elts[] = {MD->getOperand(0), MD->getOperand(1)};
1474     MDNode *ScalarType = MDNode::get(I->getContext(), Elts);
1475     // Create a MDNode <ScalarType, ScalarType, offset 0, const>
1476     Metadata *Elts2[] = {ScalarType, ScalarType,
1477                          ConstantAsMetadata::get(Constant::getNullValue(
1478                              Type::getInt64Ty(I->getContext()))),
1479                          MD->getOperand(2)};
1480     I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts2));
1481   } else {
1482     // Create a MDNode <MD, MD, offset 0>
1483     Metadata *Elts[] = {MD, MD, ConstantAsMetadata::get(Constant::getNullValue(
1484                                     Type::getInt64Ty(I->getContext())))};
1485     I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts));
1486   }
1487 }
1488 
1489 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy,
1490                                       Instruction *&Temp) {
1491   if (Opc != Instruction::BitCast)
1492     return nullptr;
1493 
1494   Temp = nullptr;
1495   Type *SrcTy = V->getType();
1496   if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
1497       SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
1498     LLVMContext &Context = V->getContext();
1499 
1500     // We have no information about target data layout, so we assume that
1501     // the maximum pointer size is 64bit.
1502     Type *MidTy = Type::getInt64Ty(Context);
1503     Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy);
1504 
1505     return CastInst::Create(Instruction::IntToPtr, Temp, DestTy);
1506   }
1507 
1508   return nullptr;
1509 }
1510 
1511 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) {
1512   if (Opc != Instruction::BitCast)
1513     return nullptr;
1514 
1515   Type *SrcTy = C->getType();
1516   if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
1517       SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
1518     LLVMContext &Context = C->getContext();
1519 
1520     // We have no information about target data layout, so we assume that
1521     // the maximum pointer size is 64bit.
1522     Type *MidTy = Type::getInt64Ty(Context);
1523 
1524     return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy),
1525                                      DestTy);
1526   }
1527 
1528   return nullptr;
1529 }
1530 
1531 /// Check the debug info version number, if it is out-dated, drop the debug
1532 /// info. Return true if module is modified.
1533 bool llvm::UpgradeDebugInfo(Module &M) {
1534   unsigned Version = getDebugMetadataVersionFromModule(M);
1535   if (Version == DEBUG_METADATA_VERSION)
1536     return false;
1537 
1538   bool RetCode = StripDebugInfo(M);
1539   if (RetCode) {
1540     DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version);
1541     M.getContext().diagnose(DiagVersion);
1542   }
1543   return RetCode;
1544 }
1545 
1546 bool llvm::UpgradeModuleFlags(Module &M) {
1547   const NamedMDNode *ModFlags = M.getModuleFlagsMetadata();
1548   if (!ModFlags)
1549     return false;
1550 
1551   bool HasObjCFlag = false, HasClassProperties = false;
1552   for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) {
1553     MDNode *Op = ModFlags->getOperand(I);
1554     if (Op->getNumOperands() < 2)
1555       continue;
1556     MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1));
1557     if (!ID)
1558       continue;
1559     if (ID->getString() == "Objective-C Image Info Version")
1560       HasObjCFlag = true;
1561     if (ID->getString() == "Objective-C Class Properties")
1562       HasClassProperties = true;
1563   }
1564   // "Objective-C Class Properties" is recently added for Objective-C. We
1565   // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module
1566   // flag of value 0, so we can correclty report error when trying to link
1567   // an ObjC bitcode without this module flag with an ObjC bitcode with this
1568   // module flag.
1569   if (HasObjCFlag && !HasClassProperties) {
1570     M.addModuleFlag(llvm::Module::Error, "Objective-C Class Properties",
1571                     (uint32_t)0);
1572     return true;
1573   }
1574   return false;
1575 }
1576 
1577 static bool isOldLoopArgument(Metadata *MD) {
1578   auto *T = dyn_cast_or_null<MDTuple>(MD);
1579   if (!T)
1580     return false;
1581   if (T->getNumOperands() < 1)
1582     return false;
1583   auto *S = dyn_cast_or_null<MDString>(T->getOperand(0));
1584   if (!S)
1585     return false;
1586   return S->getString().startswith("llvm.vectorizer.");
1587 }
1588 
1589 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) {
1590   StringRef OldPrefix = "llvm.vectorizer.";
1591   assert(OldTag.startswith(OldPrefix) && "Expected old prefix");
1592 
1593   if (OldTag == "llvm.vectorizer.unroll")
1594     return MDString::get(C, "llvm.loop.interleave.count");
1595 
1596   return MDString::get(
1597       C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size()))
1598              .str());
1599 }
1600 
1601 static Metadata *upgradeLoopArgument(Metadata *MD) {
1602   auto *T = dyn_cast_or_null<MDTuple>(MD);
1603   if (!T)
1604     return MD;
1605   if (T->getNumOperands() < 1)
1606     return MD;
1607   auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0));
1608   if (!OldTag)
1609     return MD;
1610   if (!OldTag->getString().startswith("llvm.vectorizer."))
1611     return MD;
1612 
1613   // This has an old tag.  Upgrade it.
1614   SmallVector<Metadata *, 8> Ops;
1615   Ops.reserve(T->getNumOperands());
1616   Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString()));
1617   for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I)
1618     Ops.push_back(T->getOperand(I));
1619 
1620   return MDTuple::get(T->getContext(), Ops);
1621 }
1622 
1623 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) {
1624   auto *T = dyn_cast<MDTuple>(&N);
1625   if (!T)
1626     return &N;
1627 
1628   if (none_of(T->operands(), isOldLoopArgument))
1629     return &N;
1630 
1631   SmallVector<Metadata *, 8> Ops;
1632   Ops.reserve(T->getNumOperands());
1633   for (Metadata *MD : T->operands())
1634     Ops.push_back(upgradeLoopArgument(MD));
1635 
1636   return MDTuple::get(T->getContext(), Ops);
1637 }
1638