1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the auto-upgrade helper functions. 10 // This is where deprecated IR intrinsics and other IR features are updated to 11 // current specifications. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/IR/AutoUpgrade.h" 16 #include "llvm/ADT/StringSwitch.h" 17 #include "llvm/IR/Constants.h" 18 #include "llvm/IR/DIBuilder.h" 19 #include "llvm/IR/DebugInfo.h" 20 #include "llvm/IR/DiagnosticInfo.h" 21 #include "llvm/IR/Function.h" 22 #include "llvm/IR/IRBuilder.h" 23 #include "llvm/IR/Instruction.h" 24 #include "llvm/IR/IntrinsicInst.h" 25 #include "llvm/IR/IntrinsicsAArch64.h" 26 #include "llvm/IR/IntrinsicsARM.h" 27 #include "llvm/IR/IntrinsicsX86.h" 28 #include "llvm/IR/LLVMContext.h" 29 #include "llvm/IR/Module.h" 30 #include "llvm/IR/Verifier.h" 31 #include "llvm/Support/ErrorHandling.h" 32 #include "llvm/Support/Regex.h" 33 #include <cstring> 34 using namespace llvm; 35 36 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 37 38 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 39 // changed their type from v4f32 to v2i64. 40 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 41 Function *&NewFn) { 42 // Check whether this is an old version of the function, which received 43 // v4f32 arguments. 44 Type *Arg0Type = F->getFunctionType()->getParamType(0); 45 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 46 return false; 47 48 // Yes, it's old, replace it with new version. 49 rename(F); 50 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 51 return true; 52 } 53 54 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 55 // arguments have changed their type from i32 to i8. 56 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 57 Function *&NewFn) { 58 // Check that the last argument is an i32. 59 Type *LastArgType = F->getFunctionType()->getParamType( 60 F->getFunctionType()->getNumParams() - 1); 61 if (!LastArgType->isIntegerTy(32)) 62 return false; 63 64 // Move this function aside and map down. 65 rename(F); 66 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 67 return true; 68 } 69 70 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 71 // All of the intrinsics matches below should be marked with which llvm 72 // version started autoupgrading them. At some point in the future we would 73 // like to use this information to remove upgrade code for some older 74 // intrinsics. It is currently undecided how we will determine that future 75 // point. 76 if (Name == "addcarryx.u32" || // Added in 8.0 77 Name == "addcarryx.u64" || // Added in 8.0 78 Name == "addcarry.u32" || // Added in 8.0 79 Name == "addcarry.u64" || // Added in 8.0 80 Name == "subborrow.u32" || // Added in 8.0 81 Name == "subborrow.u64" || // Added in 8.0 82 Name.startswith("sse2.padds.") || // Added in 8.0 83 Name.startswith("sse2.psubs.") || // Added in 8.0 84 Name.startswith("sse2.paddus.") || // Added in 8.0 85 Name.startswith("sse2.psubus.") || // Added in 8.0 86 Name.startswith("avx2.padds.") || // Added in 8.0 87 Name.startswith("avx2.psubs.") || // Added in 8.0 88 Name.startswith("avx2.paddus.") || // Added in 8.0 89 Name.startswith("avx2.psubus.") || // Added in 8.0 90 Name.startswith("avx512.padds.") || // Added in 8.0 91 Name.startswith("avx512.psubs.") || // Added in 8.0 92 Name.startswith("avx512.mask.padds.") || // Added in 8.0 93 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 94 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 95 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 96 Name=="ssse3.pabs.b.128" || // Added in 6.0 97 Name=="ssse3.pabs.w.128" || // Added in 6.0 98 Name=="ssse3.pabs.d.128" || // Added in 6.0 99 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 100 Name.startswith("fma.vfmadd.") || // Added in 7.0 101 Name.startswith("fma.vfmsub.") || // Added in 7.0 102 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 103 Name.startswith("fma.vfnmadd.") || // Added in 7.0 104 Name.startswith("fma.vfnmsub.") || // Added in 7.0 105 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 106 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 107 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 108 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 109 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 110 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 111 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 112 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 113 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 114 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 115 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 116 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 117 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 118 Name.startswith("avx512.kunpck") || //added in 6.0 119 Name.startswith("avx2.pabs.") || // Added in 6.0 120 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 121 Name.startswith("avx512.broadcastm") || // Added in 6.0 122 Name == "sse.sqrt.ss" || // Added in 7.0 123 Name == "sse2.sqrt.sd" || // Added in 7.0 124 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 125 Name.startswith("avx.sqrt.p") || // Added in 7.0 126 Name.startswith("sse2.sqrt.p") || // Added in 7.0 127 Name.startswith("sse.sqrt.p") || // Added in 7.0 128 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 129 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 130 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 131 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 132 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 133 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 134 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 135 Name.startswith("avx.vperm2f128.") || // Added in 6.0 136 Name == "avx2.vperm2i128" || // Added in 6.0 137 Name == "sse.add.ss" || // Added in 4.0 138 Name == "sse2.add.sd" || // Added in 4.0 139 Name == "sse.sub.ss" || // Added in 4.0 140 Name == "sse2.sub.sd" || // Added in 4.0 141 Name == "sse.mul.ss" || // Added in 4.0 142 Name == "sse2.mul.sd" || // Added in 4.0 143 Name == "sse.div.ss" || // Added in 4.0 144 Name == "sse2.div.sd" || // Added in 4.0 145 Name == "sse41.pmaxsb" || // Added in 3.9 146 Name == "sse2.pmaxs.w" || // Added in 3.9 147 Name == "sse41.pmaxsd" || // Added in 3.9 148 Name == "sse2.pmaxu.b" || // Added in 3.9 149 Name == "sse41.pmaxuw" || // Added in 3.9 150 Name == "sse41.pmaxud" || // Added in 3.9 151 Name == "sse41.pminsb" || // Added in 3.9 152 Name == "sse2.pmins.w" || // Added in 3.9 153 Name == "sse41.pminsd" || // Added in 3.9 154 Name == "sse2.pminu.b" || // Added in 3.9 155 Name == "sse41.pminuw" || // Added in 3.9 156 Name == "sse41.pminud" || // Added in 3.9 157 Name == "avx512.kand.w" || // Added in 7.0 158 Name == "avx512.kandn.w" || // Added in 7.0 159 Name == "avx512.knot.w" || // Added in 7.0 160 Name == "avx512.kor.w" || // Added in 7.0 161 Name == "avx512.kxor.w" || // Added in 7.0 162 Name == "avx512.kxnor.w" || // Added in 7.0 163 Name == "avx512.kortestc.w" || // Added in 7.0 164 Name == "avx512.kortestz.w" || // Added in 7.0 165 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 166 Name.startswith("avx2.pmax") || // Added in 3.9 167 Name.startswith("avx2.pmin") || // Added in 3.9 168 Name.startswith("avx512.mask.pmax") || // Added in 4.0 169 Name.startswith("avx512.mask.pmin") || // Added in 4.0 170 Name.startswith("avx2.vbroadcast") || // Added in 3.8 171 Name.startswith("avx2.pbroadcast") || // Added in 3.8 172 Name.startswith("avx.vpermil.") || // Added in 3.1 173 Name.startswith("sse2.pshuf") || // Added in 3.9 174 Name.startswith("avx512.pbroadcast") || // Added in 3.9 175 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 176 Name.startswith("avx512.mask.movddup") || // Added in 3.9 177 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 178 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 179 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 180 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 181 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 182 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 183 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 184 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 185 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 186 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 187 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 188 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 189 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 190 Name.startswith("avx512.mask.pand.") || // Added in 3.9 191 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 192 Name.startswith("avx512.mask.por.") || // Added in 3.9 193 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 194 Name.startswith("avx512.mask.and.") || // Added in 3.9 195 Name.startswith("avx512.mask.andn.") || // Added in 3.9 196 Name.startswith("avx512.mask.or.") || // Added in 3.9 197 Name.startswith("avx512.mask.xor.") || // Added in 3.9 198 Name.startswith("avx512.mask.padd.") || // Added in 4.0 199 Name.startswith("avx512.mask.psub.") || // Added in 4.0 200 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 201 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 202 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 203 Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0 204 Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0 205 Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0 206 Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0 207 Name == "avx512.mask.vcvtph2ps.128" || // Added in 11.0 208 Name == "avx512.mask.vcvtph2ps.256" || // Added in 11.0 209 Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0 210 Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0 211 Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0 212 Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0 213 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 214 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 215 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 216 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 217 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 218 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 219 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 220 Name == "avx512.cvtusi2sd" || // Added in 7.0 221 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 222 Name == "sse2.pmulu.dq" || // Added in 7.0 223 Name == "sse41.pmuldq" || // Added in 7.0 224 Name == "avx2.pmulu.dq" || // Added in 7.0 225 Name == "avx2.pmul.dq" || // Added in 7.0 226 Name == "avx512.pmulu.dq.512" || // Added in 7.0 227 Name == "avx512.pmul.dq.512" || // Added in 7.0 228 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 229 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 230 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 231 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 232 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 233 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 234 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 235 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 236 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 237 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 238 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 239 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 240 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 241 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 242 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 243 Name.startswith("avx512.mask.cmp.p") || // Added in 7.0 244 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 245 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 246 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 247 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 248 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 249 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 250 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 251 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 252 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 253 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 254 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 255 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 256 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 257 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 258 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 259 Name.startswith("avx512.mask.pslli") || // Added in 4.0 260 Name.startswith("avx512.mask.psrai") || // Added in 4.0 261 Name.startswith("avx512.mask.psrli") || // Added in 4.0 262 Name.startswith("avx512.mask.psllv") || // Added in 4.0 263 Name.startswith("avx512.mask.psrav") || // Added in 4.0 264 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 265 Name.startswith("sse41.pmovsx") || // Added in 3.8 266 Name.startswith("sse41.pmovzx") || // Added in 3.9 267 Name.startswith("avx2.pmovsx") || // Added in 3.9 268 Name.startswith("avx2.pmovzx") || // Added in 3.9 269 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 270 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 271 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 272 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 273 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 274 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 275 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 276 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 277 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 278 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 279 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 280 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 281 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 282 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 283 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 284 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 285 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 286 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 287 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 289 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 290 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 291 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 292 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 293 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 294 Name.startswith("avx512.vpshld.") || // Added in 8.0 295 Name.startswith("avx512.vpshrd.") || // Added in 8.0 296 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 297 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 298 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 299 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 300 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 301 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 302 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 303 Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0 304 Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0 305 Name.startswith("avx512.mask.conflict.") || // Added in 9.0 306 Name == "avx512.mask.pmov.qd.256" || // Added in 9.0 307 Name == "avx512.mask.pmov.qd.512" || // Added in 9.0 308 Name == "avx512.mask.pmov.wb.256" || // Added in 9.0 309 Name == "avx512.mask.pmov.wb.512" || // Added in 9.0 310 Name == "sse.cvtsi2ss" || // Added in 7.0 311 Name == "sse.cvtsi642ss" || // Added in 7.0 312 Name == "sse2.cvtsi2sd" || // Added in 7.0 313 Name == "sse2.cvtsi642sd" || // Added in 7.0 314 Name == "sse2.cvtss2sd" || // Added in 7.0 315 Name == "sse2.cvtdq2pd" || // Added in 3.9 316 Name == "sse2.cvtdq2ps" || // Added in 7.0 317 Name == "sse2.cvtps2pd" || // Added in 3.9 318 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 319 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 320 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 321 Name.startswith("vcvtph2ps.") || // Added in 11.0 322 Name.startswith("avx.vinsertf128.") || // Added in 3.7 323 Name == "avx2.vinserti128" || // Added in 3.7 324 Name.startswith("avx512.mask.insert") || // Added in 4.0 325 Name.startswith("avx.vextractf128.") || // Added in 3.7 326 Name == "avx2.vextracti128" || // Added in 3.7 327 Name.startswith("avx512.mask.vextract") || // Added in 4.0 328 Name.startswith("sse4a.movnt.") || // Added in 3.9 329 Name.startswith("avx.movnt.") || // Added in 3.2 330 Name.startswith("avx512.storent.") || // Added in 3.9 331 Name == "sse41.movntdqa" || // Added in 5.0 332 Name == "avx2.movntdqa" || // Added in 5.0 333 Name == "avx512.movntdqa" || // Added in 5.0 334 Name == "sse2.storel.dq" || // Added in 3.9 335 Name.startswith("sse.storeu.") || // Added in 3.9 336 Name.startswith("sse2.storeu.") || // Added in 3.9 337 Name.startswith("avx.storeu.") || // Added in 3.9 338 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 339 Name.startswith("avx512.mask.store.p") || // Added in 3.9 340 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 341 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 342 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 343 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 344 Name == "avx512.mask.store.ss" || // Added in 7.0 345 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 346 Name.startswith("avx512.mask.load.") || // Added in 3.9 347 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 348 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 349 Name.startswith("avx512.mask.expand.b") || // Added in 9.0 350 Name.startswith("avx512.mask.expand.w") || // Added in 9.0 351 Name.startswith("avx512.mask.expand.d") || // Added in 9.0 352 Name.startswith("avx512.mask.expand.q") || // Added in 9.0 353 Name.startswith("avx512.mask.expand.p") || // Added in 9.0 354 Name.startswith("avx512.mask.compress.b") || // Added in 9.0 355 Name.startswith("avx512.mask.compress.w") || // Added in 9.0 356 Name.startswith("avx512.mask.compress.d") || // Added in 9.0 357 Name.startswith("avx512.mask.compress.q") || // Added in 9.0 358 Name.startswith("avx512.mask.compress.p") || // Added in 9.0 359 Name == "sse42.crc32.64.8" || // Added in 3.4 360 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 361 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 362 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 363 Name.startswith("avx512.mask.valign.") || // Added in 4.0 364 Name.startswith("sse2.psll.dq") || // Added in 3.7 365 Name.startswith("sse2.psrl.dq") || // Added in 3.7 366 Name.startswith("avx2.psll.dq") || // Added in 3.7 367 Name.startswith("avx2.psrl.dq") || // Added in 3.7 368 Name.startswith("avx512.psll.dq") || // Added in 3.9 369 Name.startswith("avx512.psrl.dq") || // Added in 3.9 370 Name == "sse41.pblendw" || // Added in 3.7 371 Name.startswith("sse41.blendp") || // Added in 3.7 372 Name.startswith("avx.blend.p") || // Added in 3.7 373 Name == "avx2.pblendw" || // Added in 3.7 374 Name.startswith("avx2.pblendd.") || // Added in 3.7 375 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 376 Name == "avx2.vbroadcasti128" || // Added in 3.7 377 Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0 378 Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0 379 Name.startswith("avx512.mask.broadcastf32x8.") || // Added in 6.0 380 Name.startswith("avx512.mask.broadcastf64x4.") || // Added in 6.0 381 Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0 382 Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0 383 Name.startswith("avx512.mask.broadcasti32x8.") || // Added in 6.0 384 Name.startswith("avx512.mask.broadcasti64x4.") || // Added in 6.0 385 Name == "xop.vpcmov" || // Added in 3.8 386 Name == "xop.vpcmov.256" || // Added in 5.0 387 Name.startswith("avx512.mask.move.s") || // Added in 4.0 388 Name.startswith("avx512.cvtmask2") || // Added in 5.0 389 Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0 390 Name.startswith("xop.vprot") || // Added in 8.0 391 Name.startswith("avx512.prol") || // Added in 8.0 392 Name.startswith("avx512.pror") || // Added in 8.0 393 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 394 Name.startswith("avx512.mask.pror.") || // Added in 8.0 395 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 396 Name.startswith("avx512.mask.prol.") || // Added in 8.0 397 Name.startswith("avx512.ptestm") || //Added in 6.0 398 Name.startswith("avx512.ptestnm") || //Added in 6.0 399 Name.startswith("avx512.mask.pavg")) // Added in 6.0 400 return true; 401 402 return false; 403 } 404 405 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 406 Function *&NewFn) { 407 // Only handle intrinsics that start with "x86.". 408 if (!Name.startswith("x86.")) 409 return false; 410 // Remove "x86." prefix. 411 Name = Name.substr(4); 412 413 if (ShouldUpgradeX86Intrinsic(F, Name)) { 414 NewFn = nullptr; 415 return true; 416 } 417 418 if (Name == "rdtscp") { // Added in 8.0 419 // If this intrinsic has 0 operands, it's the new version. 420 if (F->getFunctionType()->getNumParams() == 0) 421 return false; 422 423 rename(F); 424 NewFn = Intrinsic::getDeclaration(F->getParent(), 425 Intrinsic::x86_rdtscp); 426 return true; 427 } 428 429 // SSE4.1 ptest functions may have an old signature. 430 if (Name.startswith("sse41.ptest")) { // Added in 3.2 431 if (Name.substr(11) == "c") 432 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 433 if (Name.substr(11) == "z") 434 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 435 if (Name.substr(11) == "nzc") 436 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 437 } 438 // Several blend and other instructions with masks used the wrong number of 439 // bits. 440 if (Name == "sse41.insertps") // Added in 3.6 441 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 442 NewFn); 443 if (Name == "sse41.dppd") // Added in 3.6 444 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 445 NewFn); 446 if (Name == "sse41.dpps") // Added in 3.6 447 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 448 NewFn); 449 if (Name == "sse41.mpsadbw") // Added in 3.6 450 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 451 NewFn); 452 if (Name == "avx.dp.ps.256") // Added in 3.6 453 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 454 NewFn); 455 if (Name == "avx2.mpsadbw") // Added in 3.6 456 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 457 NewFn); 458 459 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 460 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 461 rename(F); 462 NewFn = Intrinsic::getDeclaration(F->getParent(), 463 Intrinsic::x86_xop_vfrcz_ss); 464 return true; 465 } 466 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 467 rename(F); 468 NewFn = Intrinsic::getDeclaration(F->getParent(), 469 Intrinsic::x86_xop_vfrcz_sd); 470 return true; 471 } 472 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 473 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 474 auto Idx = F->getFunctionType()->getParamType(2); 475 if (Idx->isFPOrFPVectorTy()) { 476 rename(F); 477 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 478 unsigned EltSize = Idx->getScalarSizeInBits(); 479 Intrinsic::ID Permil2ID; 480 if (EltSize == 64 && IdxSize == 128) 481 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 482 else if (EltSize == 32 && IdxSize == 128) 483 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 484 else if (EltSize == 64 && IdxSize == 256) 485 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 486 else 487 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 488 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 489 return true; 490 } 491 } 492 493 if (Name == "seh.recoverfp") { 494 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp); 495 return true; 496 } 497 498 return false; 499 } 500 501 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 502 assert(F && "Illegal to upgrade a non-existent Function."); 503 504 // Quickly eliminate it, if it's not a candidate. 505 StringRef Name = F->getName(); 506 if (Name.size() <= 8 || !Name.startswith("llvm.")) 507 return false; 508 Name = Name.substr(5); // Strip off "llvm." 509 510 switch (Name[0]) { 511 default: break; 512 case 'a': { 513 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 514 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 515 F->arg_begin()->getType()); 516 return true; 517 } 518 if (Name.startswith("arm.neon.vclz")) { 519 Type* args[2] = { 520 F->arg_begin()->getType(), 521 Type::getInt1Ty(F->getContext()) 522 }; 523 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 524 // the end of the name. Change name from llvm.arm.neon.vclz.* to 525 // llvm.ctlz.* 526 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 527 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 528 "llvm.ctlz." + Name.substr(14), F->getParent()); 529 return true; 530 } 531 if (Name.startswith("arm.neon.vcnt")) { 532 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 533 F->arg_begin()->getType()); 534 return true; 535 } 536 static const Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 537 if (vldRegex.match(Name)) { 538 auto fArgs = F->getFunctionType()->params(); 539 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 540 // Can't use Intrinsic::getDeclaration here as the return types might 541 // then only be structurally equal. 542 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 543 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 544 "llvm." + Name + ".p0i8", F->getParent()); 545 return true; 546 } 547 static const Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 548 if (vstRegex.match(Name)) { 549 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 550 Intrinsic::arm_neon_vst2, 551 Intrinsic::arm_neon_vst3, 552 Intrinsic::arm_neon_vst4}; 553 554 static const Intrinsic::ID StoreLaneInts[] = { 555 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 556 Intrinsic::arm_neon_vst4lane 557 }; 558 559 auto fArgs = F->getFunctionType()->params(); 560 Type *Tys[] = {fArgs[0], fArgs[1]}; 561 if (Name.find("lane") == StringRef::npos) 562 NewFn = Intrinsic::getDeclaration(F->getParent(), 563 StoreInts[fArgs.size() - 3], Tys); 564 else 565 NewFn = Intrinsic::getDeclaration(F->getParent(), 566 StoreLaneInts[fArgs.size() - 5], Tys); 567 return true; 568 } 569 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 570 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 571 return true; 572 } 573 if (Name.startswith("arm.neon.vqadds.")) { 574 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sadd_sat, 575 F->arg_begin()->getType()); 576 return true; 577 } 578 if (Name.startswith("arm.neon.vqaddu.")) { 579 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::uadd_sat, 580 F->arg_begin()->getType()); 581 return true; 582 } 583 if (Name.startswith("arm.neon.vqsubs.")) { 584 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ssub_sat, 585 F->arg_begin()->getType()); 586 return true; 587 } 588 if (Name.startswith("arm.neon.vqsubu.")) { 589 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::usub_sat, 590 F->arg_begin()->getType()); 591 return true; 592 } 593 if (Name.startswith("aarch64.neon.addp")) { 594 if (F->arg_size() != 2) 595 break; // Invalid IR. 596 VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); 597 if (Ty && Ty->getElementType()->isFloatingPointTy()) { 598 NewFn = Intrinsic::getDeclaration(F->getParent(), 599 Intrinsic::aarch64_neon_faddp, Ty); 600 return true; 601 } 602 } 603 break; 604 } 605 606 case 'c': { 607 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 608 rename(F); 609 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 610 F->arg_begin()->getType()); 611 return true; 612 } 613 if (Name.startswith("cttz.") && F->arg_size() == 1) { 614 rename(F); 615 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 616 F->arg_begin()->getType()); 617 return true; 618 } 619 break; 620 } 621 case 'd': { 622 if (Name == "dbg.value" && F->arg_size() == 4) { 623 rename(F); 624 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 625 return true; 626 } 627 break; 628 } 629 case 'e': { 630 SmallVector<StringRef, 2> Groups; 631 static const Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+"); 632 if (R.match(Name, &Groups)) { 633 Intrinsic::ID ID = Intrinsic::not_intrinsic; 634 if (Groups[1] == "fadd") 635 ID = Intrinsic::experimental_vector_reduce_v2_fadd; 636 if (Groups[1] == "fmul") 637 ID = Intrinsic::experimental_vector_reduce_v2_fmul; 638 639 if (ID != Intrinsic::not_intrinsic) { 640 rename(F); 641 auto Args = F->getFunctionType()->params(); 642 Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]}; 643 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys); 644 return true; 645 } 646 } 647 break; 648 } 649 case 'i': 650 case 'l': { 651 bool IsLifetimeStart = Name.startswith("lifetime.start"); 652 if (IsLifetimeStart || Name.startswith("invariant.start")) { 653 Intrinsic::ID ID = IsLifetimeStart ? 654 Intrinsic::lifetime_start : Intrinsic::invariant_start; 655 auto Args = F->getFunctionType()->params(); 656 Type* ObjectPtr[1] = {Args[1]}; 657 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 658 rename(F); 659 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 660 return true; 661 } 662 } 663 664 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 665 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 666 Intrinsic::ID ID = IsLifetimeEnd ? 667 Intrinsic::lifetime_end : Intrinsic::invariant_end; 668 669 auto Args = F->getFunctionType()->params(); 670 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 671 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 672 rename(F); 673 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 674 return true; 675 } 676 } 677 if (Name.startswith("invariant.group.barrier")) { 678 // Rename invariant.group.barrier to launder.invariant.group 679 auto Args = F->getFunctionType()->params(); 680 Type* ObjectPtr[1] = {Args[0]}; 681 rename(F); 682 NewFn = Intrinsic::getDeclaration(F->getParent(), 683 Intrinsic::launder_invariant_group, ObjectPtr); 684 return true; 685 686 } 687 688 break; 689 } 690 case 'm': { 691 if (Name.startswith("masked.load.")) { 692 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 693 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 694 rename(F); 695 NewFn = Intrinsic::getDeclaration(F->getParent(), 696 Intrinsic::masked_load, 697 Tys); 698 return true; 699 } 700 } 701 if (Name.startswith("masked.store.")) { 702 auto Args = F->getFunctionType()->params(); 703 Type *Tys[] = { Args[0], Args[1] }; 704 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 705 rename(F); 706 NewFn = Intrinsic::getDeclaration(F->getParent(), 707 Intrinsic::masked_store, 708 Tys); 709 return true; 710 } 711 } 712 // Renaming gather/scatter intrinsics with no address space overloading 713 // to the new overload which includes an address space 714 if (Name.startswith("masked.gather.")) { 715 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 716 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 717 rename(F); 718 NewFn = Intrinsic::getDeclaration(F->getParent(), 719 Intrinsic::masked_gather, Tys); 720 return true; 721 } 722 } 723 if (Name.startswith("masked.scatter.")) { 724 auto Args = F->getFunctionType()->params(); 725 Type *Tys[] = {Args[0], Args[1]}; 726 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 727 rename(F); 728 NewFn = Intrinsic::getDeclaration(F->getParent(), 729 Intrinsic::masked_scatter, Tys); 730 return true; 731 } 732 } 733 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 734 // alignment parameter to embedding the alignment as an attribute of 735 // the pointer args. 736 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 737 rename(F); 738 // Get the types of dest, src, and len 739 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 740 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 741 ParamTypes); 742 return true; 743 } 744 if (Name.startswith("memmove.") && F->arg_size() == 5) { 745 rename(F); 746 // Get the types of dest, src, and len 747 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 748 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 749 ParamTypes); 750 return true; 751 } 752 if (Name.startswith("memset.") && F->arg_size() == 5) { 753 rename(F); 754 // Get the types of dest, and len 755 const auto *FT = F->getFunctionType(); 756 Type *ParamTypes[2] = { 757 FT->getParamType(0), // Dest 758 FT->getParamType(2) // len 759 }; 760 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 761 ParamTypes); 762 return true; 763 } 764 break; 765 } 766 case 'n': { 767 if (Name.startswith("nvvm.")) { 768 Name = Name.substr(5); 769 770 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 771 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 772 .Cases("brev32", "brev64", Intrinsic::bitreverse) 773 .Case("clz.i", Intrinsic::ctlz) 774 .Case("popc.i", Intrinsic::ctpop) 775 .Default(Intrinsic::not_intrinsic); 776 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 777 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 778 {F->getReturnType()}); 779 return true; 780 } 781 782 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 783 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 784 // 785 // TODO: We could add lohi.i2d. 786 bool Expand = StringSwitch<bool>(Name) 787 .Cases("abs.i", "abs.ll", true) 788 .Cases("clz.ll", "popc.ll", "h2f", true) 789 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 790 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 791 .StartsWith("atomic.load.add.f32.p", true) 792 .StartsWith("atomic.load.add.f64.p", true) 793 .Default(false); 794 if (Expand) { 795 NewFn = nullptr; 796 return true; 797 } 798 } 799 break; 800 } 801 case 'o': 802 // We only need to change the name to match the mangling including the 803 // address space. 804 if (Name.startswith("objectsize.")) { 805 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 806 if (F->arg_size() == 2 || F->arg_size() == 3 || 807 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 808 rename(F); 809 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 810 Tys); 811 return true; 812 } 813 } 814 break; 815 816 case 'p': 817 if (Name == "prefetch") { 818 // Handle address space overloading. 819 Type *Tys[] = {F->arg_begin()->getType()}; 820 if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { 821 rename(F); 822 NewFn = 823 Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); 824 return true; 825 } 826 } 827 break; 828 829 case 's': 830 if (Name == "stackprotectorcheck") { 831 NewFn = nullptr; 832 return true; 833 } 834 break; 835 836 case 'x': 837 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 838 return true; 839 } 840 // Remangle our intrinsic since we upgrade the mangling 841 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 842 if (Result != None) { 843 NewFn = Result.getValue(); 844 return true; 845 } 846 847 // This may not belong here. This function is effectively being overloaded 848 // to both detect an intrinsic which needs upgrading, and to provide the 849 // upgraded form of the intrinsic. We should perhaps have two separate 850 // functions for this. 851 return false; 852 } 853 854 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 855 NewFn = nullptr; 856 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 857 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 858 859 // Upgrade intrinsic attributes. This does not change the function. 860 if (NewFn) 861 F = NewFn; 862 if (Intrinsic::ID id = F->getIntrinsicID()) 863 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 864 return Upgraded; 865 } 866 867 GlobalVariable *llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 868 if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" || 869 GV->getName() == "llvm.global_dtors")) || 870 !GV->hasInitializer()) 871 return nullptr; 872 ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType()); 873 if (!ATy) 874 return nullptr; 875 StructType *STy = dyn_cast<StructType>(ATy->getElementType()); 876 if (!STy || STy->getNumElements() != 2) 877 return nullptr; 878 879 LLVMContext &C = GV->getContext(); 880 IRBuilder<> IRB(C); 881 auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1), 882 IRB.getInt8PtrTy()); 883 Constant *Init = GV->getInitializer(); 884 unsigned N = Init->getNumOperands(); 885 std::vector<Constant *> NewCtors(N); 886 for (unsigned i = 0; i != N; ++i) { 887 auto Ctor = cast<Constant>(Init->getOperand(i)); 888 NewCtors[i] = ConstantStruct::get( 889 EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1), 890 Constant::getNullValue(IRB.getInt8PtrTy())); 891 } 892 Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors); 893 894 return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(), 895 NewInit, GV->getName()); 896 } 897 898 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 899 // to byte shuffles. 900 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 901 Value *Op, unsigned Shift) { 902 auto *ResultTy = cast<VectorType>(Op->getType()); 903 unsigned NumElts = ResultTy->getNumElements() * 8; 904 905 // Bitcast from a 64-bit element type to a byte element type. 906 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 907 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 908 909 // We'll be shuffling in zeroes. 910 Value *Res = Constant::getNullValue(VecTy); 911 912 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 913 // we'll just return the zero vector. 914 if (Shift < 16) { 915 uint32_t Idxs[64]; 916 // 256/512-bit version is split into 2/4 16-byte lanes. 917 for (unsigned l = 0; l != NumElts; l += 16) 918 for (unsigned i = 0; i != 16; ++i) { 919 unsigned Idx = NumElts + i - Shift; 920 if (Idx < NumElts) 921 Idx -= NumElts - 16; // end of lane, switch operand. 922 Idxs[l + i] = Idx + l; 923 } 924 925 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 926 } 927 928 // Bitcast back to a 64-bit element type. 929 return Builder.CreateBitCast(Res, ResultTy, "cast"); 930 } 931 932 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 933 // to byte shuffles. 934 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 935 unsigned Shift) { 936 auto *ResultTy = cast<VectorType>(Op->getType()); 937 unsigned NumElts = ResultTy->getNumElements() * 8; 938 939 // Bitcast from a 64-bit element type to a byte element type. 940 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 941 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 942 943 // We'll be shuffling in zeroes. 944 Value *Res = Constant::getNullValue(VecTy); 945 946 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 947 // we'll just return the zero vector. 948 if (Shift < 16) { 949 uint32_t Idxs[64]; 950 // 256/512-bit version is split into 2/4 16-byte lanes. 951 for (unsigned l = 0; l != NumElts; l += 16) 952 for (unsigned i = 0; i != 16; ++i) { 953 unsigned Idx = i + Shift; 954 if (Idx >= 16) 955 Idx += NumElts - 16; // end of lane, switch operand. 956 Idxs[l + i] = Idx + l; 957 } 958 959 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 960 } 961 962 // Bitcast back to a 64-bit element type. 963 return Builder.CreateBitCast(Res, ResultTy, "cast"); 964 } 965 966 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 967 unsigned NumElts) { 968 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 969 cast<IntegerType>(Mask->getType())->getBitWidth()); 970 Mask = Builder.CreateBitCast(Mask, MaskTy); 971 972 // If we have less than 8 elements, then the starting mask was an i8 and 973 // we need to extract down to the right number of elements. 974 if (NumElts < 8) { 975 uint32_t Indices[4]; 976 for (unsigned i = 0; i != NumElts; ++i) 977 Indices[i] = i; 978 Mask = Builder.CreateShuffleVector(Mask, Mask, 979 makeArrayRef(Indices, NumElts), 980 "extract"); 981 } 982 983 return Mask; 984 } 985 986 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 987 Value *Op0, Value *Op1) { 988 // If the mask is all ones just emit the first operation. 989 if (const auto *C = dyn_cast<Constant>(Mask)) 990 if (C->isAllOnesValue()) 991 return Op0; 992 993 Mask = getX86MaskVec(Builder, Mask, 994 cast<VectorType>(Op0->getType())->getNumElements()); 995 return Builder.CreateSelect(Mask, Op0, Op1); 996 } 997 998 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 999 Value *Op0, Value *Op1) { 1000 // If the mask is all ones just emit the first operation. 1001 if (const auto *C = dyn_cast<Constant>(Mask)) 1002 if (C->isAllOnesValue()) 1003 return Op0; 1004 1005 llvm::VectorType *MaskTy = 1006 llvm::VectorType::get(Builder.getInt1Ty(), 1007 Mask->getType()->getIntegerBitWidth()); 1008 Mask = Builder.CreateBitCast(Mask, MaskTy); 1009 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 1010 return Builder.CreateSelect(Mask, Op0, Op1); 1011 } 1012 1013 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 1014 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 1015 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 1016 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 1017 Value *Op1, Value *Shift, 1018 Value *Passthru, Value *Mask, 1019 bool IsVALIGN) { 1020 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 1021 1022 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1023 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 1024 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 1025 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 1026 1027 // Mask the immediate for VALIGN. 1028 if (IsVALIGN) 1029 ShiftVal &= (NumElts - 1); 1030 1031 // If palignr is shifting the pair of vectors more than the size of two 1032 // lanes, emit zero. 1033 if (ShiftVal >= 32) 1034 return llvm::Constant::getNullValue(Op0->getType()); 1035 1036 // If palignr is shifting the pair of input vectors more than one lane, 1037 // but less than two lanes, convert to shifting in zeroes. 1038 if (ShiftVal > 16) { 1039 ShiftVal -= 16; 1040 Op1 = Op0; 1041 Op0 = llvm::Constant::getNullValue(Op0->getType()); 1042 } 1043 1044 uint32_t Indices[64]; 1045 // 256-bit palignr operates on 128-bit lanes so we need to handle that 1046 for (unsigned l = 0; l < NumElts; l += 16) { 1047 for (unsigned i = 0; i != 16; ++i) { 1048 unsigned Idx = ShiftVal + i; 1049 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 1050 Idx += NumElts - 16; // End of lane, switch operand. 1051 Indices[l + i] = Idx + l; 1052 } 1053 } 1054 1055 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 1056 makeArrayRef(Indices, NumElts), 1057 "palignr"); 1058 1059 return EmitX86Select(Builder, Mask, Align, Passthru); 1060 } 1061 1062 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 1063 bool ZeroMask, bool IndexForm) { 1064 Type *Ty = CI.getType(); 1065 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 1066 unsigned EltWidth = Ty->getScalarSizeInBits(); 1067 bool IsFloat = Ty->isFPOrFPVectorTy(); 1068 Intrinsic::ID IID; 1069 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 1070 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 1071 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 1072 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 1073 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 1074 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 1075 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 1076 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 1077 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1078 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 1079 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1080 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 1081 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1082 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 1083 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1084 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 1085 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1086 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 1087 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1088 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 1089 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1090 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 1091 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1092 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 1093 else if (VecWidth == 128 && EltWidth == 16) 1094 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 1095 else if (VecWidth == 256 && EltWidth == 16) 1096 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 1097 else if (VecWidth == 512 && EltWidth == 16) 1098 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 1099 else if (VecWidth == 128 && EltWidth == 8) 1100 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 1101 else if (VecWidth == 256 && EltWidth == 8) 1102 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 1103 else if (VecWidth == 512 && EltWidth == 8) 1104 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 1105 else 1106 llvm_unreachable("Unexpected intrinsic"); 1107 1108 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 1109 CI.getArgOperand(2) }; 1110 1111 // If this isn't index form we need to swap operand 0 and 1. 1112 if (!IndexForm) 1113 std::swap(Args[0], Args[1]); 1114 1115 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1116 Args); 1117 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 1118 : Builder.CreateBitCast(CI.getArgOperand(1), 1119 Ty); 1120 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1121 } 1122 1123 static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1124 bool IsSigned, bool IsAddition) { 1125 Type *Ty = CI.getType(); 1126 Value *Op0 = CI.getOperand(0); 1127 Value *Op1 = CI.getOperand(1); 1128 1129 Intrinsic::ID IID = 1130 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 1131 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 1132 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1133 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1134 1135 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1136 Value *VecSrc = CI.getOperand(2); 1137 Value *Mask = CI.getOperand(3); 1138 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1139 } 1140 return Res; 1141 } 1142 1143 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1144 bool IsRotateRight) { 1145 Type *Ty = CI.getType(); 1146 Value *Src = CI.getArgOperand(0); 1147 Value *Amt = CI.getArgOperand(1); 1148 1149 // Amount may be scalar immediate, in which case create a splat vector. 1150 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1151 // we only care about the lowest log2 bits anyway. 1152 if (Amt->getType() != Ty) { 1153 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1154 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1155 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1156 } 1157 1158 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1159 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1160 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1161 1162 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1163 Value *VecSrc = CI.getOperand(2); 1164 Value *Mask = CI.getOperand(3); 1165 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1166 } 1167 return Res; 1168 } 1169 1170 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, 1171 bool IsSigned) { 1172 Type *Ty = CI.getType(); 1173 Value *LHS = CI.getArgOperand(0); 1174 Value *RHS = CI.getArgOperand(1); 1175 1176 CmpInst::Predicate Pred; 1177 switch (Imm) { 1178 case 0x0: 1179 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 1180 break; 1181 case 0x1: 1182 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 1183 break; 1184 case 0x2: 1185 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 1186 break; 1187 case 0x3: 1188 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 1189 break; 1190 case 0x4: 1191 Pred = ICmpInst::ICMP_EQ; 1192 break; 1193 case 0x5: 1194 Pred = ICmpInst::ICMP_NE; 1195 break; 1196 case 0x6: 1197 return Constant::getNullValue(Ty); // FALSE 1198 case 0x7: 1199 return Constant::getAllOnesValue(Ty); // TRUE 1200 default: 1201 llvm_unreachable("Unknown XOP vpcom/vpcomu predicate"); 1202 } 1203 1204 Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS); 1205 Value *Ext = Builder.CreateSExt(Cmp, Ty); 1206 return Ext; 1207 } 1208 1209 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1210 bool IsShiftRight, bool ZeroMask) { 1211 Type *Ty = CI.getType(); 1212 Value *Op0 = CI.getArgOperand(0); 1213 Value *Op1 = CI.getArgOperand(1); 1214 Value *Amt = CI.getArgOperand(2); 1215 1216 if (IsShiftRight) 1217 std::swap(Op0, Op1); 1218 1219 // Amount may be scalar immediate, in which case create a splat vector. 1220 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1221 // we only care about the lowest log2 bits anyway. 1222 if (Amt->getType() != Ty) { 1223 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1224 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1225 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1226 } 1227 1228 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1229 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1230 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1231 1232 unsigned NumArgs = CI.getNumArgOperands(); 1233 if (NumArgs >= 4) { // For masked intrinsics. 1234 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1235 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1236 CI.getArgOperand(0); 1237 Value *Mask = CI.getOperand(NumArgs - 1); 1238 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1239 } 1240 return Res; 1241 } 1242 1243 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1244 Value *Ptr, Value *Data, Value *Mask, 1245 bool Aligned) { 1246 // Cast the pointer to the right type. 1247 Ptr = Builder.CreateBitCast(Ptr, 1248 llvm::PointerType::getUnqual(Data->getType())); 1249 const Align Alignment = 1250 Aligned ? Align(cast<VectorType>(Data->getType())->getBitWidth() / 8) 1251 : Align(1); 1252 1253 // If the mask is all ones just emit a regular store. 1254 if (const auto *C = dyn_cast<Constant>(Mask)) 1255 if (C->isAllOnesValue()) 1256 return Builder.CreateAlignedStore(Data, Ptr, Alignment); 1257 1258 // Convert the mask from an integer type to a vector of i1. 1259 unsigned NumElts = cast<VectorType>(Data->getType())->getNumElements(); 1260 Mask = getX86MaskVec(Builder, Mask, NumElts); 1261 return Builder.CreateMaskedStore(Data, Ptr, Alignment, Mask); 1262 } 1263 1264 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1265 Value *Ptr, Value *Passthru, Value *Mask, 1266 bool Aligned) { 1267 Type *ValTy = Passthru->getType(); 1268 // Cast the pointer to the right type. 1269 Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); 1270 const Align Alignment = 1271 Aligned ? Align(cast<VectorType>(Passthru->getType())->getBitWidth() / 8) 1272 : Align(1); 1273 1274 // If the mask is all ones just emit a regular store. 1275 if (const auto *C = dyn_cast<Constant>(Mask)) 1276 if (C->isAllOnesValue()) 1277 return Builder.CreateAlignedLoad(ValTy, Ptr, Alignment); 1278 1279 // Convert the mask from an integer type to a vector of i1. 1280 unsigned NumElts = cast<VectorType>(Passthru->getType())->getNumElements(); 1281 Mask = getX86MaskVec(Builder, Mask, NumElts); 1282 return Builder.CreateMaskedLoad(Ptr, Alignment, Mask, Passthru); 1283 } 1284 1285 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1286 Value *Op0 = CI.getArgOperand(0); 1287 llvm::Type *Ty = Op0->getType(); 1288 Value *Zero = llvm::Constant::getNullValue(Ty); 1289 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 1290 Value *Neg = Builder.CreateNeg(Op0); 1291 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 1292 1293 if (CI.getNumArgOperands() == 3) 1294 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1295 1296 return Res; 1297 } 1298 1299 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1300 ICmpInst::Predicate Pred) { 1301 Value *Op0 = CI.getArgOperand(0); 1302 Value *Op1 = CI.getArgOperand(1); 1303 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1304 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1305 1306 if (CI.getNumArgOperands() == 4) 1307 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1308 1309 return Res; 1310 } 1311 1312 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1313 Type *Ty = CI.getType(); 1314 1315 // Arguments have a vXi32 type so cast to vXi64. 1316 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1317 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1318 1319 if (IsSigned) { 1320 // Shift left then arithmetic shift right. 1321 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1322 LHS = Builder.CreateShl(LHS, ShiftAmt); 1323 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1324 RHS = Builder.CreateShl(RHS, ShiftAmt); 1325 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1326 } else { 1327 // Clear the upper bits. 1328 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1329 LHS = Builder.CreateAnd(LHS, Mask); 1330 RHS = Builder.CreateAnd(RHS, Mask); 1331 } 1332 1333 Value *Res = Builder.CreateMul(LHS, RHS); 1334 1335 if (CI.getNumArgOperands() == 4) 1336 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1337 1338 return Res; 1339 } 1340 1341 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1342 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1343 Value *Mask) { 1344 unsigned NumElts = cast<VectorType>(Vec->getType())->getNumElements(); 1345 if (Mask) { 1346 const auto *C = dyn_cast<Constant>(Mask); 1347 if (!C || !C->isAllOnesValue()) 1348 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1349 } 1350 1351 if (NumElts < 8) { 1352 uint32_t Indices[8]; 1353 for (unsigned i = 0; i != NumElts; ++i) 1354 Indices[i] = i; 1355 for (unsigned i = NumElts; i != 8; ++i) 1356 Indices[i] = NumElts + i % NumElts; 1357 Vec = Builder.CreateShuffleVector(Vec, 1358 Constant::getNullValue(Vec->getType()), 1359 Indices); 1360 } 1361 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1362 } 1363 1364 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1365 unsigned CC, bool Signed) { 1366 Value *Op0 = CI.getArgOperand(0); 1367 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1368 1369 Value *Cmp; 1370 if (CC == 3) { 1371 Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1372 } else if (CC == 7) { 1373 Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1374 } else { 1375 ICmpInst::Predicate Pred; 1376 switch (CC) { 1377 default: llvm_unreachable("Unknown condition code"); 1378 case 0: Pred = ICmpInst::ICMP_EQ; break; 1379 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1380 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1381 case 4: Pred = ICmpInst::ICMP_NE; break; 1382 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1383 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1384 } 1385 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1386 } 1387 1388 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1389 1390 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1391 } 1392 1393 // Replace a masked intrinsic with an older unmasked intrinsic. 1394 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1395 Intrinsic::ID IID) { 1396 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1397 Value *Rep = Builder.CreateCall(Intrin, 1398 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1399 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1400 } 1401 1402 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1403 Value* A = CI.getArgOperand(0); 1404 Value* B = CI.getArgOperand(1); 1405 Value* Src = CI.getArgOperand(2); 1406 Value* Mask = CI.getArgOperand(3); 1407 1408 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1409 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1410 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1411 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1412 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1413 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1414 } 1415 1416 1417 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1418 Value* Op = CI.getArgOperand(0); 1419 Type* ReturnOp = CI.getType(); 1420 unsigned NumElts = cast<VectorType>(CI.getType())->getNumElements(); 1421 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1422 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1423 } 1424 1425 // Replace intrinsic with unmasked version and a select. 1426 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1427 CallInst &CI, Value *&Rep) { 1428 Name = Name.substr(12); // Remove avx512.mask. 1429 1430 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1431 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1432 Intrinsic::ID IID; 1433 if (Name.startswith("max.p")) { 1434 if (VecWidth == 128 && EltWidth == 32) 1435 IID = Intrinsic::x86_sse_max_ps; 1436 else if (VecWidth == 128 && EltWidth == 64) 1437 IID = Intrinsic::x86_sse2_max_pd; 1438 else if (VecWidth == 256 && EltWidth == 32) 1439 IID = Intrinsic::x86_avx_max_ps_256; 1440 else if (VecWidth == 256 && EltWidth == 64) 1441 IID = Intrinsic::x86_avx_max_pd_256; 1442 else 1443 llvm_unreachable("Unexpected intrinsic"); 1444 } else if (Name.startswith("min.p")) { 1445 if (VecWidth == 128 && EltWidth == 32) 1446 IID = Intrinsic::x86_sse_min_ps; 1447 else if (VecWidth == 128 && EltWidth == 64) 1448 IID = Intrinsic::x86_sse2_min_pd; 1449 else if (VecWidth == 256 && EltWidth == 32) 1450 IID = Intrinsic::x86_avx_min_ps_256; 1451 else if (VecWidth == 256 && EltWidth == 64) 1452 IID = Intrinsic::x86_avx_min_pd_256; 1453 else 1454 llvm_unreachable("Unexpected intrinsic"); 1455 } else if (Name.startswith("pshuf.b.")) { 1456 if (VecWidth == 128) 1457 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1458 else if (VecWidth == 256) 1459 IID = Intrinsic::x86_avx2_pshuf_b; 1460 else if (VecWidth == 512) 1461 IID = Intrinsic::x86_avx512_pshuf_b_512; 1462 else 1463 llvm_unreachable("Unexpected intrinsic"); 1464 } else if (Name.startswith("pmul.hr.sw.")) { 1465 if (VecWidth == 128) 1466 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1467 else if (VecWidth == 256) 1468 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1469 else if (VecWidth == 512) 1470 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1471 else 1472 llvm_unreachable("Unexpected intrinsic"); 1473 } else if (Name.startswith("pmulh.w.")) { 1474 if (VecWidth == 128) 1475 IID = Intrinsic::x86_sse2_pmulh_w; 1476 else if (VecWidth == 256) 1477 IID = Intrinsic::x86_avx2_pmulh_w; 1478 else if (VecWidth == 512) 1479 IID = Intrinsic::x86_avx512_pmulh_w_512; 1480 else 1481 llvm_unreachable("Unexpected intrinsic"); 1482 } else if (Name.startswith("pmulhu.w.")) { 1483 if (VecWidth == 128) 1484 IID = Intrinsic::x86_sse2_pmulhu_w; 1485 else if (VecWidth == 256) 1486 IID = Intrinsic::x86_avx2_pmulhu_w; 1487 else if (VecWidth == 512) 1488 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1489 else 1490 llvm_unreachable("Unexpected intrinsic"); 1491 } else if (Name.startswith("pmaddw.d.")) { 1492 if (VecWidth == 128) 1493 IID = Intrinsic::x86_sse2_pmadd_wd; 1494 else if (VecWidth == 256) 1495 IID = Intrinsic::x86_avx2_pmadd_wd; 1496 else if (VecWidth == 512) 1497 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1498 else 1499 llvm_unreachable("Unexpected intrinsic"); 1500 } else if (Name.startswith("pmaddubs.w.")) { 1501 if (VecWidth == 128) 1502 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1503 else if (VecWidth == 256) 1504 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1505 else if (VecWidth == 512) 1506 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1507 else 1508 llvm_unreachable("Unexpected intrinsic"); 1509 } else if (Name.startswith("packsswb.")) { 1510 if (VecWidth == 128) 1511 IID = Intrinsic::x86_sse2_packsswb_128; 1512 else if (VecWidth == 256) 1513 IID = Intrinsic::x86_avx2_packsswb; 1514 else if (VecWidth == 512) 1515 IID = Intrinsic::x86_avx512_packsswb_512; 1516 else 1517 llvm_unreachable("Unexpected intrinsic"); 1518 } else if (Name.startswith("packssdw.")) { 1519 if (VecWidth == 128) 1520 IID = Intrinsic::x86_sse2_packssdw_128; 1521 else if (VecWidth == 256) 1522 IID = Intrinsic::x86_avx2_packssdw; 1523 else if (VecWidth == 512) 1524 IID = Intrinsic::x86_avx512_packssdw_512; 1525 else 1526 llvm_unreachable("Unexpected intrinsic"); 1527 } else if (Name.startswith("packuswb.")) { 1528 if (VecWidth == 128) 1529 IID = Intrinsic::x86_sse2_packuswb_128; 1530 else if (VecWidth == 256) 1531 IID = Intrinsic::x86_avx2_packuswb; 1532 else if (VecWidth == 512) 1533 IID = Intrinsic::x86_avx512_packuswb_512; 1534 else 1535 llvm_unreachable("Unexpected intrinsic"); 1536 } else if (Name.startswith("packusdw.")) { 1537 if (VecWidth == 128) 1538 IID = Intrinsic::x86_sse41_packusdw; 1539 else if (VecWidth == 256) 1540 IID = Intrinsic::x86_avx2_packusdw; 1541 else if (VecWidth == 512) 1542 IID = Intrinsic::x86_avx512_packusdw_512; 1543 else 1544 llvm_unreachable("Unexpected intrinsic"); 1545 } else if (Name.startswith("vpermilvar.")) { 1546 if (VecWidth == 128 && EltWidth == 32) 1547 IID = Intrinsic::x86_avx_vpermilvar_ps; 1548 else if (VecWidth == 128 && EltWidth == 64) 1549 IID = Intrinsic::x86_avx_vpermilvar_pd; 1550 else if (VecWidth == 256 && EltWidth == 32) 1551 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1552 else if (VecWidth == 256 && EltWidth == 64) 1553 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1554 else if (VecWidth == 512 && EltWidth == 32) 1555 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1556 else if (VecWidth == 512 && EltWidth == 64) 1557 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1558 else 1559 llvm_unreachable("Unexpected intrinsic"); 1560 } else if (Name == "cvtpd2dq.256") { 1561 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1562 } else if (Name == "cvtpd2ps.256") { 1563 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1564 } else if (Name == "cvttpd2dq.256") { 1565 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1566 } else if (Name == "cvttps2dq.128") { 1567 IID = Intrinsic::x86_sse2_cvttps2dq; 1568 } else if (Name == "cvttps2dq.256") { 1569 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1570 } else if (Name.startswith("permvar.")) { 1571 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1572 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1573 IID = Intrinsic::x86_avx2_permps; 1574 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1575 IID = Intrinsic::x86_avx2_permd; 1576 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1577 IID = Intrinsic::x86_avx512_permvar_df_256; 1578 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1579 IID = Intrinsic::x86_avx512_permvar_di_256; 1580 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1581 IID = Intrinsic::x86_avx512_permvar_sf_512; 1582 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1583 IID = Intrinsic::x86_avx512_permvar_si_512; 1584 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1585 IID = Intrinsic::x86_avx512_permvar_df_512; 1586 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1587 IID = Intrinsic::x86_avx512_permvar_di_512; 1588 else if (VecWidth == 128 && EltWidth == 16) 1589 IID = Intrinsic::x86_avx512_permvar_hi_128; 1590 else if (VecWidth == 256 && EltWidth == 16) 1591 IID = Intrinsic::x86_avx512_permvar_hi_256; 1592 else if (VecWidth == 512 && EltWidth == 16) 1593 IID = Intrinsic::x86_avx512_permvar_hi_512; 1594 else if (VecWidth == 128 && EltWidth == 8) 1595 IID = Intrinsic::x86_avx512_permvar_qi_128; 1596 else if (VecWidth == 256 && EltWidth == 8) 1597 IID = Intrinsic::x86_avx512_permvar_qi_256; 1598 else if (VecWidth == 512 && EltWidth == 8) 1599 IID = Intrinsic::x86_avx512_permvar_qi_512; 1600 else 1601 llvm_unreachable("Unexpected intrinsic"); 1602 } else if (Name.startswith("dbpsadbw.")) { 1603 if (VecWidth == 128) 1604 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1605 else if (VecWidth == 256) 1606 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1607 else if (VecWidth == 512) 1608 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1609 else 1610 llvm_unreachable("Unexpected intrinsic"); 1611 } else if (Name.startswith("pmultishift.qb.")) { 1612 if (VecWidth == 128) 1613 IID = Intrinsic::x86_avx512_pmultishift_qb_128; 1614 else if (VecWidth == 256) 1615 IID = Intrinsic::x86_avx512_pmultishift_qb_256; 1616 else if (VecWidth == 512) 1617 IID = Intrinsic::x86_avx512_pmultishift_qb_512; 1618 else 1619 llvm_unreachable("Unexpected intrinsic"); 1620 } else if (Name.startswith("conflict.")) { 1621 if (Name[9] == 'd' && VecWidth == 128) 1622 IID = Intrinsic::x86_avx512_conflict_d_128; 1623 else if (Name[9] == 'd' && VecWidth == 256) 1624 IID = Intrinsic::x86_avx512_conflict_d_256; 1625 else if (Name[9] == 'd' && VecWidth == 512) 1626 IID = Intrinsic::x86_avx512_conflict_d_512; 1627 else if (Name[9] == 'q' && VecWidth == 128) 1628 IID = Intrinsic::x86_avx512_conflict_q_128; 1629 else if (Name[9] == 'q' && VecWidth == 256) 1630 IID = Intrinsic::x86_avx512_conflict_q_256; 1631 else if (Name[9] == 'q' && VecWidth == 512) 1632 IID = Intrinsic::x86_avx512_conflict_q_512; 1633 else 1634 llvm_unreachable("Unexpected intrinsic"); 1635 } else if (Name.startswith("pavg.")) { 1636 if (Name[5] == 'b' && VecWidth == 128) 1637 IID = Intrinsic::x86_sse2_pavg_b; 1638 else if (Name[5] == 'b' && VecWidth == 256) 1639 IID = Intrinsic::x86_avx2_pavg_b; 1640 else if (Name[5] == 'b' && VecWidth == 512) 1641 IID = Intrinsic::x86_avx512_pavg_b_512; 1642 else if (Name[5] == 'w' && VecWidth == 128) 1643 IID = Intrinsic::x86_sse2_pavg_w; 1644 else if (Name[5] == 'w' && VecWidth == 256) 1645 IID = Intrinsic::x86_avx2_pavg_w; 1646 else if (Name[5] == 'w' && VecWidth == 512) 1647 IID = Intrinsic::x86_avx512_pavg_w_512; 1648 else 1649 llvm_unreachable("Unexpected intrinsic"); 1650 } else 1651 return false; 1652 1653 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1654 CI.arg_operands().end()); 1655 Args.pop_back(); 1656 Args.pop_back(); 1657 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1658 Args); 1659 unsigned NumArgs = CI.getNumArgOperands(); 1660 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1661 CI.getArgOperand(NumArgs - 2)); 1662 return true; 1663 } 1664 1665 /// Upgrade comment in call to inline asm that represents an objc retain release 1666 /// marker. 1667 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1668 size_t Pos; 1669 if (AsmStr->find("mov\tfp") == 0 && 1670 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1671 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1672 AsmStr->replace(Pos, 1, ";"); 1673 } 1674 return; 1675 } 1676 1677 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1678 /// provided to seamlessly integrate with existing context. 1679 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1680 Function *F = CI->getCalledFunction(); 1681 LLVMContext &C = CI->getContext(); 1682 IRBuilder<> Builder(C); 1683 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1684 1685 assert(F && "Intrinsic call is not direct?"); 1686 1687 if (!NewFn) { 1688 // Get the Function's name. 1689 StringRef Name = F->getName(); 1690 1691 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1692 Name = Name.substr(5); 1693 1694 bool IsX86 = Name.startswith("x86."); 1695 if (IsX86) 1696 Name = Name.substr(4); 1697 bool IsNVVM = Name.startswith("nvvm."); 1698 if (IsNVVM) 1699 Name = Name.substr(5); 1700 1701 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1702 Module *M = F->getParent(); 1703 SmallVector<Metadata *, 1> Elts; 1704 Elts.push_back( 1705 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1706 MDNode *Node = MDNode::get(C, Elts); 1707 1708 Value *Arg0 = CI->getArgOperand(0); 1709 Value *Arg1 = CI->getArgOperand(1); 1710 1711 // Nontemporal (unaligned) store of the 0'th element of the float/double 1712 // vector. 1713 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1714 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1715 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1716 Value *Extract = 1717 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1718 1719 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, Align(1)); 1720 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1721 1722 // Remove intrinsic. 1723 CI->eraseFromParent(); 1724 return; 1725 } 1726 1727 if (IsX86 && (Name.startswith("avx.movnt.") || 1728 Name.startswith("avx512.storent."))) { 1729 Module *M = F->getParent(); 1730 SmallVector<Metadata *, 1> Elts; 1731 Elts.push_back( 1732 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1733 MDNode *Node = MDNode::get(C, Elts); 1734 1735 Value *Arg0 = CI->getArgOperand(0); 1736 Value *Arg1 = CI->getArgOperand(1); 1737 1738 // Convert the type of the pointer to a pointer to the stored type. 1739 Value *BC = Builder.CreateBitCast(Arg0, 1740 PointerType::getUnqual(Arg1->getType()), 1741 "cast"); 1742 VectorType *VTy = cast<VectorType>(Arg1->getType()); 1743 StoreInst *SI = 1744 Builder.CreateAlignedStore(Arg1, BC, Align(VTy->getBitWidth() / 8)); 1745 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1746 1747 // Remove intrinsic. 1748 CI->eraseFromParent(); 1749 return; 1750 } 1751 1752 if (IsX86 && Name == "sse2.storel.dq") { 1753 Value *Arg0 = CI->getArgOperand(0); 1754 Value *Arg1 = CI->getArgOperand(1); 1755 1756 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 1757 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1758 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1759 Value *BC = Builder.CreateBitCast(Arg0, 1760 PointerType::getUnqual(Elt->getType()), 1761 "cast"); 1762 Builder.CreateAlignedStore(Elt, BC, Align(1)); 1763 1764 // Remove intrinsic. 1765 CI->eraseFromParent(); 1766 return; 1767 } 1768 1769 if (IsX86 && (Name.startswith("sse.storeu.") || 1770 Name.startswith("sse2.storeu.") || 1771 Name.startswith("avx.storeu."))) { 1772 Value *Arg0 = CI->getArgOperand(0); 1773 Value *Arg1 = CI->getArgOperand(1); 1774 1775 Arg0 = Builder.CreateBitCast(Arg0, 1776 PointerType::getUnqual(Arg1->getType()), 1777 "cast"); 1778 Builder.CreateAlignedStore(Arg1, Arg0, Align(1)); 1779 1780 // Remove intrinsic. 1781 CI->eraseFromParent(); 1782 return; 1783 } 1784 1785 if (IsX86 && Name == "avx512.mask.store.ss") { 1786 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1787 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1788 Mask, false); 1789 1790 // Remove intrinsic. 1791 CI->eraseFromParent(); 1792 return; 1793 } 1794 1795 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1796 // "avx512.mask.storeu." or "avx512.mask.store." 1797 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1798 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1799 CI->getArgOperand(2), Aligned); 1800 1801 // Remove intrinsic. 1802 CI->eraseFromParent(); 1803 return; 1804 } 1805 1806 Value *Rep; 1807 // Upgrade packed integer vector compare intrinsics to compare instructions. 1808 if (IsX86 && (Name.startswith("sse2.pcmp") || 1809 Name.startswith("avx2.pcmp"))) { 1810 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1811 bool CmpEq = Name[9] == 'e'; 1812 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1813 CI->getArgOperand(0), CI->getArgOperand(1)); 1814 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1815 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1816 Type *ExtTy = Type::getInt32Ty(C); 1817 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1818 ExtTy = Type::getInt64Ty(C); 1819 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1820 ExtTy->getPrimitiveSizeInBits(); 1821 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1822 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1823 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1824 Name == "sse2.sqrt.sd")) { 1825 Value *Vec = CI->getArgOperand(0); 1826 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1827 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1828 Intrinsic::sqrt, Elt0->getType()); 1829 Elt0 = Builder.CreateCall(Intr, Elt0); 1830 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1831 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1832 Name.startswith("sse2.sqrt.p") || 1833 Name.startswith("sse.sqrt.p"))) { 1834 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1835 Intrinsic::sqrt, 1836 CI->getType()), 1837 {CI->getArgOperand(0)}); 1838 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1839 if (CI->getNumArgOperands() == 4 && 1840 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1841 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1842 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1843 : Intrinsic::x86_avx512_sqrt_pd_512; 1844 1845 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1846 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1847 IID), Args); 1848 } else { 1849 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1850 Intrinsic::sqrt, 1851 CI->getType()), 1852 {CI->getArgOperand(0)}); 1853 } 1854 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1855 CI->getArgOperand(1)); 1856 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1857 Name.startswith("avx512.ptestnm"))) { 1858 Value *Op0 = CI->getArgOperand(0); 1859 Value *Op1 = CI->getArgOperand(1); 1860 Value *Mask = CI->getArgOperand(2); 1861 Rep = Builder.CreateAnd(Op0, Op1); 1862 llvm::Type *Ty = Op0->getType(); 1863 Value *Zero = llvm::Constant::getNullValue(Ty); 1864 ICmpInst::Predicate Pred = 1865 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1866 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1867 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1868 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1869 unsigned NumElts = 1870 cast<VectorType>(CI->getArgOperand(1)->getType())->getNumElements(); 1871 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1872 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1873 CI->getArgOperand(1)); 1874 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1875 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1876 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1877 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1878 uint32_t Indices[64]; 1879 for (unsigned i = 0; i != NumElts; ++i) 1880 Indices[i] = i; 1881 1882 // First extract half of each vector. This gives better codegen than 1883 // doing it in a single shuffle. 1884 LHS = Builder.CreateShuffleVector(LHS, LHS, 1885 makeArrayRef(Indices, NumElts / 2)); 1886 RHS = Builder.CreateShuffleVector(RHS, RHS, 1887 makeArrayRef(Indices, NumElts / 2)); 1888 // Concat the vectors. 1889 // NOTE: Operands have to be swapped to match intrinsic definition. 1890 Rep = Builder.CreateShuffleVector(RHS, LHS, 1891 makeArrayRef(Indices, NumElts)); 1892 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1893 } else if (IsX86 && Name == "avx512.kand.w") { 1894 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1895 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1896 Rep = Builder.CreateAnd(LHS, RHS); 1897 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1898 } else if (IsX86 && Name == "avx512.kandn.w") { 1899 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1900 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1901 LHS = Builder.CreateNot(LHS); 1902 Rep = Builder.CreateAnd(LHS, RHS); 1903 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1904 } else if (IsX86 && Name == "avx512.kor.w") { 1905 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1906 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1907 Rep = Builder.CreateOr(LHS, RHS); 1908 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1909 } else if (IsX86 && Name == "avx512.kxor.w") { 1910 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1911 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1912 Rep = Builder.CreateXor(LHS, RHS); 1913 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1914 } else if (IsX86 && Name == "avx512.kxnor.w") { 1915 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1916 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1917 LHS = Builder.CreateNot(LHS); 1918 Rep = Builder.CreateXor(LHS, RHS); 1919 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1920 } else if (IsX86 && Name == "avx512.knot.w") { 1921 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1922 Rep = Builder.CreateNot(Rep); 1923 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1924 } else if (IsX86 && 1925 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1926 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1927 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1928 Rep = Builder.CreateOr(LHS, RHS); 1929 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1930 Value *C; 1931 if (Name[14] == 'c') 1932 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1933 else 1934 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1935 Rep = Builder.CreateICmpEQ(Rep, C); 1936 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1937 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 1938 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 1939 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 1940 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1941 Type *I32Ty = Type::getInt32Ty(C); 1942 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1943 ConstantInt::get(I32Ty, 0)); 1944 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1945 ConstantInt::get(I32Ty, 0)); 1946 Value *EltOp; 1947 if (Name.contains(".add.")) 1948 EltOp = Builder.CreateFAdd(Elt0, Elt1); 1949 else if (Name.contains(".sub.")) 1950 EltOp = Builder.CreateFSub(Elt0, Elt1); 1951 else if (Name.contains(".mul.")) 1952 EltOp = Builder.CreateFMul(Elt0, Elt1); 1953 else 1954 EltOp = Builder.CreateFDiv(Elt0, Elt1); 1955 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 1956 ConstantInt::get(I32Ty, 0)); 1957 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1958 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1959 bool CmpEq = Name[16] == 'e'; 1960 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1961 } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) { 1962 Type *OpTy = CI->getArgOperand(0)->getType(); 1963 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1964 Intrinsic::ID IID; 1965 switch (VecWidth) { 1966 default: llvm_unreachable("Unexpected intrinsic"); 1967 case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break; 1968 case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break; 1969 case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break; 1970 } 1971 1972 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1973 { CI->getOperand(0), CI->getArgOperand(1) }); 1974 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1975 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 1976 Type *OpTy = CI->getArgOperand(0)->getType(); 1977 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1978 unsigned EltWidth = OpTy->getScalarSizeInBits(); 1979 Intrinsic::ID IID; 1980 if (VecWidth == 128 && EltWidth == 32) 1981 IID = Intrinsic::x86_avx512_fpclass_ps_128; 1982 else if (VecWidth == 256 && EltWidth == 32) 1983 IID = Intrinsic::x86_avx512_fpclass_ps_256; 1984 else if (VecWidth == 512 && EltWidth == 32) 1985 IID = Intrinsic::x86_avx512_fpclass_ps_512; 1986 else if (VecWidth == 128 && EltWidth == 64) 1987 IID = Intrinsic::x86_avx512_fpclass_pd_128; 1988 else if (VecWidth == 256 && EltWidth == 64) 1989 IID = Intrinsic::x86_avx512_fpclass_pd_256; 1990 else if (VecWidth == 512 && EltWidth == 64) 1991 IID = Intrinsic::x86_avx512_fpclass_pd_512; 1992 else 1993 llvm_unreachable("Unexpected intrinsic"); 1994 1995 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1996 { CI->getOperand(0), CI->getArgOperand(1) }); 1997 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1998 } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) { 1999 Type *OpTy = CI->getArgOperand(0)->getType(); 2000 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2001 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2002 Intrinsic::ID IID; 2003 if (VecWidth == 128 && EltWidth == 32) 2004 IID = Intrinsic::x86_avx512_cmp_ps_128; 2005 else if (VecWidth == 256 && EltWidth == 32) 2006 IID = Intrinsic::x86_avx512_cmp_ps_256; 2007 else if (VecWidth == 512 && EltWidth == 32) 2008 IID = Intrinsic::x86_avx512_cmp_ps_512; 2009 else if (VecWidth == 128 && EltWidth == 64) 2010 IID = Intrinsic::x86_avx512_cmp_pd_128; 2011 else if (VecWidth == 256 && EltWidth == 64) 2012 IID = Intrinsic::x86_avx512_cmp_pd_256; 2013 else if (VecWidth == 512 && EltWidth == 64) 2014 IID = Intrinsic::x86_avx512_cmp_pd_512; 2015 else 2016 llvm_unreachable("Unexpected intrinsic"); 2017 2018 SmallVector<Value *, 4> Args; 2019 Args.push_back(CI->getArgOperand(0)); 2020 Args.push_back(CI->getArgOperand(1)); 2021 Args.push_back(CI->getArgOperand(2)); 2022 if (CI->getNumArgOperands() == 5) 2023 Args.push_back(CI->getArgOperand(4)); 2024 2025 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2026 Args); 2027 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3)); 2028 } else if (IsX86 && Name.startswith("avx512.mask.cmp.") && 2029 Name[16] != 'p') { 2030 // Integer compare intrinsics. 2031 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2032 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 2033 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 2034 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2035 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 2036 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 2037 Name.startswith("avx512.cvtw2mask.") || 2038 Name.startswith("avx512.cvtd2mask.") || 2039 Name.startswith("avx512.cvtq2mask."))) { 2040 Value *Op = CI->getArgOperand(0); 2041 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 2042 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 2043 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 2044 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 2045 Name == "ssse3.pabs.w.128" || 2046 Name == "ssse3.pabs.d.128" || 2047 Name.startswith("avx2.pabs") || 2048 Name.startswith("avx512.mask.pabs"))) { 2049 Rep = upgradeAbs(Builder, *CI); 2050 } else if (IsX86 && (Name == "sse41.pmaxsb" || 2051 Name == "sse2.pmaxs.w" || 2052 Name == "sse41.pmaxsd" || 2053 Name.startswith("avx2.pmaxs") || 2054 Name.startswith("avx512.mask.pmaxs"))) { 2055 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 2056 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 2057 Name == "sse41.pmaxuw" || 2058 Name == "sse41.pmaxud" || 2059 Name.startswith("avx2.pmaxu") || 2060 Name.startswith("avx512.mask.pmaxu"))) { 2061 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 2062 } else if (IsX86 && (Name == "sse41.pminsb" || 2063 Name == "sse2.pmins.w" || 2064 Name == "sse41.pminsd" || 2065 Name.startswith("avx2.pmins") || 2066 Name.startswith("avx512.mask.pmins"))) { 2067 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 2068 } else if (IsX86 && (Name == "sse2.pminu.b" || 2069 Name == "sse41.pminuw" || 2070 Name == "sse41.pminud" || 2071 Name.startswith("avx2.pminu") || 2072 Name.startswith("avx512.mask.pminu"))) { 2073 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 2074 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 2075 Name == "avx2.pmulu.dq" || 2076 Name == "avx512.pmulu.dq.512" || 2077 Name.startswith("avx512.mask.pmulu.dq."))) { 2078 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 2079 } else if (IsX86 && (Name == "sse41.pmuldq" || 2080 Name == "avx2.pmul.dq" || 2081 Name == "avx512.pmul.dq.512" || 2082 Name.startswith("avx512.mask.pmul.dq."))) { 2083 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 2084 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 2085 Name == "sse2.cvtsi2sd" || 2086 Name == "sse.cvtsi642ss" || 2087 Name == "sse2.cvtsi642sd")) { 2088 Rep = Builder.CreateSIToFP( 2089 CI->getArgOperand(1), 2090 cast<VectorType>(CI->getType())->getElementType()); 2091 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2092 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 2093 Rep = Builder.CreateUIToFP( 2094 CI->getArgOperand(1), 2095 cast<VectorType>(CI->getType())->getElementType()); 2096 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2097 } else if (IsX86 && Name == "sse2.cvtss2sd") { 2098 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 2099 Rep = Builder.CreateFPExt( 2100 Rep, cast<VectorType>(CI->getType())->getElementType()); 2101 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2102 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 2103 Name == "sse2.cvtdq2ps" || 2104 Name == "avx.cvtdq2.pd.256" || 2105 Name == "avx.cvtdq2.ps.256" || 2106 Name.startswith("avx512.mask.cvtdq2pd.") || 2107 Name.startswith("avx512.mask.cvtudq2pd.") || 2108 Name.startswith("avx512.mask.cvtdq2ps.") || 2109 Name.startswith("avx512.mask.cvtudq2ps.") || 2110 Name.startswith("avx512.mask.cvtqq2pd.") || 2111 Name.startswith("avx512.mask.cvtuqq2pd.") || 2112 Name == "avx512.mask.cvtqq2ps.256" || 2113 Name == "avx512.mask.cvtqq2ps.512" || 2114 Name == "avx512.mask.cvtuqq2ps.256" || 2115 Name == "avx512.mask.cvtuqq2ps.512" || 2116 Name == "sse2.cvtps2pd" || 2117 Name == "avx.cvt.ps2.pd.256" || 2118 Name == "avx512.mask.cvtps2pd.128" || 2119 Name == "avx512.mask.cvtps2pd.256")) { 2120 auto *DstTy = cast<VectorType>(CI->getType()); 2121 Rep = CI->getArgOperand(0); 2122 auto *SrcTy = cast<VectorType>(Rep->getType()); 2123 2124 unsigned NumDstElts = DstTy->getNumElements(); 2125 if (NumDstElts < SrcTy->getNumElements()) { 2126 assert(NumDstElts == 2 && "Unexpected vector size"); 2127 uint32_t ShuffleMask[2] = { 0, 1 }; 2128 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 2129 } 2130 2131 bool IsPS2PD = SrcTy->getElementType()->isFloatTy(); 2132 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 2133 if (IsPS2PD) 2134 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 2135 else if (CI->getNumArgOperands() == 4 && 2136 (!isa<ConstantInt>(CI->getArgOperand(3)) || 2137 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 2138 Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round 2139 : Intrinsic::x86_avx512_sitofp_round; 2140 Function *F = Intrinsic::getDeclaration(CI->getModule(), IID, 2141 { DstTy, SrcTy }); 2142 Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) }); 2143 } else { 2144 Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt") 2145 : Builder.CreateSIToFP(Rep, DstTy, "cvt"); 2146 } 2147 2148 if (CI->getNumArgOperands() >= 3) 2149 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2150 CI->getArgOperand(1)); 2151 } else if (IsX86 && (Name.startswith("avx512.mask.vcvtph2ps.") || 2152 Name.startswith("vcvtph2ps."))) { 2153 auto *DstTy = cast<VectorType>(CI->getType()); 2154 Rep = CI->getArgOperand(0); 2155 auto *SrcTy = cast<VectorType>(Rep->getType()); 2156 unsigned NumDstElts = DstTy->getNumElements(); 2157 if (NumDstElts != SrcTy->getNumElements()) { 2158 assert(NumDstElts == 4 && "Unexpected vector size"); 2159 uint32_t ShuffleMask[4] = {0, 1, 2, 3}; 2160 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 2161 } 2162 Rep = Builder.CreateBitCast( 2163 Rep, VectorType::get(Type::getHalfTy(C), NumDstElts)); 2164 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtph2ps"); 2165 if (CI->getNumArgOperands() >= 3) 2166 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2167 CI->getArgOperand(1)); 2168 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 2169 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2170 CI->getArgOperand(1), CI->getArgOperand(2), 2171 /*Aligned*/false); 2172 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 2173 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2174 CI->getArgOperand(1),CI->getArgOperand(2), 2175 /*Aligned*/true); 2176 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 2177 auto *ResultTy = cast<VectorType>(CI->getType()); 2178 Type *PtrTy = ResultTy->getElementType(); 2179 2180 // Cast the pointer to element type. 2181 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2182 llvm::PointerType::getUnqual(PtrTy)); 2183 2184 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2185 ResultTy->getNumElements()); 2186 2187 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 2188 Intrinsic::masked_expandload, 2189 ResultTy); 2190 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 2191 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 2192 auto *ResultTy = cast<VectorType>(CI->getArgOperand(1)->getType()); 2193 Type *PtrTy = ResultTy->getElementType(); 2194 2195 // Cast the pointer to element type. 2196 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2197 llvm::PointerType::getUnqual(PtrTy)); 2198 2199 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2200 ResultTy->getNumElements()); 2201 2202 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 2203 Intrinsic::masked_compressstore, 2204 ResultTy); 2205 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 2206 } else if (IsX86 && (Name.startswith("avx512.mask.compress.") || 2207 Name.startswith("avx512.mask.expand."))) { 2208 auto *ResultTy = cast<VectorType>(CI->getType()); 2209 2210 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2211 ResultTy->getNumElements()); 2212 2213 bool IsCompress = Name[12] == 'c'; 2214 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 2215 : Intrinsic::x86_avx512_mask_expand; 2216 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); 2217 Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1), 2218 MaskVec }); 2219 } else if (IsX86 && Name.startswith("xop.vpcom")) { 2220 bool IsSigned; 2221 if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") || 2222 Name.endswith("uq")) 2223 IsSigned = false; 2224 else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") || 2225 Name.endswith("q")) 2226 IsSigned = true; 2227 else 2228 llvm_unreachable("Unknown suffix"); 2229 2230 unsigned Imm; 2231 if (CI->getNumArgOperands() == 3) { 2232 Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2233 } else { 2234 Name = Name.substr(9); // strip off "xop.vpcom" 2235 if (Name.startswith("lt")) 2236 Imm = 0; 2237 else if (Name.startswith("le")) 2238 Imm = 1; 2239 else if (Name.startswith("gt")) 2240 Imm = 2; 2241 else if (Name.startswith("ge")) 2242 Imm = 3; 2243 else if (Name.startswith("eq")) 2244 Imm = 4; 2245 else if (Name.startswith("ne")) 2246 Imm = 5; 2247 else if (Name.startswith("false")) 2248 Imm = 6; 2249 else if (Name.startswith("true")) 2250 Imm = 7; 2251 else 2252 llvm_unreachable("Unknown condition"); 2253 } 2254 2255 Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned); 2256 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2257 Value *Sel = CI->getArgOperand(2); 2258 Value *NotSel = Builder.CreateNot(Sel); 2259 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2260 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2261 Rep = Builder.CreateOr(Sel0, Sel1); 2262 } else if (IsX86 && (Name.startswith("xop.vprot") || 2263 Name.startswith("avx512.prol") || 2264 Name.startswith("avx512.mask.prol"))) { 2265 Rep = upgradeX86Rotate(Builder, *CI, false); 2266 } else if (IsX86 && (Name.startswith("avx512.pror") || 2267 Name.startswith("avx512.mask.pror"))) { 2268 Rep = upgradeX86Rotate(Builder, *CI, true); 2269 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2270 Name.startswith("avx512.mask.vpshld") || 2271 Name.startswith("avx512.maskz.vpshld"))) { 2272 bool ZeroMask = Name[11] == 'z'; 2273 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2274 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2275 Name.startswith("avx512.mask.vpshrd") || 2276 Name.startswith("avx512.maskz.vpshrd"))) { 2277 bool ZeroMask = Name[11] == 'z'; 2278 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2279 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2280 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2281 Intrinsic::x86_sse42_crc32_32_8); 2282 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2283 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2284 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2285 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2286 Name.startswith("avx512.vbroadcast.s"))) { 2287 // Replace broadcasts with a series of insertelements. 2288 auto *VecTy = cast<VectorType>(CI->getType()); 2289 Type *EltTy = VecTy->getElementType(); 2290 unsigned EltNum = VecTy->getNumElements(); 2291 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2292 EltTy->getPointerTo()); 2293 Value *Load = Builder.CreateLoad(EltTy, Cast); 2294 Type *I32Ty = Type::getInt32Ty(C); 2295 Rep = UndefValue::get(VecTy); 2296 for (unsigned I = 0; I < EltNum; ++I) 2297 Rep = Builder.CreateInsertElement(Rep, Load, 2298 ConstantInt::get(I32Ty, I)); 2299 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2300 Name.startswith("sse41.pmovzx") || 2301 Name.startswith("avx2.pmovsx") || 2302 Name.startswith("avx2.pmovzx") || 2303 Name.startswith("avx512.mask.pmovsx") || 2304 Name.startswith("avx512.mask.pmovzx"))) { 2305 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 2306 VectorType *DstTy = cast<VectorType>(CI->getType()); 2307 unsigned NumDstElts = DstTy->getNumElements(); 2308 2309 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2310 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 2311 for (unsigned i = 0; i != NumDstElts; ++i) 2312 ShuffleMask[i] = i; 2313 2314 Value *SV = Builder.CreateShuffleVector( 2315 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2316 2317 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2318 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2319 : Builder.CreateZExt(SV, DstTy); 2320 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2321 if (CI->getNumArgOperands() == 3) 2322 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2323 CI->getArgOperand(1)); 2324 } else if (Name == "avx512.mask.pmov.qd.256" || 2325 Name == "avx512.mask.pmov.qd.512" || 2326 Name == "avx512.mask.pmov.wb.256" || 2327 Name == "avx512.mask.pmov.wb.512") { 2328 Type *Ty = CI->getArgOperand(1)->getType(); 2329 Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty); 2330 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2331 CI->getArgOperand(1)); 2332 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2333 Name == "avx2.vbroadcasti128")) { 2334 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2335 Type *EltTy = cast<VectorType>(CI->getType())->getElementType(); 2336 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2337 Type *VT = VectorType::get(EltTy, NumSrcElts); 2338 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2339 PointerType::getUnqual(VT)); 2340 Value *Load = Builder.CreateAlignedLoad(VT, Op, Align(1)); 2341 if (NumSrcElts == 2) 2342 Rep = Builder.CreateShuffleVector( 2343 Load, UndefValue::get(Load->getType()), ArrayRef<int>{0, 1, 0, 1}); 2344 else 2345 Rep = 2346 Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2347 ArrayRef<int>{0, 1, 2, 3, 0, 1, 2, 3}); 2348 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2349 Name.startswith("avx512.mask.shuf.f"))) { 2350 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2351 Type *VT = CI->getType(); 2352 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2353 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2354 unsigned ControlBitsMask = NumLanes - 1; 2355 unsigned NumControlBits = NumLanes / 2; 2356 SmallVector<uint32_t, 8> ShuffleMask(0); 2357 2358 for (unsigned l = 0; l != NumLanes; ++l) { 2359 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2360 // We actually need the other source. 2361 if (l >= NumLanes / 2) 2362 LaneMask += NumLanes; 2363 for (unsigned i = 0; i != NumElementsInLane; ++i) 2364 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2365 } 2366 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2367 CI->getArgOperand(1), ShuffleMask); 2368 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2369 CI->getArgOperand(3)); 2370 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2371 Name.startswith("avx512.mask.broadcasti"))) { 2372 unsigned NumSrcElts = 2373 cast<VectorType>(CI->getArgOperand(0)->getType())->getNumElements(); 2374 unsigned NumDstElts = cast<VectorType>(CI->getType())->getNumElements(); 2375 2376 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 2377 for (unsigned i = 0; i != NumDstElts; ++i) 2378 ShuffleMask[i] = i % NumSrcElts; 2379 2380 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2381 CI->getArgOperand(0), 2382 ShuffleMask); 2383 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2384 CI->getArgOperand(1)); 2385 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2386 Name.startswith("avx2.vbroadcast") || 2387 Name.startswith("avx512.pbroadcast") || 2388 Name.startswith("avx512.mask.broadcast.s"))) { 2389 // Replace vp?broadcasts with a vector shuffle. 2390 Value *Op = CI->getArgOperand(0); 2391 ElementCount EC = cast<VectorType>(CI->getType())->getElementCount(); 2392 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), EC); 2393 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2394 Constant::getNullValue(MaskTy)); 2395 2396 if (CI->getNumArgOperands() == 3) 2397 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2398 CI->getArgOperand(1)); 2399 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2400 Name.startswith("sse2.psubs.") || 2401 Name.startswith("avx2.padds.") || 2402 Name.startswith("avx2.psubs.") || 2403 Name.startswith("avx512.padds.") || 2404 Name.startswith("avx512.psubs.") || 2405 Name.startswith("avx512.mask.padds.") || 2406 Name.startswith("avx512.mask.psubs."))) { 2407 bool IsAdd = Name.contains(".padds"); 2408 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); 2409 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2410 Name.startswith("sse2.psubus.") || 2411 Name.startswith("avx2.paddus.") || 2412 Name.startswith("avx2.psubus.") || 2413 Name.startswith("avx512.mask.paddus.") || 2414 Name.startswith("avx512.mask.psubus."))) { 2415 bool IsAdd = Name.contains(".paddus"); 2416 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); 2417 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2418 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2419 CI->getArgOperand(1), 2420 CI->getArgOperand(2), 2421 CI->getArgOperand(3), 2422 CI->getArgOperand(4), 2423 false); 2424 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2425 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2426 CI->getArgOperand(1), 2427 CI->getArgOperand(2), 2428 CI->getArgOperand(3), 2429 CI->getArgOperand(4), 2430 true); 2431 } else if (IsX86 && (Name == "sse2.psll.dq" || 2432 Name == "avx2.psll.dq")) { 2433 // 128/256-bit shift left specified in bits. 2434 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2435 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2436 Shift / 8); // Shift is in bits. 2437 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2438 Name == "avx2.psrl.dq")) { 2439 // 128/256-bit shift right specified in bits. 2440 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2441 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2442 Shift / 8); // Shift is in bits. 2443 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2444 Name == "avx2.psll.dq.bs" || 2445 Name == "avx512.psll.dq.512")) { 2446 // 128/256/512-bit shift left specified in bytes. 2447 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2448 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2449 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2450 Name == "avx2.psrl.dq.bs" || 2451 Name == "avx512.psrl.dq.512")) { 2452 // 128/256/512-bit shift right specified in bytes. 2453 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2454 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2455 } else if (IsX86 && (Name == "sse41.pblendw" || 2456 Name.startswith("sse41.blendp") || 2457 Name.startswith("avx.blend.p") || 2458 Name == "avx2.pblendw" || 2459 Name.startswith("avx2.pblendd."))) { 2460 Value *Op0 = CI->getArgOperand(0); 2461 Value *Op1 = CI->getArgOperand(1); 2462 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2463 VectorType *VecTy = cast<VectorType>(CI->getType()); 2464 unsigned NumElts = VecTy->getNumElements(); 2465 2466 SmallVector<uint32_t, 16> Idxs(NumElts); 2467 for (unsigned i = 0; i != NumElts; ++i) 2468 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2469 2470 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2471 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2472 Name == "avx2.vinserti128" || 2473 Name.startswith("avx512.mask.insert"))) { 2474 Value *Op0 = CI->getArgOperand(0); 2475 Value *Op1 = CI->getArgOperand(1); 2476 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2477 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2478 unsigned SrcNumElts = cast<VectorType>(Op1->getType())->getNumElements(); 2479 unsigned Scale = DstNumElts / SrcNumElts; 2480 2481 // Mask off the high bits of the immediate value; hardware ignores those. 2482 Imm = Imm % Scale; 2483 2484 // Extend the second operand into a vector the size of the destination. 2485 Value *UndefV = UndefValue::get(Op1->getType()); 2486 SmallVector<uint32_t, 8> Idxs(DstNumElts); 2487 for (unsigned i = 0; i != SrcNumElts; ++i) 2488 Idxs[i] = i; 2489 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2490 Idxs[i] = SrcNumElts; 2491 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2492 2493 // Insert the second operand into the first operand. 2494 2495 // Note that there is no guarantee that instruction lowering will actually 2496 // produce a vinsertf128 instruction for the created shuffles. In 2497 // particular, the 0 immediate case involves no lane changes, so it can 2498 // be handled as a blend. 2499 2500 // Example of shuffle mask for 32-bit elements: 2501 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2502 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2503 2504 // First fill with identify mask. 2505 for (unsigned i = 0; i != DstNumElts; ++i) 2506 Idxs[i] = i; 2507 // Then replace the elements where we need to insert. 2508 for (unsigned i = 0; i != SrcNumElts; ++i) 2509 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2510 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2511 2512 // If the intrinsic has a mask operand, handle that. 2513 if (CI->getNumArgOperands() == 5) 2514 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2515 CI->getArgOperand(3)); 2516 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2517 Name == "avx2.vextracti128" || 2518 Name.startswith("avx512.mask.vextract"))) { 2519 Value *Op0 = CI->getArgOperand(0); 2520 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2521 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2522 unsigned SrcNumElts = cast<VectorType>(Op0->getType())->getNumElements(); 2523 unsigned Scale = SrcNumElts / DstNumElts; 2524 2525 // Mask off the high bits of the immediate value; hardware ignores those. 2526 Imm = Imm % Scale; 2527 2528 // Get indexes for the subvector of the input vector. 2529 SmallVector<uint32_t, 8> Idxs(DstNumElts); 2530 for (unsigned i = 0; i != DstNumElts; ++i) { 2531 Idxs[i] = i + (Imm * DstNumElts); 2532 } 2533 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2534 2535 // If the intrinsic has a mask operand, handle that. 2536 if (CI->getNumArgOperands() == 4) 2537 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2538 CI->getArgOperand(2)); 2539 } else if (!IsX86 && Name == "stackprotectorcheck") { 2540 Rep = nullptr; 2541 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2542 Name.startswith("avx512.mask.perm.di."))) { 2543 Value *Op0 = CI->getArgOperand(0); 2544 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2545 VectorType *VecTy = cast<VectorType>(CI->getType()); 2546 unsigned NumElts = VecTy->getNumElements(); 2547 2548 SmallVector<uint32_t, 8> Idxs(NumElts); 2549 for (unsigned i = 0; i != NumElts; ++i) 2550 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2551 2552 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2553 2554 if (CI->getNumArgOperands() == 4) 2555 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2556 CI->getArgOperand(2)); 2557 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2558 Name == "avx2.vperm2i128")) { 2559 // The immediate permute control byte looks like this: 2560 // [1:0] - select 128 bits from sources for low half of destination 2561 // [2] - ignore 2562 // [3] - zero low half of destination 2563 // [5:4] - select 128 bits from sources for high half of destination 2564 // [6] - ignore 2565 // [7] - zero high half of destination 2566 2567 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2568 2569 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2570 unsigned HalfSize = NumElts / 2; 2571 SmallVector<uint32_t, 8> ShuffleMask(NumElts); 2572 2573 // Determine which operand(s) are actually in use for this instruction. 2574 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2575 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2576 2577 // If needed, replace operands based on zero mask. 2578 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2579 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2580 2581 // Permute low half of result. 2582 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2583 for (unsigned i = 0; i < HalfSize; ++i) 2584 ShuffleMask[i] = StartIndex + i; 2585 2586 // Permute high half of result. 2587 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2588 for (unsigned i = 0; i < HalfSize; ++i) 2589 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2590 2591 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2592 2593 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2594 Name == "sse2.pshuf.d" || 2595 Name.startswith("avx512.mask.vpermil.p") || 2596 Name.startswith("avx512.mask.pshuf.d."))) { 2597 Value *Op0 = CI->getArgOperand(0); 2598 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2599 VectorType *VecTy = cast<VectorType>(CI->getType()); 2600 unsigned NumElts = VecTy->getNumElements(); 2601 // Calculate the size of each index in the immediate. 2602 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2603 unsigned IdxMask = ((1 << IdxSize) - 1); 2604 2605 SmallVector<uint32_t, 8> Idxs(NumElts); 2606 // Lookup the bits for this element, wrapping around the immediate every 2607 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2608 // to offset by the first index of each group. 2609 for (unsigned i = 0; i != NumElts; ++i) 2610 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2611 2612 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2613 2614 if (CI->getNumArgOperands() == 4) 2615 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2616 CI->getArgOperand(2)); 2617 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2618 Name.startswith("avx512.mask.pshufl.w."))) { 2619 Value *Op0 = CI->getArgOperand(0); 2620 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2621 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2622 2623 SmallVector<uint32_t, 16> Idxs(NumElts); 2624 for (unsigned l = 0; l != NumElts; l += 8) { 2625 for (unsigned i = 0; i != 4; ++i) 2626 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2627 for (unsigned i = 4; i != 8; ++i) 2628 Idxs[i + l] = i + l; 2629 } 2630 2631 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2632 2633 if (CI->getNumArgOperands() == 4) 2634 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2635 CI->getArgOperand(2)); 2636 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2637 Name.startswith("avx512.mask.pshufh.w."))) { 2638 Value *Op0 = CI->getArgOperand(0); 2639 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2640 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2641 2642 SmallVector<uint32_t, 16> Idxs(NumElts); 2643 for (unsigned l = 0; l != NumElts; l += 8) { 2644 for (unsigned i = 0; i != 4; ++i) 2645 Idxs[i + l] = i + l; 2646 for (unsigned i = 0; i != 4; ++i) 2647 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2648 } 2649 2650 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2651 2652 if (CI->getNumArgOperands() == 4) 2653 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2654 CI->getArgOperand(2)); 2655 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2656 Value *Op0 = CI->getArgOperand(0); 2657 Value *Op1 = CI->getArgOperand(1); 2658 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2659 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2660 2661 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2662 unsigned HalfLaneElts = NumLaneElts / 2; 2663 2664 SmallVector<uint32_t, 16> Idxs(NumElts); 2665 for (unsigned i = 0; i != NumElts; ++i) { 2666 // Base index is the starting element of the lane. 2667 Idxs[i] = i - (i % NumLaneElts); 2668 // If we are half way through the lane switch to the other source. 2669 if ((i % NumLaneElts) >= HalfLaneElts) 2670 Idxs[i] += NumElts; 2671 // Now select the specific element. By adding HalfLaneElts bits from 2672 // the immediate. Wrapping around the immediate every 8-bits. 2673 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2674 } 2675 2676 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2677 2678 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2679 CI->getArgOperand(3)); 2680 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2681 Name.startswith("avx512.mask.movshdup") || 2682 Name.startswith("avx512.mask.movsldup"))) { 2683 Value *Op0 = CI->getArgOperand(0); 2684 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2685 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2686 2687 unsigned Offset = 0; 2688 if (Name.startswith("avx512.mask.movshdup.")) 2689 Offset = 1; 2690 2691 SmallVector<uint32_t, 16> Idxs(NumElts); 2692 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2693 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2694 Idxs[i + l + 0] = i + l + Offset; 2695 Idxs[i + l + 1] = i + l + Offset; 2696 } 2697 2698 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2699 2700 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2701 CI->getArgOperand(1)); 2702 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2703 Name.startswith("avx512.mask.unpckl."))) { 2704 Value *Op0 = CI->getArgOperand(0); 2705 Value *Op1 = CI->getArgOperand(1); 2706 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2707 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2708 2709 SmallVector<uint32_t, 64> Idxs(NumElts); 2710 for (int l = 0; l != NumElts; l += NumLaneElts) 2711 for (int i = 0; i != NumLaneElts; ++i) 2712 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2713 2714 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2715 2716 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2717 CI->getArgOperand(2)); 2718 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2719 Name.startswith("avx512.mask.unpckh."))) { 2720 Value *Op0 = CI->getArgOperand(0); 2721 Value *Op1 = CI->getArgOperand(1); 2722 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2723 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2724 2725 SmallVector<uint32_t, 64> Idxs(NumElts); 2726 for (int l = 0; l != NumElts; l += NumLaneElts) 2727 for (int i = 0; i != NumLaneElts; ++i) 2728 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2729 2730 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2731 2732 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2733 CI->getArgOperand(2)); 2734 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2735 Name.startswith("avx512.mask.pand."))) { 2736 VectorType *FTy = cast<VectorType>(CI->getType()); 2737 VectorType *ITy = VectorType::getInteger(FTy); 2738 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2739 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2740 Rep = Builder.CreateBitCast(Rep, FTy); 2741 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2742 CI->getArgOperand(2)); 2743 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2744 Name.startswith("avx512.mask.pandn."))) { 2745 VectorType *FTy = cast<VectorType>(CI->getType()); 2746 VectorType *ITy = VectorType::getInteger(FTy); 2747 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2748 Rep = Builder.CreateAnd(Rep, 2749 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2750 Rep = Builder.CreateBitCast(Rep, FTy); 2751 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2752 CI->getArgOperand(2)); 2753 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2754 Name.startswith("avx512.mask.por."))) { 2755 VectorType *FTy = cast<VectorType>(CI->getType()); 2756 VectorType *ITy = VectorType::getInteger(FTy); 2757 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2758 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2759 Rep = Builder.CreateBitCast(Rep, FTy); 2760 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2761 CI->getArgOperand(2)); 2762 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2763 Name.startswith("avx512.mask.pxor."))) { 2764 VectorType *FTy = cast<VectorType>(CI->getType()); 2765 VectorType *ITy = VectorType::getInteger(FTy); 2766 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2767 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2768 Rep = Builder.CreateBitCast(Rep, FTy); 2769 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2770 CI->getArgOperand(2)); 2771 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2772 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2773 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2774 CI->getArgOperand(2)); 2775 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2776 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2777 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2778 CI->getArgOperand(2)); 2779 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2780 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2781 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2782 CI->getArgOperand(2)); 2783 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2784 if (Name.endswith(".512")) { 2785 Intrinsic::ID IID; 2786 if (Name[17] == 's') 2787 IID = Intrinsic::x86_avx512_add_ps_512; 2788 else 2789 IID = Intrinsic::x86_avx512_add_pd_512; 2790 2791 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2792 { CI->getArgOperand(0), CI->getArgOperand(1), 2793 CI->getArgOperand(4) }); 2794 } else { 2795 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2796 } 2797 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2798 CI->getArgOperand(2)); 2799 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2800 if (Name.endswith(".512")) { 2801 Intrinsic::ID IID; 2802 if (Name[17] == 's') 2803 IID = Intrinsic::x86_avx512_div_ps_512; 2804 else 2805 IID = Intrinsic::x86_avx512_div_pd_512; 2806 2807 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2808 { CI->getArgOperand(0), CI->getArgOperand(1), 2809 CI->getArgOperand(4) }); 2810 } else { 2811 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2812 } 2813 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2814 CI->getArgOperand(2)); 2815 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2816 if (Name.endswith(".512")) { 2817 Intrinsic::ID IID; 2818 if (Name[17] == 's') 2819 IID = Intrinsic::x86_avx512_mul_ps_512; 2820 else 2821 IID = Intrinsic::x86_avx512_mul_pd_512; 2822 2823 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2824 { CI->getArgOperand(0), CI->getArgOperand(1), 2825 CI->getArgOperand(4) }); 2826 } else { 2827 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2828 } 2829 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2830 CI->getArgOperand(2)); 2831 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2832 if (Name.endswith(".512")) { 2833 Intrinsic::ID IID; 2834 if (Name[17] == 's') 2835 IID = Intrinsic::x86_avx512_sub_ps_512; 2836 else 2837 IID = Intrinsic::x86_avx512_sub_pd_512; 2838 2839 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2840 { CI->getArgOperand(0), CI->getArgOperand(1), 2841 CI->getArgOperand(4) }); 2842 } else { 2843 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2844 } 2845 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2846 CI->getArgOperand(2)); 2847 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2848 Name.startswith("avx512.mask.min.p")) && 2849 Name.drop_front(18) == ".512") { 2850 bool IsDouble = Name[17] == 'd'; 2851 bool IsMin = Name[13] == 'i'; 2852 static const Intrinsic::ID MinMaxTbl[2][2] = { 2853 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2854 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2855 }; 2856 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2857 2858 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2859 { CI->getArgOperand(0), CI->getArgOperand(1), 2860 CI->getArgOperand(4) }); 2861 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2862 CI->getArgOperand(2)); 2863 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2864 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2865 Intrinsic::ctlz, 2866 CI->getType()), 2867 { CI->getArgOperand(0), Builder.getInt1(false) }); 2868 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2869 CI->getArgOperand(1)); 2870 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2871 bool IsImmediate = Name[16] == 'i' || 2872 (Name.size() > 18 && Name[18] == 'i'); 2873 bool IsVariable = Name[16] == 'v'; 2874 char Size = Name[16] == '.' ? Name[17] : 2875 Name[17] == '.' ? Name[18] : 2876 Name[18] == '.' ? Name[19] : 2877 Name[20]; 2878 2879 Intrinsic::ID IID; 2880 if (IsVariable && Name[17] != '.') { 2881 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2882 IID = Intrinsic::x86_avx2_psllv_q; 2883 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2884 IID = Intrinsic::x86_avx2_psllv_q_256; 2885 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2886 IID = Intrinsic::x86_avx2_psllv_d; 2887 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2888 IID = Intrinsic::x86_avx2_psllv_d_256; 2889 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2890 IID = Intrinsic::x86_avx512_psllv_w_128; 2891 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2892 IID = Intrinsic::x86_avx512_psllv_w_256; 2893 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2894 IID = Intrinsic::x86_avx512_psllv_w_512; 2895 else 2896 llvm_unreachable("Unexpected size"); 2897 } else if (Name.endswith(".128")) { 2898 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2899 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2900 : Intrinsic::x86_sse2_psll_d; 2901 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2902 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2903 : Intrinsic::x86_sse2_psll_q; 2904 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2905 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2906 : Intrinsic::x86_sse2_psll_w; 2907 else 2908 llvm_unreachable("Unexpected size"); 2909 } else if (Name.endswith(".256")) { 2910 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2911 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2912 : Intrinsic::x86_avx2_psll_d; 2913 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2914 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2915 : Intrinsic::x86_avx2_psll_q; 2916 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2917 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2918 : Intrinsic::x86_avx2_psll_w; 2919 else 2920 llvm_unreachable("Unexpected size"); 2921 } else { 2922 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2923 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2924 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2925 Intrinsic::x86_avx512_psll_d_512; 2926 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2927 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2928 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2929 Intrinsic::x86_avx512_psll_q_512; 2930 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2931 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2932 : Intrinsic::x86_avx512_psll_w_512; 2933 else 2934 llvm_unreachable("Unexpected size"); 2935 } 2936 2937 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2938 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2939 bool IsImmediate = Name[16] == 'i' || 2940 (Name.size() > 18 && Name[18] == 'i'); 2941 bool IsVariable = Name[16] == 'v'; 2942 char Size = Name[16] == '.' ? Name[17] : 2943 Name[17] == '.' ? Name[18] : 2944 Name[18] == '.' ? Name[19] : 2945 Name[20]; 2946 2947 Intrinsic::ID IID; 2948 if (IsVariable && Name[17] != '.') { 2949 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2950 IID = Intrinsic::x86_avx2_psrlv_q; 2951 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2952 IID = Intrinsic::x86_avx2_psrlv_q_256; 2953 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2954 IID = Intrinsic::x86_avx2_psrlv_d; 2955 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2956 IID = Intrinsic::x86_avx2_psrlv_d_256; 2957 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2958 IID = Intrinsic::x86_avx512_psrlv_w_128; 2959 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2960 IID = Intrinsic::x86_avx512_psrlv_w_256; 2961 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2962 IID = Intrinsic::x86_avx512_psrlv_w_512; 2963 else 2964 llvm_unreachable("Unexpected size"); 2965 } else if (Name.endswith(".128")) { 2966 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2967 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2968 : Intrinsic::x86_sse2_psrl_d; 2969 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2970 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2971 : Intrinsic::x86_sse2_psrl_q; 2972 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2973 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2974 : Intrinsic::x86_sse2_psrl_w; 2975 else 2976 llvm_unreachable("Unexpected size"); 2977 } else if (Name.endswith(".256")) { 2978 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2979 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2980 : Intrinsic::x86_avx2_psrl_d; 2981 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2982 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2983 : Intrinsic::x86_avx2_psrl_q; 2984 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2985 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2986 : Intrinsic::x86_avx2_psrl_w; 2987 else 2988 llvm_unreachable("Unexpected size"); 2989 } else { 2990 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2991 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2992 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2993 Intrinsic::x86_avx512_psrl_d_512; 2994 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2995 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2996 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2997 Intrinsic::x86_avx512_psrl_q_512; 2998 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 2999 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 3000 : Intrinsic::x86_avx512_psrl_w_512; 3001 else 3002 llvm_unreachable("Unexpected size"); 3003 } 3004 3005 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3006 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 3007 bool IsImmediate = Name[16] == 'i' || 3008 (Name.size() > 18 && Name[18] == 'i'); 3009 bool IsVariable = Name[16] == 'v'; 3010 char Size = Name[16] == '.' ? Name[17] : 3011 Name[17] == '.' ? Name[18] : 3012 Name[18] == '.' ? Name[19] : 3013 Name[20]; 3014 3015 Intrinsic::ID IID; 3016 if (IsVariable && Name[17] != '.') { 3017 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 3018 IID = Intrinsic::x86_avx2_psrav_d; 3019 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 3020 IID = Intrinsic::x86_avx2_psrav_d_256; 3021 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 3022 IID = Intrinsic::x86_avx512_psrav_w_128; 3023 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 3024 IID = Intrinsic::x86_avx512_psrav_w_256; 3025 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 3026 IID = Intrinsic::x86_avx512_psrav_w_512; 3027 else 3028 llvm_unreachable("Unexpected size"); 3029 } else if (Name.endswith(".128")) { 3030 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 3031 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 3032 : Intrinsic::x86_sse2_psra_d; 3033 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 3034 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 3035 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 3036 Intrinsic::x86_avx512_psra_q_128; 3037 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 3038 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 3039 : Intrinsic::x86_sse2_psra_w; 3040 else 3041 llvm_unreachable("Unexpected size"); 3042 } else if (Name.endswith(".256")) { 3043 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 3044 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 3045 : Intrinsic::x86_avx2_psra_d; 3046 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 3047 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 3048 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 3049 Intrinsic::x86_avx512_psra_q_256; 3050 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 3051 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 3052 : Intrinsic::x86_avx2_psra_w; 3053 else 3054 llvm_unreachable("Unexpected size"); 3055 } else { 3056 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 3057 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 3058 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 3059 Intrinsic::x86_avx512_psra_d_512; 3060 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 3061 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 3062 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 3063 Intrinsic::x86_avx512_psra_q_512; 3064 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 3065 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 3066 : Intrinsic::x86_avx512_psra_w_512; 3067 else 3068 llvm_unreachable("Unexpected size"); 3069 } 3070 3071 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3072 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 3073 Rep = upgradeMaskedMove(Builder, *CI); 3074 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 3075 Rep = UpgradeMaskToInt(Builder, *CI); 3076 } else if (IsX86 && Name.endswith(".movntdqa")) { 3077 Module *M = F->getParent(); 3078 MDNode *Node = MDNode::get( 3079 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 3080 3081 Value *Ptr = CI->getArgOperand(0); 3082 VectorType *VTy = cast<VectorType>(CI->getType()); 3083 3084 // Convert the type of the pointer to a pointer to the stored type. 3085 Value *BC = 3086 Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast"); 3087 LoadInst *LI = 3088 Builder.CreateAlignedLoad(VTy, BC, Align(VTy->getBitWidth() / 8)); 3089 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 3090 Rep = LI; 3091 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 3092 Name.startswith("fma.vfmsub.") || 3093 Name.startswith("fma.vfnmadd.") || 3094 Name.startswith("fma.vfnmsub."))) { 3095 bool NegMul = Name[6] == 'n'; 3096 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 3097 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 3098 3099 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3100 CI->getArgOperand(2) }; 3101 3102 if (IsScalar) { 3103 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3104 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3105 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3106 } 3107 3108 if (NegMul && !IsScalar) 3109 Ops[0] = Builder.CreateFNeg(Ops[0]); 3110 if (NegMul && IsScalar) 3111 Ops[1] = Builder.CreateFNeg(Ops[1]); 3112 if (NegAcc) 3113 Ops[2] = Builder.CreateFNeg(Ops[2]); 3114 3115 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3116 Intrinsic::fma, 3117 Ops[0]->getType()), 3118 Ops); 3119 3120 if (IsScalar) 3121 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 3122 (uint64_t)0); 3123 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 3124 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3125 CI->getArgOperand(2) }; 3126 3127 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3128 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3129 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3130 3131 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3132 Intrinsic::fma, 3133 Ops[0]->getType()), 3134 Ops); 3135 3136 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 3137 Rep, (uint64_t)0); 3138 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 3139 Name.startswith("avx512.maskz.vfmadd.s") || 3140 Name.startswith("avx512.mask3.vfmadd.s") || 3141 Name.startswith("avx512.mask3.vfmsub.s") || 3142 Name.startswith("avx512.mask3.vfnmsub.s"))) { 3143 bool IsMask3 = Name[11] == '3'; 3144 bool IsMaskZ = Name[11] == 'z'; 3145 // Drop the "avx512.mask." to make it easier. 3146 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3147 bool NegMul = Name[2] == 'n'; 3148 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3149 3150 Value *A = CI->getArgOperand(0); 3151 Value *B = CI->getArgOperand(1); 3152 Value *C = CI->getArgOperand(2); 3153 3154 if (NegMul && (IsMask3 || IsMaskZ)) 3155 A = Builder.CreateFNeg(A); 3156 if (NegMul && !(IsMask3 || IsMaskZ)) 3157 B = Builder.CreateFNeg(B); 3158 if (NegAcc) 3159 C = Builder.CreateFNeg(C); 3160 3161 A = Builder.CreateExtractElement(A, (uint64_t)0); 3162 B = Builder.CreateExtractElement(B, (uint64_t)0); 3163 C = Builder.CreateExtractElement(C, (uint64_t)0); 3164 3165 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 3166 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 3167 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 3168 3169 Intrinsic::ID IID; 3170 if (Name.back() == 'd') 3171 IID = Intrinsic::x86_avx512_vfmadd_f64; 3172 else 3173 IID = Intrinsic::x86_avx512_vfmadd_f32; 3174 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 3175 Rep = Builder.CreateCall(FMA, Ops); 3176 } else { 3177 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3178 Intrinsic::fma, 3179 A->getType()); 3180 Rep = Builder.CreateCall(FMA, { A, B, C }); 3181 } 3182 3183 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 3184 IsMask3 ? C : A; 3185 3186 // For Mask3 with NegAcc, we need to create a new extractelement that 3187 // avoids the negation above. 3188 if (NegAcc && IsMask3) 3189 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 3190 (uint64_t)0); 3191 3192 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 3193 Rep, PassThru); 3194 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 3195 Rep, (uint64_t)0); 3196 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 3197 Name.startswith("avx512.mask.vfnmadd.p") || 3198 Name.startswith("avx512.mask.vfnmsub.p") || 3199 Name.startswith("avx512.mask3.vfmadd.p") || 3200 Name.startswith("avx512.mask3.vfmsub.p") || 3201 Name.startswith("avx512.mask3.vfnmsub.p") || 3202 Name.startswith("avx512.maskz.vfmadd.p"))) { 3203 bool IsMask3 = Name[11] == '3'; 3204 bool IsMaskZ = Name[11] == 'z'; 3205 // Drop the "avx512.mask." to make it easier. 3206 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3207 bool NegMul = Name[2] == 'n'; 3208 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3209 3210 Value *A = CI->getArgOperand(0); 3211 Value *B = CI->getArgOperand(1); 3212 Value *C = CI->getArgOperand(2); 3213 3214 if (NegMul && (IsMask3 || IsMaskZ)) 3215 A = Builder.CreateFNeg(A); 3216 if (NegMul && !(IsMask3 || IsMaskZ)) 3217 B = Builder.CreateFNeg(B); 3218 if (NegAcc) 3219 C = Builder.CreateFNeg(C); 3220 3221 if (CI->getNumArgOperands() == 5 && 3222 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3223 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3224 Intrinsic::ID IID; 3225 // Check the character before ".512" in string. 3226 if (Name[Name.size()-5] == 's') 3227 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 3228 else 3229 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 3230 3231 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3232 { A, B, C, CI->getArgOperand(4) }); 3233 } else { 3234 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3235 Intrinsic::fma, 3236 A->getType()); 3237 Rep = Builder.CreateCall(FMA, { A, B, C }); 3238 } 3239 3240 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3241 IsMask3 ? CI->getArgOperand(2) : 3242 CI->getArgOperand(0); 3243 3244 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3245 } else if (IsX86 && Name.startswith("fma.vfmsubadd.p")) { 3246 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3247 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3248 Intrinsic::ID IID; 3249 if (VecWidth == 128 && EltWidth == 32) 3250 IID = Intrinsic::x86_fma_vfmaddsub_ps; 3251 else if (VecWidth == 256 && EltWidth == 32) 3252 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 3253 else if (VecWidth == 128 && EltWidth == 64) 3254 IID = Intrinsic::x86_fma_vfmaddsub_pd; 3255 else if (VecWidth == 256 && EltWidth == 64) 3256 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 3257 else 3258 llvm_unreachable("Unexpected intrinsic"); 3259 3260 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3261 CI->getArgOperand(2) }; 3262 Ops[2] = Builder.CreateFNeg(Ops[2]); 3263 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3264 Ops); 3265 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3266 Name.startswith("avx512.mask3.vfmaddsub.p") || 3267 Name.startswith("avx512.maskz.vfmaddsub.p") || 3268 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3269 bool IsMask3 = Name[11] == '3'; 3270 bool IsMaskZ = Name[11] == 'z'; 3271 // Drop the "avx512.mask." to make it easier. 3272 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3273 bool IsSubAdd = Name[3] == 's'; 3274 if (CI->getNumArgOperands() == 5) { 3275 Intrinsic::ID IID; 3276 // Check the character before ".512" in string. 3277 if (Name[Name.size()-5] == 's') 3278 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3279 else 3280 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3281 3282 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3283 CI->getArgOperand(2), CI->getArgOperand(4) }; 3284 if (IsSubAdd) 3285 Ops[2] = Builder.CreateFNeg(Ops[2]); 3286 3287 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3288 Ops); 3289 } else { 3290 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 3291 3292 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3293 CI->getArgOperand(2) }; 3294 3295 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3296 Ops[0]->getType()); 3297 Value *Odd = Builder.CreateCall(FMA, Ops); 3298 Ops[2] = Builder.CreateFNeg(Ops[2]); 3299 Value *Even = Builder.CreateCall(FMA, Ops); 3300 3301 if (IsSubAdd) 3302 std::swap(Even, Odd); 3303 3304 SmallVector<uint32_t, 32> Idxs(NumElts); 3305 for (int i = 0; i != NumElts; ++i) 3306 Idxs[i] = i + (i % 2) * NumElts; 3307 3308 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3309 } 3310 3311 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3312 IsMask3 ? CI->getArgOperand(2) : 3313 CI->getArgOperand(0); 3314 3315 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3316 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3317 Name.startswith("avx512.maskz.pternlog."))) { 3318 bool ZeroMask = Name[11] == 'z'; 3319 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3320 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3321 Intrinsic::ID IID; 3322 if (VecWidth == 128 && EltWidth == 32) 3323 IID = Intrinsic::x86_avx512_pternlog_d_128; 3324 else if (VecWidth == 256 && EltWidth == 32) 3325 IID = Intrinsic::x86_avx512_pternlog_d_256; 3326 else if (VecWidth == 512 && EltWidth == 32) 3327 IID = Intrinsic::x86_avx512_pternlog_d_512; 3328 else if (VecWidth == 128 && EltWidth == 64) 3329 IID = Intrinsic::x86_avx512_pternlog_q_128; 3330 else if (VecWidth == 256 && EltWidth == 64) 3331 IID = Intrinsic::x86_avx512_pternlog_q_256; 3332 else if (VecWidth == 512 && EltWidth == 64) 3333 IID = Intrinsic::x86_avx512_pternlog_q_512; 3334 else 3335 llvm_unreachable("Unexpected intrinsic"); 3336 3337 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3338 CI->getArgOperand(2), CI->getArgOperand(3) }; 3339 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3340 Args); 3341 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3342 : CI->getArgOperand(0); 3343 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3344 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3345 Name.startswith("avx512.maskz.vpmadd52"))) { 3346 bool ZeroMask = Name[11] == 'z'; 3347 bool High = Name[20] == 'h' || Name[21] == 'h'; 3348 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3349 Intrinsic::ID IID; 3350 if (VecWidth == 128 && !High) 3351 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3352 else if (VecWidth == 256 && !High) 3353 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3354 else if (VecWidth == 512 && !High) 3355 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3356 else if (VecWidth == 128 && High) 3357 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3358 else if (VecWidth == 256 && High) 3359 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3360 else if (VecWidth == 512 && High) 3361 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3362 else 3363 llvm_unreachable("Unexpected intrinsic"); 3364 3365 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3366 CI->getArgOperand(2) }; 3367 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3368 Args); 3369 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3370 : CI->getArgOperand(0); 3371 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3372 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3373 Name.startswith("avx512.mask.vpermt2var.") || 3374 Name.startswith("avx512.maskz.vpermt2var."))) { 3375 bool ZeroMask = Name[11] == 'z'; 3376 bool IndexForm = Name[17] == 'i'; 3377 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3378 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3379 Name.startswith("avx512.maskz.vpdpbusd.") || 3380 Name.startswith("avx512.mask.vpdpbusds.") || 3381 Name.startswith("avx512.maskz.vpdpbusds."))) { 3382 bool ZeroMask = Name[11] == 'z'; 3383 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3384 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3385 Intrinsic::ID IID; 3386 if (VecWidth == 128 && !IsSaturating) 3387 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3388 else if (VecWidth == 256 && !IsSaturating) 3389 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3390 else if (VecWidth == 512 && !IsSaturating) 3391 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3392 else if (VecWidth == 128 && IsSaturating) 3393 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3394 else if (VecWidth == 256 && IsSaturating) 3395 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3396 else if (VecWidth == 512 && IsSaturating) 3397 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3398 else 3399 llvm_unreachable("Unexpected intrinsic"); 3400 3401 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3402 CI->getArgOperand(2) }; 3403 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3404 Args); 3405 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3406 : CI->getArgOperand(0); 3407 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3408 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3409 Name.startswith("avx512.maskz.vpdpwssd.") || 3410 Name.startswith("avx512.mask.vpdpwssds.") || 3411 Name.startswith("avx512.maskz.vpdpwssds."))) { 3412 bool ZeroMask = Name[11] == 'z'; 3413 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3414 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3415 Intrinsic::ID IID; 3416 if (VecWidth == 128 && !IsSaturating) 3417 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3418 else if (VecWidth == 256 && !IsSaturating) 3419 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3420 else if (VecWidth == 512 && !IsSaturating) 3421 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3422 else if (VecWidth == 128 && IsSaturating) 3423 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3424 else if (VecWidth == 256 && IsSaturating) 3425 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3426 else if (VecWidth == 512 && IsSaturating) 3427 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3428 else 3429 llvm_unreachable("Unexpected intrinsic"); 3430 3431 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3432 CI->getArgOperand(2) }; 3433 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3434 Args); 3435 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3436 : CI->getArgOperand(0); 3437 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3438 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3439 Name == "addcarry.u32" || Name == "addcarry.u64" || 3440 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3441 Intrinsic::ID IID; 3442 if (Name[0] == 'a' && Name.back() == '2') 3443 IID = Intrinsic::x86_addcarry_32; 3444 else if (Name[0] == 'a' && Name.back() == '4') 3445 IID = Intrinsic::x86_addcarry_64; 3446 else if (Name[0] == 's' && Name.back() == '2') 3447 IID = Intrinsic::x86_subborrow_32; 3448 else if (Name[0] == 's' && Name.back() == '4') 3449 IID = Intrinsic::x86_subborrow_64; 3450 else 3451 llvm_unreachable("Unexpected intrinsic"); 3452 3453 // Make a call with 3 operands. 3454 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3455 CI->getArgOperand(2)}; 3456 Value *NewCall = Builder.CreateCall( 3457 Intrinsic::getDeclaration(CI->getModule(), IID), 3458 Args); 3459 3460 // Extract the second result and store it. 3461 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3462 // Cast the pointer to the right type. 3463 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3464 llvm::PointerType::getUnqual(Data->getType())); 3465 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3466 // Replace the original call result with the first result of the new call. 3467 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3468 3469 CI->replaceAllUsesWith(CF); 3470 Rep = nullptr; 3471 } else if (IsX86 && Name.startswith("avx512.mask.") && 3472 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3473 // Rep will be updated by the call in the condition. 3474 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3475 Value *Arg = CI->getArgOperand(0); 3476 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3477 Value *Cmp = Builder.CreateICmpSGE( 3478 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3479 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3480 } else if (IsNVVM && (Name.startswith("atomic.load.add.f32.p") || 3481 Name.startswith("atomic.load.add.f64.p"))) { 3482 Value *Ptr = CI->getArgOperand(0); 3483 Value *Val = CI->getArgOperand(1); 3484 Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, 3485 AtomicOrdering::SequentiallyConsistent); 3486 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3487 Name == "max.ui" || Name == "max.ull")) { 3488 Value *Arg0 = CI->getArgOperand(0); 3489 Value *Arg1 = CI->getArgOperand(1); 3490 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3491 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3492 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3493 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3494 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3495 Name == "min.ui" || Name == "min.ull")) { 3496 Value *Arg0 = CI->getArgOperand(0); 3497 Value *Arg1 = CI->getArgOperand(1); 3498 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3499 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3500 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3501 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3502 } else if (IsNVVM && Name == "clz.ll") { 3503 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3504 Value *Arg = CI->getArgOperand(0); 3505 Value *Ctlz = Builder.CreateCall( 3506 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3507 {Arg->getType()}), 3508 {Arg, Builder.getFalse()}, "ctlz"); 3509 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3510 } else if (IsNVVM && Name == "popc.ll") { 3511 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3512 // i64. 3513 Value *Arg = CI->getArgOperand(0); 3514 Value *Popc = Builder.CreateCall( 3515 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3516 {Arg->getType()}), 3517 Arg, "ctpop"); 3518 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3519 } else if (IsNVVM && Name == "h2f") { 3520 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3521 F->getParent(), Intrinsic::convert_from_fp16, 3522 {Builder.getFloatTy()}), 3523 CI->getArgOperand(0), "h2f"); 3524 } else { 3525 llvm_unreachable("Unknown function for CallInst upgrade."); 3526 } 3527 3528 if (Rep) 3529 CI->replaceAllUsesWith(Rep); 3530 CI->eraseFromParent(); 3531 return; 3532 } 3533 3534 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3535 // Handle generic mangling change, but nothing else 3536 assert( 3537 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3538 "Unknown function for CallInst upgrade and isn't just a name change"); 3539 CI->setCalledFunction(NewFn); 3540 }; 3541 CallInst *NewCall = nullptr; 3542 switch (NewFn->getIntrinsicID()) { 3543 default: { 3544 DefaultCase(); 3545 return; 3546 } 3547 case Intrinsic::experimental_vector_reduce_v2_fmul: { 3548 SmallVector<Value *, 2> Args; 3549 if (CI->isFast()) 3550 Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0)); 3551 else 3552 Args.push_back(CI->getOperand(0)); 3553 Args.push_back(CI->getOperand(1)); 3554 NewCall = Builder.CreateCall(NewFn, Args); 3555 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3556 break; 3557 } 3558 case Intrinsic::experimental_vector_reduce_v2_fadd: { 3559 SmallVector<Value *, 2> Args; 3560 if (CI->isFast()) 3561 Args.push_back(Constant::getNullValue(CI->getOperand(0)->getType())); 3562 else 3563 Args.push_back(CI->getOperand(0)); 3564 Args.push_back(CI->getOperand(1)); 3565 NewCall = Builder.CreateCall(NewFn, Args); 3566 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3567 break; 3568 } 3569 case Intrinsic::arm_neon_vld1: 3570 case Intrinsic::arm_neon_vld2: 3571 case Intrinsic::arm_neon_vld3: 3572 case Intrinsic::arm_neon_vld4: 3573 case Intrinsic::arm_neon_vld2lane: 3574 case Intrinsic::arm_neon_vld3lane: 3575 case Intrinsic::arm_neon_vld4lane: 3576 case Intrinsic::arm_neon_vst1: 3577 case Intrinsic::arm_neon_vst2: 3578 case Intrinsic::arm_neon_vst3: 3579 case Intrinsic::arm_neon_vst4: 3580 case Intrinsic::arm_neon_vst2lane: 3581 case Intrinsic::arm_neon_vst3lane: 3582 case Intrinsic::arm_neon_vst4lane: { 3583 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3584 CI->arg_operands().end()); 3585 NewCall = Builder.CreateCall(NewFn, Args); 3586 break; 3587 } 3588 3589 case Intrinsic::bitreverse: 3590 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3591 break; 3592 3593 case Intrinsic::ctlz: 3594 case Intrinsic::cttz: 3595 assert(CI->getNumArgOperands() == 1 && 3596 "Mismatch between function args and call args"); 3597 NewCall = 3598 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3599 break; 3600 3601 case Intrinsic::objectsize: { 3602 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3603 ? Builder.getFalse() 3604 : CI->getArgOperand(2); 3605 Value *Dynamic = 3606 CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3); 3607 NewCall = Builder.CreateCall( 3608 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic}); 3609 break; 3610 } 3611 3612 case Intrinsic::ctpop: 3613 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3614 break; 3615 3616 case Intrinsic::convert_from_fp16: 3617 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3618 break; 3619 3620 case Intrinsic::dbg_value: 3621 // Upgrade from the old version that had an extra offset argument. 3622 assert(CI->getNumArgOperands() == 4); 3623 // Drop nonzero offsets instead of attempting to upgrade them. 3624 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3625 if (Offset->isZeroValue()) { 3626 NewCall = Builder.CreateCall( 3627 NewFn, 3628 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3629 break; 3630 } 3631 CI->eraseFromParent(); 3632 return; 3633 3634 case Intrinsic::x86_xop_vfrcz_ss: 3635 case Intrinsic::x86_xop_vfrcz_sd: 3636 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3637 break; 3638 3639 case Intrinsic::x86_xop_vpermil2pd: 3640 case Intrinsic::x86_xop_vpermil2ps: 3641 case Intrinsic::x86_xop_vpermil2pd_256: 3642 case Intrinsic::x86_xop_vpermil2ps_256: { 3643 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3644 CI->arg_operands().end()); 3645 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3646 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3647 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3648 NewCall = Builder.CreateCall(NewFn, Args); 3649 break; 3650 } 3651 3652 case Intrinsic::x86_sse41_ptestc: 3653 case Intrinsic::x86_sse41_ptestz: 3654 case Intrinsic::x86_sse41_ptestnzc: { 3655 // The arguments for these intrinsics used to be v4f32, and changed 3656 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3657 // So, the only thing required is a bitcast for both arguments. 3658 // First, check the arguments have the old type. 3659 Value *Arg0 = CI->getArgOperand(0); 3660 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 3661 return; 3662 3663 // Old intrinsic, add bitcasts 3664 Value *Arg1 = CI->getArgOperand(1); 3665 3666 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 3667 3668 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3669 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3670 3671 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3672 break; 3673 } 3674 3675 case Intrinsic::x86_rdtscp: { 3676 // This used to take 1 arguments. If we have no arguments, it is already 3677 // upgraded. 3678 if (CI->getNumOperands() == 0) 3679 return; 3680 3681 NewCall = Builder.CreateCall(NewFn); 3682 // Extract the second result and store it. 3683 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3684 // Cast the pointer to the right type. 3685 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3686 llvm::PointerType::getUnqual(Data->getType())); 3687 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3688 // Replace the original call result with the first result of the new call. 3689 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3690 3691 std::string Name = std::string(CI->getName()); 3692 if (!Name.empty()) { 3693 CI->setName(Name + ".old"); 3694 NewCall->setName(Name); 3695 } 3696 CI->replaceAllUsesWith(TSC); 3697 CI->eraseFromParent(); 3698 return; 3699 } 3700 3701 case Intrinsic::x86_sse41_insertps: 3702 case Intrinsic::x86_sse41_dppd: 3703 case Intrinsic::x86_sse41_dpps: 3704 case Intrinsic::x86_sse41_mpsadbw: 3705 case Intrinsic::x86_avx_dp_ps_256: 3706 case Intrinsic::x86_avx2_mpsadbw: { 3707 // Need to truncate the last argument from i32 to i8 -- this argument models 3708 // an inherently 8-bit immediate operand to these x86 instructions. 3709 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3710 CI->arg_operands().end()); 3711 3712 // Replace the last argument with a trunc. 3713 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3714 NewCall = Builder.CreateCall(NewFn, Args); 3715 break; 3716 } 3717 3718 case Intrinsic::thread_pointer: { 3719 NewCall = Builder.CreateCall(NewFn, {}); 3720 break; 3721 } 3722 3723 case Intrinsic::invariant_start: 3724 case Intrinsic::invariant_end: 3725 case Intrinsic::masked_load: 3726 case Intrinsic::masked_store: 3727 case Intrinsic::masked_gather: 3728 case Intrinsic::masked_scatter: { 3729 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3730 CI->arg_operands().end()); 3731 NewCall = Builder.CreateCall(NewFn, Args); 3732 break; 3733 } 3734 3735 case Intrinsic::memcpy: 3736 case Intrinsic::memmove: 3737 case Intrinsic::memset: { 3738 // We have to make sure that the call signature is what we're expecting. 3739 // We only want to change the old signatures by removing the alignment arg: 3740 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3741 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3742 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3743 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3744 // Note: i8*'s in the above can be any pointer type 3745 if (CI->getNumArgOperands() != 5) { 3746 DefaultCase(); 3747 return; 3748 } 3749 // Remove alignment argument (3), and add alignment attributes to the 3750 // dest/src pointers. 3751 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3752 CI->getArgOperand(2), CI->getArgOperand(4)}; 3753 NewCall = Builder.CreateCall(NewFn, Args); 3754 auto *MemCI = cast<MemIntrinsic>(NewCall); 3755 // All mem intrinsics support dest alignment. 3756 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3757 MemCI->setDestAlignment(Align->getZExtValue()); 3758 // Memcpy/Memmove also support source alignment. 3759 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3760 MTI->setSourceAlignment(Align->getZExtValue()); 3761 break; 3762 } 3763 } 3764 assert(NewCall && "Should have either set this variable or returned through " 3765 "the default case"); 3766 std::string Name = std::string(CI->getName()); 3767 if (!Name.empty()) { 3768 CI->setName(Name + ".old"); 3769 NewCall->setName(Name); 3770 } 3771 CI->replaceAllUsesWith(NewCall); 3772 CI->eraseFromParent(); 3773 } 3774 3775 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3776 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3777 3778 // Check if this function should be upgraded and get the replacement function 3779 // if there is one. 3780 Function *NewFn; 3781 if (UpgradeIntrinsicFunction(F, NewFn)) { 3782 // Replace all users of the old function with the new function or new 3783 // instructions. This is not a range loop because the call is deleted. 3784 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3785 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3786 UpgradeIntrinsicCall(CI, NewFn); 3787 3788 // Remove old function, no longer used, from the module. 3789 F->eraseFromParent(); 3790 } 3791 } 3792 3793 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3794 // Check if the tag uses struct-path aware TBAA format. 3795 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3796 return &MD; 3797 3798 auto &Context = MD.getContext(); 3799 if (MD.getNumOperands() == 3) { 3800 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3801 MDNode *ScalarType = MDNode::get(Context, Elts); 3802 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3803 Metadata *Elts2[] = {ScalarType, ScalarType, 3804 ConstantAsMetadata::get( 3805 Constant::getNullValue(Type::getInt64Ty(Context))), 3806 MD.getOperand(2)}; 3807 return MDNode::get(Context, Elts2); 3808 } 3809 // Create a MDNode <MD, MD, offset 0> 3810 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3811 Type::getInt64Ty(Context)))}; 3812 return MDNode::get(Context, Elts); 3813 } 3814 3815 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3816 Instruction *&Temp) { 3817 if (Opc != Instruction::BitCast) 3818 return nullptr; 3819 3820 Temp = nullptr; 3821 Type *SrcTy = V->getType(); 3822 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3823 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3824 LLVMContext &Context = V->getContext(); 3825 3826 // We have no information about target data layout, so we assume that 3827 // the maximum pointer size is 64bit. 3828 Type *MidTy = Type::getInt64Ty(Context); 3829 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3830 3831 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3832 } 3833 3834 return nullptr; 3835 } 3836 3837 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3838 if (Opc != Instruction::BitCast) 3839 return nullptr; 3840 3841 Type *SrcTy = C->getType(); 3842 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3843 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3844 LLVMContext &Context = C->getContext(); 3845 3846 // We have no information about target data layout, so we assume that 3847 // the maximum pointer size is 64bit. 3848 Type *MidTy = Type::getInt64Ty(Context); 3849 3850 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3851 DestTy); 3852 } 3853 3854 return nullptr; 3855 } 3856 3857 /// Check the debug info version number, if it is out-dated, drop the debug 3858 /// info. Return true if module is modified. 3859 bool llvm::UpgradeDebugInfo(Module &M) { 3860 unsigned Version = getDebugMetadataVersionFromModule(M); 3861 if (Version == DEBUG_METADATA_VERSION) { 3862 bool BrokenDebugInfo = false; 3863 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3864 report_fatal_error("Broken module found, compilation aborted!"); 3865 if (!BrokenDebugInfo) 3866 // Everything is ok. 3867 return false; 3868 else { 3869 // Diagnose malformed debug info. 3870 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3871 M.getContext().diagnose(Diag); 3872 } 3873 } 3874 bool Modified = StripDebugInfo(M); 3875 if (Modified && Version != DEBUG_METADATA_VERSION) { 3876 // Diagnose a version mismatch. 3877 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3878 M.getContext().diagnose(DiagVersion); 3879 } 3880 return Modified; 3881 } 3882 3883 /// This checks for objc retain release marker which should be upgraded. It 3884 /// returns true if module is modified. 3885 static bool UpgradeRetainReleaseMarker(Module &M) { 3886 bool Changed = false; 3887 const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker"; 3888 NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey); 3889 if (ModRetainReleaseMarker) { 3890 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3891 if (Op) { 3892 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3893 if (ID) { 3894 SmallVector<StringRef, 4> ValueComp; 3895 ID->getString().split(ValueComp, "#"); 3896 if (ValueComp.size() == 2) { 3897 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3898 ID = MDString::get(M.getContext(), NewValue); 3899 } 3900 M.addModuleFlag(Module::Error, MarkerKey, ID); 3901 M.eraseNamedMetadata(ModRetainReleaseMarker); 3902 Changed = true; 3903 } 3904 } 3905 } 3906 return Changed; 3907 } 3908 3909 void llvm::UpgradeARCRuntime(Module &M) { 3910 // This lambda converts normal function calls to ARC runtime functions to 3911 // intrinsic calls. 3912 auto UpgradeToIntrinsic = [&](const char *OldFunc, 3913 llvm::Intrinsic::ID IntrinsicFunc) { 3914 Function *Fn = M.getFunction(OldFunc); 3915 3916 if (!Fn) 3917 return; 3918 3919 Function *NewFn = llvm::Intrinsic::getDeclaration(&M, IntrinsicFunc); 3920 3921 for (auto I = Fn->user_begin(), E = Fn->user_end(); I != E;) { 3922 CallInst *CI = dyn_cast<CallInst>(*I++); 3923 if (!CI || CI->getCalledFunction() != Fn) 3924 continue; 3925 3926 IRBuilder<> Builder(CI->getParent(), CI->getIterator()); 3927 FunctionType *NewFuncTy = NewFn->getFunctionType(); 3928 SmallVector<Value *, 2> Args; 3929 3930 // Don't upgrade the intrinsic if it's not valid to bitcast the return 3931 // value to the return type of the old function. 3932 if (NewFuncTy->getReturnType() != CI->getType() && 3933 !CastInst::castIsValid(Instruction::BitCast, CI, 3934 NewFuncTy->getReturnType())) 3935 continue; 3936 3937 bool InvalidCast = false; 3938 3939 for (unsigned I = 0, E = CI->getNumArgOperands(); I != E; ++I) { 3940 Value *Arg = CI->getArgOperand(I); 3941 3942 // Bitcast argument to the parameter type of the new function if it's 3943 // not a variadic argument. 3944 if (I < NewFuncTy->getNumParams()) { 3945 // Don't upgrade the intrinsic if it's not valid to bitcast the argument 3946 // to the parameter type of the new function. 3947 if (!CastInst::castIsValid(Instruction::BitCast, Arg, 3948 NewFuncTy->getParamType(I))) { 3949 InvalidCast = true; 3950 break; 3951 } 3952 Arg = Builder.CreateBitCast(Arg, NewFuncTy->getParamType(I)); 3953 } 3954 Args.push_back(Arg); 3955 } 3956 3957 if (InvalidCast) 3958 continue; 3959 3960 // Create a call instruction that calls the new function. 3961 CallInst *NewCall = Builder.CreateCall(NewFuncTy, NewFn, Args); 3962 NewCall->setTailCallKind(cast<CallInst>(CI)->getTailCallKind()); 3963 NewCall->setName(CI->getName()); 3964 3965 // Bitcast the return value back to the type of the old call. 3966 Value *NewRetVal = Builder.CreateBitCast(NewCall, CI->getType()); 3967 3968 if (!CI->use_empty()) 3969 CI->replaceAllUsesWith(NewRetVal); 3970 CI->eraseFromParent(); 3971 } 3972 3973 if (Fn->use_empty()) 3974 Fn->eraseFromParent(); 3975 }; 3976 3977 // Unconditionally convert a call to "clang.arc.use" to a call to 3978 // "llvm.objc.clang.arc.use". 3979 UpgradeToIntrinsic("clang.arc.use", llvm::Intrinsic::objc_clang_arc_use); 3980 3981 // Upgrade the retain release marker. If there is no need to upgrade 3982 // the marker, that means either the module is already new enough to contain 3983 // new intrinsics or it is not ARC. There is no need to upgrade runtime call. 3984 if (!UpgradeRetainReleaseMarker(M)) 3985 return; 3986 3987 std::pair<const char *, llvm::Intrinsic::ID> RuntimeFuncs[] = { 3988 {"objc_autorelease", llvm::Intrinsic::objc_autorelease}, 3989 {"objc_autoreleasePoolPop", llvm::Intrinsic::objc_autoreleasePoolPop}, 3990 {"objc_autoreleasePoolPush", llvm::Intrinsic::objc_autoreleasePoolPush}, 3991 {"objc_autoreleaseReturnValue", 3992 llvm::Intrinsic::objc_autoreleaseReturnValue}, 3993 {"objc_copyWeak", llvm::Intrinsic::objc_copyWeak}, 3994 {"objc_destroyWeak", llvm::Intrinsic::objc_destroyWeak}, 3995 {"objc_initWeak", llvm::Intrinsic::objc_initWeak}, 3996 {"objc_loadWeak", llvm::Intrinsic::objc_loadWeak}, 3997 {"objc_loadWeakRetained", llvm::Intrinsic::objc_loadWeakRetained}, 3998 {"objc_moveWeak", llvm::Intrinsic::objc_moveWeak}, 3999 {"objc_release", llvm::Intrinsic::objc_release}, 4000 {"objc_retain", llvm::Intrinsic::objc_retain}, 4001 {"objc_retainAutorelease", llvm::Intrinsic::objc_retainAutorelease}, 4002 {"objc_retainAutoreleaseReturnValue", 4003 llvm::Intrinsic::objc_retainAutoreleaseReturnValue}, 4004 {"objc_retainAutoreleasedReturnValue", 4005 llvm::Intrinsic::objc_retainAutoreleasedReturnValue}, 4006 {"objc_retainBlock", llvm::Intrinsic::objc_retainBlock}, 4007 {"objc_storeStrong", llvm::Intrinsic::objc_storeStrong}, 4008 {"objc_storeWeak", llvm::Intrinsic::objc_storeWeak}, 4009 {"objc_unsafeClaimAutoreleasedReturnValue", 4010 llvm::Intrinsic::objc_unsafeClaimAutoreleasedReturnValue}, 4011 {"objc_retainedObject", llvm::Intrinsic::objc_retainedObject}, 4012 {"objc_unretainedObject", llvm::Intrinsic::objc_unretainedObject}, 4013 {"objc_unretainedPointer", llvm::Intrinsic::objc_unretainedPointer}, 4014 {"objc_retain_autorelease", llvm::Intrinsic::objc_retain_autorelease}, 4015 {"objc_sync_enter", llvm::Intrinsic::objc_sync_enter}, 4016 {"objc_sync_exit", llvm::Intrinsic::objc_sync_exit}, 4017 {"objc_arc_annotation_topdown_bbstart", 4018 llvm::Intrinsic::objc_arc_annotation_topdown_bbstart}, 4019 {"objc_arc_annotation_topdown_bbend", 4020 llvm::Intrinsic::objc_arc_annotation_topdown_bbend}, 4021 {"objc_arc_annotation_bottomup_bbstart", 4022 llvm::Intrinsic::objc_arc_annotation_bottomup_bbstart}, 4023 {"objc_arc_annotation_bottomup_bbend", 4024 llvm::Intrinsic::objc_arc_annotation_bottomup_bbend}}; 4025 4026 for (auto &I : RuntimeFuncs) 4027 UpgradeToIntrinsic(I.first, I.second); 4028 } 4029 4030 bool llvm::UpgradeModuleFlags(Module &M) { 4031 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 4032 if (!ModFlags) 4033 return false; 4034 4035 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 4036 bool HasSwiftVersionFlag = false; 4037 uint8_t SwiftMajorVersion, SwiftMinorVersion; 4038 uint32_t SwiftABIVersion; 4039 auto Int8Ty = Type::getInt8Ty(M.getContext()); 4040 auto Int32Ty = Type::getInt32Ty(M.getContext()); 4041 4042 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 4043 MDNode *Op = ModFlags->getOperand(I); 4044 if (Op->getNumOperands() != 3) 4045 continue; 4046 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 4047 if (!ID) 4048 continue; 4049 if (ID->getString() == "Objective-C Image Info Version") 4050 HasObjCFlag = true; 4051 if (ID->getString() == "Objective-C Class Properties") 4052 HasClassProperties = true; 4053 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 4054 // field was Error and now they are Max. 4055 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 4056 if (auto *Behavior = 4057 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 4058 if (Behavior->getLimitedValue() == Module::Error) { 4059 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 4060 Metadata *Ops[3] = { 4061 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 4062 MDString::get(M.getContext(), ID->getString()), 4063 Op->getOperand(2)}; 4064 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4065 Changed = true; 4066 } 4067 } 4068 } 4069 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 4070 // section name so that llvm-lto will not complain about mismatching 4071 // module flags that is functionally the same. 4072 if (ID->getString() == "Objective-C Image Info Section") { 4073 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 4074 SmallVector<StringRef, 4> ValueComp; 4075 Value->getString().split(ValueComp, " "); 4076 if (ValueComp.size() != 1) { 4077 std::string NewValue; 4078 for (auto &S : ValueComp) 4079 NewValue += S.str(); 4080 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 4081 MDString::get(M.getContext(), NewValue)}; 4082 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4083 Changed = true; 4084 } 4085 } 4086 } 4087 4088 // IRUpgrader turns a i32 type "Objective-C Garbage Collection" into i8 value. 4089 // If the higher bits are set, it adds new module flag for swift info. 4090 if (ID->getString() == "Objective-C Garbage Collection") { 4091 auto Md = dyn_cast<ConstantAsMetadata>(Op->getOperand(2)); 4092 if (Md) { 4093 assert(Md->getValue() && "Expected non-empty metadata"); 4094 auto Type = Md->getValue()->getType(); 4095 if (Type == Int8Ty) 4096 continue; 4097 unsigned Val = Md->getValue()->getUniqueInteger().getZExtValue(); 4098 if ((Val & 0xff) != Val) { 4099 HasSwiftVersionFlag = true; 4100 SwiftABIVersion = (Val & 0xff00) >> 8; 4101 SwiftMajorVersion = (Val & 0xff000000) >> 24; 4102 SwiftMinorVersion = (Val & 0xff0000) >> 16; 4103 } 4104 Metadata *Ops[3] = { 4105 ConstantAsMetadata::get(ConstantInt::get(Int32Ty,Module::Error)), 4106 Op->getOperand(1), 4107 ConstantAsMetadata::get(ConstantInt::get(Int8Ty,Val & 0xff))}; 4108 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4109 Changed = true; 4110 } 4111 } 4112 } 4113 4114 // "Objective-C Class Properties" is recently added for Objective-C. We 4115 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 4116 // flag of value 0, so we can correclty downgrade this flag when trying to 4117 // link an ObjC bitcode without this module flag with an ObjC bitcode with 4118 // this module flag. 4119 if (HasObjCFlag && !HasClassProperties) { 4120 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 4121 (uint32_t)0); 4122 Changed = true; 4123 } 4124 4125 if (HasSwiftVersionFlag) { 4126 M.addModuleFlag(Module::Error, "Swift ABI Version", 4127 SwiftABIVersion); 4128 M.addModuleFlag(Module::Error, "Swift Major Version", 4129 ConstantInt::get(Int8Ty, SwiftMajorVersion)); 4130 M.addModuleFlag(Module::Error, "Swift Minor Version", 4131 ConstantInt::get(Int8Ty, SwiftMinorVersion)); 4132 Changed = true; 4133 } 4134 4135 return Changed; 4136 } 4137 4138 void llvm::UpgradeSectionAttributes(Module &M) { 4139 auto TrimSpaces = [](StringRef Section) -> std::string { 4140 SmallVector<StringRef, 5> Components; 4141 Section.split(Components, ','); 4142 4143 SmallString<32> Buffer; 4144 raw_svector_ostream OS(Buffer); 4145 4146 for (auto Component : Components) 4147 OS << ',' << Component.trim(); 4148 4149 return std::string(OS.str().substr(1)); 4150 }; 4151 4152 for (auto &GV : M.globals()) { 4153 if (!GV.hasSection()) 4154 continue; 4155 4156 StringRef Section = GV.getSection(); 4157 4158 if (!Section.startswith("__DATA, __objc_catlist")) 4159 continue; 4160 4161 // __DATA, __objc_catlist, regular, no_dead_strip 4162 // __DATA,__objc_catlist,regular,no_dead_strip 4163 GV.setSection(TrimSpaces(Section)); 4164 } 4165 } 4166 4167 static bool isOldLoopArgument(Metadata *MD) { 4168 auto *T = dyn_cast_or_null<MDTuple>(MD); 4169 if (!T) 4170 return false; 4171 if (T->getNumOperands() < 1) 4172 return false; 4173 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 4174 if (!S) 4175 return false; 4176 return S->getString().startswith("llvm.vectorizer."); 4177 } 4178 4179 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 4180 StringRef OldPrefix = "llvm.vectorizer."; 4181 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 4182 4183 if (OldTag == "llvm.vectorizer.unroll") 4184 return MDString::get(C, "llvm.loop.interleave.count"); 4185 4186 return MDString::get( 4187 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 4188 .str()); 4189 } 4190 4191 static Metadata *upgradeLoopArgument(Metadata *MD) { 4192 auto *T = dyn_cast_or_null<MDTuple>(MD); 4193 if (!T) 4194 return MD; 4195 if (T->getNumOperands() < 1) 4196 return MD; 4197 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 4198 if (!OldTag) 4199 return MD; 4200 if (!OldTag->getString().startswith("llvm.vectorizer.")) 4201 return MD; 4202 4203 // This has an old tag. Upgrade it. 4204 SmallVector<Metadata *, 8> Ops; 4205 Ops.reserve(T->getNumOperands()); 4206 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 4207 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 4208 Ops.push_back(T->getOperand(I)); 4209 4210 return MDTuple::get(T->getContext(), Ops); 4211 } 4212 4213 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 4214 auto *T = dyn_cast<MDTuple>(&N); 4215 if (!T) 4216 return &N; 4217 4218 if (none_of(T->operands(), isOldLoopArgument)) 4219 return &N; 4220 4221 SmallVector<Metadata *, 8> Ops; 4222 Ops.reserve(T->getNumOperands()); 4223 for (Metadata *MD : T->operands()) 4224 Ops.push_back(upgradeLoopArgument(MD)); 4225 4226 return MDTuple::get(T->getContext(), Ops); 4227 } 4228 4229 std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { 4230 std::string AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64"; 4231 4232 // If X86, and the datalayout matches the expected format, add pointer size 4233 // address spaces to the datalayout. 4234 if (!Triple(TT).isX86() || DL.contains(AddrSpaces)) 4235 return std::string(DL); 4236 4237 SmallVector<StringRef, 4> Groups; 4238 Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)"); 4239 if (!R.match(DL, &Groups)) 4240 return std::string(DL); 4241 4242 SmallString<1024> Buf; 4243 std::string Res = (Groups[1] + AddrSpaces + Groups[3]).toStringRef(Buf).str(); 4244 return Res; 4245 } 4246 4247 void llvm::UpgradeFramePointerAttributes(AttrBuilder &B) { 4248 StringRef FramePointer; 4249 if (B.contains("no-frame-pointer-elim")) { 4250 // The value can be "true" or "false". 4251 for (const auto &I : B.td_attrs()) 4252 if (I.first == "no-frame-pointer-elim") 4253 FramePointer = I.second == "true" ? "all" : "none"; 4254 B.removeAttribute("no-frame-pointer-elim"); 4255 } 4256 if (B.contains("no-frame-pointer-elim-non-leaf")) { 4257 // The value is ignored. "no-frame-pointer-elim"="true" takes priority. 4258 if (FramePointer != "all") 4259 FramePointer = "non-leaf"; 4260 B.removeAttribute("no-frame-pointer-elim-non-leaf"); 4261 } 4262 4263 if (!FramePointer.empty()) 4264 B.addAttribute("frame-pointer", FramePointer); 4265 } 4266