1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the auto-upgrade helper functions. 11 // This is where deprecated IR intrinsics and other IR features are updated to 12 // current specifications. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "llvm/IR/AutoUpgrade.h" 17 #include "llvm/IR/CFG.h" 18 #include "llvm/IR/CallSite.h" 19 #include "llvm/IR/Constants.h" 20 #include "llvm/IR/DIBuilder.h" 21 #include "llvm/IR/DebugInfo.h" 22 #include "llvm/IR/DiagnosticInfo.h" 23 #include "llvm/IR/Function.h" 24 #include "llvm/IR/IRBuilder.h" 25 #include "llvm/IR/Instruction.h" 26 #include "llvm/IR/IntrinsicInst.h" 27 #include "llvm/IR/LLVMContext.h" 28 #include "llvm/IR/Module.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Support/Regex.h" 31 #include <cstring> 32 using namespace llvm; 33 34 // Upgrade the declarations of the SSE4.1 functions whose arguments have 35 // changed their type from v4f32 to v2i64. 36 static bool UpgradeSSE41Function(Function* F, Intrinsic::ID IID, 37 Function *&NewFn) { 38 // Check whether this is an old version of the function, which received 39 // v4f32 arguments. 40 Type *Arg0Type = F->getFunctionType()->getParamType(0); 41 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 42 return false; 43 44 // Yes, it's old, replace it with new version. 45 F->setName(F->getName() + ".old"); 46 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 47 return true; 48 } 49 50 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 51 // arguments have changed their type from i32 to i8. 52 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 53 Function *&NewFn) { 54 // Check that the last argument is an i32. 55 Type *LastArgType = F->getFunctionType()->getParamType( 56 F->getFunctionType()->getNumParams() - 1); 57 if (!LastArgType->isIntegerTy(32)) 58 return false; 59 60 // Move this function aside and map down. 61 F->setName(F->getName() + ".old"); 62 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 63 return true; 64 } 65 66 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 67 assert(F && "Illegal to upgrade a non-existent Function."); 68 69 // Quickly eliminate it, if it's not a candidate. 70 StringRef Name = F->getName(); 71 if (Name.size() <= 8 || !Name.startswith("llvm.")) 72 return false; 73 Name = Name.substr(5); // Strip off "llvm." 74 75 switch (Name[0]) { 76 default: break; 77 case 'a': { 78 if (Name.startswith("arm.neon.vclz")) { 79 Type* args[2] = { 80 F->arg_begin()->getType(), 81 Type::getInt1Ty(F->getContext()) 82 }; 83 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 84 // the end of the name. Change name from llvm.arm.neon.vclz.* to 85 // llvm.ctlz.* 86 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 87 NewFn = Function::Create(fType, F->getLinkage(), 88 "llvm.ctlz." + Name.substr(14), F->getParent()); 89 return true; 90 } 91 if (Name.startswith("arm.neon.vcnt")) { 92 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 93 F->arg_begin()->getType()); 94 return true; 95 } 96 Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 97 if (vldRegex.match(Name)) { 98 auto fArgs = F->getFunctionType()->params(); 99 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 100 // Can't use Intrinsic::getDeclaration here as the return types might 101 // then only be structurally equal. 102 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 103 NewFn = Function::Create(fType, F->getLinkage(), 104 "llvm." + Name + ".p0i8", F->getParent()); 105 return true; 106 } 107 Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 108 if (vstRegex.match(Name)) { 109 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 110 Intrinsic::arm_neon_vst2, 111 Intrinsic::arm_neon_vst3, 112 Intrinsic::arm_neon_vst4}; 113 114 static const Intrinsic::ID StoreLaneInts[] = { 115 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 116 Intrinsic::arm_neon_vst4lane 117 }; 118 119 auto fArgs = F->getFunctionType()->params(); 120 Type *Tys[] = {fArgs[0], fArgs[1]}; 121 if (Name.find("lane") == StringRef::npos) 122 NewFn = Intrinsic::getDeclaration(F->getParent(), 123 StoreInts[fArgs.size() - 3], Tys); 124 else 125 NewFn = Intrinsic::getDeclaration(F->getParent(), 126 StoreLaneInts[fArgs.size() - 5], Tys); 127 return true; 128 } 129 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 130 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 131 return true; 132 } 133 break; 134 } 135 136 case 'c': { 137 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 138 F->setName(Name + ".old"); 139 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 140 F->arg_begin()->getType()); 141 return true; 142 } 143 if (Name.startswith("cttz.") && F->arg_size() == 1) { 144 F->setName(Name + ".old"); 145 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 146 F->arg_begin()->getType()); 147 return true; 148 } 149 break; 150 } 151 152 case 'o': 153 // We only need to change the name to match the mangling including the 154 // address space. 155 if (F->arg_size() == 2 && Name.startswith("objectsize.")) { 156 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 157 if (F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 158 F->setName(Name + ".old"); 159 NewFn = Intrinsic::getDeclaration(F->getParent(), 160 Intrinsic::objectsize, Tys); 161 return true; 162 } 163 } 164 break; 165 166 case 's': 167 if (Name == "stackprotectorcheck") { 168 NewFn = nullptr; 169 return true; 170 } 171 172 case 'x': { 173 if (Name.startswith("x86.sse2.pcmpeq.") || 174 Name.startswith("x86.sse2.pcmpgt.") || 175 Name.startswith("x86.avx2.pcmpeq.") || 176 Name.startswith("x86.avx2.pcmpgt.") || 177 Name.startswith("x86.avx2.vbroadcast") || 178 Name.startswith("x86.avx2.pbroadcast") || 179 Name.startswith("x86.avx.vpermil.") || 180 Name.startswith("x86.sse41.pmovsx") || 181 Name.startswith("x86.sse41.pmovzx") || 182 Name.startswith("x86.avx2.pmovsx") || 183 Name.startswith("x86.avx2.pmovzx") || 184 Name == "x86.sse2.cvtdq2pd" || 185 Name == "x86.sse2.cvtps2pd" || 186 Name == "x86.avx.cvtdq2.pd.256" || 187 Name == "x86.avx.cvt.ps2.pd.256" || 188 Name.startswith("x86.avx.vinsertf128.") || 189 Name == "x86.avx2.vinserti128" || 190 Name.startswith("x86.avx.vextractf128.") || 191 Name == "x86.avx2.vextracti128" || 192 Name.startswith("x86.avx.movnt.") || 193 Name == "x86.sse2.storel.dq" || 194 Name.startswith("x86.sse.storeu.") || 195 Name.startswith("x86.sse2.storeu.") || 196 Name.startswith("x86.avx.storeu.") || 197 Name.startswith("x86.avx512.mask.storeu.p") || 198 Name.startswith("x86.avx512.mask.storeu.b.") || 199 Name.startswith("x86.avx512.mask.storeu.w.") || 200 Name.startswith("x86.avx512.mask.storeu.d.") || 201 Name.startswith("x86.avx512.mask.storeu.q.") || 202 Name.startswith("x86.avx512.mask.store.p") || 203 Name.startswith("x86.avx512.mask.store.b.") || 204 Name.startswith("x86.avx512.mask.store.w.") || 205 Name.startswith("x86.avx512.mask.store.d.") || 206 Name.startswith("x86.avx512.mask.store.q.") || 207 Name.startswith("x86.avx512.mask.loadu.p") || 208 Name.startswith("x86.avx512.mask.loadu.b.") || 209 Name.startswith("x86.avx512.mask.loadu.w.") || 210 Name.startswith("x86.avx512.mask.loadu.d.") || 211 Name.startswith("x86.avx512.mask.loadu.q.") || 212 Name.startswith("x86.avx512.mask.load.p") || 213 Name.startswith("x86.avx512.mask.load.b.") || 214 Name.startswith("x86.avx512.mask.load.w.") || 215 Name.startswith("x86.avx512.mask.load.d.") || 216 Name.startswith("x86.avx512.mask.load.q.") || 217 Name == "x86.sse42.crc32.64.8" || 218 Name.startswith("x86.avx.vbroadcast.s") || 219 Name.startswith("x86.sse2.psll.dq") || 220 Name.startswith("x86.sse2.psrl.dq") || 221 Name.startswith("x86.avx2.psll.dq") || 222 Name.startswith("x86.avx2.psrl.dq") || 223 Name == "x86.sse41.pblendw" || 224 Name.startswith("x86.sse41.blendp") || 225 Name.startswith("x86.avx.blend.p") || 226 Name == "x86.avx2.pblendw" || 227 Name.startswith("x86.avx2.pblendd.") || 228 Name == "x86.avx2.vbroadcasti128" || 229 Name == "x86.xop.vpcmov" || 230 (Name.startswith("x86.xop.vpcom") && F->arg_size() == 2)) { 231 NewFn = nullptr; 232 return true; 233 } 234 // SSE4.1 ptest functions may have an old signature. 235 if (Name.startswith("x86.sse41.ptest")) { 236 if (Name == "x86.sse41.ptestc") 237 return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestc, NewFn); 238 if (Name == "x86.sse41.ptestz") 239 return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestz, NewFn); 240 if (Name == "x86.sse41.ptestnzc") 241 return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 242 } 243 // Several blend and other instructions with masks used the wrong number of 244 // bits. 245 if (Name == "x86.sse41.insertps") 246 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 247 NewFn); 248 if (Name == "x86.sse41.dppd") 249 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 250 NewFn); 251 if (Name == "x86.sse41.dpps") 252 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 253 NewFn); 254 if (Name == "x86.sse41.mpsadbw") 255 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 256 NewFn); 257 if (Name == "x86.avx.dp.ps.256") 258 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 259 NewFn); 260 if (Name == "x86.avx2.mpsadbw") 261 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 262 NewFn); 263 264 // frcz.ss/sd may need to have an argument dropped 265 if (Name.startswith("x86.xop.vfrcz.ss") && F->arg_size() == 2) { 266 F->setName(Name + ".old"); 267 NewFn = Intrinsic::getDeclaration(F->getParent(), 268 Intrinsic::x86_xop_vfrcz_ss); 269 return true; 270 } 271 if (Name.startswith("x86.xop.vfrcz.sd") && F->arg_size() == 2) { 272 F->setName(Name + ".old"); 273 NewFn = Intrinsic::getDeclaration(F->getParent(), 274 Intrinsic::x86_xop_vfrcz_sd); 275 return true; 276 } 277 // Fix the FMA4 intrinsics to remove the 4 278 if (Name.startswith("x86.fma4.")) { 279 F->setName("llvm.x86.fma" + Name.substr(8)); 280 NewFn = F; 281 return true; 282 } 283 break; 284 } 285 } 286 287 // This may not belong here. This function is effectively being overloaded 288 // to both detect an intrinsic which needs upgrading, and to provide the 289 // upgraded form of the intrinsic. We should perhaps have two separate 290 // functions for this. 291 return false; 292 } 293 294 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 295 NewFn = nullptr; 296 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 297 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 298 299 // Upgrade intrinsic attributes. This does not change the function. 300 if (NewFn) 301 F = NewFn; 302 if (Intrinsic::ID id = F->getIntrinsicID()) 303 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 304 return Upgraded; 305 } 306 307 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 308 // Nothing to do yet. 309 return false; 310 } 311 312 // Handles upgrading SSE2 and AVX2 PSLLDQ intrinsics by converting them 313 // to byte shuffles. 314 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, 315 Value *Op, unsigned Shift) { 316 Type *ResultTy = Op->getType(); 317 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 318 319 // Bitcast from a 64-bit element type to a byte element type. 320 Type *VecTy = VectorType::get(Type::getInt8Ty(C), NumElts); 321 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 322 323 // We'll be shuffling in zeroes. 324 Value *Res = Constant::getNullValue(VecTy); 325 326 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 327 // we'll just return the zero vector. 328 if (Shift < 16) { 329 int Idxs[32]; 330 // 256-bit version is split into two 16-byte lanes. 331 for (unsigned l = 0; l != NumElts; l += 16) 332 for (unsigned i = 0; i != 16; ++i) { 333 unsigned Idx = NumElts + i - Shift; 334 if (Idx < NumElts) 335 Idx -= NumElts - 16; // end of lane, switch operand. 336 Idxs[l + i] = Idx + l; 337 } 338 339 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 340 } 341 342 // Bitcast back to a 64-bit element type. 343 return Builder.CreateBitCast(Res, ResultTy, "cast"); 344 } 345 346 // Handles upgrading SSE2 and AVX2 PSRLDQ intrinsics by converting them 347 // to byte shuffles. 348 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, 349 Value *Op, 350 unsigned Shift) { 351 Type *ResultTy = Op->getType(); 352 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 353 354 // Bitcast from a 64-bit element type to a byte element type. 355 Type *VecTy = VectorType::get(Type::getInt8Ty(C), NumElts); 356 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 357 358 // We'll be shuffling in zeroes. 359 Value *Res = Constant::getNullValue(VecTy); 360 361 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 362 // we'll just return the zero vector. 363 if (Shift < 16) { 364 int Idxs[32]; 365 // 256-bit version is split into two 16-byte lanes. 366 for (unsigned l = 0; l != NumElts; l += 16) 367 for (unsigned i = 0; i != 16; ++i) { 368 unsigned Idx = i + Shift; 369 if (Idx >= 16) 370 Idx += NumElts - 16; // end of lane, switch operand. 371 Idxs[l + i] = Idx + l; 372 } 373 374 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 375 } 376 377 // Bitcast back to a 64-bit element type. 378 return Builder.CreateBitCast(Res, ResultTy, "cast"); 379 } 380 381 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, LLVMContext &C, 382 Value *Ptr, Value *Data, Value *Mask, 383 bool Aligned) { 384 // Cast the pointer to the right type. 385 Ptr = Builder.CreateBitCast(Ptr, 386 llvm::PointerType::getUnqual(Data->getType())); 387 unsigned Align = 388 Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; 389 390 // If the mask is all ones just emit a regular store. 391 if (const auto *C = dyn_cast<Constant>(Mask)) 392 if (C->isAllOnesValue()) 393 return Builder.CreateAlignedStore(Data, Ptr, Align); 394 395 // Convert the mask from an integer type to a vector of i1. 396 unsigned NumElts = Data->getType()->getVectorNumElements(); 397 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 398 cast<IntegerType>(Mask->getType())->getBitWidth()); 399 Mask = Builder.CreateBitCast(Mask, MaskTy); 400 401 // If we have less than 8 elements, then the starting mask was an i8 and 402 // we need to extract down to the right number of elements. 403 if (NumElts < 8) { 404 int Indices[4]; 405 for (unsigned i = 0; i != NumElts; ++i) 406 Indices[i] = i; 407 Mask = Builder.CreateShuffleVector(Mask, Mask, 408 makeArrayRef(Indices, NumElts), 409 "extract"); 410 } 411 412 return Builder.CreateMaskedStore(Data, Ptr, Align, Mask); 413 } 414 415 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, LLVMContext &C, 416 Value *Ptr, Value *Passthru, Value *Mask, 417 bool Aligned) { 418 // Cast the pointer to the right type. 419 Ptr = Builder.CreateBitCast(Ptr, 420 llvm::PointerType::getUnqual(Passthru->getType())); 421 unsigned Align = 422 Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1; 423 424 // If the mask is all ones just emit a regular store. 425 if (const auto *C = dyn_cast<Constant>(Mask)) 426 if (C->isAllOnesValue()) 427 return Builder.CreateAlignedLoad(Ptr, Align); 428 429 // Convert the mask from an integer type to a vector of i1. 430 unsigned NumElts = Passthru->getType()->getVectorNumElements(); 431 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 432 cast<IntegerType>(Mask->getType())->getBitWidth()); 433 Mask = Builder.CreateBitCast(Mask, MaskTy); 434 435 // If we have less than 8 elements, then the starting mask was an i8 and 436 // we need to extract down to the right number of elements. 437 if (NumElts < 8) { 438 int Indices[4]; 439 for (unsigned i = 0; i != NumElts; ++i) 440 Indices[i] = i; 441 Mask = Builder.CreateShuffleVector(Mask, Mask, 442 makeArrayRef(Indices, NumElts), 443 "extract"); 444 } 445 446 return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru); 447 } 448 449 // UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the 450 // upgraded intrinsic. All argument and return casting must be provided in 451 // order to seamlessly integrate with existing context. 452 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 453 Function *F = CI->getCalledFunction(); 454 LLVMContext &C = CI->getContext(); 455 IRBuilder<> Builder(C); 456 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 457 458 assert(F && "Intrinsic call is not direct?"); 459 460 if (!NewFn) { 461 // Get the Function's name. 462 StringRef Name = F->getName(); 463 464 Value *Rep; 465 // Upgrade packed integer vector compares intrinsics to compare instructions 466 if (Name.startswith("llvm.x86.sse2.pcmpeq.") || 467 Name.startswith("llvm.x86.avx2.pcmpeq.")) { 468 Rep = Builder.CreateICmpEQ(CI->getArgOperand(0), CI->getArgOperand(1), 469 "pcmpeq"); 470 // need to sign extend since icmp returns vector of i1 471 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 472 } else if (Name.startswith("llvm.x86.sse2.pcmpgt.") || 473 Name.startswith("llvm.x86.avx2.pcmpgt.")) { 474 Rep = Builder.CreateICmpSGT(CI->getArgOperand(0), CI->getArgOperand(1), 475 "pcmpgt"); 476 // need to sign extend since icmp returns vector of i1 477 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 478 } else if (Name == "llvm.x86.sse2.cvtdq2pd" || 479 Name == "llvm.x86.sse2.cvtps2pd" || 480 Name == "llvm.x86.avx.cvtdq2.pd.256" || 481 Name == "llvm.x86.avx.cvt.ps2.pd.256") { 482 // Lossless i32/float to double conversion. 483 // Extract the bottom elements if necessary and convert to double vector. 484 Value *Src = CI->getArgOperand(0); 485 VectorType *SrcTy = cast<VectorType>(Src->getType()); 486 VectorType *DstTy = cast<VectorType>(CI->getType()); 487 Rep = CI->getArgOperand(0); 488 489 unsigned NumDstElts = DstTy->getNumElements(); 490 if (NumDstElts < SrcTy->getNumElements()) { 491 assert(NumDstElts == 2 && "Unexpected vector size"); 492 const int ShuffleMask[2] = { 0, 1 }; 493 Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy), ShuffleMask); 494 } 495 496 bool Int2Double = (StringRef::npos != Name.find("cvtdq2")); 497 if (Int2Double) 498 Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd"); 499 else 500 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 501 } else if (Name.startswith("llvm.x86.avx.movnt.")) { 502 Module *M = F->getParent(); 503 SmallVector<Metadata *, 1> Elts; 504 Elts.push_back( 505 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 506 MDNode *Node = MDNode::get(C, Elts); 507 508 Value *Arg0 = CI->getArgOperand(0); 509 Value *Arg1 = CI->getArgOperand(1); 510 511 // Convert the type of the pointer to a pointer to the stored type. 512 Value *BC = Builder.CreateBitCast(Arg0, 513 PointerType::getUnqual(Arg1->getType()), 514 "cast"); 515 StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC, 32); 516 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 517 518 // Remove intrinsic. 519 CI->eraseFromParent(); 520 return; 521 } else if (Name == "llvm.x86.sse2.storel.dq") { 522 Value *Arg0 = CI->getArgOperand(0); 523 Value *Arg1 = CI->getArgOperand(1); 524 525 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 526 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 527 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 528 Value *BC = Builder.CreateBitCast(Arg0, 529 PointerType::getUnqual(Elt->getType()), 530 "cast"); 531 Builder.CreateAlignedStore(Elt, BC, 1); 532 533 // Remove intrinsic. 534 CI->eraseFromParent(); 535 return; 536 } else if (Name.startswith("llvm.x86.sse.storeu.") || 537 Name.startswith("llvm.x86.sse2.storeu.") || 538 Name.startswith("llvm.x86.avx.storeu.")) { 539 Value *Arg0 = CI->getArgOperand(0); 540 Value *Arg1 = CI->getArgOperand(1); 541 542 Arg0 = Builder.CreateBitCast(Arg0, 543 PointerType::getUnqual(Arg1->getType()), 544 "cast"); 545 Builder.CreateAlignedStore(Arg1, Arg0, 1); 546 547 // Remove intrinsic. 548 CI->eraseFromParent(); 549 return; 550 } else if (Name.startswith("llvm.x86.avx512.mask.storeu.p") || 551 Name.startswith("llvm.x86.avx512.mask.storeu.b.") || 552 Name.startswith("llvm.x86.avx512.mask.storeu.w.") || 553 Name.startswith("llvm.x86.avx512.mask.storeu.d.") || 554 Name.startswith("llvm.x86.avx512.mask.storeu.q.")) { 555 UpgradeMaskedStore(Builder, C, CI->getArgOperand(0), CI->getArgOperand(1), 556 CI->getArgOperand(2), /*Aligned*/false); 557 558 // Remove intrinsic. 559 CI->eraseFromParent(); 560 return; 561 } else if (Name.startswith("llvm.x86.avx512.mask.store.p") || 562 Name.startswith("llvm.x86.avx512.mask.store.b.") || 563 Name.startswith("llvm.x86.avx512.mask.store.w.") || 564 Name.startswith("llvm.x86.avx512.mask.store.d.") || 565 Name.startswith("llvm.x86.avx512.mask.store.q.")) { 566 UpgradeMaskedStore(Builder, C, CI->getArgOperand(0), CI->getArgOperand(1), 567 CI->getArgOperand(2), /*Aligned*/true); 568 569 // Remove intrinsic. 570 CI->eraseFromParent(); 571 return; 572 } else if (Name.startswith("llvm.x86.avx512.mask.loadu.p") || 573 Name.startswith("llvm.x86.avx512.mask.loadu.b.") || 574 Name.startswith("llvm.x86.avx512.mask.loadu.w.") || 575 Name.startswith("llvm.x86.avx512.mask.loadu.d.") || 576 Name.startswith("llvm.x86.avx512.mask.loadu.q.")) { 577 Rep = UpgradeMaskedLoad(Builder, C, CI->getArgOperand(0), 578 CI->getArgOperand(1), CI->getArgOperand(2), 579 /*Aligned*/false); 580 } else if (Name.startswith("llvm.x86.avx512.mask.load.p") || 581 Name.startswith("llvm.x86.avx512.mask.load.b.") || 582 Name.startswith("llvm.x86.avx512.mask.load.w.") || 583 Name.startswith("llvm.x86.avx512.mask.load.d.") || 584 Name.startswith("llvm.x86.avx512.mask.load.q.")) { 585 Rep = UpgradeMaskedLoad(Builder, C, CI->getArgOperand(0), 586 CI->getArgOperand(1),CI->getArgOperand(2), 587 /*Aligned*/true); 588 } else if (Name.startswith("llvm.x86.xop.vpcom")) { 589 Intrinsic::ID intID; 590 if (Name.endswith("ub")) 591 intID = Intrinsic::x86_xop_vpcomub; 592 else if (Name.endswith("uw")) 593 intID = Intrinsic::x86_xop_vpcomuw; 594 else if (Name.endswith("ud")) 595 intID = Intrinsic::x86_xop_vpcomud; 596 else if (Name.endswith("uq")) 597 intID = Intrinsic::x86_xop_vpcomuq; 598 else if (Name.endswith("b")) 599 intID = Intrinsic::x86_xop_vpcomb; 600 else if (Name.endswith("w")) 601 intID = Intrinsic::x86_xop_vpcomw; 602 else if (Name.endswith("d")) 603 intID = Intrinsic::x86_xop_vpcomd; 604 else if (Name.endswith("q")) 605 intID = Intrinsic::x86_xop_vpcomq; 606 else 607 llvm_unreachable("Unknown suffix"); 608 609 Name = Name.substr(18); // strip off "llvm.x86.xop.vpcom" 610 unsigned Imm; 611 if (Name.startswith("lt")) 612 Imm = 0; 613 else if (Name.startswith("le")) 614 Imm = 1; 615 else if (Name.startswith("gt")) 616 Imm = 2; 617 else if (Name.startswith("ge")) 618 Imm = 3; 619 else if (Name.startswith("eq")) 620 Imm = 4; 621 else if (Name.startswith("ne")) 622 Imm = 5; 623 else if (Name.startswith("false")) 624 Imm = 6; 625 else if (Name.startswith("true")) 626 Imm = 7; 627 else 628 llvm_unreachable("Unknown condition"); 629 630 Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID); 631 Rep = 632 Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1), 633 Builder.getInt8(Imm)}); 634 } else if (Name == "llvm.x86.xop.vpcmov") { 635 Value *Arg0 = CI->getArgOperand(0); 636 Value *Arg1 = CI->getArgOperand(1); 637 Value *Sel = CI->getArgOperand(2); 638 unsigned NumElts = CI->getType()->getVectorNumElements(); 639 Constant *MinusOne = ConstantVector::getSplat(NumElts, Builder.getInt64(-1)); 640 Value *NotSel = Builder.CreateXor(Sel, MinusOne); 641 Value *Sel0 = Builder.CreateAnd(Arg0, Sel); 642 Value *Sel1 = Builder.CreateAnd(Arg1, NotSel); 643 Rep = Builder.CreateOr(Sel0, Sel1); 644 } else if (Name == "llvm.x86.sse42.crc32.64.8") { 645 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 646 Intrinsic::x86_sse42_crc32_32_8); 647 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 648 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 649 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 650 } else if (Name.startswith("llvm.x86.avx.vbroadcast")) { 651 // Replace broadcasts with a series of insertelements. 652 Type *VecTy = CI->getType(); 653 Type *EltTy = VecTy->getVectorElementType(); 654 unsigned EltNum = VecTy->getVectorNumElements(); 655 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 656 EltTy->getPointerTo()); 657 Value *Load = Builder.CreateLoad(EltTy, Cast); 658 Type *I32Ty = Type::getInt32Ty(C); 659 Rep = UndefValue::get(VecTy); 660 for (unsigned I = 0; I < EltNum; ++I) 661 Rep = Builder.CreateInsertElement(Rep, Load, 662 ConstantInt::get(I32Ty, I)); 663 } else if (Name.startswith("llvm.x86.sse41.pmovsx") || 664 Name.startswith("llvm.x86.sse41.pmovzx") || 665 Name.startswith("llvm.x86.avx2.pmovsx") || 666 Name.startswith("llvm.x86.avx2.pmovzx")) { 667 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 668 VectorType *DstTy = cast<VectorType>(CI->getType()); 669 unsigned NumDstElts = DstTy->getNumElements(); 670 671 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 672 SmallVector<int, 8> ShuffleMask; 673 for (int i = 0; i != (int)NumDstElts; ++i) 674 ShuffleMask.push_back(i); 675 676 Value *SV = Builder.CreateShuffleVector( 677 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 678 679 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 680 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 681 : Builder.CreateZExt(SV, DstTy); 682 } else if (Name == "llvm.x86.avx2.vbroadcasti128") { 683 // Replace vbroadcasts with a vector shuffle. 684 Type *VT = VectorType::get(Type::getInt64Ty(C), 2); 685 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 686 PointerType::getUnqual(VT)); 687 Value *Load = Builder.CreateLoad(VT, Op); 688 const int Idxs[4] = { 0, 1, 0, 1 }; 689 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 690 Idxs); 691 } else if (Name.startswith("llvm.x86.avx2.pbroadcast") || 692 Name.startswith("llvm.x86.avx2.vbroadcast")) { 693 // Replace vp?broadcasts with a vector shuffle. 694 Value *Op = CI->getArgOperand(0); 695 unsigned NumElts = CI->getType()->getVectorNumElements(); 696 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); 697 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 698 Constant::getNullValue(MaskTy)); 699 } else if (Name == "llvm.x86.sse2.psll.dq" || 700 Name == "llvm.x86.avx2.psll.dq") { 701 // 128/256-bit shift left specified in bits. 702 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 703 Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 704 Shift / 8); // Shift is in bits. 705 } else if (Name == "llvm.x86.sse2.psrl.dq" || 706 Name == "llvm.x86.avx2.psrl.dq") { 707 // 128/256-bit shift right specified in bits. 708 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 709 Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 710 Shift / 8); // Shift is in bits. 711 } else if (Name == "llvm.x86.sse2.psll.dq.bs" || 712 Name == "llvm.x86.avx2.psll.dq.bs") { 713 // 128/256-bit shift left specified in bytes. 714 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 715 Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), Shift); 716 } else if (Name == "llvm.x86.sse2.psrl.dq.bs" || 717 Name == "llvm.x86.avx2.psrl.dq.bs") { 718 // 128/256-bit shift right specified in bytes. 719 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 720 Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), Shift); 721 } else if (Name == "llvm.x86.sse41.pblendw" || 722 Name.startswith("llvm.x86.sse41.blendp") || 723 Name.startswith("llvm.x86.avx.blend.p") || 724 Name == "llvm.x86.avx2.pblendw" || 725 Name.startswith("llvm.x86.avx2.pblendd.")) { 726 Value *Op0 = CI->getArgOperand(0); 727 Value *Op1 = CI->getArgOperand(1); 728 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 729 VectorType *VecTy = cast<VectorType>(CI->getType()); 730 unsigned NumElts = VecTy->getNumElements(); 731 732 SmallVector<Constant*, 16> Idxs; 733 for (unsigned i = 0; i != NumElts; ++i) { 734 unsigned Idx = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 735 Idxs.push_back(Builder.getInt32(Idx)); 736 } 737 738 Rep = Builder.CreateShuffleVector(Op0, Op1, ConstantVector::get(Idxs)); 739 } else if (Name.startswith("llvm.x86.avx.vinsertf128.") || 740 Name == "llvm.x86.avx2.vinserti128") { 741 Value *Op0 = CI->getArgOperand(0); 742 Value *Op1 = CI->getArgOperand(1); 743 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 744 VectorType *VecTy = cast<VectorType>(CI->getType()); 745 unsigned NumElts = VecTy->getNumElements(); 746 747 // Mask off the high bits of the immediate value; hardware ignores those. 748 Imm = Imm & 1; 749 750 // Extend the second operand into a vector that is twice as big. 751 Value *UndefV = UndefValue::get(Op1->getType()); 752 SmallVector<Constant*, 8> Idxs; 753 for (unsigned i = 0; i != NumElts; ++i) { 754 Idxs.push_back(Builder.getInt32(i)); 755 } 756 Rep = Builder.CreateShuffleVector(Op1, UndefV, ConstantVector::get(Idxs)); 757 758 // Insert the second operand into the first operand. 759 760 // Note that there is no guarantee that instruction lowering will actually 761 // produce a vinsertf128 instruction for the created shuffles. In 762 // particular, the 0 immediate case involves no lane changes, so it can 763 // be handled as a blend. 764 765 // Example of shuffle mask for 32-bit elements: 766 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 767 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 768 769 SmallVector<Constant*, 8> Idxs2; 770 // The low half of the result is either the low half of the 1st operand 771 // or the low half of the 2nd operand (the inserted vector). 772 for (unsigned i = 0; i != NumElts / 2; ++i) { 773 unsigned Idx = Imm ? i : (i + NumElts); 774 Idxs2.push_back(Builder.getInt32(Idx)); 775 } 776 // The high half of the result is either the low half of the 2nd operand 777 // (the inserted vector) or the high half of the 1st operand. 778 for (unsigned i = NumElts / 2; i != NumElts; ++i) { 779 unsigned Idx = Imm ? (i + NumElts / 2) : i; 780 Idxs2.push_back(Builder.getInt32(Idx)); 781 } 782 Rep = Builder.CreateShuffleVector(Op0, Rep, ConstantVector::get(Idxs2)); 783 } else if (Name.startswith("llvm.x86.avx.vextractf128.") || 784 Name == "llvm.x86.avx2.vextracti128") { 785 Value *Op0 = CI->getArgOperand(0); 786 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 787 VectorType *VecTy = cast<VectorType>(CI->getType()); 788 unsigned NumElts = VecTy->getNumElements(); 789 790 // Mask off the high bits of the immediate value; hardware ignores those. 791 Imm = Imm & 1; 792 793 // Get indexes for either the high half or low half of the input vector. 794 SmallVector<Constant*, 4> Idxs(NumElts); 795 for (unsigned i = 0; i != NumElts; ++i) { 796 unsigned Idx = Imm ? (i + NumElts) : i; 797 Idxs[i] = Builder.getInt32(Idx); 798 } 799 800 Value *UndefV = UndefValue::get(Op0->getType()); 801 Rep = Builder.CreateShuffleVector(Op0, UndefV, ConstantVector::get(Idxs)); 802 } else if (Name == "llvm.stackprotectorcheck") { 803 Rep = nullptr; 804 } else { 805 bool PD128 = false, PD256 = false, PS128 = false, PS256 = false; 806 if (Name == "llvm.x86.avx.vpermil.pd.256") 807 PD256 = true; 808 else if (Name == "llvm.x86.avx.vpermil.pd") 809 PD128 = true; 810 else if (Name == "llvm.x86.avx.vpermil.ps.256") 811 PS256 = true; 812 else if (Name == "llvm.x86.avx.vpermil.ps") 813 PS128 = true; 814 815 if (PD256 || PD128 || PS256 || PS128) { 816 Value *Op0 = CI->getArgOperand(0); 817 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 818 SmallVector<Constant*, 8> Idxs; 819 820 if (PD128) 821 for (unsigned i = 0; i != 2; ++i) 822 Idxs.push_back(Builder.getInt32((Imm >> i) & 0x1)); 823 else if (PD256) 824 for (unsigned l = 0; l != 4; l+=2) 825 for (unsigned i = 0; i != 2; ++i) 826 Idxs.push_back(Builder.getInt32(((Imm >> (l+i)) & 0x1) + l)); 827 else if (PS128) 828 for (unsigned i = 0; i != 4; ++i) 829 Idxs.push_back(Builder.getInt32((Imm >> (2 * i)) & 0x3)); 830 else if (PS256) 831 for (unsigned l = 0; l != 8; l+=4) 832 for (unsigned i = 0; i != 4; ++i) 833 Idxs.push_back(Builder.getInt32(((Imm >> (2 * i)) & 0x3) + l)); 834 else 835 llvm_unreachable("Unexpected function"); 836 837 Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs)); 838 } else { 839 llvm_unreachable("Unknown function for CallInst upgrade."); 840 } 841 } 842 843 if (Rep) 844 CI->replaceAllUsesWith(Rep); 845 CI->eraseFromParent(); 846 return; 847 } 848 849 std::string Name = CI->getName(); 850 if (!Name.empty()) 851 CI->setName(Name + ".old"); 852 853 switch (NewFn->getIntrinsicID()) { 854 default: 855 llvm_unreachable("Unknown function for CallInst upgrade."); 856 857 case Intrinsic::arm_neon_vld1: 858 case Intrinsic::arm_neon_vld2: 859 case Intrinsic::arm_neon_vld3: 860 case Intrinsic::arm_neon_vld4: 861 case Intrinsic::arm_neon_vld2lane: 862 case Intrinsic::arm_neon_vld3lane: 863 case Intrinsic::arm_neon_vld4lane: 864 case Intrinsic::arm_neon_vst1: 865 case Intrinsic::arm_neon_vst2: 866 case Intrinsic::arm_neon_vst3: 867 case Intrinsic::arm_neon_vst4: 868 case Intrinsic::arm_neon_vst2lane: 869 case Intrinsic::arm_neon_vst3lane: 870 case Intrinsic::arm_neon_vst4lane: { 871 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 872 CI->arg_operands().end()); 873 CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args)); 874 CI->eraseFromParent(); 875 return; 876 } 877 878 case Intrinsic::ctlz: 879 case Intrinsic::cttz: 880 assert(CI->getNumArgOperands() == 1 && 881 "Mismatch between function args and call args"); 882 CI->replaceAllUsesWith(Builder.CreateCall( 883 NewFn, {CI->getArgOperand(0), Builder.getFalse()}, Name)); 884 CI->eraseFromParent(); 885 return; 886 887 case Intrinsic::objectsize: 888 CI->replaceAllUsesWith(Builder.CreateCall( 889 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1)}, Name)); 890 CI->eraseFromParent(); 891 return; 892 893 case Intrinsic::ctpop: { 894 CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)})); 895 CI->eraseFromParent(); 896 return; 897 } 898 899 case Intrinsic::x86_xop_vfrcz_ss: 900 case Intrinsic::x86_xop_vfrcz_sd: 901 CI->replaceAllUsesWith( 902 Builder.CreateCall(NewFn, {CI->getArgOperand(1)}, Name)); 903 CI->eraseFromParent(); 904 return; 905 906 case Intrinsic::x86_sse41_ptestc: 907 case Intrinsic::x86_sse41_ptestz: 908 case Intrinsic::x86_sse41_ptestnzc: { 909 // The arguments for these intrinsics used to be v4f32, and changed 910 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 911 // So, the only thing required is a bitcast for both arguments. 912 // First, check the arguments have the old type. 913 Value *Arg0 = CI->getArgOperand(0); 914 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 915 return; 916 917 // Old intrinsic, add bitcasts 918 Value *Arg1 = CI->getArgOperand(1); 919 920 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 921 922 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 923 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 924 925 CallInst *NewCall = Builder.CreateCall(NewFn, {BC0, BC1}, Name); 926 CI->replaceAllUsesWith(NewCall); 927 CI->eraseFromParent(); 928 return; 929 } 930 931 case Intrinsic::x86_sse41_insertps: 932 case Intrinsic::x86_sse41_dppd: 933 case Intrinsic::x86_sse41_dpps: 934 case Intrinsic::x86_sse41_mpsadbw: 935 case Intrinsic::x86_avx_dp_ps_256: 936 case Intrinsic::x86_avx2_mpsadbw: { 937 // Need to truncate the last argument from i32 to i8 -- this argument models 938 // an inherently 8-bit immediate operand to these x86 instructions. 939 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 940 CI->arg_operands().end()); 941 942 // Replace the last argument with a trunc. 943 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 944 945 CallInst *NewCall = Builder.CreateCall(NewFn, Args); 946 CI->replaceAllUsesWith(NewCall); 947 CI->eraseFromParent(); 948 return; 949 } 950 951 case Intrinsic::thread_pointer: { 952 CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {})); 953 CI->eraseFromParent(); 954 return; 955 } 956 } 957 } 958 959 void llvm::UpgradeCallsToIntrinsic(Function *F) { 960 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 961 962 // Check if this function should be upgraded and get the replacement function 963 // if there is one. 964 Function *NewFn; 965 if (UpgradeIntrinsicFunction(F, NewFn)) { 966 // Replace all users of the old function with the new function or new 967 // instructions. This is not a range loop because the call is deleted. 968 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 969 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 970 UpgradeIntrinsicCall(CI, NewFn); 971 972 // Remove old function, no longer used, from the module. 973 F->eraseFromParent(); 974 } 975 } 976 977 void llvm::UpgradeInstWithTBAATag(Instruction *I) { 978 MDNode *MD = I->getMetadata(LLVMContext::MD_tbaa); 979 assert(MD && "UpgradeInstWithTBAATag should have a TBAA tag"); 980 // Check if the tag uses struct-path aware TBAA format. 981 if (isa<MDNode>(MD->getOperand(0)) && MD->getNumOperands() >= 3) 982 return; 983 984 if (MD->getNumOperands() == 3) { 985 Metadata *Elts[] = {MD->getOperand(0), MD->getOperand(1)}; 986 MDNode *ScalarType = MDNode::get(I->getContext(), Elts); 987 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 988 Metadata *Elts2[] = {ScalarType, ScalarType, 989 ConstantAsMetadata::get(Constant::getNullValue( 990 Type::getInt64Ty(I->getContext()))), 991 MD->getOperand(2)}; 992 I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts2)); 993 } else { 994 // Create a MDNode <MD, MD, offset 0> 995 Metadata *Elts[] = {MD, MD, ConstantAsMetadata::get(Constant::getNullValue( 996 Type::getInt64Ty(I->getContext())))}; 997 I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts)); 998 } 999 } 1000 1001 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 1002 Instruction *&Temp) { 1003 if (Opc != Instruction::BitCast) 1004 return nullptr; 1005 1006 Temp = nullptr; 1007 Type *SrcTy = V->getType(); 1008 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 1009 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 1010 LLVMContext &Context = V->getContext(); 1011 1012 // We have no information about target data layout, so we assume that 1013 // the maximum pointer size is 64bit. 1014 Type *MidTy = Type::getInt64Ty(Context); 1015 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 1016 1017 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 1018 } 1019 1020 return nullptr; 1021 } 1022 1023 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 1024 if (Opc != Instruction::BitCast) 1025 return nullptr; 1026 1027 Type *SrcTy = C->getType(); 1028 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 1029 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 1030 LLVMContext &Context = C->getContext(); 1031 1032 // We have no information about target data layout, so we assume that 1033 // the maximum pointer size is 64bit. 1034 Type *MidTy = Type::getInt64Ty(Context); 1035 1036 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 1037 DestTy); 1038 } 1039 1040 return nullptr; 1041 } 1042 1043 /// Check the debug info version number, if it is out-dated, drop the debug 1044 /// info. Return true if module is modified. 1045 bool llvm::UpgradeDebugInfo(Module &M) { 1046 unsigned Version = getDebugMetadataVersionFromModule(M); 1047 if (Version == DEBUG_METADATA_VERSION) 1048 return false; 1049 1050 bool RetCode = StripDebugInfo(M); 1051 if (RetCode) { 1052 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 1053 M.getContext().diagnose(DiagVersion); 1054 } 1055 return RetCode; 1056 } 1057 1058 bool llvm::UpgradeModuleFlags(Module &M) { 1059 const NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 1060 if (!ModFlags) 1061 return false; 1062 1063 bool HasObjCFlag = false, HasClassProperties = false; 1064 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 1065 MDNode *Op = ModFlags->getOperand(I); 1066 if (Op->getNumOperands() < 2) 1067 continue; 1068 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 1069 if (!ID) 1070 continue; 1071 if (ID->getString() == "Objective-C Image Info Version") 1072 HasObjCFlag = true; 1073 if (ID->getString() == "Objective-C Class Properties") 1074 HasClassProperties = true; 1075 } 1076 // "Objective-C Class Properties" is recently added for Objective-C. We 1077 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 1078 // flag of value 0, so we can correclty report error when trying to link 1079 // an ObjC bitcode without this module flag with an ObjC bitcode with this 1080 // module flag. 1081 if (HasObjCFlag && !HasClassProperties) { 1082 M.addModuleFlag(llvm::Module::Error, "Objective-C Class Properties", 1083 (uint32_t)0); 1084 return true; 1085 } 1086 return false; 1087 } 1088 1089 static bool isOldLoopArgument(Metadata *MD) { 1090 auto *T = dyn_cast_or_null<MDTuple>(MD); 1091 if (!T) 1092 return false; 1093 if (T->getNumOperands() < 1) 1094 return false; 1095 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 1096 if (!S) 1097 return false; 1098 return S->getString().startswith("llvm.vectorizer."); 1099 } 1100 1101 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 1102 StringRef OldPrefix = "llvm.vectorizer."; 1103 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 1104 1105 if (OldTag == "llvm.vectorizer.unroll") 1106 return MDString::get(C, "llvm.loop.interleave.count"); 1107 1108 return MDString::get( 1109 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 1110 .str()); 1111 } 1112 1113 static Metadata *upgradeLoopArgument(Metadata *MD) { 1114 auto *T = dyn_cast_or_null<MDTuple>(MD); 1115 if (!T) 1116 return MD; 1117 if (T->getNumOperands() < 1) 1118 return MD; 1119 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 1120 if (!OldTag) 1121 return MD; 1122 if (!OldTag->getString().startswith("llvm.vectorizer.")) 1123 return MD; 1124 1125 // This has an old tag. Upgrade it. 1126 SmallVector<Metadata *, 8> Ops; 1127 Ops.reserve(T->getNumOperands()); 1128 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 1129 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 1130 Ops.push_back(T->getOperand(I)); 1131 1132 return MDTuple::get(T->getContext(), Ops); 1133 } 1134 1135 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 1136 auto *T = dyn_cast<MDTuple>(&N); 1137 if (!T) 1138 return &N; 1139 1140 if (!llvm::any_of(T->operands(), isOldLoopArgument)) 1141 return &N; 1142 1143 SmallVector<Metadata *, 8> Ops; 1144 Ops.reserve(T->getNumOperands()); 1145 for (Metadata *MD : T->operands()) 1146 Ops.push_back(upgradeLoopArgument(MD)); 1147 1148 return MDTuple::get(T->getContext(), Ops); 1149 } 1150