1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the auto-upgrade helper functions. 10 // This is where deprecated IR intrinsics and other IR features are updated to 11 // current specifications. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/IR/AutoUpgrade.h" 16 #include "llvm/ADT/StringSwitch.h" 17 #include "llvm/IR/Constants.h" 18 #include "llvm/IR/DIBuilder.h" 19 #include "llvm/IR/DebugInfo.h" 20 #include "llvm/IR/DiagnosticInfo.h" 21 #include "llvm/IR/Function.h" 22 #include "llvm/IR/IRBuilder.h" 23 #include "llvm/IR/Instruction.h" 24 #include "llvm/IR/InstVisitor.h" 25 #include "llvm/IR/IntrinsicInst.h" 26 #include "llvm/IR/IntrinsicsAArch64.h" 27 #include "llvm/IR/IntrinsicsARM.h" 28 #include "llvm/IR/IntrinsicsX86.h" 29 #include "llvm/IR/LLVMContext.h" 30 #include "llvm/IR/Module.h" 31 #include "llvm/IR/Verifier.h" 32 #include "llvm/Support/ErrorHandling.h" 33 #include "llvm/Support/Regex.h" 34 #include <cstring> 35 using namespace llvm; 36 37 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 38 39 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 40 // changed their type from v4f32 to v2i64. 41 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 42 Function *&NewFn) { 43 // Check whether this is an old version of the function, which received 44 // v4f32 arguments. 45 Type *Arg0Type = F->getFunctionType()->getParamType(0); 46 if (Arg0Type != FixedVectorType::get(Type::getFloatTy(F->getContext()), 4)) 47 return false; 48 49 // Yes, it's old, replace it with new version. 50 rename(F); 51 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 52 return true; 53 } 54 55 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 56 // arguments have changed their type from i32 to i8. 57 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 58 Function *&NewFn) { 59 // Check that the last argument is an i32. 60 Type *LastArgType = F->getFunctionType()->getParamType( 61 F->getFunctionType()->getNumParams() - 1); 62 if (!LastArgType->isIntegerTy(32)) 63 return false; 64 65 // Move this function aside and map down. 66 rename(F); 67 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 68 return true; 69 } 70 71 // Upgrade the declaration of fp compare intrinsics that change return type 72 // from scalar to vXi1 mask. 73 static bool UpgradeX86MaskedFPCompare(Function *F, Intrinsic::ID IID, 74 Function *&NewFn) { 75 // Check if the return type is a vector. 76 if (F->getReturnType()->isVectorTy()) 77 return false; 78 79 rename(F); 80 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 81 return true; 82 } 83 84 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 85 // All of the intrinsics matches below should be marked with which llvm 86 // version started autoupgrading them. At some point in the future we would 87 // like to use this information to remove upgrade code for some older 88 // intrinsics. It is currently undecided how we will determine that future 89 // point. 90 if (Name == "addcarryx.u32" || // Added in 8.0 91 Name == "addcarryx.u64" || // Added in 8.0 92 Name == "addcarry.u32" || // Added in 8.0 93 Name == "addcarry.u64" || // Added in 8.0 94 Name == "subborrow.u32" || // Added in 8.0 95 Name == "subborrow.u64" || // Added in 8.0 96 Name.startswith("sse2.padds.") || // Added in 8.0 97 Name.startswith("sse2.psubs.") || // Added in 8.0 98 Name.startswith("sse2.paddus.") || // Added in 8.0 99 Name.startswith("sse2.psubus.") || // Added in 8.0 100 Name.startswith("avx2.padds.") || // Added in 8.0 101 Name.startswith("avx2.psubs.") || // Added in 8.0 102 Name.startswith("avx2.paddus.") || // Added in 8.0 103 Name.startswith("avx2.psubus.") || // Added in 8.0 104 Name.startswith("avx512.padds.") || // Added in 8.0 105 Name.startswith("avx512.psubs.") || // Added in 8.0 106 Name.startswith("avx512.mask.padds.") || // Added in 8.0 107 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 108 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 109 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 110 Name=="ssse3.pabs.b.128" || // Added in 6.0 111 Name=="ssse3.pabs.w.128" || // Added in 6.0 112 Name=="ssse3.pabs.d.128" || // Added in 6.0 113 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 114 Name.startswith("fma.vfmadd.") || // Added in 7.0 115 Name.startswith("fma.vfmsub.") || // Added in 7.0 116 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 117 Name.startswith("fma.vfnmadd.") || // Added in 7.0 118 Name.startswith("fma.vfnmsub.") || // Added in 7.0 119 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 120 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 121 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 122 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 123 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 124 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 125 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 126 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 127 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 128 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 129 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 130 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 131 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 132 Name.startswith("avx512.kunpck") || //added in 6.0 133 Name.startswith("avx2.pabs.") || // Added in 6.0 134 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 135 Name.startswith("avx512.broadcastm") || // Added in 6.0 136 Name == "sse.sqrt.ss" || // Added in 7.0 137 Name == "sse2.sqrt.sd" || // Added in 7.0 138 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 139 Name.startswith("avx.sqrt.p") || // Added in 7.0 140 Name.startswith("sse2.sqrt.p") || // Added in 7.0 141 Name.startswith("sse.sqrt.p") || // Added in 7.0 142 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 143 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 144 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 145 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 146 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 147 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 148 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 149 Name.startswith("avx.vperm2f128.") || // Added in 6.0 150 Name == "avx2.vperm2i128" || // Added in 6.0 151 Name == "sse.add.ss" || // Added in 4.0 152 Name == "sse2.add.sd" || // Added in 4.0 153 Name == "sse.sub.ss" || // Added in 4.0 154 Name == "sse2.sub.sd" || // Added in 4.0 155 Name == "sse.mul.ss" || // Added in 4.0 156 Name == "sse2.mul.sd" || // Added in 4.0 157 Name == "sse.div.ss" || // Added in 4.0 158 Name == "sse2.div.sd" || // Added in 4.0 159 Name == "sse41.pmaxsb" || // Added in 3.9 160 Name == "sse2.pmaxs.w" || // Added in 3.9 161 Name == "sse41.pmaxsd" || // Added in 3.9 162 Name == "sse2.pmaxu.b" || // Added in 3.9 163 Name == "sse41.pmaxuw" || // Added in 3.9 164 Name == "sse41.pmaxud" || // Added in 3.9 165 Name == "sse41.pminsb" || // Added in 3.9 166 Name == "sse2.pmins.w" || // Added in 3.9 167 Name == "sse41.pminsd" || // Added in 3.9 168 Name == "sse2.pminu.b" || // Added in 3.9 169 Name == "sse41.pminuw" || // Added in 3.9 170 Name == "sse41.pminud" || // Added in 3.9 171 Name == "avx512.kand.w" || // Added in 7.0 172 Name == "avx512.kandn.w" || // Added in 7.0 173 Name == "avx512.knot.w" || // Added in 7.0 174 Name == "avx512.kor.w" || // Added in 7.0 175 Name == "avx512.kxor.w" || // Added in 7.0 176 Name == "avx512.kxnor.w" || // Added in 7.0 177 Name == "avx512.kortestc.w" || // Added in 7.0 178 Name == "avx512.kortestz.w" || // Added in 7.0 179 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 180 Name.startswith("avx2.pmax") || // Added in 3.9 181 Name.startswith("avx2.pmin") || // Added in 3.9 182 Name.startswith("avx512.mask.pmax") || // Added in 4.0 183 Name.startswith("avx512.mask.pmin") || // Added in 4.0 184 Name.startswith("avx2.vbroadcast") || // Added in 3.8 185 Name.startswith("avx2.pbroadcast") || // Added in 3.8 186 Name.startswith("avx.vpermil.") || // Added in 3.1 187 Name.startswith("sse2.pshuf") || // Added in 3.9 188 Name.startswith("avx512.pbroadcast") || // Added in 3.9 189 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 190 Name.startswith("avx512.mask.movddup") || // Added in 3.9 191 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 192 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 193 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 194 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 195 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 196 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 197 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 198 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 199 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 200 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 201 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 202 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 203 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 204 Name.startswith("avx512.mask.pand.") || // Added in 3.9 205 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 206 Name.startswith("avx512.mask.por.") || // Added in 3.9 207 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 208 Name.startswith("avx512.mask.and.") || // Added in 3.9 209 Name.startswith("avx512.mask.andn.") || // Added in 3.9 210 Name.startswith("avx512.mask.or.") || // Added in 3.9 211 Name.startswith("avx512.mask.xor.") || // Added in 3.9 212 Name.startswith("avx512.mask.padd.") || // Added in 4.0 213 Name.startswith("avx512.mask.psub.") || // Added in 4.0 214 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 215 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 216 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 217 Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0 218 Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0 219 Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0 220 Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0 221 Name == "avx512.mask.vcvtph2ps.128" || // Added in 11.0 222 Name == "avx512.mask.vcvtph2ps.256" || // Added in 11.0 223 Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0 224 Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0 225 Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0 226 Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0 227 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 228 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 229 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 230 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 231 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 232 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 233 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 234 Name == "avx512.cvtusi2sd" || // Added in 7.0 235 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 236 Name == "sse2.pmulu.dq" || // Added in 7.0 237 Name == "sse41.pmuldq" || // Added in 7.0 238 Name == "avx2.pmulu.dq" || // Added in 7.0 239 Name == "avx2.pmul.dq" || // Added in 7.0 240 Name == "avx512.pmulu.dq.512" || // Added in 7.0 241 Name == "avx512.pmul.dq.512" || // Added in 7.0 242 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 243 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 244 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 245 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 246 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 247 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 248 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 249 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 250 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 251 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 252 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 253 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 254 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 255 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 256 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 257 Name.startswith("avx512.cmp.p") || // Added in 12.0 258 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 259 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 260 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 261 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 262 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 263 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 264 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 265 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 266 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 267 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 268 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 269 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 270 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 271 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 272 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 273 Name.startswith("avx512.mask.pslli") || // Added in 4.0 274 Name.startswith("avx512.mask.psrai") || // Added in 4.0 275 Name.startswith("avx512.mask.psrli") || // Added in 4.0 276 Name.startswith("avx512.mask.psllv") || // Added in 4.0 277 Name.startswith("avx512.mask.psrav") || // Added in 4.0 278 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 279 Name.startswith("sse41.pmovsx") || // Added in 3.8 280 Name.startswith("sse41.pmovzx") || // Added in 3.9 281 Name.startswith("avx2.pmovsx") || // Added in 3.9 282 Name.startswith("avx2.pmovzx") || // Added in 3.9 283 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 284 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 285 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 286 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 287 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 289 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 290 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 291 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 292 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 293 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 294 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 295 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 296 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 297 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 298 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 299 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 300 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 301 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 302 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 303 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 304 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 305 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 306 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 307 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 308 Name.startswith("avx512.vpshld.") || // Added in 8.0 309 Name.startswith("avx512.vpshrd.") || // Added in 8.0 310 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 311 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 312 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 313 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 314 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 315 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 316 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 317 Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0 318 Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0 319 Name.startswith("avx512.mask.conflict.") || // Added in 9.0 320 Name == "avx512.mask.pmov.qd.256" || // Added in 9.0 321 Name == "avx512.mask.pmov.qd.512" || // Added in 9.0 322 Name == "avx512.mask.pmov.wb.256" || // Added in 9.0 323 Name == "avx512.mask.pmov.wb.512" || // Added in 9.0 324 Name == "sse.cvtsi2ss" || // Added in 7.0 325 Name == "sse.cvtsi642ss" || // Added in 7.0 326 Name == "sse2.cvtsi2sd" || // Added in 7.0 327 Name == "sse2.cvtsi642sd" || // Added in 7.0 328 Name == "sse2.cvtss2sd" || // Added in 7.0 329 Name == "sse2.cvtdq2pd" || // Added in 3.9 330 Name == "sse2.cvtdq2ps" || // Added in 7.0 331 Name == "sse2.cvtps2pd" || // Added in 3.9 332 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 333 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 334 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 335 Name.startswith("vcvtph2ps.") || // Added in 11.0 336 Name.startswith("avx.vinsertf128.") || // Added in 3.7 337 Name == "avx2.vinserti128" || // Added in 3.7 338 Name.startswith("avx512.mask.insert") || // Added in 4.0 339 Name.startswith("avx.vextractf128.") || // Added in 3.7 340 Name == "avx2.vextracti128" || // Added in 3.7 341 Name.startswith("avx512.mask.vextract") || // Added in 4.0 342 Name.startswith("sse4a.movnt.") || // Added in 3.9 343 Name.startswith("avx.movnt.") || // Added in 3.2 344 Name.startswith("avx512.storent.") || // Added in 3.9 345 Name == "sse41.movntdqa" || // Added in 5.0 346 Name == "avx2.movntdqa" || // Added in 5.0 347 Name == "avx512.movntdqa" || // Added in 5.0 348 Name == "sse2.storel.dq" || // Added in 3.9 349 Name.startswith("sse.storeu.") || // Added in 3.9 350 Name.startswith("sse2.storeu.") || // Added in 3.9 351 Name.startswith("avx.storeu.") || // Added in 3.9 352 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 353 Name.startswith("avx512.mask.store.p") || // Added in 3.9 354 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 355 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 356 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 357 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 358 Name == "avx512.mask.store.ss" || // Added in 7.0 359 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 360 Name.startswith("avx512.mask.load.") || // Added in 3.9 361 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 362 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 363 Name.startswith("avx512.mask.expand.b") || // Added in 9.0 364 Name.startswith("avx512.mask.expand.w") || // Added in 9.0 365 Name.startswith("avx512.mask.expand.d") || // Added in 9.0 366 Name.startswith("avx512.mask.expand.q") || // Added in 9.0 367 Name.startswith("avx512.mask.expand.p") || // Added in 9.0 368 Name.startswith("avx512.mask.compress.b") || // Added in 9.0 369 Name.startswith("avx512.mask.compress.w") || // Added in 9.0 370 Name.startswith("avx512.mask.compress.d") || // Added in 9.0 371 Name.startswith("avx512.mask.compress.q") || // Added in 9.0 372 Name.startswith("avx512.mask.compress.p") || // Added in 9.0 373 Name == "sse42.crc32.64.8" || // Added in 3.4 374 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 375 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 376 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 377 Name.startswith("avx512.mask.valign.") || // Added in 4.0 378 Name.startswith("sse2.psll.dq") || // Added in 3.7 379 Name.startswith("sse2.psrl.dq") || // Added in 3.7 380 Name.startswith("avx2.psll.dq") || // Added in 3.7 381 Name.startswith("avx2.psrl.dq") || // Added in 3.7 382 Name.startswith("avx512.psll.dq") || // Added in 3.9 383 Name.startswith("avx512.psrl.dq") || // Added in 3.9 384 Name == "sse41.pblendw" || // Added in 3.7 385 Name.startswith("sse41.blendp") || // Added in 3.7 386 Name.startswith("avx.blend.p") || // Added in 3.7 387 Name == "avx2.pblendw" || // Added in 3.7 388 Name.startswith("avx2.pblendd.") || // Added in 3.7 389 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 390 Name == "avx2.vbroadcasti128" || // Added in 3.7 391 Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0 392 Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0 393 Name.startswith("avx512.mask.broadcastf32x8.") || // Added in 6.0 394 Name.startswith("avx512.mask.broadcastf64x4.") || // Added in 6.0 395 Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0 396 Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0 397 Name.startswith("avx512.mask.broadcasti32x8.") || // Added in 6.0 398 Name.startswith("avx512.mask.broadcasti64x4.") || // Added in 6.0 399 Name == "xop.vpcmov" || // Added in 3.8 400 Name == "xop.vpcmov.256" || // Added in 5.0 401 Name.startswith("avx512.mask.move.s") || // Added in 4.0 402 Name.startswith("avx512.cvtmask2") || // Added in 5.0 403 Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0 404 Name.startswith("xop.vprot") || // Added in 8.0 405 Name.startswith("avx512.prol") || // Added in 8.0 406 Name.startswith("avx512.pror") || // Added in 8.0 407 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 408 Name.startswith("avx512.mask.pror.") || // Added in 8.0 409 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 410 Name.startswith("avx512.mask.prol.") || // Added in 8.0 411 Name.startswith("avx512.ptestm") || //Added in 6.0 412 Name.startswith("avx512.ptestnm") || //Added in 6.0 413 Name.startswith("avx512.mask.pavg")) // Added in 6.0 414 return true; 415 416 return false; 417 } 418 419 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 420 Function *&NewFn) { 421 // Only handle intrinsics that start with "x86.". 422 if (!Name.startswith("x86.")) 423 return false; 424 // Remove "x86." prefix. 425 Name = Name.substr(4); 426 427 if (ShouldUpgradeX86Intrinsic(F, Name)) { 428 NewFn = nullptr; 429 return true; 430 } 431 432 if (Name == "rdtscp") { // Added in 8.0 433 // If this intrinsic has 0 operands, it's the new version. 434 if (F->getFunctionType()->getNumParams() == 0) 435 return false; 436 437 rename(F); 438 NewFn = Intrinsic::getDeclaration(F->getParent(), 439 Intrinsic::x86_rdtscp); 440 return true; 441 } 442 443 // SSE4.1 ptest functions may have an old signature. 444 if (Name.startswith("sse41.ptest")) { // Added in 3.2 445 if (Name.substr(11) == "c") 446 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 447 if (Name.substr(11) == "z") 448 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 449 if (Name.substr(11) == "nzc") 450 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 451 } 452 // Several blend and other instructions with masks used the wrong number of 453 // bits. 454 if (Name == "sse41.insertps") // Added in 3.6 455 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 456 NewFn); 457 if (Name == "sse41.dppd") // Added in 3.6 458 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 459 NewFn); 460 if (Name == "sse41.dpps") // Added in 3.6 461 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 462 NewFn); 463 if (Name == "sse41.mpsadbw") // Added in 3.6 464 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 465 NewFn); 466 if (Name == "avx.dp.ps.256") // Added in 3.6 467 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 468 NewFn); 469 if (Name == "avx2.mpsadbw") // Added in 3.6 470 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 471 NewFn); 472 if (Name == "avx512.mask.cmp.pd.128") // Added in 7.0 473 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_128, 474 NewFn); 475 if (Name == "avx512.mask.cmp.pd.256") // Added in 7.0 476 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_256, 477 NewFn); 478 if (Name == "avx512.mask.cmp.pd.512") // Added in 7.0 479 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_512, 480 NewFn); 481 if (Name == "avx512.mask.cmp.ps.128") // Added in 7.0 482 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_128, 483 NewFn); 484 if (Name == "avx512.mask.cmp.ps.256") // Added in 7.0 485 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_256, 486 NewFn); 487 if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0 488 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_512, 489 NewFn); 490 491 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 492 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 493 rename(F); 494 NewFn = Intrinsic::getDeclaration(F->getParent(), 495 Intrinsic::x86_xop_vfrcz_ss); 496 return true; 497 } 498 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 499 rename(F); 500 NewFn = Intrinsic::getDeclaration(F->getParent(), 501 Intrinsic::x86_xop_vfrcz_sd); 502 return true; 503 } 504 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 505 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 506 auto Idx = F->getFunctionType()->getParamType(2); 507 if (Idx->isFPOrFPVectorTy()) { 508 rename(F); 509 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 510 unsigned EltSize = Idx->getScalarSizeInBits(); 511 Intrinsic::ID Permil2ID; 512 if (EltSize == 64 && IdxSize == 128) 513 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 514 else if (EltSize == 32 && IdxSize == 128) 515 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 516 else if (EltSize == 64 && IdxSize == 256) 517 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 518 else 519 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 520 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 521 return true; 522 } 523 } 524 525 if (Name == "seh.recoverfp") { 526 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp); 527 return true; 528 } 529 530 return false; 531 } 532 533 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 534 assert(F && "Illegal to upgrade a non-existent Function."); 535 536 // Quickly eliminate it, if it's not a candidate. 537 StringRef Name = F->getName(); 538 if (Name.size() <= 8 || !Name.startswith("llvm.")) 539 return false; 540 Name = Name.substr(5); // Strip off "llvm." 541 542 switch (Name[0]) { 543 default: break; 544 case 'a': { 545 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 546 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 547 F->arg_begin()->getType()); 548 return true; 549 } 550 if (Name.startswith("arm.neon.vclz")) { 551 Type* args[2] = { 552 F->arg_begin()->getType(), 553 Type::getInt1Ty(F->getContext()) 554 }; 555 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 556 // the end of the name. Change name from llvm.arm.neon.vclz.* to 557 // llvm.ctlz.* 558 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 559 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 560 "llvm.ctlz." + Name.substr(14), F->getParent()); 561 return true; 562 } 563 if (Name.startswith("arm.neon.vcnt")) { 564 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 565 F->arg_begin()->getType()); 566 return true; 567 } 568 static const Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 569 if (vldRegex.match(Name)) { 570 auto fArgs = F->getFunctionType()->params(); 571 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 572 // Can't use Intrinsic::getDeclaration here as the return types might 573 // then only be structurally equal. 574 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 575 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 576 "llvm." + Name + ".p0i8", F->getParent()); 577 return true; 578 } 579 static const Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 580 if (vstRegex.match(Name)) { 581 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 582 Intrinsic::arm_neon_vst2, 583 Intrinsic::arm_neon_vst3, 584 Intrinsic::arm_neon_vst4}; 585 586 static const Intrinsic::ID StoreLaneInts[] = { 587 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 588 Intrinsic::arm_neon_vst4lane 589 }; 590 591 auto fArgs = F->getFunctionType()->params(); 592 Type *Tys[] = {fArgs[0], fArgs[1]}; 593 if (Name.find("lane") == StringRef::npos) 594 NewFn = Intrinsic::getDeclaration(F->getParent(), 595 StoreInts[fArgs.size() - 3], Tys); 596 else 597 NewFn = Intrinsic::getDeclaration(F->getParent(), 598 StoreLaneInts[fArgs.size() - 5], Tys); 599 return true; 600 } 601 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 602 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 603 return true; 604 } 605 if (Name.startswith("arm.neon.vqadds.")) { 606 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sadd_sat, 607 F->arg_begin()->getType()); 608 return true; 609 } 610 if (Name.startswith("arm.neon.vqaddu.")) { 611 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::uadd_sat, 612 F->arg_begin()->getType()); 613 return true; 614 } 615 if (Name.startswith("arm.neon.vqsubs.")) { 616 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ssub_sat, 617 F->arg_begin()->getType()); 618 return true; 619 } 620 if (Name.startswith("arm.neon.vqsubu.")) { 621 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::usub_sat, 622 F->arg_begin()->getType()); 623 return true; 624 } 625 if (Name.startswith("aarch64.neon.addp")) { 626 if (F->arg_size() != 2) 627 break; // Invalid IR. 628 VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); 629 if (Ty && Ty->getElementType()->isFloatingPointTy()) { 630 NewFn = Intrinsic::getDeclaration(F->getParent(), 631 Intrinsic::aarch64_neon_faddp, Ty); 632 return true; 633 } 634 } 635 break; 636 } 637 638 case 'c': { 639 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 640 rename(F); 641 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 642 F->arg_begin()->getType()); 643 return true; 644 } 645 if (Name.startswith("cttz.") && F->arg_size() == 1) { 646 rename(F); 647 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 648 F->arg_begin()->getType()); 649 return true; 650 } 651 break; 652 } 653 case 'd': { 654 if (Name == "dbg.value" && F->arg_size() == 4) { 655 rename(F); 656 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 657 return true; 658 } 659 break; 660 } 661 case 'e': { 662 SmallVector<StringRef, 2> Groups; 663 static const Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+"); 664 if (R.match(Name, &Groups)) { 665 Intrinsic::ID ID = Intrinsic::not_intrinsic; 666 if (Groups[1] == "fadd") 667 ID = Intrinsic::experimental_vector_reduce_v2_fadd; 668 if (Groups[1] == "fmul") 669 ID = Intrinsic::experimental_vector_reduce_v2_fmul; 670 671 if (ID != Intrinsic::not_intrinsic) { 672 rename(F); 673 auto Args = F->getFunctionType()->params(); 674 Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]}; 675 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys); 676 return true; 677 } 678 } 679 break; 680 } 681 case 'i': 682 case 'l': { 683 bool IsLifetimeStart = Name.startswith("lifetime.start"); 684 if (IsLifetimeStart || Name.startswith("invariant.start")) { 685 Intrinsic::ID ID = IsLifetimeStart ? 686 Intrinsic::lifetime_start : Intrinsic::invariant_start; 687 auto Args = F->getFunctionType()->params(); 688 Type* ObjectPtr[1] = {Args[1]}; 689 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 690 rename(F); 691 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 692 return true; 693 } 694 } 695 696 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 697 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 698 Intrinsic::ID ID = IsLifetimeEnd ? 699 Intrinsic::lifetime_end : Intrinsic::invariant_end; 700 701 auto Args = F->getFunctionType()->params(); 702 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 703 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 704 rename(F); 705 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 706 return true; 707 } 708 } 709 if (Name.startswith("invariant.group.barrier")) { 710 // Rename invariant.group.barrier to launder.invariant.group 711 auto Args = F->getFunctionType()->params(); 712 Type* ObjectPtr[1] = {Args[0]}; 713 rename(F); 714 NewFn = Intrinsic::getDeclaration(F->getParent(), 715 Intrinsic::launder_invariant_group, ObjectPtr); 716 return true; 717 718 } 719 720 break; 721 } 722 case 'm': { 723 if (Name.startswith("masked.load.")) { 724 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 725 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 726 rename(F); 727 NewFn = Intrinsic::getDeclaration(F->getParent(), 728 Intrinsic::masked_load, 729 Tys); 730 return true; 731 } 732 } 733 if (Name.startswith("masked.store.")) { 734 auto Args = F->getFunctionType()->params(); 735 Type *Tys[] = { Args[0], Args[1] }; 736 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 737 rename(F); 738 NewFn = Intrinsic::getDeclaration(F->getParent(), 739 Intrinsic::masked_store, 740 Tys); 741 return true; 742 } 743 } 744 // Renaming gather/scatter intrinsics with no address space overloading 745 // to the new overload which includes an address space 746 if (Name.startswith("masked.gather.")) { 747 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 748 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 749 rename(F); 750 NewFn = Intrinsic::getDeclaration(F->getParent(), 751 Intrinsic::masked_gather, Tys); 752 return true; 753 } 754 } 755 if (Name.startswith("masked.scatter.")) { 756 auto Args = F->getFunctionType()->params(); 757 Type *Tys[] = {Args[0], Args[1]}; 758 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 759 rename(F); 760 NewFn = Intrinsic::getDeclaration(F->getParent(), 761 Intrinsic::masked_scatter, Tys); 762 return true; 763 } 764 } 765 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 766 // alignment parameter to embedding the alignment as an attribute of 767 // the pointer args. 768 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 769 rename(F); 770 // Get the types of dest, src, and len 771 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 772 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 773 ParamTypes); 774 return true; 775 } 776 if (Name.startswith("memmove.") && F->arg_size() == 5) { 777 rename(F); 778 // Get the types of dest, src, and len 779 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 780 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 781 ParamTypes); 782 return true; 783 } 784 if (Name.startswith("memset.") && F->arg_size() == 5) { 785 rename(F); 786 // Get the types of dest, and len 787 const auto *FT = F->getFunctionType(); 788 Type *ParamTypes[2] = { 789 FT->getParamType(0), // Dest 790 FT->getParamType(2) // len 791 }; 792 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 793 ParamTypes); 794 return true; 795 } 796 break; 797 } 798 case 'n': { 799 if (Name.startswith("nvvm.")) { 800 Name = Name.substr(5); 801 802 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 803 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 804 .Cases("brev32", "brev64", Intrinsic::bitreverse) 805 .Case("clz.i", Intrinsic::ctlz) 806 .Case("popc.i", Intrinsic::ctpop) 807 .Default(Intrinsic::not_intrinsic); 808 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 809 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 810 {F->getReturnType()}); 811 return true; 812 } 813 814 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 815 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 816 // 817 // TODO: We could add lohi.i2d. 818 bool Expand = StringSwitch<bool>(Name) 819 .Cases("abs.i", "abs.ll", true) 820 .Cases("clz.ll", "popc.ll", "h2f", true) 821 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 822 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 823 .StartsWith("atomic.load.add.f32.p", true) 824 .StartsWith("atomic.load.add.f64.p", true) 825 .Default(false); 826 if (Expand) { 827 NewFn = nullptr; 828 return true; 829 } 830 } 831 break; 832 } 833 case 'o': 834 // We only need to change the name to match the mangling including the 835 // address space. 836 if (Name.startswith("objectsize.")) { 837 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 838 if (F->arg_size() == 2 || F->arg_size() == 3 || 839 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 840 rename(F); 841 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 842 Tys); 843 return true; 844 } 845 } 846 break; 847 848 case 'p': 849 if (Name == "prefetch") { 850 // Handle address space overloading. 851 Type *Tys[] = {F->arg_begin()->getType()}; 852 if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { 853 rename(F); 854 NewFn = 855 Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); 856 return true; 857 } 858 } 859 break; 860 861 case 's': 862 if (Name == "stackprotectorcheck") { 863 NewFn = nullptr; 864 return true; 865 } 866 break; 867 868 case 'x': 869 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 870 return true; 871 } 872 // Remangle our intrinsic since we upgrade the mangling 873 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 874 if (Result != None) { 875 NewFn = Result.getValue(); 876 return true; 877 } 878 879 // This may not belong here. This function is effectively being overloaded 880 // to both detect an intrinsic which needs upgrading, and to provide the 881 // upgraded form of the intrinsic. We should perhaps have two separate 882 // functions for this. 883 return false; 884 } 885 886 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 887 NewFn = nullptr; 888 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 889 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 890 891 // Upgrade intrinsic attributes. This does not change the function. 892 if (NewFn) 893 F = NewFn; 894 if (Intrinsic::ID id = F->getIntrinsicID()) 895 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 896 return Upgraded; 897 } 898 899 GlobalVariable *llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 900 if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" || 901 GV->getName() == "llvm.global_dtors")) || 902 !GV->hasInitializer()) 903 return nullptr; 904 ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType()); 905 if (!ATy) 906 return nullptr; 907 StructType *STy = dyn_cast<StructType>(ATy->getElementType()); 908 if (!STy || STy->getNumElements() != 2) 909 return nullptr; 910 911 LLVMContext &C = GV->getContext(); 912 IRBuilder<> IRB(C); 913 auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1), 914 IRB.getInt8PtrTy()); 915 Constant *Init = GV->getInitializer(); 916 unsigned N = Init->getNumOperands(); 917 std::vector<Constant *> NewCtors(N); 918 for (unsigned i = 0; i != N; ++i) { 919 auto Ctor = cast<Constant>(Init->getOperand(i)); 920 NewCtors[i] = ConstantStruct::get( 921 EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1), 922 Constant::getNullValue(IRB.getInt8PtrTy())); 923 } 924 Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors); 925 926 return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(), 927 NewInit, GV->getName()); 928 } 929 930 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 931 // to byte shuffles. 932 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 933 Value *Op, unsigned Shift) { 934 auto *ResultTy = cast<VectorType>(Op->getType()); 935 unsigned NumElts = ResultTy->getNumElements() * 8; 936 937 // Bitcast from a 64-bit element type to a byte element type. 938 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts); 939 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 940 941 // We'll be shuffling in zeroes. 942 Value *Res = Constant::getNullValue(VecTy); 943 944 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 945 // we'll just return the zero vector. 946 if (Shift < 16) { 947 int Idxs[64]; 948 // 256/512-bit version is split into 2/4 16-byte lanes. 949 for (unsigned l = 0; l != NumElts; l += 16) 950 for (unsigned i = 0; i != 16; ++i) { 951 unsigned Idx = NumElts + i - Shift; 952 if (Idx < NumElts) 953 Idx -= NumElts - 16; // end of lane, switch operand. 954 Idxs[l + i] = Idx + l; 955 } 956 957 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 958 } 959 960 // Bitcast back to a 64-bit element type. 961 return Builder.CreateBitCast(Res, ResultTy, "cast"); 962 } 963 964 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 965 // to byte shuffles. 966 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 967 unsigned Shift) { 968 auto *ResultTy = cast<VectorType>(Op->getType()); 969 unsigned NumElts = ResultTy->getNumElements() * 8; 970 971 // Bitcast from a 64-bit element type to a byte element type. 972 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts); 973 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 974 975 // We'll be shuffling in zeroes. 976 Value *Res = Constant::getNullValue(VecTy); 977 978 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 979 // we'll just return the zero vector. 980 if (Shift < 16) { 981 int Idxs[64]; 982 // 256/512-bit version is split into 2/4 16-byte lanes. 983 for (unsigned l = 0; l != NumElts; l += 16) 984 for (unsigned i = 0; i != 16; ++i) { 985 unsigned Idx = i + Shift; 986 if (Idx >= 16) 987 Idx += NumElts - 16; // end of lane, switch operand. 988 Idxs[l + i] = Idx + l; 989 } 990 991 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 992 } 993 994 // Bitcast back to a 64-bit element type. 995 return Builder.CreateBitCast(Res, ResultTy, "cast"); 996 } 997 998 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 999 unsigned NumElts) { 1000 assert(isPowerOf2_32(NumElts) && "Expected power-of-2 mask elements"); 1001 llvm::VectorType *MaskTy = FixedVectorType::get( 1002 Builder.getInt1Ty(), cast<IntegerType>(Mask->getType())->getBitWidth()); 1003 Mask = Builder.CreateBitCast(Mask, MaskTy); 1004 1005 // If we have less than 8 elements (1, 2 or 4), then the starting mask was an 1006 // i8 and we need to extract down to the right number of elements. 1007 if (NumElts <= 4) { 1008 int Indices[4]; 1009 for (unsigned i = 0; i != NumElts; ++i) 1010 Indices[i] = i; 1011 Mask = Builder.CreateShuffleVector( 1012 Mask, Mask, makeArrayRef(Indices, NumElts), "extract"); 1013 } 1014 1015 return Mask; 1016 } 1017 1018 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 1019 Value *Op0, Value *Op1) { 1020 // If the mask is all ones just emit the first operation. 1021 if (const auto *C = dyn_cast<Constant>(Mask)) 1022 if (C->isAllOnesValue()) 1023 return Op0; 1024 1025 Mask = getX86MaskVec(Builder, Mask, 1026 cast<VectorType>(Op0->getType())->getNumElements()); 1027 return Builder.CreateSelect(Mask, Op0, Op1); 1028 } 1029 1030 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 1031 Value *Op0, Value *Op1) { 1032 // If the mask is all ones just emit the first operation. 1033 if (const auto *C = dyn_cast<Constant>(Mask)) 1034 if (C->isAllOnesValue()) 1035 return Op0; 1036 1037 auto *MaskTy = FixedVectorType::get(Builder.getInt1Ty(), 1038 Mask->getType()->getIntegerBitWidth()); 1039 Mask = Builder.CreateBitCast(Mask, MaskTy); 1040 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 1041 return Builder.CreateSelect(Mask, Op0, Op1); 1042 } 1043 1044 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 1045 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 1046 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 1047 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 1048 Value *Op1, Value *Shift, 1049 Value *Passthru, Value *Mask, 1050 bool IsVALIGN) { 1051 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 1052 1053 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1054 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 1055 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 1056 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 1057 1058 // Mask the immediate for VALIGN. 1059 if (IsVALIGN) 1060 ShiftVal &= (NumElts - 1); 1061 1062 // If palignr is shifting the pair of vectors more than the size of two 1063 // lanes, emit zero. 1064 if (ShiftVal >= 32) 1065 return llvm::Constant::getNullValue(Op0->getType()); 1066 1067 // If palignr is shifting the pair of input vectors more than one lane, 1068 // but less than two lanes, convert to shifting in zeroes. 1069 if (ShiftVal > 16) { 1070 ShiftVal -= 16; 1071 Op1 = Op0; 1072 Op0 = llvm::Constant::getNullValue(Op0->getType()); 1073 } 1074 1075 int Indices[64]; 1076 // 256-bit palignr operates on 128-bit lanes so we need to handle that 1077 for (unsigned l = 0; l < NumElts; l += 16) { 1078 for (unsigned i = 0; i != 16; ++i) { 1079 unsigned Idx = ShiftVal + i; 1080 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 1081 Idx += NumElts - 16; // End of lane, switch operand. 1082 Indices[l + i] = Idx + l; 1083 } 1084 } 1085 1086 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 1087 makeArrayRef(Indices, NumElts), 1088 "palignr"); 1089 1090 return EmitX86Select(Builder, Mask, Align, Passthru); 1091 } 1092 1093 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 1094 bool ZeroMask, bool IndexForm) { 1095 Type *Ty = CI.getType(); 1096 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 1097 unsigned EltWidth = Ty->getScalarSizeInBits(); 1098 bool IsFloat = Ty->isFPOrFPVectorTy(); 1099 Intrinsic::ID IID; 1100 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 1101 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 1102 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 1103 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 1104 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 1105 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 1106 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 1107 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 1108 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1109 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 1110 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1111 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 1112 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1113 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 1114 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1115 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 1116 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1117 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 1118 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1119 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 1120 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1121 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 1122 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1123 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 1124 else if (VecWidth == 128 && EltWidth == 16) 1125 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 1126 else if (VecWidth == 256 && EltWidth == 16) 1127 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 1128 else if (VecWidth == 512 && EltWidth == 16) 1129 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 1130 else if (VecWidth == 128 && EltWidth == 8) 1131 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 1132 else if (VecWidth == 256 && EltWidth == 8) 1133 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 1134 else if (VecWidth == 512 && EltWidth == 8) 1135 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 1136 else 1137 llvm_unreachable("Unexpected intrinsic"); 1138 1139 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 1140 CI.getArgOperand(2) }; 1141 1142 // If this isn't index form we need to swap operand 0 and 1. 1143 if (!IndexForm) 1144 std::swap(Args[0], Args[1]); 1145 1146 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1147 Args); 1148 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 1149 : Builder.CreateBitCast(CI.getArgOperand(1), 1150 Ty); 1151 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1152 } 1153 1154 static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1155 bool IsSigned, bool IsAddition) { 1156 Type *Ty = CI.getType(); 1157 Value *Op0 = CI.getOperand(0); 1158 Value *Op1 = CI.getOperand(1); 1159 1160 Intrinsic::ID IID = 1161 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 1162 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 1163 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1164 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1165 1166 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1167 Value *VecSrc = CI.getOperand(2); 1168 Value *Mask = CI.getOperand(3); 1169 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1170 } 1171 return Res; 1172 } 1173 1174 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1175 bool IsRotateRight) { 1176 Type *Ty = CI.getType(); 1177 Value *Src = CI.getArgOperand(0); 1178 Value *Amt = CI.getArgOperand(1); 1179 1180 // Amount may be scalar immediate, in which case create a splat vector. 1181 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1182 // we only care about the lowest log2 bits anyway. 1183 if (Amt->getType() != Ty) { 1184 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1185 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1186 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1187 } 1188 1189 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1190 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1191 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1192 1193 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1194 Value *VecSrc = CI.getOperand(2); 1195 Value *Mask = CI.getOperand(3); 1196 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1197 } 1198 return Res; 1199 } 1200 1201 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, 1202 bool IsSigned) { 1203 Type *Ty = CI.getType(); 1204 Value *LHS = CI.getArgOperand(0); 1205 Value *RHS = CI.getArgOperand(1); 1206 1207 CmpInst::Predicate Pred; 1208 switch (Imm) { 1209 case 0x0: 1210 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 1211 break; 1212 case 0x1: 1213 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 1214 break; 1215 case 0x2: 1216 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 1217 break; 1218 case 0x3: 1219 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 1220 break; 1221 case 0x4: 1222 Pred = ICmpInst::ICMP_EQ; 1223 break; 1224 case 0x5: 1225 Pred = ICmpInst::ICMP_NE; 1226 break; 1227 case 0x6: 1228 return Constant::getNullValue(Ty); // FALSE 1229 case 0x7: 1230 return Constant::getAllOnesValue(Ty); // TRUE 1231 default: 1232 llvm_unreachable("Unknown XOP vpcom/vpcomu predicate"); 1233 } 1234 1235 Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS); 1236 Value *Ext = Builder.CreateSExt(Cmp, Ty); 1237 return Ext; 1238 } 1239 1240 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1241 bool IsShiftRight, bool ZeroMask) { 1242 Type *Ty = CI.getType(); 1243 Value *Op0 = CI.getArgOperand(0); 1244 Value *Op1 = CI.getArgOperand(1); 1245 Value *Amt = CI.getArgOperand(2); 1246 1247 if (IsShiftRight) 1248 std::swap(Op0, Op1); 1249 1250 // Amount may be scalar immediate, in which case create a splat vector. 1251 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1252 // we only care about the lowest log2 bits anyway. 1253 if (Amt->getType() != Ty) { 1254 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1255 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1256 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1257 } 1258 1259 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1260 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1261 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1262 1263 unsigned NumArgs = CI.getNumArgOperands(); 1264 if (NumArgs >= 4) { // For masked intrinsics. 1265 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1266 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1267 CI.getArgOperand(0); 1268 Value *Mask = CI.getOperand(NumArgs - 1); 1269 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1270 } 1271 return Res; 1272 } 1273 1274 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1275 Value *Ptr, Value *Data, Value *Mask, 1276 bool Aligned) { 1277 // Cast the pointer to the right type. 1278 Ptr = Builder.CreateBitCast(Ptr, 1279 llvm::PointerType::getUnqual(Data->getType())); 1280 const Align Alignment = 1281 Aligned 1282 ? Align(Data->getType()->getPrimitiveSizeInBits().getFixedSize() / 8) 1283 : Align(1); 1284 1285 // If the mask is all ones just emit a regular store. 1286 if (const auto *C = dyn_cast<Constant>(Mask)) 1287 if (C->isAllOnesValue()) 1288 return Builder.CreateAlignedStore(Data, Ptr, Alignment); 1289 1290 // Convert the mask from an integer type to a vector of i1. 1291 unsigned NumElts = cast<VectorType>(Data->getType())->getNumElements(); 1292 Mask = getX86MaskVec(Builder, Mask, NumElts); 1293 return Builder.CreateMaskedStore(Data, Ptr, Alignment, Mask); 1294 } 1295 1296 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1297 Value *Ptr, Value *Passthru, Value *Mask, 1298 bool Aligned) { 1299 Type *ValTy = Passthru->getType(); 1300 // Cast the pointer to the right type. 1301 Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); 1302 const Align Alignment = 1303 Aligned 1304 ? Align(Passthru->getType()->getPrimitiveSizeInBits().getFixedSize() / 1305 8) 1306 : Align(1); 1307 1308 // If the mask is all ones just emit a regular store. 1309 if (const auto *C = dyn_cast<Constant>(Mask)) 1310 if (C->isAllOnesValue()) 1311 return Builder.CreateAlignedLoad(ValTy, Ptr, Alignment); 1312 1313 // Convert the mask from an integer type to a vector of i1. 1314 unsigned NumElts = cast<VectorType>(Passthru->getType())->getNumElements(); 1315 Mask = getX86MaskVec(Builder, Mask, NumElts); 1316 return Builder.CreateMaskedLoad(Ptr, Alignment, Mask, Passthru); 1317 } 1318 1319 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1320 Value *Op0 = CI.getArgOperand(0); 1321 llvm::Type *Ty = Op0->getType(); 1322 Value *Zero = llvm::Constant::getNullValue(Ty); 1323 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 1324 Value *Neg = Builder.CreateNeg(Op0); 1325 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 1326 1327 if (CI.getNumArgOperands() == 3) 1328 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1329 1330 return Res; 1331 } 1332 1333 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1334 ICmpInst::Predicate Pred) { 1335 Value *Op0 = CI.getArgOperand(0); 1336 Value *Op1 = CI.getArgOperand(1); 1337 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1338 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1339 1340 if (CI.getNumArgOperands() == 4) 1341 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1342 1343 return Res; 1344 } 1345 1346 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1347 Type *Ty = CI.getType(); 1348 1349 // Arguments have a vXi32 type so cast to vXi64. 1350 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1351 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1352 1353 if (IsSigned) { 1354 // Shift left then arithmetic shift right. 1355 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1356 LHS = Builder.CreateShl(LHS, ShiftAmt); 1357 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1358 RHS = Builder.CreateShl(RHS, ShiftAmt); 1359 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1360 } else { 1361 // Clear the upper bits. 1362 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1363 LHS = Builder.CreateAnd(LHS, Mask); 1364 RHS = Builder.CreateAnd(RHS, Mask); 1365 } 1366 1367 Value *Res = Builder.CreateMul(LHS, RHS); 1368 1369 if (CI.getNumArgOperands() == 4) 1370 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1371 1372 return Res; 1373 } 1374 1375 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1376 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1377 Value *Mask) { 1378 unsigned NumElts = cast<VectorType>(Vec->getType())->getNumElements(); 1379 if (Mask) { 1380 const auto *C = dyn_cast<Constant>(Mask); 1381 if (!C || !C->isAllOnesValue()) 1382 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1383 } 1384 1385 if (NumElts < 8) { 1386 int Indices[8]; 1387 for (unsigned i = 0; i != NumElts; ++i) 1388 Indices[i] = i; 1389 for (unsigned i = NumElts; i != 8; ++i) 1390 Indices[i] = NumElts + i % NumElts; 1391 Vec = Builder.CreateShuffleVector(Vec, 1392 Constant::getNullValue(Vec->getType()), 1393 Indices); 1394 } 1395 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1396 } 1397 1398 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1399 unsigned CC, bool Signed) { 1400 Value *Op0 = CI.getArgOperand(0); 1401 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1402 1403 Value *Cmp; 1404 if (CC == 3) { 1405 Cmp = Constant::getNullValue( 1406 FixedVectorType::get(Builder.getInt1Ty(), NumElts)); 1407 } else if (CC == 7) { 1408 Cmp = Constant::getAllOnesValue( 1409 FixedVectorType::get(Builder.getInt1Ty(), NumElts)); 1410 } else { 1411 ICmpInst::Predicate Pred; 1412 switch (CC) { 1413 default: llvm_unreachable("Unknown condition code"); 1414 case 0: Pred = ICmpInst::ICMP_EQ; break; 1415 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1416 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1417 case 4: Pred = ICmpInst::ICMP_NE; break; 1418 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1419 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1420 } 1421 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1422 } 1423 1424 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1425 1426 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1427 } 1428 1429 // Replace a masked intrinsic with an older unmasked intrinsic. 1430 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1431 Intrinsic::ID IID) { 1432 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1433 Value *Rep = Builder.CreateCall(Intrin, 1434 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1435 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1436 } 1437 1438 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1439 Value* A = CI.getArgOperand(0); 1440 Value* B = CI.getArgOperand(1); 1441 Value* Src = CI.getArgOperand(2); 1442 Value* Mask = CI.getArgOperand(3); 1443 1444 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1445 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1446 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1447 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1448 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1449 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1450 } 1451 1452 1453 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1454 Value* Op = CI.getArgOperand(0); 1455 Type* ReturnOp = CI.getType(); 1456 unsigned NumElts = cast<VectorType>(CI.getType())->getNumElements(); 1457 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1458 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1459 } 1460 1461 // Replace intrinsic with unmasked version and a select. 1462 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1463 CallInst &CI, Value *&Rep) { 1464 Name = Name.substr(12); // Remove avx512.mask. 1465 1466 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1467 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1468 Intrinsic::ID IID; 1469 if (Name.startswith("max.p")) { 1470 if (VecWidth == 128 && EltWidth == 32) 1471 IID = Intrinsic::x86_sse_max_ps; 1472 else if (VecWidth == 128 && EltWidth == 64) 1473 IID = Intrinsic::x86_sse2_max_pd; 1474 else if (VecWidth == 256 && EltWidth == 32) 1475 IID = Intrinsic::x86_avx_max_ps_256; 1476 else if (VecWidth == 256 && EltWidth == 64) 1477 IID = Intrinsic::x86_avx_max_pd_256; 1478 else 1479 llvm_unreachable("Unexpected intrinsic"); 1480 } else if (Name.startswith("min.p")) { 1481 if (VecWidth == 128 && EltWidth == 32) 1482 IID = Intrinsic::x86_sse_min_ps; 1483 else if (VecWidth == 128 && EltWidth == 64) 1484 IID = Intrinsic::x86_sse2_min_pd; 1485 else if (VecWidth == 256 && EltWidth == 32) 1486 IID = Intrinsic::x86_avx_min_ps_256; 1487 else if (VecWidth == 256 && EltWidth == 64) 1488 IID = Intrinsic::x86_avx_min_pd_256; 1489 else 1490 llvm_unreachable("Unexpected intrinsic"); 1491 } else if (Name.startswith("pshuf.b.")) { 1492 if (VecWidth == 128) 1493 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1494 else if (VecWidth == 256) 1495 IID = Intrinsic::x86_avx2_pshuf_b; 1496 else if (VecWidth == 512) 1497 IID = Intrinsic::x86_avx512_pshuf_b_512; 1498 else 1499 llvm_unreachable("Unexpected intrinsic"); 1500 } else if (Name.startswith("pmul.hr.sw.")) { 1501 if (VecWidth == 128) 1502 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1503 else if (VecWidth == 256) 1504 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1505 else if (VecWidth == 512) 1506 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1507 else 1508 llvm_unreachable("Unexpected intrinsic"); 1509 } else if (Name.startswith("pmulh.w.")) { 1510 if (VecWidth == 128) 1511 IID = Intrinsic::x86_sse2_pmulh_w; 1512 else if (VecWidth == 256) 1513 IID = Intrinsic::x86_avx2_pmulh_w; 1514 else if (VecWidth == 512) 1515 IID = Intrinsic::x86_avx512_pmulh_w_512; 1516 else 1517 llvm_unreachable("Unexpected intrinsic"); 1518 } else if (Name.startswith("pmulhu.w.")) { 1519 if (VecWidth == 128) 1520 IID = Intrinsic::x86_sse2_pmulhu_w; 1521 else if (VecWidth == 256) 1522 IID = Intrinsic::x86_avx2_pmulhu_w; 1523 else if (VecWidth == 512) 1524 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1525 else 1526 llvm_unreachable("Unexpected intrinsic"); 1527 } else if (Name.startswith("pmaddw.d.")) { 1528 if (VecWidth == 128) 1529 IID = Intrinsic::x86_sse2_pmadd_wd; 1530 else if (VecWidth == 256) 1531 IID = Intrinsic::x86_avx2_pmadd_wd; 1532 else if (VecWidth == 512) 1533 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1534 else 1535 llvm_unreachable("Unexpected intrinsic"); 1536 } else if (Name.startswith("pmaddubs.w.")) { 1537 if (VecWidth == 128) 1538 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1539 else if (VecWidth == 256) 1540 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1541 else if (VecWidth == 512) 1542 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1543 else 1544 llvm_unreachable("Unexpected intrinsic"); 1545 } else if (Name.startswith("packsswb.")) { 1546 if (VecWidth == 128) 1547 IID = Intrinsic::x86_sse2_packsswb_128; 1548 else if (VecWidth == 256) 1549 IID = Intrinsic::x86_avx2_packsswb; 1550 else if (VecWidth == 512) 1551 IID = Intrinsic::x86_avx512_packsswb_512; 1552 else 1553 llvm_unreachable("Unexpected intrinsic"); 1554 } else if (Name.startswith("packssdw.")) { 1555 if (VecWidth == 128) 1556 IID = Intrinsic::x86_sse2_packssdw_128; 1557 else if (VecWidth == 256) 1558 IID = Intrinsic::x86_avx2_packssdw; 1559 else if (VecWidth == 512) 1560 IID = Intrinsic::x86_avx512_packssdw_512; 1561 else 1562 llvm_unreachable("Unexpected intrinsic"); 1563 } else if (Name.startswith("packuswb.")) { 1564 if (VecWidth == 128) 1565 IID = Intrinsic::x86_sse2_packuswb_128; 1566 else if (VecWidth == 256) 1567 IID = Intrinsic::x86_avx2_packuswb; 1568 else if (VecWidth == 512) 1569 IID = Intrinsic::x86_avx512_packuswb_512; 1570 else 1571 llvm_unreachable("Unexpected intrinsic"); 1572 } else if (Name.startswith("packusdw.")) { 1573 if (VecWidth == 128) 1574 IID = Intrinsic::x86_sse41_packusdw; 1575 else if (VecWidth == 256) 1576 IID = Intrinsic::x86_avx2_packusdw; 1577 else if (VecWidth == 512) 1578 IID = Intrinsic::x86_avx512_packusdw_512; 1579 else 1580 llvm_unreachable("Unexpected intrinsic"); 1581 } else if (Name.startswith("vpermilvar.")) { 1582 if (VecWidth == 128 && EltWidth == 32) 1583 IID = Intrinsic::x86_avx_vpermilvar_ps; 1584 else if (VecWidth == 128 && EltWidth == 64) 1585 IID = Intrinsic::x86_avx_vpermilvar_pd; 1586 else if (VecWidth == 256 && EltWidth == 32) 1587 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1588 else if (VecWidth == 256 && EltWidth == 64) 1589 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1590 else if (VecWidth == 512 && EltWidth == 32) 1591 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1592 else if (VecWidth == 512 && EltWidth == 64) 1593 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1594 else 1595 llvm_unreachable("Unexpected intrinsic"); 1596 } else if (Name == "cvtpd2dq.256") { 1597 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1598 } else if (Name == "cvtpd2ps.256") { 1599 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1600 } else if (Name == "cvttpd2dq.256") { 1601 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1602 } else if (Name == "cvttps2dq.128") { 1603 IID = Intrinsic::x86_sse2_cvttps2dq; 1604 } else if (Name == "cvttps2dq.256") { 1605 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1606 } else if (Name.startswith("permvar.")) { 1607 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1608 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1609 IID = Intrinsic::x86_avx2_permps; 1610 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1611 IID = Intrinsic::x86_avx2_permd; 1612 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1613 IID = Intrinsic::x86_avx512_permvar_df_256; 1614 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1615 IID = Intrinsic::x86_avx512_permvar_di_256; 1616 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1617 IID = Intrinsic::x86_avx512_permvar_sf_512; 1618 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1619 IID = Intrinsic::x86_avx512_permvar_si_512; 1620 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1621 IID = Intrinsic::x86_avx512_permvar_df_512; 1622 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1623 IID = Intrinsic::x86_avx512_permvar_di_512; 1624 else if (VecWidth == 128 && EltWidth == 16) 1625 IID = Intrinsic::x86_avx512_permvar_hi_128; 1626 else if (VecWidth == 256 && EltWidth == 16) 1627 IID = Intrinsic::x86_avx512_permvar_hi_256; 1628 else if (VecWidth == 512 && EltWidth == 16) 1629 IID = Intrinsic::x86_avx512_permvar_hi_512; 1630 else if (VecWidth == 128 && EltWidth == 8) 1631 IID = Intrinsic::x86_avx512_permvar_qi_128; 1632 else if (VecWidth == 256 && EltWidth == 8) 1633 IID = Intrinsic::x86_avx512_permvar_qi_256; 1634 else if (VecWidth == 512 && EltWidth == 8) 1635 IID = Intrinsic::x86_avx512_permvar_qi_512; 1636 else 1637 llvm_unreachable("Unexpected intrinsic"); 1638 } else if (Name.startswith("dbpsadbw.")) { 1639 if (VecWidth == 128) 1640 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1641 else if (VecWidth == 256) 1642 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1643 else if (VecWidth == 512) 1644 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1645 else 1646 llvm_unreachable("Unexpected intrinsic"); 1647 } else if (Name.startswith("pmultishift.qb.")) { 1648 if (VecWidth == 128) 1649 IID = Intrinsic::x86_avx512_pmultishift_qb_128; 1650 else if (VecWidth == 256) 1651 IID = Intrinsic::x86_avx512_pmultishift_qb_256; 1652 else if (VecWidth == 512) 1653 IID = Intrinsic::x86_avx512_pmultishift_qb_512; 1654 else 1655 llvm_unreachable("Unexpected intrinsic"); 1656 } else if (Name.startswith("conflict.")) { 1657 if (Name[9] == 'd' && VecWidth == 128) 1658 IID = Intrinsic::x86_avx512_conflict_d_128; 1659 else if (Name[9] == 'd' && VecWidth == 256) 1660 IID = Intrinsic::x86_avx512_conflict_d_256; 1661 else if (Name[9] == 'd' && VecWidth == 512) 1662 IID = Intrinsic::x86_avx512_conflict_d_512; 1663 else if (Name[9] == 'q' && VecWidth == 128) 1664 IID = Intrinsic::x86_avx512_conflict_q_128; 1665 else if (Name[9] == 'q' && VecWidth == 256) 1666 IID = Intrinsic::x86_avx512_conflict_q_256; 1667 else if (Name[9] == 'q' && VecWidth == 512) 1668 IID = Intrinsic::x86_avx512_conflict_q_512; 1669 else 1670 llvm_unreachable("Unexpected intrinsic"); 1671 } else if (Name.startswith("pavg.")) { 1672 if (Name[5] == 'b' && VecWidth == 128) 1673 IID = Intrinsic::x86_sse2_pavg_b; 1674 else if (Name[5] == 'b' && VecWidth == 256) 1675 IID = Intrinsic::x86_avx2_pavg_b; 1676 else if (Name[5] == 'b' && VecWidth == 512) 1677 IID = Intrinsic::x86_avx512_pavg_b_512; 1678 else if (Name[5] == 'w' && VecWidth == 128) 1679 IID = Intrinsic::x86_sse2_pavg_w; 1680 else if (Name[5] == 'w' && VecWidth == 256) 1681 IID = Intrinsic::x86_avx2_pavg_w; 1682 else if (Name[5] == 'w' && VecWidth == 512) 1683 IID = Intrinsic::x86_avx512_pavg_w_512; 1684 else 1685 llvm_unreachable("Unexpected intrinsic"); 1686 } else 1687 return false; 1688 1689 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1690 CI.arg_operands().end()); 1691 Args.pop_back(); 1692 Args.pop_back(); 1693 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1694 Args); 1695 unsigned NumArgs = CI.getNumArgOperands(); 1696 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1697 CI.getArgOperand(NumArgs - 2)); 1698 return true; 1699 } 1700 1701 /// Upgrade comment in call to inline asm that represents an objc retain release 1702 /// marker. 1703 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1704 size_t Pos; 1705 if (AsmStr->find("mov\tfp") == 0 && 1706 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1707 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1708 AsmStr->replace(Pos, 1, ";"); 1709 } 1710 return; 1711 } 1712 1713 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1714 /// provided to seamlessly integrate with existing context. 1715 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1716 Function *F = CI->getCalledFunction(); 1717 LLVMContext &C = CI->getContext(); 1718 IRBuilder<> Builder(C); 1719 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1720 1721 assert(F && "Intrinsic call is not direct?"); 1722 1723 if (!NewFn) { 1724 // Get the Function's name. 1725 StringRef Name = F->getName(); 1726 1727 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1728 Name = Name.substr(5); 1729 1730 bool IsX86 = Name.startswith("x86."); 1731 if (IsX86) 1732 Name = Name.substr(4); 1733 bool IsNVVM = Name.startswith("nvvm."); 1734 if (IsNVVM) 1735 Name = Name.substr(5); 1736 1737 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1738 Module *M = F->getParent(); 1739 SmallVector<Metadata *, 1> Elts; 1740 Elts.push_back( 1741 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1742 MDNode *Node = MDNode::get(C, Elts); 1743 1744 Value *Arg0 = CI->getArgOperand(0); 1745 Value *Arg1 = CI->getArgOperand(1); 1746 1747 // Nontemporal (unaligned) store of the 0'th element of the float/double 1748 // vector. 1749 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1750 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1751 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1752 Value *Extract = 1753 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1754 1755 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, Align(1)); 1756 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1757 1758 // Remove intrinsic. 1759 CI->eraseFromParent(); 1760 return; 1761 } 1762 1763 if (IsX86 && (Name.startswith("avx.movnt.") || 1764 Name.startswith("avx512.storent."))) { 1765 Module *M = F->getParent(); 1766 SmallVector<Metadata *, 1> Elts; 1767 Elts.push_back( 1768 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1769 MDNode *Node = MDNode::get(C, Elts); 1770 1771 Value *Arg0 = CI->getArgOperand(0); 1772 Value *Arg1 = CI->getArgOperand(1); 1773 1774 // Convert the type of the pointer to a pointer to the stored type. 1775 Value *BC = Builder.CreateBitCast(Arg0, 1776 PointerType::getUnqual(Arg1->getType()), 1777 "cast"); 1778 StoreInst *SI = Builder.CreateAlignedStore( 1779 Arg1, BC, 1780 Align(Arg1->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 1781 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1782 1783 // Remove intrinsic. 1784 CI->eraseFromParent(); 1785 return; 1786 } 1787 1788 if (IsX86 && Name == "sse2.storel.dq") { 1789 Value *Arg0 = CI->getArgOperand(0); 1790 Value *Arg1 = CI->getArgOperand(1); 1791 1792 auto *NewVecTy = FixedVectorType::get(Type::getInt64Ty(C), 2); 1793 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1794 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1795 Value *BC = Builder.CreateBitCast(Arg0, 1796 PointerType::getUnqual(Elt->getType()), 1797 "cast"); 1798 Builder.CreateAlignedStore(Elt, BC, Align(1)); 1799 1800 // Remove intrinsic. 1801 CI->eraseFromParent(); 1802 return; 1803 } 1804 1805 if (IsX86 && (Name.startswith("sse.storeu.") || 1806 Name.startswith("sse2.storeu.") || 1807 Name.startswith("avx.storeu."))) { 1808 Value *Arg0 = CI->getArgOperand(0); 1809 Value *Arg1 = CI->getArgOperand(1); 1810 1811 Arg0 = Builder.CreateBitCast(Arg0, 1812 PointerType::getUnqual(Arg1->getType()), 1813 "cast"); 1814 Builder.CreateAlignedStore(Arg1, Arg0, Align(1)); 1815 1816 // Remove intrinsic. 1817 CI->eraseFromParent(); 1818 return; 1819 } 1820 1821 if (IsX86 && Name == "avx512.mask.store.ss") { 1822 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1823 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1824 Mask, false); 1825 1826 // Remove intrinsic. 1827 CI->eraseFromParent(); 1828 return; 1829 } 1830 1831 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1832 // "avx512.mask.storeu." or "avx512.mask.store." 1833 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1834 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1835 CI->getArgOperand(2), Aligned); 1836 1837 // Remove intrinsic. 1838 CI->eraseFromParent(); 1839 return; 1840 } 1841 1842 Value *Rep; 1843 // Upgrade packed integer vector compare intrinsics to compare instructions. 1844 if (IsX86 && (Name.startswith("sse2.pcmp") || 1845 Name.startswith("avx2.pcmp"))) { 1846 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1847 bool CmpEq = Name[9] == 'e'; 1848 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1849 CI->getArgOperand(0), CI->getArgOperand(1)); 1850 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1851 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1852 Type *ExtTy = Type::getInt32Ty(C); 1853 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1854 ExtTy = Type::getInt64Ty(C); 1855 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1856 ExtTy->getPrimitiveSizeInBits(); 1857 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1858 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1859 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1860 Name == "sse2.sqrt.sd")) { 1861 Value *Vec = CI->getArgOperand(0); 1862 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1863 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1864 Intrinsic::sqrt, Elt0->getType()); 1865 Elt0 = Builder.CreateCall(Intr, Elt0); 1866 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1867 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1868 Name.startswith("sse2.sqrt.p") || 1869 Name.startswith("sse.sqrt.p"))) { 1870 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1871 Intrinsic::sqrt, 1872 CI->getType()), 1873 {CI->getArgOperand(0)}); 1874 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1875 if (CI->getNumArgOperands() == 4 && 1876 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1877 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1878 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1879 : Intrinsic::x86_avx512_sqrt_pd_512; 1880 1881 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1882 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1883 IID), Args); 1884 } else { 1885 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1886 Intrinsic::sqrt, 1887 CI->getType()), 1888 {CI->getArgOperand(0)}); 1889 } 1890 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1891 CI->getArgOperand(1)); 1892 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1893 Name.startswith("avx512.ptestnm"))) { 1894 Value *Op0 = CI->getArgOperand(0); 1895 Value *Op1 = CI->getArgOperand(1); 1896 Value *Mask = CI->getArgOperand(2); 1897 Rep = Builder.CreateAnd(Op0, Op1); 1898 llvm::Type *Ty = Op0->getType(); 1899 Value *Zero = llvm::Constant::getNullValue(Ty); 1900 ICmpInst::Predicate Pred = 1901 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1902 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1903 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1904 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1905 unsigned NumElts = 1906 cast<VectorType>(CI->getArgOperand(1)->getType())->getNumElements(); 1907 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1908 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1909 CI->getArgOperand(1)); 1910 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1911 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1912 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1913 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1914 int Indices[64]; 1915 for (unsigned i = 0; i != NumElts; ++i) 1916 Indices[i] = i; 1917 1918 // First extract half of each vector. This gives better codegen than 1919 // doing it in a single shuffle. 1920 LHS = Builder.CreateShuffleVector(LHS, LHS, 1921 makeArrayRef(Indices, NumElts / 2)); 1922 RHS = Builder.CreateShuffleVector(RHS, RHS, 1923 makeArrayRef(Indices, NumElts / 2)); 1924 // Concat the vectors. 1925 // NOTE: Operands have to be swapped to match intrinsic definition. 1926 Rep = Builder.CreateShuffleVector(RHS, LHS, 1927 makeArrayRef(Indices, NumElts)); 1928 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1929 } else if (IsX86 && Name == "avx512.kand.w") { 1930 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1931 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1932 Rep = Builder.CreateAnd(LHS, RHS); 1933 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1934 } else if (IsX86 && Name == "avx512.kandn.w") { 1935 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1936 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1937 LHS = Builder.CreateNot(LHS); 1938 Rep = Builder.CreateAnd(LHS, RHS); 1939 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1940 } else if (IsX86 && Name == "avx512.kor.w") { 1941 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1942 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1943 Rep = Builder.CreateOr(LHS, RHS); 1944 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1945 } else if (IsX86 && Name == "avx512.kxor.w") { 1946 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1947 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1948 Rep = Builder.CreateXor(LHS, RHS); 1949 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1950 } else if (IsX86 && Name == "avx512.kxnor.w") { 1951 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1952 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1953 LHS = Builder.CreateNot(LHS); 1954 Rep = Builder.CreateXor(LHS, RHS); 1955 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1956 } else if (IsX86 && Name == "avx512.knot.w") { 1957 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1958 Rep = Builder.CreateNot(Rep); 1959 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1960 } else if (IsX86 && 1961 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1962 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1963 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1964 Rep = Builder.CreateOr(LHS, RHS); 1965 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1966 Value *C; 1967 if (Name[14] == 'c') 1968 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1969 else 1970 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1971 Rep = Builder.CreateICmpEQ(Rep, C); 1972 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1973 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 1974 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 1975 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 1976 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1977 Type *I32Ty = Type::getInt32Ty(C); 1978 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1979 ConstantInt::get(I32Ty, 0)); 1980 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1981 ConstantInt::get(I32Ty, 0)); 1982 Value *EltOp; 1983 if (Name.contains(".add.")) 1984 EltOp = Builder.CreateFAdd(Elt0, Elt1); 1985 else if (Name.contains(".sub.")) 1986 EltOp = Builder.CreateFSub(Elt0, Elt1); 1987 else if (Name.contains(".mul.")) 1988 EltOp = Builder.CreateFMul(Elt0, Elt1); 1989 else 1990 EltOp = Builder.CreateFDiv(Elt0, Elt1); 1991 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 1992 ConstantInt::get(I32Ty, 0)); 1993 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1994 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1995 bool CmpEq = Name[16] == 'e'; 1996 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1997 } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) { 1998 Type *OpTy = CI->getArgOperand(0)->getType(); 1999 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2000 Intrinsic::ID IID; 2001 switch (VecWidth) { 2002 default: llvm_unreachable("Unexpected intrinsic"); 2003 case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break; 2004 case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break; 2005 case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break; 2006 } 2007 2008 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2009 { CI->getOperand(0), CI->getArgOperand(1) }); 2010 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 2011 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 2012 Type *OpTy = CI->getArgOperand(0)->getType(); 2013 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2014 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2015 Intrinsic::ID IID; 2016 if (VecWidth == 128 && EltWidth == 32) 2017 IID = Intrinsic::x86_avx512_fpclass_ps_128; 2018 else if (VecWidth == 256 && EltWidth == 32) 2019 IID = Intrinsic::x86_avx512_fpclass_ps_256; 2020 else if (VecWidth == 512 && EltWidth == 32) 2021 IID = Intrinsic::x86_avx512_fpclass_ps_512; 2022 else if (VecWidth == 128 && EltWidth == 64) 2023 IID = Intrinsic::x86_avx512_fpclass_pd_128; 2024 else if (VecWidth == 256 && EltWidth == 64) 2025 IID = Intrinsic::x86_avx512_fpclass_pd_256; 2026 else if (VecWidth == 512 && EltWidth == 64) 2027 IID = Intrinsic::x86_avx512_fpclass_pd_512; 2028 else 2029 llvm_unreachable("Unexpected intrinsic"); 2030 2031 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2032 { CI->getOperand(0), CI->getArgOperand(1) }); 2033 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 2034 } else if (IsX86 && Name.startswith("avx512.cmp.p")) { 2035 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2036 CI->arg_operands().end()); 2037 Type *OpTy = Args[0]->getType(); 2038 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2039 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2040 Intrinsic::ID IID; 2041 if (VecWidth == 128 && EltWidth == 32) 2042 IID = Intrinsic::x86_avx512_mask_cmp_ps_128; 2043 else if (VecWidth == 256 && EltWidth == 32) 2044 IID = Intrinsic::x86_avx512_mask_cmp_ps_256; 2045 else if (VecWidth == 512 && EltWidth == 32) 2046 IID = Intrinsic::x86_avx512_mask_cmp_ps_512; 2047 else if (VecWidth == 128 && EltWidth == 64) 2048 IID = Intrinsic::x86_avx512_mask_cmp_pd_128; 2049 else if (VecWidth == 256 && EltWidth == 64) 2050 IID = Intrinsic::x86_avx512_mask_cmp_pd_256; 2051 else if (VecWidth == 512 && EltWidth == 64) 2052 IID = Intrinsic::x86_avx512_mask_cmp_pd_512; 2053 else 2054 llvm_unreachable("Unexpected intrinsic"); 2055 2056 Value *Mask = Constant::getAllOnesValue(CI->getType()); 2057 if (VecWidth == 512) 2058 std::swap(Mask, Args.back()); 2059 Args.push_back(Mask); 2060 2061 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2062 Args); 2063 } else if (IsX86 && Name.startswith("avx512.mask.cmp.")) { 2064 // Integer compare intrinsics. 2065 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2066 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 2067 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 2068 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2069 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 2070 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 2071 Name.startswith("avx512.cvtw2mask.") || 2072 Name.startswith("avx512.cvtd2mask.") || 2073 Name.startswith("avx512.cvtq2mask."))) { 2074 Value *Op = CI->getArgOperand(0); 2075 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 2076 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 2077 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 2078 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 2079 Name == "ssse3.pabs.w.128" || 2080 Name == "ssse3.pabs.d.128" || 2081 Name.startswith("avx2.pabs") || 2082 Name.startswith("avx512.mask.pabs"))) { 2083 Rep = upgradeAbs(Builder, *CI); 2084 } else if (IsX86 && (Name == "sse41.pmaxsb" || 2085 Name == "sse2.pmaxs.w" || 2086 Name == "sse41.pmaxsd" || 2087 Name.startswith("avx2.pmaxs") || 2088 Name.startswith("avx512.mask.pmaxs"))) { 2089 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 2090 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 2091 Name == "sse41.pmaxuw" || 2092 Name == "sse41.pmaxud" || 2093 Name.startswith("avx2.pmaxu") || 2094 Name.startswith("avx512.mask.pmaxu"))) { 2095 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 2096 } else if (IsX86 && (Name == "sse41.pminsb" || 2097 Name == "sse2.pmins.w" || 2098 Name == "sse41.pminsd" || 2099 Name.startswith("avx2.pmins") || 2100 Name.startswith("avx512.mask.pmins"))) { 2101 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 2102 } else if (IsX86 && (Name == "sse2.pminu.b" || 2103 Name == "sse41.pminuw" || 2104 Name == "sse41.pminud" || 2105 Name.startswith("avx2.pminu") || 2106 Name.startswith("avx512.mask.pminu"))) { 2107 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 2108 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 2109 Name == "avx2.pmulu.dq" || 2110 Name == "avx512.pmulu.dq.512" || 2111 Name.startswith("avx512.mask.pmulu.dq."))) { 2112 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 2113 } else if (IsX86 && (Name == "sse41.pmuldq" || 2114 Name == "avx2.pmul.dq" || 2115 Name == "avx512.pmul.dq.512" || 2116 Name.startswith("avx512.mask.pmul.dq."))) { 2117 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 2118 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 2119 Name == "sse2.cvtsi2sd" || 2120 Name == "sse.cvtsi642ss" || 2121 Name == "sse2.cvtsi642sd")) { 2122 Rep = Builder.CreateSIToFP( 2123 CI->getArgOperand(1), 2124 cast<VectorType>(CI->getType())->getElementType()); 2125 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2126 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 2127 Rep = Builder.CreateUIToFP( 2128 CI->getArgOperand(1), 2129 cast<VectorType>(CI->getType())->getElementType()); 2130 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2131 } else if (IsX86 && Name == "sse2.cvtss2sd") { 2132 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 2133 Rep = Builder.CreateFPExt( 2134 Rep, cast<VectorType>(CI->getType())->getElementType()); 2135 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2136 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 2137 Name == "sse2.cvtdq2ps" || 2138 Name == "avx.cvtdq2.pd.256" || 2139 Name == "avx.cvtdq2.ps.256" || 2140 Name.startswith("avx512.mask.cvtdq2pd.") || 2141 Name.startswith("avx512.mask.cvtudq2pd.") || 2142 Name.startswith("avx512.mask.cvtdq2ps.") || 2143 Name.startswith("avx512.mask.cvtudq2ps.") || 2144 Name.startswith("avx512.mask.cvtqq2pd.") || 2145 Name.startswith("avx512.mask.cvtuqq2pd.") || 2146 Name == "avx512.mask.cvtqq2ps.256" || 2147 Name == "avx512.mask.cvtqq2ps.512" || 2148 Name == "avx512.mask.cvtuqq2ps.256" || 2149 Name == "avx512.mask.cvtuqq2ps.512" || 2150 Name == "sse2.cvtps2pd" || 2151 Name == "avx.cvt.ps2.pd.256" || 2152 Name == "avx512.mask.cvtps2pd.128" || 2153 Name == "avx512.mask.cvtps2pd.256")) { 2154 auto *DstTy = cast<VectorType>(CI->getType()); 2155 Rep = CI->getArgOperand(0); 2156 auto *SrcTy = cast<VectorType>(Rep->getType()); 2157 2158 unsigned NumDstElts = DstTy->getNumElements(); 2159 if (NumDstElts < SrcTy->getNumElements()) { 2160 assert(NumDstElts == 2 && "Unexpected vector size"); 2161 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1}); 2162 } 2163 2164 bool IsPS2PD = SrcTy->getElementType()->isFloatTy(); 2165 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 2166 if (IsPS2PD) 2167 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 2168 else if (CI->getNumArgOperands() == 4 && 2169 (!isa<ConstantInt>(CI->getArgOperand(3)) || 2170 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 2171 Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round 2172 : Intrinsic::x86_avx512_sitofp_round; 2173 Function *F = Intrinsic::getDeclaration(CI->getModule(), IID, 2174 { DstTy, SrcTy }); 2175 Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) }); 2176 } else { 2177 Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt") 2178 : Builder.CreateSIToFP(Rep, DstTy, "cvt"); 2179 } 2180 2181 if (CI->getNumArgOperands() >= 3) 2182 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2183 CI->getArgOperand(1)); 2184 } else if (IsX86 && (Name.startswith("avx512.mask.vcvtph2ps.") || 2185 Name.startswith("vcvtph2ps."))) { 2186 auto *DstTy = cast<VectorType>(CI->getType()); 2187 Rep = CI->getArgOperand(0); 2188 auto *SrcTy = cast<VectorType>(Rep->getType()); 2189 unsigned NumDstElts = DstTy->getNumElements(); 2190 if (NumDstElts != SrcTy->getNumElements()) { 2191 assert(NumDstElts == 4 && "Unexpected vector size"); 2192 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1, 2, 3}); 2193 } 2194 Rep = Builder.CreateBitCast( 2195 Rep, FixedVectorType::get(Type::getHalfTy(C), NumDstElts)); 2196 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtph2ps"); 2197 if (CI->getNumArgOperands() >= 3) 2198 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2199 CI->getArgOperand(1)); 2200 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 2201 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2202 CI->getArgOperand(1), CI->getArgOperand(2), 2203 /*Aligned*/false); 2204 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 2205 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2206 CI->getArgOperand(1),CI->getArgOperand(2), 2207 /*Aligned*/true); 2208 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 2209 auto *ResultTy = cast<VectorType>(CI->getType()); 2210 Type *PtrTy = ResultTy->getElementType(); 2211 2212 // Cast the pointer to element type. 2213 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2214 llvm::PointerType::getUnqual(PtrTy)); 2215 2216 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2217 ResultTy->getNumElements()); 2218 2219 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 2220 Intrinsic::masked_expandload, 2221 ResultTy); 2222 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 2223 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 2224 auto *ResultTy = cast<VectorType>(CI->getArgOperand(1)->getType()); 2225 Type *PtrTy = ResultTy->getElementType(); 2226 2227 // Cast the pointer to element type. 2228 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2229 llvm::PointerType::getUnqual(PtrTy)); 2230 2231 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2232 ResultTy->getNumElements()); 2233 2234 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 2235 Intrinsic::masked_compressstore, 2236 ResultTy); 2237 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 2238 } else if (IsX86 && (Name.startswith("avx512.mask.compress.") || 2239 Name.startswith("avx512.mask.expand."))) { 2240 auto *ResultTy = cast<VectorType>(CI->getType()); 2241 2242 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2243 ResultTy->getNumElements()); 2244 2245 bool IsCompress = Name[12] == 'c'; 2246 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 2247 : Intrinsic::x86_avx512_mask_expand; 2248 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); 2249 Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1), 2250 MaskVec }); 2251 } else if (IsX86 && Name.startswith("xop.vpcom")) { 2252 bool IsSigned; 2253 if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") || 2254 Name.endswith("uq")) 2255 IsSigned = false; 2256 else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") || 2257 Name.endswith("q")) 2258 IsSigned = true; 2259 else 2260 llvm_unreachable("Unknown suffix"); 2261 2262 unsigned Imm; 2263 if (CI->getNumArgOperands() == 3) { 2264 Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2265 } else { 2266 Name = Name.substr(9); // strip off "xop.vpcom" 2267 if (Name.startswith("lt")) 2268 Imm = 0; 2269 else if (Name.startswith("le")) 2270 Imm = 1; 2271 else if (Name.startswith("gt")) 2272 Imm = 2; 2273 else if (Name.startswith("ge")) 2274 Imm = 3; 2275 else if (Name.startswith("eq")) 2276 Imm = 4; 2277 else if (Name.startswith("ne")) 2278 Imm = 5; 2279 else if (Name.startswith("false")) 2280 Imm = 6; 2281 else if (Name.startswith("true")) 2282 Imm = 7; 2283 else 2284 llvm_unreachable("Unknown condition"); 2285 } 2286 2287 Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned); 2288 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2289 Value *Sel = CI->getArgOperand(2); 2290 Value *NotSel = Builder.CreateNot(Sel); 2291 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2292 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2293 Rep = Builder.CreateOr(Sel0, Sel1); 2294 } else if (IsX86 && (Name.startswith("xop.vprot") || 2295 Name.startswith("avx512.prol") || 2296 Name.startswith("avx512.mask.prol"))) { 2297 Rep = upgradeX86Rotate(Builder, *CI, false); 2298 } else if (IsX86 && (Name.startswith("avx512.pror") || 2299 Name.startswith("avx512.mask.pror"))) { 2300 Rep = upgradeX86Rotate(Builder, *CI, true); 2301 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2302 Name.startswith("avx512.mask.vpshld") || 2303 Name.startswith("avx512.maskz.vpshld"))) { 2304 bool ZeroMask = Name[11] == 'z'; 2305 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2306 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2307 Name.startswith("avx512.mask.vpshrd") || 2308 Name.startswith("avx512.maskz.vpshrd"))) { 2309 bool ZeroMask = Name[11] == 'z'; 2310 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2311 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2312 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2313 Intrinsic::x86_sse42_crc32_32_8); 2314 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2315 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2316 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2317 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2318 Name.startswith("avx512.vbroadcast.s"))) { 2319 // Replace broadcasts with a series of insertelements. 2320 auto *VecTy = cast<VectorType>(CI->getType()); 2321 Type *EltTy = VecTy->getElementType(); 2322 unsigned EltNum = VecTy->getNumElements(); 2323 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2324 EltTy->getPointerTo()); 2325 Value *Load = Builder.CreateLoad(EltTy, Cast); 2326 Type *I32Ty = Type::getInt32Ty(C); 2327 Rep = UndefValue::get(VecTy); 2328 for (unsigned I = 0; I < EltNum; ++I) 2329 Rep = Builder.CreateInsertElement(Rep, Load, 2330 ConstantInt::get(I32Ty, I)); 2331 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2332 Name.startswith("sse41.pmovzx") || 2333 Name.startswith("avx2.pmovsx") || 2334 Name.startswith("avx2.pmovzx") || 2335 Name.startswith("avx512.mask.pmovsx") || 2336 Name.startswith("avx512.mask.pmovzx"))) { 2337 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 2338 VectorType *DstTy = cast<VectorType>(CI->getType()); 2339 unsigned NumDstElts = DstTy->getNumElements(); 2340 2341 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2342 SmallVector<int, 8> ShuffleMask(NumDstElts); 2343 for (unsigned i = 0; i != NumDstElts; ++i) 2344 ShuffleMask[i] = i; 2345 2346 Value *SV = Builder.CreateShuffleVector( 2347 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2348 2349 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2350 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2351 : Builder.CreateZExt(SV, DstTy); 2352 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2353 if (CI->getNumArgOperands() == 3) 2354 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2355 CI->getArgOperand(1)); 2356 } else if (Name == "avx512.mask.pmov.qd.256" || 2357 Name == "avx512.mask.pmov.qd.512" || 2358 Name == "avx512.mask.pmov.wb.256" || 2359 Name == "avx512.mask.pmov.wb.512") { 2360 Type *Ty = CI->getArgOperand(1)->getType(); 2361 Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty); 2362 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2363 CI->getArgOperand(1)); 2364 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2365 Name == "avx2.vbroadcasti128")) { 2366 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2367 Type *EltTy = cast<VectorType>(CI->getType())->getElementType(); 2368 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2369 auto *VT = FixedVectorType::get(EltTy, NumSrcElts); 2370 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2371 PointerType::getUnqual(VT)); 2372 Value *Load = Builder.CreateAlignedLoad(VT, Op, Align(1)); 2373 if (NumSrcElts == 2) 2374 Rep = Builder.CreateShuffleVector( 2375 Load, UndefValue::get(Load->getType()), ArrayRef<int>{0, 1, 0, 1}); 2376 else 2377 Rep = 2378 Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2379 ArrayRef<int>{0, 1, 2, 3, 0, 1, 2, 3}); 2380 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2381 Name.startswith("avx512.mask.shuf.f"))) { 2382 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2383 Type *VT = CI->getType(); 2384 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2385 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2386 unsigned ControlBitsMask = NumLanes - 1; 2387 unsigned NumControlBits = NumLanes / 2; 2388 SmallVector<int, 8> ShuffleMask(0); 2389 2390 for (unsigned l = 0; l != NumLanes; ++l) { 2391 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2392 // We actually need the other source. 2393 if (l >= NumLanes / 2) 2394 LaneMask += NumLanes; 2395 for (unsigned i = 0; i != NumElementsInLane; ++i) 2396 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2397 } 2398 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2399 CI->getArgOperand(1), ShuffleMask); 2400 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2401 CI->getArgOperand(3)); 2402 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2403 Name.startswith("avx512.mask.broadcasti"))) { 2404 unsigned NumSrcElts = 2405 cast<VectorType>(CI->getArgOperand(0)->getType())->getNumElements(); 2406 unsigned NumDstElts = cast<VectorType>(CI->getType())->getNumElements(); 2407 2408 SmallVector<int, 8> ShuffleMask(NumDstElts); 2409 for (unsigned i = 0; i != NumDstElts; ++i) 2410 ShuffleMask[i] = i % NumSrcElts; 2411 2412 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2413 CI->getArgOperand(0), 2414 ShuffleMask); 2415 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2416 CI->getArgOperand(1)); 2417 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2418 Name.startswith("avx2.vbroadcast") || 2419 Name.startswith("avx512.pbroadcast") || 2420 Name.startswith("avx512.mask.broadcast.s"))) { 2421 // Replace vp?broadcasts with a vector shuffle. 2422 Value *Op = CI->getArgOperand(0); 2423 ElementCount EC = cast<VectorType>(CI->getType())->getElementCount(); 2424 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), EC); 2425 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2426 Constant::getNullValue(MaskTy)); 2427 2428 if (CI->getNumArgOperands() == 3) 2429 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2430 CI->getArgOperand(1)); 2431 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2432 Name.startswith("sse2.psubs.") || 2433 Name.startswith("avx2.padds.") || 2434 Name.startswith("avx2.psubs.") || 2435 Name.startswith("avx512.padds.") || 2436 Name.startswith("avx512.psubs.") || 2437 Name.startswith("avx512.mask.padds.") || 2438 Name.startswith("avx512.mask.psubs."))) { 2439 bool IsAdd = Name.contains(".padds"); 2440 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); 2441 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2442 Name.startswith("sse2.psubus.") || 2443 Name.startswith("avx2.paddus.") || 2444 Name.startswith("avx2.psubus.") || 2445 Name.startswith("avx512.mask.paddus.") || 2446 Name.startswith("avx512.mask.psubus."))) { 2447 bool IsAdd = Name.contains(".paddus"); 2448 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); 2449 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2450 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2451 CI->getArgOperand(1), 2452 CI->getArgOperand(2), 2453 CI->getArgOperand(3), 2454 CI->getArgOperand(4), 2455 false); 2456 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2457 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2458 CI->getArgOperand(1), 2459 CI->getArgOperand(2), 2460 CI->getArgOperand(3), 2461 CI->getArgOperand(4), 2462 true); 2463 } else if (IsX86 && (Name == "sse2.psll.dq" || 2464 Name == "avx2.psll.dq")) { 2465 // 128/256-bit shift left specified in bits. 2466 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2467 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2468 Shift / 8); // Shift is in bits. 2469 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2470 Name == "avx2.psrl.dq")) { 2471 // 128/256-bit shift right specified in bits. 2472 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2473 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2474 Shift / 8); // Shift is in bits. 2475 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2476 Name == "avx2.psll.dq.bs" || 2477 Name == "avx512.psll.dq.512")) { 2478 // 128/256/512-bit shift left specified in bytes. 2479 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2480 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2481 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2482 Name == "avx2.psrl.dq.bs" || 2483 Name == "avx512.psrl.dq.512")) { 2484 // 128/256/512-bit shift right specified in bytes. 2485 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2486 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2487 } else if (IsX86 && (Name == "sse41.pblendw" || 2488 Name.startswith("sse41.blendp") || 2489 Name.startswith("avx.blend.p") || 2490 Name == "avx2.pblendw" || 2491 Name.startswith("avx2.pblendd."))) { 2492 Value *Op0 = CI->getArgOperand(0); 2493 Value *Op1 = CI->getArgOperand(1); 2494 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2495 VectorType *VecTy = cast<VectorType>(CI->getType()); 2496 unsigned NumElts = VecTy->getNumElements(); 2497 2498 SmallVector<int, 16> Idxs(NumElts); 2499 for (unsigned i = 0; i != NumElts; ++i) 2500 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2501 2502 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2503 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2504 Name == "avx2.vinserti128" || 2505 Name.startswith("avx512.mask.insert"))) { 2506 Value *Op0 = CI->getArgOperand(0); 2507 Value *Op1 = CI->getArgOperand(1); 2508 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2509 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2510 unsigned SrcNumElts = cast<VectorType>(Op1->getType())->getNumElements(); 2511 unsigned Scale = DstNumElts / SrcNumElts; 2512 2513 // Mask off the high bits of the immediate value; hardware ignores those. 2514 Imm = Imm % Scale; 2515 2516 // Extend the second operand into a vector the size of the destination. 2517 Value *UndefV = UndefValue::get(Op1->getType()); 2518 SmallVector<int, 8> Idxs(DstNumElts); 2519 for (unsigned i = 0; i != SrcNumElts; ++i) 2520 Idxs[i] = i; 2521 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2522 Idxs[i] = SrcNumElts; 2523 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2524 2525 // Insert the second operand into the first operand. 2526 2527 // Note that there is no guarantee that instruction lowering will actually 2528 // produce a vinsertf128 instruction for the created shuffles. In 2529 // particular, the 0 immediate case involves no lane changes, so it can 2530 // be handled as a blend. 2531 2532 // Example of shuffle mask for 32-bit elements: 2533 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2534 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2535 2536 // First fill with identify mask. 2537 for (unsigned i = 0; i != DstNumElts; ++i) 2538 Idxs[i] = i; 2539 // Then replace the elements where we need to insert. 2540 for (unsigned i = 0; i != SrcNumElts; ++i) 2541 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2542 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2543 2544 // If the intrinsic has a mask operand, handle that. 2545 if (CI->getNumArgOperands() == 5) 2546 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2547 CI->getArgOperand(3)); 2548 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2549 Name == "avx2.vextracti128" || 2550 Name.startswith("avx512.mask.vextract"))) { 2551 Value *Op0 = CI->getArgOperand(0); 2552 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2553 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2554 unsigned SrcNumElts = cast<VectorType>(Op0->getType())->getNumElements(); 2555 unsigned Scale = SrcNumElts / DstNumElts; 2556 2557 // Mask off the high bits of the immediate value; hardware ignores those. 2558 Imm = Imm % Scale; 2559 2560 // Get indexes for the subvector of the input vector. 2561 SmallVector<int, 8> Idxs(DstNumElts); 2562 for (unsigned i = 0; i != DstNumElts; ++i) { 2563 Idxs[i] = i + (Imm * DstNumElts); 2564 } 2565 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2566 2567 // If the intrinsic has a mask operand, handle that. 2568 if (CI->getNumArgOperands() == 4) 2569 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2570 CI->getArgOperand(2)); 2571 } else if (!IsX86 && Name == "stackprotectorcheck") { 2572 Rep = nullptr; 2573 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2574 Name.startswith("avx512.mask.perm.di."))) { 2575 Value *Op0 = CI->getArgOperand(0); 2576 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2577 VectorType *VecTy = cast<VectorType>(CI->getType()); 2578 unsigned NumElts = VecTy->getNumElements(); 2579 2580 SmallVector<int, 8> Idxs(NumElts); 2581 for (unsigned i = 0; i != NumElts; ++i) 2582 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2583 2584 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2585 2586 if (CI->getNumArgOperands() == 4) 2587 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2588 CI->getArgOperand(2)); 2589 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2590 Name == "avx2.vperm2i128")) { 2591 // The immediate permute control byte looks like this: 2592 // [1:0] - select 128 bits from sources for low half of destination 2593 // [2] - ignore 2594 // [3] - zero low half of destination 2595 // [5:4] - select 128 bits from sources for high half of destination 2596 // [6] - ignore 2597 // [7] - zero high half of destination 2598 2599 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2600 2601 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2602 unsigned HalfSize = NumElts / 2; 2603 SmallVector<int, 8> ShuffleMask(NumElts); 2604 2605 // Determine which operand(s) are actually in use for this instruction. 2606 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2607 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2608 2609 // If needed, replace operands based on zero mask. 2610 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2611 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2612 2613 // Permute low half of result. 2614 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2615 for (unsigned i = 0; i < HalfSize; ++i) 2616 ShuffleMask[i] = StartIndex + i; 2617 2618 // Permute high half of result. 2619 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2620 for (unsigned i = 0; i < HalfSize; ++i) 2621 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2622 2623 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2624 2625 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2626 Name == "sse2.pshuf.d" || 2627 Name.startswith("avx512.mask.vpermil.p") || 2628 Name.startswith("avx512.mask.pshuf.d."))) { 2629 Value *Op0 = CI->getArgOperand(0); 2630 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2631 VectorType *VecTy = cast<VectorType>(CI->getType()); 2632 unsigned NumElts = VecTy->getNumElements(); 2633 // Calculate the size of each index in the immediate. 2634 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2635 unsigned IdxMask = ((1 << IdxSize) - 1); 2636 2637 SmallVector<int, 8> Idxs(NumElts); 2638 // Lookup the bits for this element, wrapping around the immediate every 2639 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2640 // to offset by the first index of each group. 2641 for (unsigned i = 0; i != NumElts; ++i) 2642 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2643 2644 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2645 2646 if (CI->getNumArgOperands() == 4) 2647 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2648 CI->getArgOperand(2)); 2649 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2650 Name.startswith("avx512.mask.pshufl.w."))) { 2651 Value *Op0 = CI->getArgOperand(0); 2652 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2653 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2654 2655 SmallVector<int, 16> Idxs(NumElts); 2656 for (unsigned l = 0; l != NumElts; l += 8) { 2657 for (unsigned i = 0; i != 4; ++i) 2658 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2659 for (unsigned i = 4; i != 8; ++i) 2660 Idxs[i + l] = i + l; 2661 } 2662 2663 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2664 2665 if (CI->getNumArgOperands() == 4) 2666 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2667 CI->getArgOperand(2)); 2668 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2669 Name.startswith("avx512.mask.pshufh.w."))) { 2670 Value *Op0 = CI->getArgOperand(0); 2671 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2672 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2673 2674 SmallVector<int, 16> Idxs(NumElts); 2675 for (unsigned l = 0; l != NumElts; l += 8) { 2676 for (unsigned i = 0; i != 4; ++i) 2677 Idxs[i + l] = i + l; 2678 for (unsigned i = 0; i != 4; ++i) 2679 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2680 } 2681 2682 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2683 2684 if (CI->getNumArgOperands() == 4) 2685 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2686 CI->getArgOperand(2)); 2687 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2688 Value *Op0 = CI->getArgOperand(0); 2689 Value *Op1 = CI->getArgOperand(1); 2690 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2691 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2692 2693 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2694 unsigned HalfLaneElts = NumLaneElts / 2; 2695 2696 SmallVector<int, 16> Idxs(NumElts); 2697 for (unsigned i = 0; i != NumElts; ++i) { 2698 // Base index is the starting element of the lane. 2699 Idxs[i] = i - (i % NumLaneElts); 2700 // If we are half way through the lane switch to the other source. 2701 if ((i % NumLaneElts) >= HalfLaneElts) 2702 Idxs[i] += NumElts; 2703 // Now select the specific element. By adding HalfLaneElts bits from 2704 // the immediate. Wrapping around the immediate every 8-bits. 2705 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2706 } 2707 2708 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2709 2710 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2711 CI->getArgOperand(3)); 2712 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2713 Name.startswith("avx512.mask.movshdup") || 2714 Name.startswith("avx512.mask.movsldup"))) { 2715 Value *Op0 = CI->getArgOperand(0); 2716 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2717 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2718 2719 unsigned Offset = 0; 2720 if (Name.startswith("avx512.mask.movshdup.")) 2721 Offset = 1; 2722 2723 SmallVector<int, 16> Idxs(NumElts); 2724 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2725 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2726 Idxs[i + l + 0] = i + l + Offset; 2727 Idxs[i + l + 1] = i + l + Offset; 2728 } 2729 2730 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2731 2732 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2733 CI->getArgOperand(1)); 2734 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2735 Name.startswith("avx512.mask.unpckl."))) { 2736 Value *Op0 = CI->getArgOperand(0); 2737 Value *Op1 = CI->getArgOperand(1); 2738 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2739 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2740 2741 SmallVector<int, 64> Idxs(NumElts); 2742 for (int l = 0; l != NumElts; l += NumLaneElts) 2743 for (int i = 0; i != NumLaneElts; ++i) 2744 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2745 2746 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2747 2748 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2749 CI->getArgOperand(2)); 2750 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2751 Name.startswith("avx512.mask.unpckh."))) { 2752 Value *Op0 = CI->getArgOperand(0); 2753 Value *Op1 = CI->getArgOperand(1); 2754 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2755 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2756 2757 SmallVector<int, 64> Idxs(NumElts); 2758 for (int l = 0; l != NumElts; l += NumLaneElts) 2759 for (int i = 0; i != NumLaneElts; ++i) 2760 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2761 2762 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2763 2764 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2765 CI->getArgOperand(2)); 2766 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2767 Name.startswith("avx512.mask.pand."))) { 2768 VectorType *FTy = cast<VectorType>(CI->getType()); 2769 VectorType *ITy = VectorType::getInteger(FTy); 2770 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2771 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2772 Rep = Builder.CreateBitCast(Rep, FTy); 2773 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2774 CI->getArgOperand(2)); 2775 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2776 Name.startswith("avx512.mask.pandn."))) { 2777 VectorType *FTy = cast<VectorType>(CI->getType()); 2778 VectorType *ITy = VectorType::getInteger(FTy); 2779 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2780 Rep = Builder.CreateAnd(Rep, 2781 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2782 Rep = Builder.CreateBitCast(Rep, FTy); 2783 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2784 CI->getArgOperand(2)); 2785 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2786 Name.startswith("avx512.mask.por."))) { 2787 VectorType *FTy = cast<VectorType>(CI->getType()); 2788 VectorType *ITy = VectorType::getInteger(FTy); 2789 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2790 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2791 Rep = Builder.CreateBitCast(Rep, FTy); 2792 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2793 CI->getArgOperand(2)); 2794 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2795 Name.startswith("avx512.mask.pxor."))) { 2796 VectorType *FTy = cast<VectorType>(CI->getType()); 2797 VectorType *ITy = VectorType::getInteger(FTy); 2798 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2799 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2800 Rep = Builder.CreateBitCast(Rep, FTy); 2801 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2802 CI->getArgOperand(2)); 2803 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2804 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2805 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2806 CI->getArgOperand(2)); 2807 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2808 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2809 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2810 CI->getArgOperand(2)); 2811 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2812 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2813 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2814 CI->getArgOperand(2)); 2815 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2816 if (Name.endswith(".512")) { 2817 Intrinsic::ID IID; 2818 if (Name[17] == 's') 2819 IID = Intrinsic::x86_avx512_add_ps_512; 2820 else 2821 IID = Intrinsic::x86_avx512_add_pd_512; 2822 2823 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2824 { CI->getArgOperand(0), CI->getArgOperand(1), 2825 CI->getArgOperand(4) }); 2826 } else { 2827 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2828 } 2829 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2830 CI->getArgOperand(2)); 2831 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2832 if (Name.endswith(".512")) { 2833 Intrinsic::ID IID; 2834 if (Name[17] == 's') 2835 IID = Intrinsic::x86_avx512_div_ps_512; 2836 else 2837 IID = Intrinsic::x86_avx512_div_pd_512; 2838 2839 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2840 { CI->getArgOperand(0), CI->getArgOperand(1), 2841 CI->getArgOperand(4) }); 2842 } else { 2843 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2844 } 2845 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2846 CI->getArgOperand(2)); 2847 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2848 if (Name.endswith(".512")) { 2849 Intrinsic::ID IID; 2850 if (Name[17] == 's') 2851 IID = Intrinsic::x86_avx512_mul_ps_512; 2852 else 2853 IID = Intrinsic::x86_avx512_mul_pd_512; 2854 2855 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2856 { CI->getArgOperand(0), CI->getArgOperand(1), 2857 CI->getArgOperand(4) }); 2858 } else { 2859 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2860 } 2861 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2862 CI->getArgOperand(2)); 2863 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2864 if (Name.endswith(".512")) { 2865 Intrinsic::ID IID; 2866 if (Name[17] == 's') 2867 IID = Intrinsic::x86_avx512_sub_ps_512; 2868 else 2869 IID = Intrinsic::x86_avx512_sub_pd_512; 2870 2871 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2872 { CI->getArgOperand(0), CI->getArgOperand(1), 2873 CI->getArgOperand(4) }); 2874 } else { 2875 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2876 } 2877 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2878 CI->getArgOperand(2)); 2879 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2880 Name.startswith("avx512.mask.min.p")) && 2881 Name.drop_front(18) == ".512") { 2882 bool IsDouble = Name[17] == 'd'; 2883 bool IsMin = Name[13] == 'i'; 2884 static const Intrinsic::ID MinMaxTbl[2][2] = { 2885 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2886 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2887 }; 2888 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2889 2890 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2891 { CI->getArgOperand(0), CI->getArgOperand(1), 2892 CI->getArgOperand(4) }); 2893 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2894 CI->getArgOperand(2)); 2895 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2896 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2897 Intrinsic::ctlz, 2898 CI->getType()), 2899 { CI->getArgOperand(0), Builder.getInt1(false) }); 2900 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2901 CI->getArgOperand(1)); 2902 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2903 bool IsImmediate = Name[16] == 'i' || 2904 (Name.size() > 18 && Name[18] == 'i'); 2905 bool IsVariable = Name[16] == 'v'; 2906 char Size = Name[16] == '.' ? Name[17] : 2907 Name[17] == '.' ? Name[18] : 2908 Name[18] == '.' ? Name[19] : 2909 Name[20]; 2910 2911 Intrinsic::ID IID; 2912 if (IsVariable && Name[17] != '.') { 2913 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2914 IID = Intrinsic::x86_avx2_psllv_q; 2915 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2916 IID = Intrinsic::x86_avx2_psllv_q_256; 2917 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2918 IID = Intrinsic::x86_avx2_psllv_d; 2919 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2920 IID = Intrinsic::x86_avx2_psllv_d_256; 2921 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2922 IID = Intrinsic::x86_avx512_psllv_w_128; 2923 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2924 IID = Intrinsic::x86_avx512_psllv_w_256; 2925 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2926 IID = Intrinsic::x86_avx512_psllv_w_512; 2927 else 2928 llvm_unreachable("Unexpected size"); 2929 } else if (Name.endswith(".128")) { 2930 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2931 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2932 : Intrinsic::x86_sse2_psll_d; 2933 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2934 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2935 : Intrinsic::x86_sse2_psll_q; 2936 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2937 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2938 : Intrinsic::x86_sse2_psll_w; 2939 else 2940 llvm_unreachable("Unexpected size"); 2941 } else if (Name.endswith(".256")) { 2942 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2943 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2944 : Intrinsic::x86_avx2_psll_d; 2945 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2946 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2947 : Intrinsic::x86_avx2_psll_q; 2948 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2949 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2950 : Intrinsic::x86_avx2_psll_w; 2951 else 2952 llvm_unreachable("Unexpected size"); 2953 } else { 2954 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2955 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2956 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2957 Intrinsic::x86_avx512_psll_d_512; 2958 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2959 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2960 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2961 Intrinsic::x86_avx512_psll_q_512; 2962 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2963 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2964 : Intrinsic::x86_avx512_psll_w_512; 2965 else 2966 llvm_unreachable("Unexpected size"); 2967 } 2968 2969 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2970 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2971 bool IsImmediate = Name[16] == 'i' || 2972 (Name.size() > 18 && Name[18] == 'i'); 2973 bool IsVariable = Name[16] == 'v'; 2974 char Size = Name[16] == '.' ? Name[17] : 2975 Name[17] == '.' ? Name[18] : 2976 Name[18] == '.' ? Name[19] : 2977 Name[20]; 2978 2979 Intrinsic::ID IID; 2980 if (IsVariable && Name[17] != '.') { 2981 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2982 IID = Intrinsic::x86_avx2_psrlv_q; 2983 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2984 IID = Intrinsic::x86_avx2_psrlv_q_256; 2985 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2986 IID = Intrinsic::x86_avx2_psrlv_d; 2987 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2988 IID = Intrinsic::x86_avx2_psrlv_d_256; 2989 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2990 IID = Intrinsic::x86_avx512_psrlv_w_128; 2991 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2992 IID = Intrinsic::x86_avx512_psrlv_w_256; 2993 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2994 IID = Intrinsic::x86_avx512_psrlv_w_512; 2995 else 2996 llvm_unreachable("Unexpected size"); 2997 } else if (Name.endswith(".128")) { 2998 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2999 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 3000 : Intrinsic::x86_sse2_psrl_d; 3001 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 3002 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 3003 : Intrinsic::x86_sse2_psrl_q; 3004 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 3005 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 3006 : Intrinsic::x86_sse2_psrl_w; 3007 else 3008 llvm_unreachable("Unexpected size"); 3009 } else if (Name.endswith(".256")) { 3010 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 3011 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 3012 : Intrinsic::x86_avx2_psrl_d; 3013 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 3014 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 3015 : Intrinsic::x86_avx2_psrl_q; 3016 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 3017 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 3018 : Intrinsic::x86_avx2_psrl_w; 3019 else 3020 llvm_unreachable("Unexpected size"); 3021 } else { 3022 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 3023 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 3024 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 3025 Intrinsic::x86_avx512_psrl_d_512; 3026 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 3027 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 3028 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 3029 Intrinsic::x86_avx512_psrl_q_512; 3030 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 3031 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 3032 : Intrinsic::x86_avx512_psrl_w_512; 3033 else 3034 llvm_unreachable("Unexpected size"); 3035 } 3036 3037 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3038 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 3039 bool IsImmediate = Name[16] == 'i' || 3040 (Name.size() > 18 && Name[18] == 'i'); 3041 bool IsVariable = Name[16] == 'v'; 3042 char Size = Name[16] == '.' ? Name[17] : 3043 Name[17] == '.' ? Name[18] : 3044 Name[18] == '.' ? Name[19] : 3045 Name[20]; 3046 3047 Intrinsic::ID IID; 3048 if (IsVariable && Name[17] != '.') { 3049 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 3050 IID = Intrinsic::x86_avx2_psrav_d; 3051 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 3052 IID = Intrinsic::x86_avx2_psrav_d_256; 3053 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 3054 IID = Intrinsic::x86_avx512_psrav_w_128; 3055 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 3056 IID = Intrinsic::x86_avx512_psrav_w_256; 3057 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 3058 IID = Intrinsic::x86_avx512_psrav_w_512; 3059 else 3060 llvm_unreachable("Unexpected size"); 3061 } else if (Name.endswith(".128")) { 3062 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 3063 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 3064 : Intrinsic::x86_sse2_psra_d; 3065 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 3066 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 3067 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 3068 Intrinsic::x86_avx512_psra_q_128; 3069 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 3070 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 3071 : Intrinsic::x86_sse2_psra_w; 3072 else 3073 llvm_unreachable("Unexpected size"); 3074 } else if (Name.endswith(".256")) { 3075 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 3076 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 3077 : Intrinsic::x86_avx2_psra_d; 3078 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 3079 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 3080 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 3081 Intrinsic::x86_avx512_psra_q_256; 3082 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 3083 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 3084 : Intrinsic::x86_avx2_psra_w; 3085 else 3086 llvm_unreachable("Unexpected size"); 3087 } else { 3088 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 3089 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 3090 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 3091 Intrinsic::x86_avx512_psra_d_512; 3092 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 3093 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 3094 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 3095 Intrinsic::x86_avx512_psra_q_512; 3096 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 3097 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 3098 : Intrinsic::x86_avx512_psra_w_512; 3099 else 3100 llvm_unreachable("Unexpected size"); 3101 } 3102 3103 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3104 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 3105 Rep = upgradeMaskedMove(Builder, *CI); 3106 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 3107 Rep = UpgradeMaskToInt(Builder, *CI); 3108 } else if (IsX86 && Name.endswith(".movntdqa")) { 3109 Module *M = F->getParent(); 3110 MDNode *Node = MDNode::get( 3111 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 3112 3113 Value *Ptr = CI->getArgOperand(0); 3114 3115 // Convert the type of the pointer to a pointer to the stored type. 3116 Value *BC = Builder.CreateBitCast( 3117 Ptr, PointerType::getUnqual(CI->getType()), "cast"); 3118 LoadInst *LI = Builder.CreateAlignedLoad( 3119 CI->getType(), BC, 3120 Align(CI->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 3121 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 3122 Rep = LI; 3123 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 3124 Name.startswith("fma.vfmsub.") || 3125 Name.startswith("fma.vfnmadd.") || 3126 Name.startswith("fma.vfnmsub."))) { 3127 bool NegMul = Name[6] == 'n'; 3128 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 3129 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 3130 3131 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3132 CI->getArgOperand(2) }; 3133 3134 if (IsScalar) { 3135 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3136 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3137 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3138 } 3139 3140 if (NegMul && !IsScalar) 3141 Ops[0] = Builder.CreateFNeg(Ops[0]); 3142 if (NegMul && IsScalar) 3143 Ops[1] = Builder.CreateFNeg(Ops[1]); 3144 if (NegAcc) 3145 Ops[2] = Builder.CreateFNeg(Ops[2]); 3146 3147 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3148 Intrinsic::fma, 3149 Ops[0]->getType()), 3150 Ops); 3151 3152 if (IsScalar) 3153 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 3154 (uint64_t)0); 3155 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 3156 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3157 CI->getArgOperand(2) }; 3158 3159 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3160 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3161 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3162 3163 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3164 Intrinsic::fma, 3165 Ops[0]->getType()), 3166 Ops); 3167 3168 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 3169 Rep, (uint64_t)0); 3170 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 3171 Name.startswith("avx512.maskz.vfmadd.s") || 3172 Name.startswith("avx512.mask3.vfmadd.s") || 3173 Name.startswith("avx512.mask3.vfmsub.s") || 3174 Name.startswith("avx512.mask3.vfnmsub.s"))) { 3175 bool IsMask3 = Name[11] == '3'; 3176 bool IsMaskZ = Name[11] == 'z'; 3177 // Drop the "avx512.mask." to make it easier. 3178 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3179 bool NegMul = Name[2] == 'n'; 3180 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3181 3182 Value *A = CI->getArgOperand(0); 3183 Value *B = CI->getArgOperand(1); 3184 Value *C = CI->getArgOperand(2); 3185 3186 if (NegMul && (IsMask3 || IsMaskZ)) 3187 A = Builder.CreateFNeg(A); 3188 if (NegMul && !(IsMask3 || IsMaskZ)) 3189 B = Builder.CreateFNeg(B); 3190 if (NegAcc) 3191 C = Builder.CreateFNeg(C); 3192 3193 A = Builder.CreateExtractElement(A, (uint64_t)0); 3194 B = Builder.CreateExtractElement(B, (uint64_t)0); 3195 C = Builder.CreateExtractElement(C, (uint64_t)0); 3196 3197 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 3198 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 3199 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 3200 3201 Intrinsic::ID IID; 3202 if (Name.back() == 'd') 3203 IID = Intrinsic::x86_avx512_vfmadd_f64; 3204 else 3205 IID = Intrinsic::x86_avx512_vfmadd_f32; 3206 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 3207 Rep = Builder.CreateCall(FMA, Ops); 3208 } else { 3209 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3210 Intrinsic::fma, 3211 A->getType()); 3212 Rep = Builder.CreateCall(FMA, { A, B, C }); 3213 } 3214 3215 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 3216 IsMask3 ? C : A; 3217 3218 // For Mask3 with NegAcc, we need to create a new extractelement that 3219 // avoids the negation above. 3220 if (NegAcc && IsMask3) 3221 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 3222 (uint64_t)0); 3223 3224 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 3225 Rep, PassThru); 3226 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 3227 Rep, (uint64_t)0); 3228 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 3229 Name.startswith("avx512.mask.vfnmadd.p") || 3230 Name.startswith("avx512.mask.vfnmsub.p") || 3231 Name.startswith("avx512.mask3.vfmadd.p") || 3232 Name.startswith("avx512.mask3.vfmsub.p") || 3233 Name.startswith("avx512.mask3.vfnmsub.p") || 3234 Name.startswith("avx512.maskz.vfmadd.p"))) { 3235 bool IsMask3 = Name[11] == '3'; 3236 bool IsMaskZ = Name[11] == 'z'; 3237 // Drop the "avx512.mask." to make it easier. 3238 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3239 bool NegMul = Name[2] == 'n'; 3240 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3241 3242 Value *A = CI->getArgOperand(0); 3243 Value *B = CI->getArgOperand(1); 3244 Value *C = CI->getArgOperand(2); 3245 3246 if (NegMul && (IsMask3 || IsMaskZ)) 3247 A = Builder.CreateFNeg(A); 3248 if (NegMul && !(IsMask3 || IsMaskZ)) 3249 B = Builder.CreateFNeg(B); 3250 if (NegAcc) 3251 C = Builder.CreateFNeg(C); 3252 3253 if (CI->getNumArgOperands() == 5 && 3254 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3255 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3256 Intrinsic::ID IID; 3257 // Check the character before ".512" in string. 3258 if (Name[Name.size()-5] == 's') 3259 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 3260 else 3261 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 3262 3263 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3264 { A, B, C, CI->getArgOperand(4) }); 3265 } else { 3266 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3267 Intrinsic::fma, 3268 A->getType()); 3269 Rep = Builder.CreateCall(FMA, { A, B, C }); 3270 } 3271 3272 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3273 IsMask3 ? CI->getArgOperand(2) : 3274 CI->getArgOperand(0); 3275 3276 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3277 } else if (IsX86 && Name.startswith("fma.vfmsubadd.p")) { 3278 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3279 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3280 Intrinsic::ID IID; 3281 if (VecWidth == 128 && EltWidth == 32) 3282 IID = Intrinsic::x86_fma_vfmaddsub_ps; 3283 else if (VecWidth == 256 && EltWidth == 32) 3284 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 3285 else if (VecWidth == 128 && EltWidth == 64) 3286 IID = Intrinsic::x86_fma_vfmaddsub_pd; 3287 else if (VecWidth == 256 && EltWidth == 64) 3288 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 3289 else 3290 llvm_unreachable("Unexpected intrinsic"); 3291 3292 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3293 CI->getArgOperand(2) }; 3294 Ops[2] = Builder.CreateFNeg(Ops[2]); 3295 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3296 Ops); 3297 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3298 Name.startswith("avx512.mask3.vfmaddsub.p") || 3299 Name.startswith("avx512.maskz.vfmaddsub.p") || 3300 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3301 bool IsMask3 = Name[11] == '3'; 3302 bool IsMaskZ = Name[11] == 'z'; 3303 // Drop the "avx512.mask." to make it easier. 3304 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3305 bool IsSubAdd = Name[3] == 's'; 3306 if (CI->getNumArgOperands() == 5) { 3307 Intrinsic::ID IID; 3308 // Check the character before ".512" in string. 3309 if (Name[Name.size()-5] == 's') 3310 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3311 else 3312 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3313 3314 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3315 CI->getArgOperand(2), CI->getArgOperand(4) }; 3316 if (IsSubAdd) 3317 Ops[2] = Builder.CreateFNeg(Ops[2]); 3318 3319 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3320 Ops); 3321 } else { 3322 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 3323 3324 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3325 CI->getArgOperand(2) }; 3326 3327 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3328 Ops[0]->getType()); 3329 Value *Odd = Builder.CreateCall(FMA, Ops); 3330 Ops[2] = Builder.CreateFNeg(Ops[2]); 3331 Value *Even = Builder.CreateCall(FMA, Ops); 3332 3333 if (IsSubAdd) 3334 std::swap(Even, Odd); 3335 3336 SmallVector<int, 32> Idxs(NumElts); 3337 for (int i = 0; i != NumElts; ++i) 3338 Idxs[i] = i + (i % 2) * NumElts; 3339 3340 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3341 } 3342 3343 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3344 IsMask3 ? CI->getArgOperand(2) : 3345 CI->getArgOperand(0); 3346 3347 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3348 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3349 Name.startswith("avx512.maskz.pternlog."))) { 3350 bool ZeroMask = Name[11] == 'z'; 3351 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3352 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3353 Intrinsic::ID IID; 3354 if (VecWidth == 128 && EltWidth == 32) 3355 IID = Intrinsic::x86_avx512_pternlog_d_128; 3356 else if (VecWidth == 256 && EltWidth == 32) 3357 IID = Intrinsic::x86_avx512_pternlog_d_256; 3358 else if (VecWidth == 512 && EltWidth == 32) 3359 IID = Intrinsic::x86_avx512_pternlog_d_512; 3360 else if (VecWidth == 128 && EltWidth == 64) 3361 IID = Intrinsic::x86_avx512_pternlog_q_128; 3362 else if (VecWidth == 256 && EltWidth == 64) 3363 IID = Intrinsic::x86_avx512_pternlog_q_256; 3364 else if (VecWidth == 512 && EltWidth == 64) 3365 IID = Intrinsic::x86_avx512_pternlog_q_512; 3366 else 3367 llvm_unreachable("Unexpected intrinsic"); 3368 3369 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3370 CI->getArgOperand(2), CI->getArgOperand(3) }; 3371 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3372 Args); 3373 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3374 : CI->getArgOperand(0); 3375 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3376 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3377 Name.startswith("avx512.maskz.vpmadd52"))) { 3378 bool ZeroMask = Name[11] == 'z'; 3379 bool High = Name[20] == 'h' || Name[21] == 'h'; 3380 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3381 Intrinsic::ID IID; 3382 if (VecWidth == 128 && !High) 3383 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3384 else if (VecWidth == 256 && !High) 3385 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3386 else if (VecWidth == 512 && !High) 3387 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3388 else if (VecWidth == 128 && High) 3389 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3390 else if (VecWidth == 256 && High) 3391 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3392 else if (VecWidth == 512 && High) 3393 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3394 else 3395 llvm_unreachable("Unexpected intrinsic"); 3396 3397 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3398 CI->getArgOperand(2) }; 3399 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3400 Args); 3401 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3402 : CI->getArgOperand(0); 3403 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3404 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3405 Name.startswith("avx512.mask.vpermt2var.") || 3406 Name.startswith("avx512.maskz.vpermt2var."))) { 3407 bool ZeroMask = Name[11] == 'z'; 3408 bool IndexForm = Name[17] == 'i'; 3409 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3410 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3411 Name.startswith("avx512.maskz.vpdpbusd.") || 3412 Name.startswith("avx512.mask.vpdpbusds.") || 3413 Name.startswith("avx512.maskz.vpdpbusds."))) { 3414 bool ZeroMask = Name[11] == 'z'; 3415 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3416 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3417 Intrinsic::ID IID; 3418 if (VecWidth == 128 && !IsSaturating) 3419 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3420 else if (VecWidth == 256 && !IsSaturating) 3421 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3422 else if (VecWidth == 512 && !IsSaturating) 3423 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3424 else if (VecWidth == 128 && IsSaturating) 3425 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3426 else if (VecWidth == 256 && IsSaturating) 3427 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3428 else if (VecWidth == 512 && IsSaturating) 3429 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3430 else 3431 llvm_unreachable("Unexpected intrinsic"); 3432 3433 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3434 CI->getArgOperand(2) }; 3435 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3436 Args); 3437 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3438 : CI->getArgOperand(0); 3439 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3440 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3441 Name.startswith("avx512.maskz.vpdpwssd.") || 3442 Name.startswith("avx512.mask.vpdpwssds.") || 3443 Name.startswith("avx512.maskz.vpdpwssds."))) { 3444 bool ZeroMask = Name[11] == 'z'; 3445 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3446 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3447 Intrinsic::ID IID; 3448 if (VecWidth == 128 && !IsSaturating) 3449 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3450 else if (VecWidth == 256 && !IsSaturating) 3451 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3452 else if (VecWidth == 512 && !IsSaturating) 3453 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3454 else if (VecWidth == 128 && IsSaturating) 3455 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3456 else if (VecWidth == 256 && IsSaturating) 3457 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3458 else if (VecWidth == 512 && IsSaturating) 3459 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3460 else 3461 llvm_unreachable("Unexpected intrinsic"); 3462 3463 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3464 CI->getArgOperand(2) }; 3465 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3466 Args); 3467 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3468 : CI->getArgOperand(0); 3469 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3470 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3471 Name == "addcarry.u32" || Name == "addcarry.u64" || 3472 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3473 Intrinsic::ID IID; 3474 if (Name[0] == 'a' && Name.back() == '2') 3475 IID = Intrinsic::x86_addcarry_32; 3476 else if (Name[0] == 'a' && Name.back() == '4') 3477 IID = Intrinsic::x86_addcarry_64; 3478 else if (Name[0] == 's' && Name.back() == '2') 3479 IID = Intrinsic::x86_subborrow_32; 3480 else if (Name[0] == 's' && Name.back() == '4') 3481 IID = Intrinsic::x86_subborrow_64; 3482 else 3483 llvm_unreachable("Unexpected intrinsic"); 3484 3485 // Make a call with 3 operands. 3486 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3487 CI->getArgOperand(2)}; 3488 Value *NewCall = Builder.CreateCall( 3489 Intrinsic::getDeclaration(CI->getModule(), IID), 3490 Args); 3491 3492 // Extract the second result and store it. 3493 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3494 // Cast the pointer to the right type. 3495 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3496 llvm::PointerType::getUnqual(Data->getType())); 3497 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3498 // Replace the original call result with the first result of the new call. 3499 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3500 3501 CI->replaceAllUsesWith(CF); 3502 Rep = nullptr; 3503 } else if (IsX86 && Name.startswith("avx512.mask.") && 3504 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3505 // Rep will be updated by the call in the condition. 3506 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3507 Value *Arg = CI->getArgOperand(0); 3508 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3509 Value *Cmp = Builder.CreateICmpSGE( 3510 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3511 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3512 } else if (IsNVVM && (Name.startswith("atomic.load.add.f32.p") || 3513 Name.startswith("atomic.load.add.f64.p"))) { 3514 Value *Ptr = CI->getArgOperand(0); 3515 Value *Val = CI->getArgOperand(1); 3516 Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, 3517 AtomicOrdering::SequentiallyConsistent); 3518 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3519 Name == "max.ui" || Name == "max.ull")) { 3520 Value *Arg0 = CI->getArgOperand(0); 3521 Value *Arg1 = CI->getArgOperand(1); 3522 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3523 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3524 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3525 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3526 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3527 Name == "min.ui" || Name == "min.ull")) { 3528 Value *Arg0 = CI->getArgOperand(0); 3529 Value *Arg1 = CI->getArgOperand(1); 3530 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3531 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3532 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3533 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3534 } else if (IsNVVM && Name == "clz.ll") { 3535 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3536 Value *Arg = CI->getArgOperand(0); 3537 Value *Ctlz = Builder.CreateCall( 3538 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3539 {Arg->getType()}), 3540 {Arg, Builder.getFalse()}, "ctlz"); 3541 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3542 } else if (IsNVVM && Name == "popc.ll") { 3543 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3544 // i64. 3545 Value *Arg = CI->getArgOperand(0); 3546 Value *Popc = Builder.CreateCall( 3547 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3548 {Arg->getType()}), 3549 Arg, "ctpop"); 3550 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3551 } else if (IsNVVM && Name == "h2f") { 3552 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3553 F->getParent(), Intrinsic::convert_from_fp16, 3554 {Builder.getFloatTy()}), 3555 CI->getArgOperand(0), "h2f"); 3556 } else { 3557 llvm_unreachable("Unknown function for CallInst upgrade."); 3558 } 3559 3560 if (Rep) 3561 CI->replaceAllUsesWith(Rep); 3562 CI->eraseFromParent(); 3563 return; 3564 } 3565 3566 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3567 // Handle generic mangling change, but nothing else 3568 assert( 3569 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3570 "Unknown function for CallInst upgrade and isn't just a name change"); 3571 CI->setCalledFunction(NewFn); 3572 }; 3573 CallInst *NewCall = nullptr; 3574 switch (NewFn->getIntrinsicID()) { 3575 default: { 3576 DefaultCase(); 3577 return; 3578 } 3579 case Intrinsic::experimental_vector_reduce_v2_fmul: { 3580 SmallVector<Value *, 2> Args; 3581 if (CI->isFast()) 3582 Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0)); 3583 else 3584 Args.push_back(CI->getOperand(0)); 3585 Args.push_back(CI->getOperand(1)); 3586 NewCall = Builder.CreateCall(NewFn, Args); 3587 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3588 break; 3589 } 3590 case Intrinsic::experimental_vector_reduce_v2_fadd: { 3591 SmallVector<Value *, 2> Args; 3592 if (CI->isFast()) 3593 Args.push_back(Constant::getNullValue(CI->getOperand(0)->getType())); 3594 else 3595 Args.push_back(CI->getOperand(0)); 3596 Args.push_back(CI->getOperand(1)); 3597 NewCall = Builder.CreateCall(NewFn, Args); 3598 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3599 break; 3600 } 3601 case Intrinsic::arm_neon_vld1: 3602 case Intrinsic::arm_neon_vld2: 3603 case Intrinsic::arm_neon_vld3: 3604 case Intrinsic::arm_neon_vld4: 3605 case Intrinsic::arm_neon_vld2lane: 3606 case Intrinsic::arm_neon_vld3lane: 3607 case Intrinsic::arm_neon_vld4lane: 3608 case Intrinsic::arm_neon_vst1: 3609 case Intrinsic::arm_neon_vst2: 3610 case Intrinsic::arm_neon_vst3: 3611 case Intrinsic::arm_neon_vst4: 3612 case Intrinsic::arm_neon_vst2lane: 3613 case Intrinsic::arm_neon_vst3lane: 3614 case Intrinsic::arm_neon_vst4lane: { 3615 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3616 CI->arg_operands().end()); 3617 NewCall = Builder.CreateCall(NewFn, Args); 3618 break; 3619 } 3620 3621 case Intrinsic::bitreverse: 3622 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3623 break; 3624 3625 case Intrinsic::ctlz: 3626 case Intrinsic::cttz: 3627 assert(CI->getNumArgOperands() == 1 && 3628 "Mismatch between function args and call args"); 3629 NewCall = 3630 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3631 break; 3632 3633 case Intrinsic::objectsize: { 3634 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3635 ? Builder.getFalse() 3636 : CI->getArgOperand(2); 3637 Value *Dynamic = 3638 CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3); 3639 NewCall = Builder.CreateCall( 3640 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic}); 3641 break; 3642 } 3643 3644 case Intrinsic::ctpop: 3645 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3646 break; 3647 3648 case Intrinsic::convert_from_fp16: 3649 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3650 break; 3651 3652 case Intrinsic::dbg_value: 3653 // Upgrade from the old version that had an extra offset argument. 3654 assert(CI->getNumArgOperands() == 4); 3655 // Drop nonzero offsets instead of attempting to upgrade them. 3656 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3657 if (Offset->isZeroValue()) { 3658 NewCall = Builder.CreateCall( 3659 NewFn, 3660 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3661 break; 3662 } 3663 CI->eraseFromParent(); 3664 return; 3665 3666 case Intrinsic::x86_xop_vfrcz_ss: 3667 case Intrinsic::x86_xop_vfrcz_sd: 3668 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3669 break; 3670 3671 case Intrinsic::x86_xop_vpermil2pd: 3672 case Intrinsic::x86_xop_vpermil2ps: 3673 case Intrinsic::x86_xop_vpermil2pd_256: 3674 case Intrinsic::x86_xop_vpermil2ps_256: { 3675 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3676 CI->arg_operands().end()); 3677 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3678 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3679 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3680 NewCall = Builder.CreateCall(NewFn, Args); 3681 break; 3682 } 3683 3684 case Intrinsic::x86_sse41_ptestc: 3685 case Intrinsic::x86_sse41_ptestz: 3686 case Intrinsic::x86_sse41_ptestnzc: { 3687 // The arguments for these intrinsics used to be v4f32, and changed 3688 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3689 // So, the only thing required is a bitcast for both arguments. 3690 // First, check the arguments have the old type. 3691 Value *Arg0 = CI->getArgOperand(0); 3692 if (Arg0->getType() != FixedVectorType::get(Type::getFloatTy(C), 4)) 3693 return; 3694 3695 // Old intrinsic, add bitcasts 3696 Value *Arg1 = CI->getArgOperand(1); 3697 3698 auto *NewVecTy = FixedVectorType::get(Type::getInt64Ty(C), 2); 3699 3700 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3701 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3702 3703 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3704 break; 3705 } 3706 3707 case Intrinsic::x86_rdtscp: { 3708 // This used to take 1 arguments. If we have no arguments, it is already 3709 // upgraded. 3710 if (CI->getNumOperands() == 0) 3711 return; 3712 3713 NewCall = Builder.CreateCall(NewFn); 3714 // Extract the second result and store it. 3715 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3716 // Cast the pointer to the right type. 3717 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3718 llvm::PointerType::getUnqual(Data->getType())); 3719 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3720 // Replace the original call result with the first result of the new call. 3721 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3722 3723 NewCall->takeName(CI); 3724 CI->replaceAllUsesWith(TSC); 3725 CI->eraseFromParent(); 3726 return; 3727 } 3728 3729 case Intrinsic::x86_sse41_insertps: 3730 case Intrinsic::x86_sse41_dppd: 3731 case Intrinsic::x86_sse41_dpps: 3732 case Intrinsic::x86_sse41_mpsadbw: 3733 case Intrinsic::x86_avx_dp_ps_256: 3734 case Intrinsic::x86_avx2_mpsadbw: { 3735 // Need to truncate the last argument from i32 to i8 -- this argument models 3736 // an inherently 8-bit immediate operand to these x86 instructions. 3737 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3738 CI->arg_operands().end()); 3739 3740 // Replace the last argument with a trunc. 3741 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3742 NewCall = Builder.CreateCall(NewFn, Args); 3743 break; 3744 } 3745 3746 case Intrinsic::x86_avx512_mask_cmp_pd_128: 3747 case Intrinsic::x86_avx512_mask_cmp_pd_256: 3748 case Intrinsic::x86_avx512_mask_cmp_pd_512: 3749 case Intrinsic::x86_avx512_mask_cmp_ps_128: 3750 case Intrinsic::x86_avx512_mask_cmp_ps_256: 3751 case Intrinsic::x86_avx512_mask_cmp_ps_512: { 3752 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3753 CI->arg_operands().end()); 3754 unsigned NumElts = cast<VectorType>(Args[0]->getType())->getNumElements(); 3755 Args[3] = getX86MaskVec(Builder, Args[3], NumElts); 3756 3757 NewCall = Builder.CreateCall(NewFn, Args); 3758 Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall, nullptr); 3759 3760 NewCall->takeName(CI); 3761 CI->replaceAllUsesWith(Res); 3762 CI->eraseFromParent(); 3763 return; 3764 } 3765 3766 case Intrinsic::thread_pointer: { 3767 NewCall = Builder.CreateCall(NewFn, {}); 3768 break; 3769 } 3770 3771 case Intrinsic::invariant_start: 3772 case Intrinsic::invariant_end: 3773 case Intrinsic::masked_load: 3774 case Intrinsic::masked_store: 3775 case Intrinsic::masked_gather: 3776 case Intrinsic::masked_scatter: { 3777 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3778 CI->arg_operands().end()); 3779 NewCall = Builder.CreateCall(NewFn, Args); 3780 break; 3781 } 3782 3783 case Intrinsic::memcpy: 3784 case Intrinsic::memmove: 3785 case Intrinsic::memset: { 3786 // We have to make sure that the call signature is what we're expecting. 3787 // We only want to change the old signatures by removing the alignment arg: 3788 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3789 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3790 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3791 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3792 // Note: i8*'s in the above can be any pointer type 3793 if (CI->getNumArgOperands() != 5) { 3794 DefaultCase(); 3795 return; 3796 } 3797 // Remove alignment argument (3), and add alignment attributes to the 3798 // dest/src pointers. 3799 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3800 CI->getArgOperand(2), CI->getArgOperand(4)}; 3801 NewCall = Builder.CreateCall(NewFn, Args); 3802 auto *MemCI = cast<MemIntrinsic>(NewCall); 3803 // All mem intrinsics support dest alignment. 3804 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3805 MemCI->setDestAlignment(Align->getMaybeAlignValue()); 3806 // Memcpy/Memmove also support source alignment. 3807 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3808 MTI->setSourceAlignment(Align->getMaybeAlignValue()); 3809 break; 3810 } 3811 } 3812 assert(NewCall && "Should have either set this variable or returned through " 3813 "the default case"); 3814 NewCall->takeName(CI); 3815 CI->replaceAllUsesWith(NewCall); 3816 CI->eraseFromParent(); 3817 } 3818 3819 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3820 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3821 3822 // Check if this function should be upgraded and get the replacement function 3823 // if there is one. 3824 Function *NewFn; 3825 if (UpgradeIntrinsicFunction(F, NewFn)) { 3826 // Replace all users of the old function with the new function or new 3827 // instructions. This is not a range loop because the call is deleted. 3828 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3829 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3830 UpgradeIntrinsicCall(CI, NewFn); 3831 3832 // Remove old function, no longer used, from the module. 3833 F->eraseFromParent(); 3834 } 3835 } 3836 3837 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3838 // Check if the tag uses struct-path aware TBAA format. 3839 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3840 return &MD; 3841 3842 auto &Context = MD.getContext(); 3843 if (MD.getNumOperands() == 3) { 3844 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3845 MDNode *ScalarType = MDNode::get(Context, Elts); 3846 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3847 Metadata *Elts2[] = {ScalarType, ScalarType, 3848 ConstantAsMetadata::get( 3849 Constant::getNullValue(Type::getInt64Ty(Context))), 3850 MD.getOperand(2)}; 3851 return MDNode::get(Context, Elts2); 3852 } 3853 // Create a MDNode <MD, MD, offset 0> 3854 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3855 Type::getInt64Ty(Context)))}; 3856 return MDNode::get(Context, Elts); 3857 } 3858 3859 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3860 Instruction *&Temp) { 3861 if (Opc != Instruction::BitCast) 3862 return nullptr; 3863 3864 Temp = nullptr; 3865 Type *SrcTy = V->getType(); 3866 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3867 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3868 LLVMContext &Context = V->getContext(); 3869 3870 // We have no information about target data layout, so we assume that 3871 // the maximum pointer size is 64bit. 3872 Type *MidTy = Type::getInt64Ty(Context); 3873 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3874 3875 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3876 } 3877 3878 return nullptr; 3879 } 3880 3881 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3882 if (Opc != Instruction::BitCast) 3883 return nullptr; 3884 3885 Type *SrcTy = C->getType(); 3886 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3887 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3888 LLVMContext &Context = C->getContext(); 3889 3890 // We have no information about target data layout, so we assume that 3891 // the maximum pointer size is 64bit. 3892 Type *MidTy = Type::getInt64Ty(Context); 3893 3894 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3895 DestTy); 3896 } 3897 3898 return nullptr; 3899 } 3900 3901 /// Check the debug info version number, if it is out-dated, drop the debug 3902 /// info. Return true if module is modified. 3903 bool llvm::UpgradeDebugInfo(Module &M) { 3904 unsigned Version = getDebugMetadataVersionFromModule(M); 3905 if (Version == DEBUG_METADATA_VERSION) { 3906 bool BrokenDebugInfo = false; 3907 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3908 report_fatal_error("Broken module found, compilation aborted!"); 3909 if (!BrokenDebugInfo) 3910 // Everything is ok. 3911 return false; 3912 else { 3913 // Diagnose malformed debug info. 3914 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3915 M.getContext().diagnose(Diag); 3916 } 3917 } 3918 bool Modified = StripDebugInfo(M); 3919 if (Modified && Version != DEBUG_METADATA_VERSION) { 3920 // Diagnose a version mismatch. 3921 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3922 M.getContext().diagnose(DiagVersion); 3923 } 3924 return Modified; 3925 } 3926 3927 /// This checks for objc retain release marker which should be upgraded. It 3928 /// returns true if module is modified. 3929 static bool UpgradeRetainReleaseMarker(Module &M) { 3930 bool Changed = false; 3931 const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker"; 3932 NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey); 3933 if (ModRetainReleaseMarker) { 3934 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3935 if (Op) { 3936 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3937 if (ID) { 3938 SmallVector<StringRef, 4> ValueComp; 3939 ID->getString().split(ValueComp, "#"); 3940 if (ValueComp.size() == 2) { 3941 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3942 ID = MDString::get(M.getContext(), NewValue); 3943 } 3944 M.addModuleFlag(Module::Error, MarkerKey, ID); 3945 M.eraseNamedMetadata(ModRetainReleaseMarker); 3946 Changed = true; 3947 } 3948 } 3949 } 3950 return Changed; 3951 } 3952 3953 void llvm::UpgradeARCRuntime(Module &M) { 3954 // This lambda converts normal function calls to ARC runtime functions to 3955 // intrinsic calls. 3956 auto UpgradeToIntrinsic = [&](const char *OldFunc, 3957 llvm::Intrinsic::ID IntrinsicFunc) { 3958 Function *Fn = M.getFunction(OldFunc); 3959 3960 if (!Fn) 3961 return; 3962 3963 Function *NewFn = llvm::Intrinsic::getDeclaration(&M, IntrinsicFunc); 3964 3965 for (auto I = Fn->user_begin(), E = Fn->user_end(); I != E;) { 3966 CallInst *CI = dyn_cast<CallInst>(*I++); 3967 if (!CI || CI->getCalledFunction() != Fn) 3968 continue; 3969 3970 IRBuilder<> Builder(CI->getParent(), CI->getIterator()); 3971 FunctionType *NewFuncTy = NewFn->getFunctionType(); 3972 SmallVector<Value *, 2> Args; 3973 3974 // Don't upgrade the intrinsic if it's not valid to bitcast the return 3975 // value to the return type of the old function. 3976 if (NewFuncTy->getReturnType() != CI->getType() && 3977 !CastInst::castIsValid(Instruction::BitCast, CI, 3978 NewFuncTy->getReturnType())) 3979 continue; 3980 3981 bool InvalidCast = false; 3982 3983 for (unsigned I = 0, E = CI->getNumArgOperands(); I != E; ++I) { 3984 Value *Arg = CI->getArgOperand(I); 3985 3986 // Bitcast argument to the parameter type of the new function if it's 3987 // not a variadic argument. 3988 if (I < NewFuncTy->getNumParams()) { 3989 // Don't upgrade the intrinsic if it's not valid to bitcast the argument 3990 // to the parameter type of the new function. 3991 if (!CastInst::castIsValid(Instruction::BitCast, Arg, 3992 NewFuncTy->getParamType(I))) { 3993 InvalidCast = true; 3994 break; 3995 } 3996 Arg = Builder.CreateBitCast(Arg, NewFuncTy->getParamType(I)); 3997 } 3998 Args.push_back(Arg); 3999 } 4000 4001 if (InvalidCast) 4002 continue; 4003 4004 // Create a call instruction that calls the new function. 4005 CallInst *NewCall = Builder.CreateCall(NewFuncTy, NewFn, Args); 4006 NewCall->setTailCallKind(cast<CallInst>(CI)->getTailCallKind()); 4007 NewCall->takeName(CI); 4008 4009 // Bitcast the return value back to the type of the old call. 4010 Value *NewRetVal = Builder.CreateBitCast(NewCall, CI->getType()); 4011 4012 if (!CI->use_empty()) 4013 CI->replaceAllUsesWith(NewRetVal); 4014 CI->eraseFromParent(); 4015 } 4016 4017 if (Fn->use_empty()) 4018 Fn->eraseFromParent(); 4019 }; 4020 4021 // Unconditionally convert a call to "clang.arc.use" to a call to 4022 // "llvm.objc.clang.arc.use". 4023 UpgradeToIntrinsic("clang.arc.use", llvm::Intrinsic::objc_clang_arc_use); 4024 4025 // Upgrade the retain release marker. If there is no need to upgrade 4026 // the marker, that means either the module is already new enough to contain 4027 // new intrinsics or it is not ARC. There is no need to upgrade runtime call. 4028 if (!UpgradeRetainReleaseMarker(M)) 4029 return; 4030 4031 std::pair<const char *, llvm::Intrinsic::ID> RuntimeFuncs[] = { 4032 {"objc_autorelease", llvm::Intrinsic::objc_autorelease}, 4033 {"objc_autoreleasePoolPop", llvm::Intrinsic::objc_autoreleasePoolPop}, 4034 {"objc_autoreleasePoolPush", llvm::Intrinsic::objc_autoreleasePoolPush}, 4035 {"objc_autoreleaseReturnValue", 4036 llvm::Intrinsic::objc_autoreleaseReturnValue}, 4037 {"objc_copyWeak", llvm::Intrinsic::objc_copyWeak}, 4038 {"objc_destroyWeak", llvm::Intrinsic::objc_destroyWeak}, 4039 {"objc_initWeak", llvm::Intrinsic::objc_initWeak}, 4040 {"objc_loadWeak", llvm::Intrinsic::objc_loadWeak}, 4041 {"objc_loadWeakRetained", llvm::Intrinsic::objc_loadWeakRetained}, 4042 {"objc_moveWeak", llvm::Intrinsic::objc_moveWeak}, 4043 {"objc_release", llvm::Intrinsic::objc_release}, 4044 {"objc_retain", llvm::Intrinsic::objc_retain}, 4045 {"objc_retainAutorelease", llvm::Intrinsic::objc_retainAutorelease}, 4046 {"objc_retainAutoreleaseReturnValue", 4047 llvm::Intrinsic::objc_retainAutoreleaseReturnValue}, 4048 {"objc_retainAutoreleasedReturnValue", 4049 llvm::Intrinsic::objc_retainAutoreleasedReturnValue}, 4050 {"objc_retainBlock", llvm::Intrinsic::objc_retainBlock}, 4051 {"objc_storeStrong", llvm::Intrinsic::objc_storeStrong}, 4052 {"objc_storeWeak", llvm::Intrinsic::objc_storeWeak}, 4053 {"objc_unsafeClaimAutoreleasedReturnValue", 4054 llvm::Intrinsic::objc_unsafeClaimAutoreleasedReturnValue}, 4055 {"objc_retainedObject", llvm::Intrinsic::objc_retainedObject}, 4056 {"objc_unretainedObject", llvm::Intrinsic::objc_unretainedObject}, 4057 {"objc_unretainedPointer", llvm::Intrinsic::objc_unretainedPointer}, 4058 {"objc_retain_autorelease", llvm::Intrinsic::objc_retain_autorelease}, 4059 {"objc_sync_enter", llvm::Intrinsic::objc_sync_enter}, 4060 {"objc_sync_exit", llvm::Intrinsic::objc_sync_exit}, 4061 {"objc_arc_annotation_topdown_bbstart", 4062 llvm::Intrinsic::objc_arc_annotation_topdown_bbstart}, 4063 {"objc_arc_annotation_topdown_bbend", 4064 llvm::Intrinsic::objc_arc_annotation_topdown_bbend}, 4065 {"objc_arc_annotation_bottomup_bbstart", 4066 llvm::Intrinsic::objc_arc_annotation_bottomup_bbstart}, 4067 {"objc_arc_annotation_bottomup_bbend", 4068 llvm::Intrinsic::objc_arc_annotation_bottomup_bbend}}; 4069 4070 for (auto &I : RuntimeFuncs) 4071 UpgradeToIntrinsic(I.first, I.second); 4072 } 4073 4074 bool llvm::UpgradeModuleFlags(Module &M) { 4075 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 4076 if (!ModFlags) 4077 return false; 4078 4079 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 4080 bool HasSwiftVersionFlag = false; 4081 uint8_t SwiftMajorVersion, SwiftMinorVersion; 4082 uint32_t SwiftABIVersion; 4083 auto Int8Ty = Type::getInt8Ty(M.getContext()); 4084 auto Int32Ty = Type::getInt32Ty(M.getContext()); 4085 4086 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 4087 MDNode *Op = ModFlags->getOperand(I); 4088 if (Op->getNumOperands() != 3) 4089 continue; 4090 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 4091 if (!ID) 4092 continue; 4093 if (ID->getString() == "Objective-C Image Info Version") 4094 HasObjCFlag = true; 4095 if (ID->getString() == "Objective-C Class Properties") 4096 HasClassProperties = true; 4097 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 4098 // field was Error and now they are Max. 4099 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 4100 if (auto *Behavior = 4101 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 4102 if (Behavior->getLimitedValue() == Module::Error) { 4103 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 4104 Metadata *Ops[3] = { 4105 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 4106 MDString::get(M.getContext(), ID->getString()), 4107 Op->getOperand(2)}; 4108 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4109 Changed = true; 4110 } 4111 } 4112 } 4113 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 4114 // section name so that llvm-lto will not complain about mismatching 4115 // module flags that is functionally the same. 4116 if (ID->getString() == "Objective-C Image Info Section") { 4117 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 4118 SmallVector<StringRef, 4> ValueComp; 4119 Value->getString().split(ValueComp, " "); 4120 if (ValueComp.size() != 1) { 4121 std::string NewValue; 4122 for (auto &S : ValueComp) 4123 NewValue += S.str(); 4124 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 4125 MDString::get(M.getContext(), NewValue)}; 4126 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4127 Changed = true; 4128 } 4129 } 4130 } 4131 4132 // IRUpgrader turns a i32 type "Objective-C Garbage Collection" into i8 value. 4133 // If the higher bits are set, it adds new module flag for swift info. 4134 if (ID->getString() == "Objective-C Garbage Collection") { 4135 auto Md = dyn_cast<ConstantAsMetadata>(Op->getOperand(2)); 4136 if (Md) { 4137 assert(Md->getValue() && "Expected non-empty metadata"); 4138 auto Type = Md->getValue()->getType(); 4139 if (Type == Int8Ty) 4140 continue; 4141 unsigned Val = Md->getValue()->getUniqueInteger().getZExtValue(); 4142 if ((Val & 0xff) != Val) { 4143 HasSwiftVersionFlag = true; 4144 SwiftABIVersion = (Val & 0xff00) >> 8; 4145 SwiftMajorVersion = (Val & 0xff000000) >> 24; 4146 SwiftMinorVersion = (Val & 0xff0000) >> 16; 4147 } 4148 Metadata *Ops[3] = { 4149 ConstantAsMetadata::get(ConstantInt::get(Int32Ty,Module::Error)), 4150 Op->getOperand(1), 4151 ConstantAsMetadata::get(ConstantInt::get(Int8Ty,Val & 0xff))}; 4152 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4153 Changed = true; 4154 } 4155 } 4156 } 4157 4158 // "Objective-C Class Properties" is recently added for Objective-C. We 4159 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 4160 // flag of value 0, so we can correclty downgrade this flag when trying to 4161 // link an ObjC bitcode without this module flag with an ObjC bitcode with 4162 // this module flag. 4163 if (HasObjCFlag && !HasClassProperties) { 4164 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 4165 (uint32_t)0); 4166 Changed = true; 4167 } 4168 4169 if (HasSwiftVersionFlag) { 4170 M.addModuleFlag(Module::Error, "Swift ABI Version", 4171 SwiftABIVersion); 4172 M.addModuleFlag(Module::Error, "Swift Major Version", 4173 ConstantInt::get(Int8Ty, SwiftMajorVersion)); 4174 M.addModuleFlag(Module::Error, "Swift Minor Version", 4175 ConstantInt::get(Int8Ty, SwiftMinorVersion)); 4176 Changed = true; 4177 } 4178 4179 return Changed; 4180 } 4181 4182 void llvm::UpgradeSectionAttributes(Module &M) { 4183 auto TrimSpaces = [](StringRef Section) -> std::string { 4184 SmallVector<StringRef, 5> Components; 4185 Section.split(Components, ','); 4186 4187 SmallString<32> Buffer; 4188 raw_svector_ostream OS(Buffer); 4189 4190 for (auto Component : Components) 4191 OS << ',' << Component.trim(); 4192 4193 return std::string(OS.str().substr(1)); 4194 }; 4195 4196 for (auto &GV : M.globals()) { 4197 if (!GV.hasSection()) 4198 continue; 4199 4200 StringRef Section = GV.getSection(); 4201 4202 if (!Section.startswith("__DATA, __objc_catlist")) 4203 continue; 4204 4205 // __DATA, __objc_catlist, regular, no_dead_strip 4206 // __DATA,__objc_catlist,regular,no_dead_strip 4207 GV.setSection(TrimSpaces(Section)); 4208 } 4209 } 4210 4211 namespace { 4212 // Prior to LLVM 10.0, the strictfp attribute could be used on individual 4213 // callsites within a function that did not also have the strictfp attribute. 4214 // Since 10.0, if strict FP semantics are needed within a function, the 4215 // function must have the strictfp attribute and all calls within the function 4216 // must also have the strictfp attribute. This latter restriction is 4217 // necessary to prevent unwanted libcall simplification when a function is 4218 // being cloned (such as for inlining). 4219 // 4220 // The "dangling" strictfp attribute usage was only used to prevent constant 4221 // folding and other libcall simplification. The nobuiltin attribute on the 4222 // callsite has the same effect. 4223 struct StrictFPUpgradeVisitor : public InstVisitor<StrictFPUpgradeVisitor> { 4224 StrictFPUpgradeVisitor() {} 4225 4226 void visitCallBase(CallBase &Call) { 4227 if (!Call.isStrictFP()) 4228 return; 4229 if (isa<ConstrainedFPIntrinsic>(&Call)) 4230 return; 4231 // If we get here, the caller doesn't have the strictfp attribute 4232 // but this callsite does. Replace the strictfp attribute with nobuiltin. 4233 Call.removeAttribute(AttributeList::FunctionIndex, Attribute::StrictFP); 4234 Call.addAttribute(AttributeList::FunctionIndex, Attribute::NoBuiltin); 4235 } 4236 }; 4237 } // namespace 4238 4239 void llvm::UpgradeFunctionAttributes(Function &F) { 4240 // If a function definition doesn't have the strictfp attribute, 4241 // convert any callsite strictfp attributes to nobuiltin. 4242 if (!F.isDeclaration() && !F.hasFnAttribute(Attribute::StrictFP)) { 4243 StrictFPUpgradeVisitor SFPV; 4244 SFPV.visit(F); 4245 } 4246 } 4247 4248 static bool isOldLoopArgument(Metadata *MD) { 4249 auto *T = dyn_cast_or_null<MDTuple>(MD); 4250 if (!T) 4251 return false; 4252 if (T->getNumOperands() < 1) 4253 return false; 4254 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 4255 if (!S) 4256 return false; 4257 return S->getString().startswith("llvm.vectorizer."); 4258 } 4259 4260 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 4261 StringRef OldPrefix = "llvm.vectorizer."; 4262 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 4263 4264 if (OldTag == "llvm.vectorizer.unroll") 4265 return MDString::get(C, "llvm.loop.interleave.count"); 4266 4267 return MDString::get( 4268 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 4269 .str()); 4270 } 4271 4272 static Metadata *upgradeLoopArgument(Metadata *MD) { 4273 auto *T = dyn_cast_or_null<MDTuple>(MD); 4274 if (!T) 4275 return MD; 4276 if (T->getNumOperands() < 1) 4277 return MD; 4278 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 4279 if (!OldTag) 4280 return MD; 4281 if (!OldTag->getString().startswith("llvm.vectorizer.")) 4282 return MD; 4283 4284 // This has an old tag. Upgrade it. 4285 SmallVector<Metadata *, 8> Ops; 4286 Ops.reserve(T->getNumOperands()); 4287 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 4288 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 4289 Ops.push_back(T->getOperand(I)); 4290 4291 return MDTuple::get(T->getContext(), Ops); 4292 } 4293 4294 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 4295 auto *T = dyn_cast<MDTuple>(&N); 4296 if (!T) 4297 return &N; 4298 4299 if (none_of(T->operands(), isOldLoopArgument)) 4300 return &N; 4301 4302 SmallVector<Metadata *, 8> Ops; 4303 Ops.reserve(T->getNumOperands()); 4304 for (Metadata *MD : T->operands()) 4305 Ops.push_back(upgradeLoopArgument(MD)); 4306 4307 return MDTuple::get(T->getContext(), Ops); 4308 } 4309 4310 std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { 4311 std::string AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64"; 4312 4313 // If X86, and the datalayout matches the expected format, add pointer size 4314 // address spaces to the datalayout. 4315 if (!Triple(TT).isX86() || DL.contains(AddrSpaces)) 4316 return std::string(DL); 4317 4318 SmallVector<StringRef, 4> Groups; 4319 Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)"); 4320 if (!R.match(DL, &Groups)) 4321 return std::string(DL); 4322 4323 SmallString<1024> Buf; 4324 std::string Res = (Groups[1] + AddrSpaces + Groups[3]).toStringRef(Buf).str(); 4325 return Res; 4326 } 4327 4328 void llvm::UpgradeAttributes(AttrBuilder &B) { 4329 StringRef FramePointer; 4330 if (B.contains("no-frame-pointer-elim")) { 4331 // The value can be "true" or "false". 4332 for (const auto &I : B.td_attrs()) 4333 if (I.first == "no-frame-pointer-elim") 4334 FramePointer = I.second == "true" ? "all" : "none"; 4335 B.removeAttribute("no-frame-pointer-elim"); 4336 } 4337 if (B.contains("no-frame-pointer-elim-non-leaf")) { 4338 // The value is ignored. "no-frame-pointer-elim"="true" takes priority. 4339 if (FramePointer != "all") 4340 FramePointer = "non-leaf"; 4341 B.removeAttribute("no-frame-pointer-elim-non-leaf"); 4342 } 4343 if (!FramePointer.empty()) 4344 B.addAttribute("frame-pointer", FramePointer); 4345 4346 if (B.contains("null-pointer-is-valid")) { 4347 // The value can be "true" or "false". 4348 bool NullPointerIsValid = false; 4349 for (const auto &I : B.td_attrs()) 4350 if (I.first == "null-pointer-is-valid") 4351 NullPointerIsValid = I.second == "true"; 4352 B.removeAttribute("null-pointer-is-valid"); 4353 if (NullPointerIsValid) 4354 B.addAttribute(Attribute::NullPointerIsValid); 4355 } 4356 } 4357