1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the auto-upgrade helper functions. 10 // This is where deprecated IR intrinsics and other IR features are updated to 11 // current specifications. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/IR/AutoUpgrade.h" 16 #include "llvm/ADT/StringSwitch.h" 17 #include "llvm/IR/Constants.h" 18 #include "llvm/IR/DIBuilder.h" 19 #include "llvm/IR/DebugInfo.h" 20 #include "llvm/IR/DiagnosticInfo.h" 21 #include "llvm/IR/Function.h" 22 #include "llvm/IR/IRBuilder.h" 23 #include "llvm/IR/Instruction.h" 24 #include "llvm/IR/IntrinsicInst.h" 25 #include "llvm/IR/IntrinsicsAArch64.h" 26 #include "llvm/IR/IntrinsicsARM.h" 27 #include "llvm/IR/IntrinsicsX86.h" 28 #include "llvm/IR/LLVMContext.h" 29 #include "llvm/IR/Module.h" 30 #include "llvm/IR/Verifier.h" 31 #include "llvm/Support/ErrorHandling.h" 32 #include "llvm/Support/Regex.h" 33 #include <cstring> 34 using namespace llvm; 35 36 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 37 38 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 39 // changed their type from v4f32 to v2i64. 40 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 41 Function *&NewFn) { 42 // Check whether this is an old version of the function, which received 43 // v4f32 arguments. 44 Type *Arg0Type = F->getFunctionType()->getParamType(0); 45 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 46 return false; 47 48 // Yes, it's old, replace it with new version. 49 rename(F); 50 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 51 return true; 52 } 53 54 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 55 // arguments have changed their type from i32 to i8. 56 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 57 Function *&NewFn) { 58 // Check that the last argument is an i32. 59 Type *LastArgType = F->getFunctionType()->getParamType( 60 F->getFunctionType()->getNumParams() - 1); 61 if (!LastArgType->isIntegerTy(32)) 62 return false; 63 64 // Move this function aside and map down. 65 rename(F); 66 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 67 return true; 68 } 69 70 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 71 // All of the intrinsics matches below should be marked with which llvm 72 // version started autoupgrading them. At some point in the future we would 73 // like to use this information to remove upgrade code for some older 74 // intrinsics. It is currently undecided how we will determine that future 75 // point. 76 if (Name == "addcarryx.u32" || // Added in 8.0 77 Name == "addcarryx.u64" || // Added in 8.0 78 Name == "addcarry.u32" || // Added in 8.0 79 Name == "addcarry.u64" || // Added in 8.0 80 Name == "subborrow.u32" || // Added in 8.0 81 Name == "subborrow.u64" || // Added in 8.0 82 Name.startswith("sse2.padds.") || // Added in 8.0 83 Name.startswith("sse2.psubs.") || // Added in 8.0 84 Name.startswith("sse2.paddus.") || // Added in 8.0 85 Name.startswith("sse2.psubus.") || // Added in 8.0 86 Name.startswith("avx2.padds.") || // Added in 8.0 87 Name.startswith("avx2.psubs.") || // Added in 8.0 88 Name.startswith("avx2.paddus.") || // Added in 8.0 89 Name.startswith("avx2.psubus.") || // Added in 8.0 90 Name.startswith("avx512.padds.") || // Added in 8.0 91 Name.startswith("avx512.psubs.") || // Added in 8.0 92 Name.startswith("avx512.mask.padds.") || // Added in 8.0 93 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 94 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 95 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 96 Name=="ssse3.pabs.b.128" || // Added in 6.0 97 Name=="ssse3.pabs.w.128" || // Added in 6.0 98 Name=="ssse3.pabs.d.128" || // Added in 6.0 99 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 100 Name.startswith("fma.vfmadd.") || // Added in 7.0 101 Name.startswith("fma.vfmsub.") || // Added in 7.0 102 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 103 Name.startswith("fma.vfnmadd.") || // Added in 7.0 104 Name.startswith("fma.vfnmsub.") || // Added in 7.0 105 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 106 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 107 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 108 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 109 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 110 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 111 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 112 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 113 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 114 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 115 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 116 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 117 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 118 Name.startswith("avx512.kunpck") || //added in 6.0 119 Name.startswith("avx2.pabs.") || // Added in 6.0 120 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 121 Name.startswith("avx512.broadcastm") || // Added in 6.0 122 Name == "sse.sqrt.ss" || // Added in 7.0 123 Name == "sse2.sqrt.sd" || // Added in 7.0 124 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 125 Name.startswith("avx.sqrt.p") || // Added in 7.0 126 Name.startswith("sse2.sqrt.p") || // Added in 7.0 127 Name.startswith("sse.sqrt.p") || // Added in 7.0 128 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 129 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 130 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 131 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 132 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 133 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 134 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 135 Name.startswith("avx.vperm2f128.") || // Added in 6.0 136 Name == "avx2.vperm2i128" || // Added in 6.0 137 Name == "sse.add.ss" || // Added in 4.0 138 Name == "sse2.add.sd" || // Added in 4.0 139 Name == "sse.sub.ss" || // Added in 4.0 140 Name == "sse2.sub.sd" || // Added in 4.0 141 Name == "sse.mul.ss" || // Added in 4.0 142 Name == "sse2.mul.sd" || // Added in 4.0 143 Name == "sse.div.ss" || // Added in 4.0 144 Name == "sse2.div.sd" || // Added in 4.0 145 Name == "sse41.pmaxsb" || // Added in 3.9 146 Name == "sse2.pmaxs.w" || // Added in 3.9 147 Name == "sse41.pmaxsd" || // Added in 3.9 148 Name == "sse2.pmaxu.b" || // Added in 3.9 149 Name == "sse41.pmaxuw" || // Added in 3.9 150 Name == "sse41.pmaxud" || // Added in 3.9 151 Name == "sse41.pminsb" || // Added in 3.9 152 Name == "sse2.pmins.w" || // Added in 3.9 153 Name == "sse41.pminsd" || // Added in 3.9 154 Name == "sse2.pminu.b" || // Added in 3.9 155 Name == "sse41.pminuw" || // Added in 3.9 156 Name == "sse41.pminud" || // Added in 3.9 157 Name == "avx512.kand.w" || // Added in 7.0 158 Name == "avx512.kandn.w" || // Added in 7.0 159 Name == "avx512.knot.w" || // Added in 7.0 160 Name == "avx512.kor.w" || // Added in 7.0 161 Name == "avx512.kxor.w" || // Added in 7.0 162 Name == "avx512.kxnor.w" || // Added in 7.0 163 Name == "avx512.kortestc.w" || // Added in 7.0 164 Name == "avx512.kortestz.w" || // Added in 7.0 165 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 166 Name.startswith("avx2.pmax") || // Added in 3.9 167 Name.startswith("avx2.pmin") || // Added in 3.9 168 Name.startswith("avx512.mask.pmax") || // Added in 4.0 169 Name.startswith("avx512.mask.pmin") || // Added in 4.0 170 Name.startswith("avx2.vbroadcast") || // Added in 3.8 171 Name.startswith("avx2.pbroadcast") || // Added in 3.8 172 Name.startswith("avx.vpermil.") || // Added in 3.1 173 Name.startswith("sse2.pshuf") || // Added in 3.9 174 Name.startswith("avx512.pbroadcast") || // Added in 3.9 175 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 176 Name.startswith("avx512.mask.movddup") || // Added in 3.9 177 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 178 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 179 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 180 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 181 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 182 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 183 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 184 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 185 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 186 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 187 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 188 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 189 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 190 Name.startswith("avx512.mask.pand.") || // Added in 3.9 191 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 192 Name.startswith("avx512.mask.por.") || // Added in 3.9 193 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 194 Name.startswith("avx512.mask.and.") || // Added in 3.9 195 Name.startswith("avx512.mask.andn.") || // Added in 3.9 196 Name.startswith("avx512.mask.or.") || // Added in 3.9 197 Name.startswith("avx512.mask.xor.") || // Added in 3.9 198 Name.startswith("avx512.mask.padd.") || // Added in 4.0 199 Name.startswith("avx512.mask.psub.") || // Added in 4.0 200 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 201 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 202 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 203 Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0 204 Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0 205 Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0 206 Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0 207 Name == "avx512.mask.vcvtph2ps.128" || // Added in 11.0 208 Name == "avx512.mask.vcvtph2ps.256" || // Added in 11.0 209 Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0 210 Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0 211 Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0 212 Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0 213 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 214 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 215 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 216 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 217 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 218 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 219 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 220 Name == "avx512.cvtusi2sd" || // Added in 7.0 221 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 222 Name == "sse2.pmulu.dq" || // Added in 7.0 223 Name == "sse41.pmuldq" || // Added in 7.0 224 Name == "avx2.pmulu.dq" || // Added in 7.0 225 Name == "avx2.pmul.dq" || // Added in 7.0 226 Name == "avx512.pmulu.dq.512" || // Added in 7.0 227 Name == "avx512.pmul.dq.512" || // Added in 7.0 228 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 229 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 230 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 231 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 232 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 233 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 234 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 235 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 236 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 237 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 238 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 239 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 240 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 241 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 242 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 243 Name.startswith("avx512.mask.cmp.p") || // Added in 7.0 244 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 245 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 246 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 247 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 248 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 249 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 250 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 251 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 252 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 253 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 254 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 255 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 256 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 257 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 258 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 259 Name.startswith("avx512.mask.pslli") || // Added in 4.0 260 Name.startswith("avx512.mask.psrai") || // Added in 4.0 261 Name.startswith("avx512.mask.psrli") || // Added in 4.0 262 Name.startswith("avx512.mask.psllv") || // Added in 4.0 263 Name.startswith("avx512.mask.psrav") || // Added in 4.0 264 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 265 Name.startswith("sse41.pmovsx") || // Added in 3.8 266 Name.startswith("sse41.pmovzx") || // Added in 3.9 267 Name.startswith("avx2.pmovsx") || // Added in 3.9 268 Name.startswith("avx2.pmovzx") || // Added in 3.9 269 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 270 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 271 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 272 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 273 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 274 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 275 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 276 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 277 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 278 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 279 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 280 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 281 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 282 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 283 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 284 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 285 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 286 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 287 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 289 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 290 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 291 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 292 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 293 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 294 Name.startswith("avx512.vpshld.") || // Added in 8.0 295 Name.startswith("avx512.vpshrd.") || // Added in 8.0 296 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 297 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 298 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 299 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 300 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 301 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 302 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 303 Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0 304 Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0 305 Name.startswith("avx512.mask.conflict.") || // Added in 9.0 306 Name == "avx512.mask.pmov.qd.256" || // Added in 9.0 307 Name == "avx512.mask.pmov.qd.512" || // Added in 9.0 308 Name == "avx512.mask.pmov.wb.256" || // Added in 9.0 309 Name == "avx512.mask.pmov.wb.512" || // Added in 9.0 310 Name == "sse.cvtsi2ss" || // Added in 7.0 311 Name == "sse.cvtsi642ss" || // Added in 7.0 312 Name == "sse2.cvtsi2sd" || // Added in 7.0 313 Name == "sse2.cvtsi642sd" || // Added in 7.0 314 Name == "sse2.cvtss2sd" || // Added in 7.0 315 Name == "sse2.cvtdq2pd" || // Added in 3.9 316 Name == "sse2.cvtdq2ps" || // Added in 7.0 317 Name == "sse2.cvtps2pd" || // Added in 3.9 318 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 319 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 320 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 321 Name.startswith("vcvtph2ps.") || // Added in 11.0 322 Name.startswith("avx.vinsertf128.") || // Added in 3.7 323 Name == "avx2.vinserti128" || // Added in 3.7 324 Name.startswith("avx512.mask.insert") || // Added in 4.0 325 Name.startswith("avx.vextractf128.") || // Added in 3.7 326 Name == "avx2.vextracti128" || // Added in 3.7 327 Name.startswith("avx512.mask.vextract") || // Added in 4.0 328 Name.startswith("sse4a.movnt.") || // Added in 3.9 329 Name.startswith("avx.movnt.") || // Added in 3.2 330 Name.startswith("avx512.storent.") || // Added in 3.9 331 Name == "sse41.movntdqa" || // Added in 5.0 332 Name == "avx2.movntdqa" || // Added in 5.0 333 Name == "avx512.movntdqa" || // Added in 5.0 334 Name == "sse2.storel.dq" || // Added in 3.9 335 Name.startswith("sse.storeu.") || // Added in 3.9 336 Name.startswith("sse2.storeu.") || // Added in 3.9 337 Name.startswith("avx.storeu.") || // Added in 3.9 338 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 339 Name.startswith("avx512.mask.store.p") || // Added in 3.9 340 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 341 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 342 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 343 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 344 Name == "avx512.mask.store.ss" || // Added in 7.0 345 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 346 Name.startswith("avx512.mask.load.") || // Added in 3.9 347 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 348 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 349 Name.startswith("avx512.mask.expand.b") || // Added in 9.0 350 Name.startswith("avx512.mask.expand.w") || // Added in 9.0 351 Name.startswith("avx512.mask.expand.d") || // Added in 9.0 352 Name.startswith("avx512.mask.expand.q") || // Added in 9.0 353 Name.startswith("avx512.mask.expand.p") || // Added in 9.0 354 Name.startswith("avx512.mask.compress.b") || // Added in 9.0 355 Name.startswith("avx512.mask.compress.w") || // Added in 9.0 356 Name.startswith("avx512.mask.compress.d") || // Added in 9.0 357 Name.startswith("avx512.mask.compress.q") || // Added in 9.0 358 Name.startswith("avx512.mask.compress.p") || // Added in 9.0 359 Name == "sse42.crc32.64.8" || // Added in 3.4 360 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 361 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 362 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 363 Name.startswith("avx512.mask.valign.") || // Added in 4.0 364 Name.startswith("sse2.psll.dq") || // Added in 3.7 365 Name.startswith("sse2.psrl.dq") || // Added in 3.7 366 Name.startswith("avx2.psll.dq") || // Added in 3.7 367 Name.startswith("avx2.psrl.dq") || // Added in 3.7 368 Name.startswith("avx512.psll.dq") || // Added in 3.9 369 Name.startswith("avx512.psrl.dq") || // Added in 3.9 370 Name == "sse41.pblendw" || // Added in 3.7 371 Name.startswith("sse41.blendp") || // Added in 3.7 372 Name.startswith("avx.blend.p") || // Added in 3.7 373 Name == "avx2.pblendw" || // Added in 3.7 374 Name.startswith("avx2.pblendd.") || // Added in 3.7 375 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 376 Name == "avx2.vbroadcasti128" || // Added in 3.7 377 Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0 378 Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0 379 Name.startswith("avx512.mask.broadcastf32x8.") || // Added in 6.0 380 Name.startswith("avx512.mask.broadcastf64x4.") || // Added in 6.0 381 Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0 382 Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0 383 Name.startswith("avx512.mask.broadcasti32x8.") || // Added in 6.0 384 Name.startswith("avx512.mask.broadcasti64x4.") || // Added in 6.0 385 Name == "xop.vpcmov" || // Added in 3.8 386 Name == "xop.vpcmov.256" || // Added in 5.0 387 Name.startswith("avx512.mask.move.s") || // Added in 4.0 388 Name.startswith("avx512.cvtmask2") || // Added in 5.0 389 Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0 390 Name.startswith("xop.vprot") || // Added in 8.0 391 Name.startswith("avx512.prol") || // Added in 8.0 392 Name.startswith("avx512.pror") || // Added in 8.0 393 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 394 Name.startswith("avx512.mask.pror.") || // Added in 8.0 395 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 396 Name.startswith("avx512.mask.prol.") || // Added in 8.0 397 Name.startswith("avx512.ptestm") || //Added in 6.0 398 Name.startswith("avx512.ptestnm") || //Added in 6.0 399 Name.startswith("avx512.mask.pavg")) // Added in 6.0 400 return true; 401 402 return false; 403 } 404 405 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 406 Function *&NewFn) { 407 // Only handle intrinsics that start with "x86.". 408 if (!Name.startswith("x86.")) 409 return false; 410 // Remove "x86." prefix. 411 Name = Name.substr(4); 412 413 if (ShouldUpgradeX86Intrinsic(F, Name)) { 414 NewFn = nullptr; 415 return true; 416 } 417 418 if (Name == "rdtscp") { // Added in 8.0 419 // If this intrinsic has 0 operands, it's the new version. 420 if (F->getFunctionType()->getNumParams() == 0) 421 return false; 422 423 rename(F); 424 NewFn = Intrinsic::getDeclaration(F->getParent(), 425 Intrinsic::x86_rdtscp); 426 return true; 427 } 428 429 // SSE4.1 ptest functions may have an old signature. 430 if (Name.startswith("sse41.ptest")) { // Added in 3.2 431 if (Name.substr(11) == "c") 432 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 433 if (Name.substr(11) == "z") 434 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 435 if (Name.substr(11) == "nzc") 436 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 437 } 438 // Several blend and other instructions with masks used the wrong number of 439 // bits. 440 if (Name == "sse41.insertps") // Added in 3.6 441 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 442 NewFn); 443 if (Name == "sse41.dppd") // Added in 3.6 444 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 445 NewFn); 446 if (Name == "sse41.dpps") // Added in 3.6 447 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 448 NewFn); 449 if (Name == "sse41.mpsadbw") // Added in 3.6 450 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 451 NewFn); 452 if (Name == "avx.dp.ps.256") // Added in 3.6 453 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 454 NewFn); 455 if (Name == "avx2.mpsadbw") // Added in 3.6 456 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 457 NewFn); 458 459 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 460 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 461 rename(F); 462 NewFn = Intrinsic::getDeclaration(F->getParent(), 463 Intrinsic::x86_xop_vfrcz_ss); 464 return true; 465 } 466 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 467 rename(F); 468 NewFn = Intrinsic::getDeclaration(F->getParent(), 469 Intrinsic::x86_xop_vfrcz_sd); 470 return true; 471 } 472 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 473 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 474 auto Idx = F->getFunctionType()->getParamType(2); 475 if (Idx->isFPOrFPVectorTy()) { 476 rename(F); 477 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 478 unsigned EltSize = Idx->getScalarSizeInBits(); 479 Intrinsic::ID Permil2ID; 480 if (EltSize == 64 && IdxSize == 128) 481 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 482 else if (EltSize == 32 && IdxSize == 128) 483 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 484 else if (EltSize == 64 && IdxSize == 256) 485 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 486 else 487 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 488 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 489 return true; 490 } 491 } 492 493 if (Name == "seh.recoverfp") { 494 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp); 495 return true; 496 } 497 498 return false; 499 } 500 501 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 502 assert(F && "Illegal to upgrade a non-existent Function."); 503 504 // Quickly eliminate it, if it's not a candidate. 505 StringRef Name = F->getName(); 506 if (Name.size() <= 8 || !Name.startswith("llvm.")) 507 return false; 508 Name = Name.substr(5); // Strip off "llvm." 509 510 switch (Name[0]) { 511 default: break; 512 case 'a': { 513 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 514 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 515 F->arg_begin()->getType()); 516 return true; 517 } 518 if (Name.startswith("arm.neon.vclz")) { 519 Type* args[2] = { 520 F->arg_begin()->getType(), 521 Type::getInt1Ty(F->getContext()) 522 }; 523 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 524 // the end of the name. Change name from llvm.arm.neon.vclz.* to 525 // llvm.ctlz.* 526 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 527 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 528 "llvm.ctlz." + Name.substr(14), F->getParent()); 529 return true; 530 } 531 if (Name.startswith("arm.neon.vcnt")) { 532 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 533 F->arg_begin()->getType()); 534 return true; 535 } 536 static const Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 537 if (vldRegex.match(Name)) { 538 auto fArgs = F->getFunctionType()->params(); 539 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 540 // Can't use Intrinsic::getDeclaration here as the return types might 541 // then only be structurally equal. 542 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 543 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 544 "llvm." + Name + ".p0i8", F->getParent()); 545 return true; 546 } 547 static const Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 548 if (vstRegex.match(Name)) { 549 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 550 Intrinsic::arm_neon_vst2, 551 Intrinsic::arm_neon_vst3, 552 Intrinsic::arm_neon_vst4}; 553 554 static const Intrinsic::ID StoreLaneInts[] = { 555 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 556 Intrinsic::arm_neon_vst4lane 557 }; 558 559 auto fArgs = F->getFunctionType()->params(); 560 Type *Tys[] = {fArgs[0], fArgs[1]}; 561 if (Name.find("lane") == StringRef::npos) 562 NewFn = Intrinsic::getDeclaration(F->getParent(), 563 StoreInts[fArgs.size() - 3], Tys); 564 else 565 NewFn = Intrinsic::getDeclaration(F->getParent(), 566 StoreLaneInts[fArgs.size() - 5], Tys); 567 return true; 568 } 569 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 570 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 571 return true; 572 } 573 if (Name.startswith("arm.neon.vqadds.")) { 574 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sadd_sat, 575 F->arg_begin()->getType()); 576 return true; 577 } 578 if (Name.startswith("arm.neon.vqaddu.")) { 579 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::uadd_sat, 580 F->arg_begin()->getType()); 581 return true; 582 } 583 if (Name.startswith("arm.neon.vqsubs.")) { 584 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ssub_sat, 585 F->arg_begin()->getType()); 586 return true; 587 } 588 if (Name.startswith("arm.neon.vqsubu.")) { 589 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::usub_sat, 590 F->arg_begin()->getType()); 591 return true; 592 } 593 if (Name.startswith("aarch64.neon.addp")) { 594 if (F->arg_size() != 2) 595 break; // Invalid IR. 596 VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); 597 if (Ty && Ty->getElementType()->isFloatingPointTy()) { 598 NewFn = Intrinsic::getDeclaration(F->getParent(), 599 Intrinsic::aarch64_neon_faddp, Ty); 600 return true; 601 } 602 } 603 break; 604 } 605 606 case 'c': { 607 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 608 rename(F); 609 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 610 F->arg_begin()->getType()); 611 return true; 612 } 613 if (Name.startswith("cttz.") && F->arg_size() == 1) { 614 rename(F); 615 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 616 F->arg_begin()->getType()); 617 return true; 618 } 619 break; 620 } 621 case 'd': { 622 if (Name == "dbg.value" && F->arg_size() == 4) { 623 rename(F); 624 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 625 return true; 626 } 627 break; 628 } 629 case 'e': { 630 SmallVector<StringRef, 2> Groups; 631 static const Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+"); 632 if (R.match(Name, &Groups)) { 633 Intrinsic::ID ID = Intrinsic::not_intrinsic; 634 if (Groups[1] == "fadd") 635 ID = Intrinsic::experimental_vector_reduce_v2_fadd; 636 if (Groups[1] == "fmul") 637 ID = Intrinsic::experimental_vector_reduce_v2_fmul; 638 639 if (ID != Intrinsic::not_intrinsic) { 640 rename(F); 641 auto Args = F->getFunctionType()->params(); 642 Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]}; 643 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys); 644 return true; 645 } 646 } 647 break; 648 } 649 case 'i': 650 case 'l': { 651 bool IsLifetimeStart = Name.startswith("lifetime.start"); 652 if (IsLifetimeStart || Name.startswith("invariant.start")) { 653 Intrinsic::ID ID = IsLifetimeStart ? 654 Intrinsic::lifetime_start : Intrinsic::invariant_start; 655 auto Args = F->getFunctionType()->params(); 656 Type* ObjectPtr[1] = {Args[1]}; 657 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 658 rename(F); 659 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 660 return true; 661 } 662 } 663 664 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 665 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 666 Intrinsic::ID ID = IsLifetimeEnd ? 667 Intrinsic::lifetime_end : Intrinsic::invariant_end; 668 669 auto Args = F->getFunctionType()->params(); 670 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 671 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 672 rename(F); 673 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 674 return true; 675 } 676 } 677 if (Name.startswith("invariant.group.barrier")) { 678 // Rename invariant.group.barrier to launder.invariant.group 679 auto Args = F->getFunctionType()->params(); 680 Type* ObjectPtr[1] = {Args[0]}; 681 rename(F); 682 NewFn = Intrinsic::getDeclaration(F->getParent(), 683 Intrinsic::launder_invariant_group, ObjectPtr); 684 return true; 685 686 } 687 688 break; 689 } 690 case 'm': { 691 if (Name.startswith("masked.load.")) { 692 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 693 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 694 rename(F); 695 NewFn = Intrinsic::getDeclaration(F->getParent(), 696 Intrinsic::masked_load, 697 Tys); 698 return true; 699 } 700 } 701 if (Name.startswith("masked.store.")) { 702 auto Args = F->getFunctionType()->params(); 703 Type *Tys[] = { Args[0], Args[1] }; 704 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 705 rename(F); 706 NewFn = Intrinsic::getDeclaration(F->getParent(), 707 Intrinsic::masked_store, 708 Tys); 709 return true; 710 } 711 } 712 // Renaming gather/scatter intrinsics with no address space overloading 713 // to the new overload which includes an address space 714 if (Name.startswith("masked.gather.")) { 715 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 716 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 717 rename(F); 718 NewFn = Intrinsic::getDeclaration(F->getParent(), 719 Intrinsic::masked_gather, Tys); 720 return true; 721 } 722 } 723 if (Name.startswith("masked.scatter.")) { 724 auto Args = F->getFunctionType()->params(); 725 Type *Tys[] = {Args[0], Args[1]}; 726 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 727 rename(F); 728 NewFn = Intrinsic::getDeclaration(F->getParent(), 729 Intrinsic::masked_scatter, Tys); 730 return true; 731 } 732 } 733 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 734 // alignment parameter to embedding the alignment as an attribute of 735 // the pointer args. 736 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 737 rename(F); 738 // Get the types of dest, src, and len 739 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 740 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 741 ParamTypes); 742 return true; 743 } 744 if (Name.startswith("memmove.") && F->arg_size() == 5) { 745 rename(F); 746 // Get the types of dest, src, and len 747 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 748 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 749 ParamTypes); 750 return true; 751 } 752 if (Name.startswith("memset.") && F->arg_size() == 5) { 753 rename(F); 754 // Get the types of dest, and len 755 const auto *FT = F->getFunctionType(); 756 Type *ParamTypes[2] = { 757 FT->getParamType(0), // Dest 758 FT->getParamType(2) // len 759 }; 760 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 761 ParamTypes); 762 return true; 763 } 764 break; 765 } 766 case 'n': { 767 if (Name.startswith("nvvm.")) { 768 Name = Name.substr(5); 769 770 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 771 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 772 .Cases("brev32", "brev64", Intrinsic::bitreverse) 773 .Case("clz.i", Intrinsic::ctlz) 774 .Case("popc.i", Intrinsic::ctpop) 775 .Default(Intrinsic::not_intrinsic); 776 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 777 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 778 {F->getReturnType()}); 779 return true; 780 } 781 782 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 783 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 784 // 785 // TODO: We could add lohi.i2d. 786 bool Expand = StringSwitch<bool>(Name) 787 .Cases("abs.i", "abs.ll", true) 788 .Cases("clz.ll", "popc.ll", "h2f", true) 789 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 790 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 791 .StartsWith("atomic.load.add.f32.p", true) 792 .StartsWith("atomic.load.add.f64.p", true) 793 .Default(false); 794 if (Expand) { 795 NewFn = nullptr; 796 return true; 797 } 798 } 799 break; 800 } 801 case 'o': 802 // We only need to change the name to match the mangling including the 803 // address space. 804 if (Name.startswith("objectsize.")) { 805 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 806 if (F->arg_size() == 2 || F->arg_size() == 3 || 807 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 808 rename(F); 809 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 810 Tys); 811 return true; 812 } 813 } 814 break; 815 816 case 'p': 817 if (Name == "prefetch") { 818 // Handle address space overloading. 819 Type *Tys[] = {F->arg_begin()->getType()}; 820 if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { 821 rename(F); 822 NewFn = 823 Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); 824 return true; 825 } 826 } 827 break; 828 829 case 's': 830 if (Name == "stackprotectorcheck") { 831 NewFn = nullptr; 832 return true; 833 } 834 break; 835 836 case 'x': 837 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 838 return true; 839 } 840 // Remangle our intrinsic since we upgrade the mangling 841 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 842 if (Result != None) { 843 NewFn = Result.getValue(); 844 return true; 845 } 846 847 // This may not belong here. This function is effectively being overloaded 848 // to both detect an intrinsic which needs upgrading, and to provide the 849 // upgraded form of the intrinsic. We should perhaps have two separate 850 // functions for this. 851 return false; 852 } 853 854 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 855 NewFn = nullptr; 856 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 857 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 858 859 // Upgrade intrinsic attributes. This does not change the function. 860 if (NewFn) 861 F = NewFn; 862 if (Intrinsic::ID id = F->getIntrinsicID()) 863 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 864 return Upgraded; 865 } 866 867 GlobalVariable *llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 868 if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" || 869 GV->getName() == "llvm.global_dtors")) || 870 !GV->hasInitializer()) 871 return nullptr; 872 ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType()); 873 if (!ATy) 874 return nullptr; 875 StructType *STy = dyn_cast<StructType>(ATy->getElementType()); 876 if (!STy || STy->getNumElements() != 2) 877 return nullptr; 878 879 LLVMContext &C = GV->getContext(); 880 IRBuilder<> IRB(C); 881 auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1), 882 IRB.getInt8PtrTy()); 883 Constant *Init = GV->getInitializer(); 884 unsigned N = Init->getNumOperands(); 885 std::vector<Constant *> NewCtors(N); 886 for (unsigned i = 0; i != N; ++i) { 887 auto Ctor = cast<Constant>(Init->getOperand(i)); 888 NewCtors[i] = ConstantStruct::get( 889 EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1), 890 Constant::getNullValue(IRB.getInt8PtrTy())); 891 } 892 Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors); 893 894 return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(), 895 NewInit, GV->getName()); 896 } 897 898 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 899 // to byte shuffles. 900 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 901 Value *Op, unsigned Shift) { 902 Type *ResultTy = Op->getType(); 903 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 904 905 // Bitcast from a 64-bit element type to a byte element type. 906 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 907 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 908 909 // We'll be shuffling in zeroes. 910 Value *Res = Constant::getNullValue(VecTy); 911 912 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 913 // we'll just return the zero vector. 914 if (Shift < 16) { 915 uint32_t Idxs[64]; 916 // 256/512-bit version is split into 2/4 16-byte lanes. 917 for (unsigned l = 0; l != NumElts; l += 16) 918 for (unsigned i = 0; i != 16; ++i) { 919 unsigned Idx = NumElts + i - Shift; 920 if (Idx < NumElts) 921 Idx -= NumElts - 16; // end of lane, switch operand. 922 Idxs[l + i] = Idx + l; 923 } 924 925 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 926 } 927 928 // Bitcast back to a 64-bit element type. 929 return Builder.CreateBitCast(Res, ResultTy, "cast"); 930 } 931 932 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 933 // to byte shuffles. 934 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 935 unsigned Shift) { 936 Type *ResultTy = Op->getType(); 937 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 938 939 // Bitcast from a 64-bit element type to a byte element type. 940 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 941 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 942 943 // We'll be shuffling in zeroes. 944 Value *Res = Constant::getNullValue(VecTy); 945 946 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 947 // we'll just return the zero vector. 948 if (Shift < 16) { 949 uint32_t Idxs[64]; 950 // 256/512-bit version is split into 2/4 16-byte lanes. 951 for (unsigned l = 0; l != NumElts; l += 16) 952 for (unsigned i = 0; i != 16; ++i) { 953 unsigned Idx = i + Shift; 954 if (Idx >= 16) 955 Idx += NumElts - 16; // end of lane, switch operand. 956 Idxs[l + i] = Idx + l; 957 } 958 959 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 960 } 961 962 // Bitcast back to a 64-bit element type. 963 return Builder.CreateBitCast(Res, ResultTy, "cast"); 964 } 965 966 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 967 unsigned NumElts) { 968 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 969 cast<IntegerType>(Mask->getType())->getBitWidth()); 970 Mask = Builder.CreateBitCast(Mask, MaskTy); 971 972 // If we have less than 8 elements, then the starting mask was an i8 and 973 // we need to extract down to the right number of elements. 974 if (NumElts < 8) { 975 uint32_t Indices[4]; 976 for (unsigned i = 0; i != NumElts; ++i) 977 Indices[i] = i; 978 Mask = Builder.CreateShuffleVector(Mask, Mask, 979 makeArrayRef(Indices, NumElts), 980 "extract"); 981 } 982 983 return Mask; 984 } 985 986 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 987 Value *Op0, Value *Op1) { 988 // If the mask is all ones just emit the first operation. 989 if (const auto *C = dyn_cast<Constant>(Mask)) 990 if (C->isAllOnesValue()) 991 return Op0; 992 993 Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements()); 994 return Builder.CreateSelect(Mask, Op0, Op1); 995 } 996 997 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 998 Value *Op0, Value *Op1) { 999 // If the mask is all ones just emit the first operation. 1000 if (const auto *C = dyn_cast<Constant>(Mask)) 1001 if (C->isAllOnesValue()) 1002 return Op0; 1003 1004 llvm::VectorType *MaskTy = 1005 llvm::VectorType::get(Builder.getInt1Ty(), 1006 Mask->getType()->getIntegerBitWidth()); 1007 Mask = Builder.CreateBitCast(Mask, MaskTy); 1008 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 1009 return Builder.CreateSelect(Mask, Op0, Op1); 1010 } 1011 1012 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 1013 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 1014 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 1015 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 1016 Value *Op1, Value *Shift, 1017 Value *Passthru, Value *Mask, 1018 bool IsVALIGN) { 1019 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 1020 1021 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1022 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 1023 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 1024 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 1025 1026 // Mask the immediate for VALIGN. 1027 if (IsVALIGN) 1028 ShiftVal &= (NumElts - 1); 1029 1030 // If palignr is shifting the pair of vectors more than the size of two 1031 // lanes, emit zero. 1032 if (ShiftVal >= 32) 1033 return llvm::Constant::getNullValue(Op0->getType()); 1034 1035 // If palignr is shifting the pair of input vectors more than one lane, 1036 // but less than two lanes, convert to shifting in zeroes. 1037 if (ShiftVal > 16) { 1038 ShiftVal -= 16; 1039 Op1 = Op0; 1040 Op0 = llvm::Constant::getNullValue(Op0->getType()); 1041 } 1042 1043 uint32_t Indices[64]; 1044 // 256-bit palignr operates on 128-bit lanes so we need to handle that 1045 for (unsigned l = 0; l < NumElts; l += 16) { 1046 for (unsigned i = 0; i != 16; ++i) { 1047 unsigned Idx = ShiftVal + i; 1048 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 1049 Idx += NumElts - 16; // End of lane, switch operand. 1050 Indices[l + i] = Idx + l; 1051 } 1052 } 1053 1054 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 1055 makeArrayRef(Indices, NumElts), 1056 "palignr"); 1057 1058 return EmitX86Select(Builder, Mask, Align, Passthru); 1059 } 1060 1061 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 1062 bool ZeroMask, bool IndexForm) { 1063 Type *Ty = CI.getType(); 1064 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 1065 unsigned EltWidth = Ty->getScalarSizeInBits(); 1066 bool IsFloat = Ty->isFPOrFPVectorTy(); 1067 Intrinsic::ID IID; 1068 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 1069 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 1070 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 1071 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 1072 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 1073 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 1074 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 1075 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 1076 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1077 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 1078 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1079 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 1080 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1081 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 1082 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1083 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 1084 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1085 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 1086 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1087 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 1088 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1089 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 1090 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1091 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 1092 else if (VecWidth == 128 && EltWidth == 16) 1093 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 1094 else if (VecWidth == 256 && EltWidth == 16) 1095 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 1096 else if (VecWidth == 512 && EltWidth == 16) 1097 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 1098 else if (VecWidth == 128 && EltWidth == 8) 1099 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 1100 else if (VecWidth == 256 && EltWidth == 8) 1101 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 1102 else if (VecWidth == 512 && EltWidth == 8) 1103 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 1104 else 1105 llvm_unreachable("Unexpected intrinsic"); 1106 1107 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 1108 CI.getArgOperand(2) }; 1109 1110 // If this isn't index form we need to swap operand 0 and 1. 1111 if (!IndexForm) 1112 std::swap(Args[0], Args[1]); 1113 1114 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1115 Args); 1116 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 1117 : Builder.CreateBitCast(CI.getArgOperand(1), 1118 Ty); 1119 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1120 } 1121 1122 static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1123 bool IsSigned, bool IsAddition) { 1124 Type *Ty = CI.getType(); 1125 Value *Op0 = CI.getOperand(0); 1126 Value *Op1 = CI.getOperand(1); 1127 1128 Intrinsic::ID IID = 1129 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 1130 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 1131 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1132 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1133 1134 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1135 Value *VecSrc = CI.getOperand(2); 1136 Value *Mask = CI.getOperand(3); 1137 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1138 } 1139 return Res; 1140 } 1141 1142 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1143 bool IsRotateRight) { 1144 Type *Ty = CI.getType(); 1145 Value *Src = CI.getArgOperand(0); 1146 Value *Amt = CI.getArgOperand(1); 1147 1148 // Amount may be scalar immediate, in which case create a splat vector. 1149 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1150 // we only care about the lowest log2 bits anyway. 1151 if (Amt->getType() != Ty) { 1152 unsigned NumElts = Ty->getVectorNumElements(); 1153 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1154 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1155 } 1156 1157 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1158 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1159 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1160 1161 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1162 Value *VecSrc = CI.getOperand(2); 1163 Value *Mask = CI.getOperand(3); 1164 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1165 } 1166 return Res; 1167 } 1168 1169 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, 1170 bool IsSigned) { 1171 Type *Ty = CI.getType(); 1172 Value *LHS = CI.getArgOperand(0); 1173 Value *RHS = CI.getArgOperand(1); 1174 1175 CmpInst::Predicate Pred; 1176 switch (Imm) { 1177 case 0x0: 1178 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 1179 break; 1180 case 0x1: 1181 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 1182 break; 1183 case 0x2: 1184 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 1185 break; 1186 case 0x3: 1187 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 1188 break; 1189 case 0x4: 1190 Pred = ICmpInst::ICMP_EQ; 1191 break; 1192 case 0x5: 1193 Pred = ICmpInst::ICMP_NE; 1194 break; 1195 case 0x6: 1196 return Constant::getNullValue(Ty); // FALSE 1197 case 0x7: 1198 return Constant::getAllOnesValue(Ty); // TRUE 1199 default: 1200 llvm_unreachable("Unknown XOP vpcom/vpcomu predicate"); 1201 } 1202 1203 Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS); 1204 Value *Ext = Builder.CreateSExt(Cmp, Ty); 1205 return Ext; 1206 } 1207 1208 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1209 bool IsShiftRight, bool ZeroMask) { 1210 Type *Ty = CI.getType(); 1211 Value *Op0 = CI.getArgOperand(0); 1212 Value *Op1 = CI.getArgOperand(1); 1213 Value *Amt = CI.getArgOperand(2); 1214 1215 if (IsShiftRight) 1216 std::swap(Op0, Op1); 1217 1218 // Amount may be scalar immediate, in which case create a splat vector. 1219 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1220 // we only care about the lowest log2 bits anyway. 1221 if (Amt->getType() != Ty) { 1222 unsigned NumElts = Ty->getVectorNumElements(); 1223 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1224 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1225 } 1226 1227 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1228 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1229 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1230 1231 unsigned NumArgs = CI.getNumArgOperands(); 1232 if (NumArgs >= 4) { // For masked intrinsics. 1233 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1234 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1235 CI.getArgOperand(0); 1236 Value *Mask = CI.getOperand(NumArgs - 1); 1237 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1238 } 1239 return Res; 1240 } 1241 1242 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1243 Value *Ptr, Value *Data, Value *Mask, 1244 bool Aligned) { 1245 // Cast the pointer to the right type. 1246 Ptr = Builder.CreateBitCast(Ptr, 1247 llvm::PointerType::getUnqual(Data->getType())); 1248 const Align Alignment = 1249 Aligned ? Align(cast<VectorType>(Data->getType())->getBitWidth() / 8) 1250 : Align(1); 1251 1252 // If the mask is all ones just emit a regular store. 1253 if (const auto *C = dyn_cast<Constant>(Mask)) 1254 if (C->isAllOnesValue()) 1255 return Builder.CreateAlignedStore(Data, Ptr, Alignment); 1256 1257 // Convert the mask from an integer type to a vector of i1. 1258 unsigned NumElts = Data->getType()->getVectorNumElements(); 1259 Mask = getX86MaskVec(Builder, Mask, NumElts); 1260 return Builder.CreateMaskedStore(Data, Ptr, Alignment, Mask); 1261 } 1262 1263 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1264 Value *Ptr, Value *Passthru, Value *Mask, 1265 bool Aligned) { 1266 Type *ValTy = Passthru->getType(); 1267 // Cast the pointer to the right type. 1268 Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); 1269 const Align Alignment = 1270 Aligned ? Align(cast<VectorType>(Passthru->getType())->getBitWidth() / 8) 1271 : Align(1); 1272 1273 // If the mask is all ones just emit a regular store. 1274 if (const auto *C = dyn_cast<Constant>(Mask)) 1275 if (C->isAllOnesValue()) 1276 return Builder.CreateAlignedLoad(ValTy, Ptr, Alignment); 1277 1278 // Convert the mask from an integer type to a vector of i1. 1279 unsigned NumElts = Passthru->getType()->getVectorNumElements(); 1280 Mask = getX86MaskVec(Builder, Mask, NumElts); 1281 return Builder.CreateMaskedLoad(Ptr, Alignment, Mask, Passthru); 1282 } 1283 1284 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1285 Value *Op0 = CI.getArgOperand(0); 1286 llvm::Type *Ty = Op0->getType(); 1287 Value *Zero = llvm::Constant::getNullValue(Ty); 1288 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 1289 Value *Neg = Builder.CreateNeg(Op0); 1290 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 1291 1292 if (CI.getNumArgOperands() == 3) 1293 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1294 1295 return Res; 1296 } 1297 1298 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1299 ICmpInst::Predicate Pred) { 1300 Value *Op0 = CI.getArgOperand(0); 1301 Value *Op1 = CI.getArgOperand(1); 1302 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1303 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1304 1305 if (CI.getNumArgOperands() == 4) 1306 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1307 1308 return Res; 1309 } 1310 1311 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1312 Type *Ty = CI.getType(); 1313 1314 // Arguments have a vXi32 type so cast to vXi64. 1315 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1316 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1317 1318 if (IsSigned) { 1319 // Shift left then arithmetic shift right. 1320 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1321 LHS = Builder.CreateShl(LHS, ShiftAmt); 1322 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1323 RHS = Builder.CreateShl(RHS, ShiftAmt); 1324 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1325 } else { 1326 // Clear the upper bits. 1327 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1328 LHS = Builder.CreateAnd(LHS, Mask); 1329 RHS = Builder.CreateAnd(RHS, Mask); 1330 } 1331 1332 Value *Res = Builder.CreateMul(LHS, RHS); 1333 1334 if (CI.getNumArgOperands() == 4) 1335 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1336 1337 return Res; 1338 } 1339 1340 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1341 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1342 Value *Mask) { 1343 unsigned NumElts = Vec->getType()->getVectorNumElements(); 1344 if (Mask) { 1345 const auto *C = dyn_cast<Constant>(Mask); 1346 if (!C || !C->isAllOnesValue()) 1347 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1348 } 1349 1350 if (NumElts < 8) { 1351 uint32_t Indices[8]; 1352 for (unsigned i = 0; i != NumElts; ++i) 1353 Indices[i] = i; 1354 for (unsigned i = NumElts; i != 8; ++i) 1355 Indices[i] = NumElts + i % NumElts; 1356 Vec = Builder.CreateShuffleVector(Vec, 1357 Constant::getNullValue(Vec->getType()), 1358 Indices); 1359 } 1360 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1361 } 1362 1363 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1364 unsigned CC, bool Signed) { 1365 Value *Op0 = CI.getArgOperand(0); 1366 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1367 1368 Value *Cmp; 1369 if (CC == 3) { 1370 Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1371 } else if (CC == 7) { 1372 Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1373 } else { 1374 ICmpInst::Predicate Pred; 1375 switch (CC) { 1376 default: llvm_unreachable("Unknown condition code"); 1377 case 0: Pred = ICmpInst::ICMP_EQ; break; 1378 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1379 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1380 case 4: Pred = ICmpInst::ICMP_NE; break; 1381 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1382 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1383 } 1384 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1385 } 1386 1387 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1388 1389 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1390 } 1391 1392 // Replace a masked intrinsic with an older unmasked intrinsic. 1393 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1394 Intrinsic::ID IID) { 1395 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1396 Value *Rep = Builder.CreateCall(Intrin, 1397 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1398 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1399 } 1400 1401 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1402 Value* A = CI.getArgOperand(0); 1403 Value* B = CI.getArgOperand(1); 1404 Value* Src = CI.getArgOperand(2); 1405 Value* Mask = CI.getArgOperand(3); 1406 1407 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1408 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1409 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1410 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1411 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1412 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1413 } 1414 1415 1416 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1417 Value* Op = CI.getArgOperand(0); 1418 Type* ReturnOp = CI.getType(); 1419 unsigned NumElts = CI.getType()->getVectorNumElements(); 1420 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1421 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1422 } 1423 1424 // Replace intrinsic with unmasked version and a select. 1425 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1426 CallInst &CI, Value *&Rep) { 1427 Name = Name.substr(12); // Remove avx512.mask. 1428 1429 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1430 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1431 Intrinsic::ID IID; 1432 if (Name.startswith("max.p")) { 1433 if (VecWidth == 128 && EltWidth == 32) 1434 IID = Intrinsic::x86_sse_max_ps; 1435 else if (VecWidth == 128 && EltWidth == 64) 1436 IID = Intrinsic::x86_sse2_max_pd; 1437 else if (VecWidth == 256 && EltWidth == 32) 1438 IID = Intrinsic::x86_avx_max_ps_256; 1439 else if (VecWidth == 256 && EltWidth == 64) 1440 IID = Intrinsic::x86_avx_max_pd_256; 1441 else 1442 llvm_unreachable("Unexpected intrinsic"); 1443 } else if (Name.startswith("min.p")) { 1444 if (VecWidth == 128 && EltWidth == 32) 1445 IID = Intrinsic::x86_sse_min_ps; 1446 else if (VecWidth == 128 && EltWidth == 64) 1447 IID = Intrinsic::x86_sse2_min_pd; 1448 else if (VecWidth == 256 && EltWidth == 32) 1449 IID = Intrinsic::x86_avx_min_ps_256; 1450 else if (VecWidth == 256 && EltWidth == 64) 1451 IID = Intrinsic::x86_avx_min_pd_256; 1452 else 1453 llvm_unreachable("Unexpected intrinsic"); 1454 } else if (Name.startswith("pshuf.b.")) { 1455 if (VecWidth == 128) 1456 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1457 else if (VecWidth == 256) 1458 IID = Intrinsic::x86_avx2_pshuf_b; 1459 else if (VecWidth == 512) 1460 IID = Intrinsic::x86_avx512_pshuf_b_512; 1461 else 1462 llvm_unreachable("Unexpected intrinsic"); 1463 } else if (Name.startswith("pmul.hr.sw.")) { 1464 if (VecWidth == 128) 1465 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1466 else if (VecWidth == 256) 1467 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1468 else if (VecWidth == 512) 1469 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1470 else 1471 llvm_unreachable("Unexpected intrinsic"); 1472 } else if (Name.startswith("pmulh.w.")) { 1473 if (VecWidth == 128) 1474 IID = Intrinsic::x86_sse2_pmulh_w; 1475 else if (VecWidth == 256) 1476 IID = Intrinsic::x86_avx2_pmulh_w; 1477 else if (VecWidth == 512) 1478 IID = Intrinsic::x86_avx512_pmulh_w_512; 1479 else 1480 llvm_unreachable("Unexpected intrinsic"); 1481 } else if (Name.startswith("pmulhu.w.")) { 1482 if (VecWidth == 128) 1483 IID = Intrinsic::x86_sse2_pmulhu_w; 1484 else if (VecWidth == 256) 1485 IID = Intrinsic::x86_avx2_pmulhu_w; 1486 else if (VecWidth == 512) 1487 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1488 else 1489 llvm_unreachable("Unexpected intrinsic"); 1490 } else if (Name.startswith("pmaddw.d.")) { 1491 if (VecWidth == 128) 1492 IID = Intrinsic::x86_sse2_pmadd_wd; 1493 else if (VecWidth == 256) 1494 IID = Intrinsic::x86_avx2_pmadd_wd; 1495 else if (VecWidth == 512) 1496 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1497 else 1498 llvm_unreachable("Unexpected intrinsic"); 1499 } else if (Name.startswith("pmaddubs.w.")) { 1500 if (VecWidth == 128) 1501 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1502 else if (VecWidth == 256) 1503 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1504 else if (VecWidth == 512) 1505 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1506 else 1507 llvm_unreachable("Unexpected intrinsic"); 1508 } else if (Name.startswith("packsswb.")) { 1509 if (VecWidth == 128) 1510 IID = Intrinsic::x86_sse2_packsswb_128; 1511 else if (VecWidth == 256) 1512 IID = Intrinsic::x86_avx2_packsswb; 1513 else if (VecWidth == 512) 1514 IID = Intrinsic::x86_avx512_packsswb_512; 1515 else 1516 llvm_unreachable("Unexpected intrinsic"); 1517 } else if (Name.startswith("packssdw.")) { 1518 if (VecWidth == 128) 1519 IID = Intrinsic::x86_sse2_packssdw_128; 1520 else if (VecWidth == 256) 1521 IID = Intrinsic::x86_avx2_packssdw; 1522 else if (VecWidth == 512) 1523 IID = Intrinsic::x86_avx512_packssdw_512; 1524 else 1525 llvm_unreachable("Unexpected intrinsic"); 1526 } else if (Name.startswith("packuswb.")) { 1527 if (VecWidth == 128) 1528 IID = Intrinsic::x86_sse2_packuswb_128; 1529 else if (VecWidth == 256) 1530 IID = Intrinsic::x86_avx2_packuswb; 1531 else if (VecWidth == 512) 1532 IID = Intrinsic::x86_avx512_packuswb_512; 1533 else 1534 llvm_unreachable("Unexpected intrinsic"); 1535 } else if (Name.startswith("packusdw.")) { 1536 if (VecWidth == 128) 1537 IID = Intrinsic::x86_sse41_packusdw; 1538 else if (VecWidth == 256) 1539 IID = Intrinsic::x86_avx2_packusdw; 1540 else if (VecWidth == 512) 1541 IID = Intrinsic::x86_avx512_packusdw_512; 1542 else 1543 llvm_unreachable("Unexpected intrinsic"); 1544 } else if (Name.startswith("vpermilvar.")) { 1545 if (VecWidth == 128 && EltWidth == 32) 1546 IID = Intrinsic::x86_avx_vpermilvar_ps; 1547 else if (VecWidth == 128 && EltWidth == 64) 1548 IID = Intrinsic::x86_avx_vpermilvar_pd; 1549 else if (VecWidth == 256 && EltWidth == 32) 1550 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1551 else if (VecWidth == 256 && EltWidth == 64) 1552 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1553 else if (VecWidth == 512 && EltWidth == 32) 1554 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1555 else if (VecWidth == 512 && EltWidth == 64) 1556 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1557 else 1558 llvm_unreachable("Unexpected intrinsic"); 1559 } else if (Name == "cvtpd2dq.256") { 1560 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1561 } else if (Name == "cvtpd2ps.256") { 1562 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1563 } else if (Name == "cvttpd2dq.256") { 1564 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1565 } else if (Name == "cvttps2dq.128") { 1566 IID = Intrinsic::x86_sse2_cvttps2dq; 1567 } else if (Name == "cvttps2dq.256") { 1568 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1569 } else if (Name.startswith("permvar.")) { 1570 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1571 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1572 IID = Intrinsic::x86_avx2_permps; 1573 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1574 IID = Intrinsic::x86_avx2_permd; 1575 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1576 IID = Intrinsic::x86_avx512_permvar_df_256; 1577 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1578 IID = Intrinsic::x86_avx512_permvar_di_256; 1579 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1580 IID = Intrinsic::x86_avx512_permvar_sf_512; 1581 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1582 IID = Intrinsic::x86_avx512_permvar_si_512; 1583 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1584 IID = Intrinsic::x86_avx512_permvar_df_512; 1585 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1586 IID = Intrinsic::x86_avx512_permvar_di_512; 1587 else if (VecWidth == 128 && EltWidth == 16) 1588 IID = Intrinsic::x86_avx512_permvar_hi_128; 1589 else if (VecWidth == 256 && EltWidth == 16) 1590 IID = Intrinsic::x86_avx512_permvar_hi_256; 1591 else if (VecWidth == 512 && EltWidth == 16) 1592 IID = Intrinsic::x86_avx512_permvar_hi_512; 1593 else if (VecWidth == 128 && EltWidth == 8) 1594 IID = Intrinsic::x86_avx512_permvar_qi_128; 1595 else if (VecWidth == 256 && EltWidth == 8) 1596 IID = Intrinsic::x86_avx512_permvar_qi_256; 1597 else if (VecWidth == 512 && EltWidth == 8) 1598 IID = Intrinsic::x86_avx512_permvar_qi_512; 1599 else 1600 llvm_unreachable("Unexpected intrinsic"); 1601 } else if (Name.startswith("dbpsadbw.")) { 1602 if (VecWidth == 128) 1603 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1604 else if (VecWidth == 256) 1605 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1606 else if (VecWidth == 512) 1607 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1608 else 1609 llvm_unreachable("Unexpected intrinsic"); 1610 } else if (Name.startswith("pmultishift.qb.")) { 1611 if (VecWidth == 128) 1612 IID = Intrinsic::x86_avx512_pmultishift_qb_128; 1613 else if (VecWidth == 256) 1614 IID = Intrinsic::x86_avx512_pmultishift_qb_256; 1615 else if (VecWidth == 512) 1616 IID = Intrinsic::x86_avx512_pmultishift_qb_512; 1617 else 1618 llvm_unreachable("Unexpected intrinsic"); 1619 } else if (Name.startswith("conflict.")) { 1620 if (Name[9] == 'd' && VecWidth == 128) 1621 IID = Intrinsic::x86_avx512_conflict_d_128; 1622 else if (Name[9] == 'd' && VecWidth == 256) 1623 IID = Intrinsic::x86_avx512_conflict_d_256; 1624 else if (Name[9] == 'd' && VecWidth == 512) 1625 IID = Intrinsic::x86_avx512_conflict_d_512; 1626 else if (Name[9] == 'q' && VecWidth == 128) 1627 IID = Intrinsic::x86_avx512_conflict_q_128; 1628 else if (Name[9] == 'q' && VecWidth == 256) 1629 IID = Intrinsic::x86_avx512_conflict_q_256; 1630 else if (Name[9] == 'q' && VecWidth == 512) 1631 IID = Intrinsic::x86_avx512_conflict_q_512; 1632 else 1633 llvm_unreachable("Unexpected intrinsic"); 1634 } else if (Name.startswith("pavg.")) { 1635 if (Name[5] == 'b' && VecWidth == 128) 1636 IID = Intrinsic::x86_sse2_pavg_b; 1637 else if (Name[5] == 'b' && VecWidth == 256) 1638 IID = Intrinsic::x86_avx2_pavg_b; 1639 else if (Name[5] == 'b' && VecWidth == 512) 1640 IID = Intrinsic::x86_avx512_pavg_b_512; 1641 else if (Name[5] == 'w' && VecWidth == 128) 1642 IID = Intrinsic::x86_sse2_pavg_w; 1643 else if (Name[5] == 'w' && VecWidth == 256) 1644 IID = Intrinsic::x86_avx2_pavg_w; 1645 else if (Name[5] == 'w' && VecWidth == 512) 1646 IID = Intrinsic::x86_avx512_pavg_w_512; 1647 else 1648 llvm_unreachable("Unexpected intrinsic"); 1649 } else 1650 return false; 1651 1652 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1653 CI.arg_operands().end()); 1654 Args.pop_back(); 1655 Args.pop_back(); 1656 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1657 Args); 1658 unsigned NumArgs = CI.getNumArgOperands(); 1659 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1660 CI.getArgOperand(NumArgs - 2)); 1661 return true; 1662 } 1663 1664 /// Upgrade comment in call to inline asm that represents an objc retain release 1665 /// marker. 1666 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1667 size_t Pos; 1668 if (AsmStr->find("mov\tfp") == 0 && 1669 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1670 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1671 AsmStr->replace(Pos, 1, ";"); 1672 } 1673 return; 1674 } 1675 1676 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1677 /// provided to seamlessly integrate with existing context. 1678 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1679 Function *F = CI->getCalledFunction(); 1680 LLVMContext &C = CI->getContext(); 1681 IRBuilder<> Builder(C); 1682 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1683 1684 assert(F && "Intrinsic call is not direct?"); 1685 1686 if (!NewFn) { 1687 // Get the Function's name. 1688 StringRef Name = F->getName(); 1689 1690 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1691 Name = Name.substr(5); 1692 1693 bool IsX86 = Name.startswith("x86."); 1694 if (IsX86) 1695 Name = Name.substr(4); 1696 bool IsNVVM = Name.startswith("nvvm."); 1697 if (IsNVVM) 1698 Name = Name.substr(5); 1699 1700 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1701 Module *M = F->getParent(); 1702 SmallVector<Metadata *, 1> Elts; 1703 Elts.push_back( 1704 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1705 MDNode *Node = MDNode::get(C, Elts); 1706 1707 Value *Arg0 = CI->getArgOperand(0); 1708 Value *Arg1 = CI->getArgOperand(1); 1709 1710 // Nontemporal (unaligned) store of the 0'th element of the float/double 1711 // vector. 1712 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1713 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1714 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1715 Value *Extract = 1716 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1717 1718 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, Align(1)); 1719 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1720 1721 // Remove intrinsic. 1722 CI->eraseFromParent(); 1723 return; 1724 } 1725 1726 if (IsX86 && (Name.startswith("avx.movnt.") || 1727 Name.startswith("avx512.storent."))) { 1728 Module *M = F->getParent(); 1729 SmallVector<Metadata *, 1> Elts; 1730 Elts.push_back( 1731 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1732 MDNode *Node = MDNode::get(C, Elts); 1733 1734 Value *Arg0 = CI->getArgOperand(0); 1735 Value *Arg1 = CI->getArgOperand(1); 1736 1737 // Convert the type of the pointer to a pointer to the stored type. 1738 Value *BC = Builder.CreateBitCast(Arg0, 1739 PointerType::getUnqual(Arg1->getType()), 1740 "cast"); 1741 VectorType *VTy = cast<VectorType>(Arg1->getType()); 1742 StoreInst *SI = 1743 Builder.CreateAlignedStore(Arg1, BC, Align(VTy->getBitWidth() / 8)); 1744 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1745 1746 // Remove intrinsic. 1747 CI->eraseFromParent(); 1748 return; 1749 } 1750 1751 if (IsX86 && Name == "sse2.storel.dq") { 1752 Value *Arg0 = CI->getArgOperand(0); 1753 Value *Arg1 = CI->getArgOperand(1); 1754 1755 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 1756 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1757 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1758 Value *BC = Builder.CreateBitCast(Arg0, 1759 PointerType::getUnqual(Elt->getType()), 1760 "cast"); 1761 Builder.CreateAlignedStore(Elt, BC, Align(1)); 1762 1763 // Remove intrinsic. 1764 CI->eraseFromParent(); 1765 return; 1766 } 1767 1768 if (IsX86 && (Name.startswith("sse.storeu.") || 1769 Name.startswith("sse2.storeu.") || 1770 Name.startswith("avx.storeu."))) { 1771 Value *Arg0 = CI->getArgOperand(0); 1772 Value *Arg1 = CI->getArgOperand(1); 1773 1774 Arg0 = Builder.CreateBitCast(Arg0, 1775 PointerType::getUnqual(Arg1->getType()), 1776 "cast"); 1777 Builder.CreateAlignedStore(Arg1, Arg0, Align(1)); 1778 1779 // Remove intrinsic. 1780 CI->eraseFromParent(); 1781 return; 1782 } 1783 1784 if (IsX86 && Name == "avx512.mask.store.ss") { 1785 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1786 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1787 Mask, false); 1788 1789 // Remove intrinsic. 1790 CI->eraseFromParent(); 1791 return; 1792 } 1793 1794 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1795 // "avx512.mask.storeu." or "avx512.mask.store." 1796 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1797 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1798 CI->getArgOperand(2), Aligned); 1799 1800 // Remove intrinsic. 1801 CI->eraseFromParent(); 1802 return; 1803 } 1804 1805 Value *Rep; 1806 // Upgrade packed integer vector compare intrinsics to compare instructions. 1807 if (IsX86 && (Name.startswith("sse2.pcmp") || 1808 Name.startswith("avx2.pcmp"))) { 1809 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1810 bool CmpEq = Name[9] == 'e'; 1811 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1812 CI->getArgOperand(0), CI->getArgOperand(1)); 1813 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1814 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1815 Type *ExtTy = Type::getInt32Ty(C); 1816 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1817 ExtTy = Type::getInt64Ty(C); 1818 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1819 ExtTy->getPrimitiveSizeInBits(); 1820 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1821 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1822 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1823 Name == "sse2.sqrt.sd")) { 1824 Value *Vec = CI->getArgOperand(0); 1825 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1826 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1827 Intrinsic::sqrt, Elt0->getType()); 1828 Elt0 = Builder.CreateCall(Intr, Elt0); 1829 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1830 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1831 Name.startswith("sse2.sqrt.p") || 1832 Name.startswith("sse.sqrt.p"))) { 1833 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1834 Intrinsic::sqrt, 1835 CI->getType()), 1836 {CI->getArgOperand(0)}); 1837 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1838 if (CI->getNumArgOperands() == 4 && 1839 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1840 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1841 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1842 : Intrinsic::x86_avx512_sqrt_pd_512; 1843 1844 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1845 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1846 IID), Args); 1847 } else { 1848 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1849 Intrinsic::sqrt, 1850 CI->getType()), 1851 {CI->getArgOperand(0)}); 1852 } 1853 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1854 CI->getArgOperand(1)); 1855 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1856 Name.startswith("avx512.ptestnm"))) { 1857 Value *Op0 = CI->getArgOperand(0); 1858 Value *Op1 = CI->getArgOperand(1); 1859 Value *Mask = CI->getArgOperand(2); 1860 Rep = Builder.CreateAnd(Op0, Op1); 1861 llvm::Type *Ty = Op0->getType(); 1862 Value *Zero = llvm::Constant::getNullValue(Ty); 1863 ICmpInst::Predicate Pred = 1864 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1865 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1866 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1867 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1868 unsigned NumElts = 1869 CI->getArgOperand(1)->getType()->getVectorNumElements(); 1870 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1871 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1872 CI->getArgOperand(1)); 1873 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1874 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1875 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1876 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1877 uint32_t Indices[64]; 1878 for (unsigned i = 0; i != NumElts; ++i) 1879 Indices[i] = i; 1880 1881 // First extract half of each vector. This gives better codegen than 1882 // doing it in a single shuffle. 1883 LHS = Builder.CreateShuffleVector(LHS, LHS, 1884 makeArrayRef(Indices, NumElts / 2)); 1885 RHS = Builder.CreateShuffleVector(RHS, RHS, 1886 makeArrayRef(Indices, NumElts / 2)); 1887 // Concat the vectors. 1888 // NOTE: Operands have to be swapped to match intrinsic definition. 1889 Rep = Builder.CreateShuffleVector(RHS, LHS, 1890 makeArrayRef(Indices, NumElts)); 1891 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1892 } else if (IsX86 && Name == "avx512.kand.w") { 1893 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1894 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1895 Rep = Builder.CreateAnd(LHS, RHS); 1896 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1897 } else if (IsX86 && Name == "avx512.kandn.w") { 1898 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1899 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1900 LHS = Builder.CreateNot(LHS); 1901 Rep = Builder.CreateAnd(LHS, RHS); 1902 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1903 } else if (IsX86 && Name == "avx512.kor.w") { 1904 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1905 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1906 Rep = Builder.CreateOr(LHS, RHS); 1907 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1908 } else if (IsX86 && Name == "avx512.kxor.w") { 1909 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1910 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1911 Rep = Builder.CreateXor(LHS, RHS); 1912 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1913 } else if (IsX86 && Name == "avx512.kxnor.w") { 1914 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1915 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1916 LHS = Builder.CreateNot(LHS); 1917 Rep = Builder.CreateXor(LHS, RHS); 1918 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1919 } else if (IsX86 && Name == "avx512.knot.w") { 1920 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1921 Rep = Builder.CreateNot(Rep); 1922 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1923 } else if (IsX86 && 1924 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1925 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1926 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1927 Rep = Builder.CreateOr(LHS, RHS); 1928 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1929 Value *C; 1930 if (Name[14] == 'c') 1931 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1932 else 1933 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1934 Rep = Builder.CreateICmpEQ(Rep, C); 1935 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1936 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 1937 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 1938 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 1939 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1940 Type *I32Ty = Type::getInt32Ty(C); 1941 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1942 ConstantInt::get(I32Ty, 0)); 1943 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1944 ConstantInt::get(I32Ty, 0)); 1945 Value *EltOp; 1946 if (Name.contains(".add.")) 1947 EltOp = Builder.CreateFAdd(Elt0, Elt1); 1948 else if (Name.contains(".sub.")) 1949 EltOp = Builder.CreateFSub(Elt0, Elt1); 1950 else if (Name.contains(".mul.")) 1951 EltOp = Builder.CreateFMul(Elt0, Elt1); 1952 else 1953 EltOp = Builder.CreateFDiv(Elt0, Elt1); 1954 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 1955 ConstantInt::get(I32Ty, 0)); 1956 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1957 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1958 bool CmpEq = Name[16] == 'e'; 1959 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1960 } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) { 1961 Type *OpTy = CI->getArgOperand(0)->getType(); 1962 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1963 Intrinsic::ID IID; 1964 switch (VecWidth) { 1965 default: llvm_unreachable("Unexpected intrinsic"); 1966 case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break; 1967 case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break; 1968 case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break; 1969 } 1970 1971 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1972 { CI->getOperand(0), CI->getArgOperand(1) }); 1973 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1974 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 1975 Type *OpTy = CI->getArgOperand(0)->getType(); 1976 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1977 unsigned EltWidth = OpTy->getScalarSizeInBits(); 1978 Intrinsic::ID IID; 1979 if (VecWidth == 128 && EltWidth == 32) 1980 IID = Intrinsic::x86_avx512_fpclass_ps_128; 1981 else if (VecWidth == 256 && EltWidth == 32) 1982 IID = Intrinsic::x86_avx512_fpclass_ps_256; 1983 else if (VecWidth == 512 && EltWidth == 32) 1984 IID = Intrinsic::x86_avx512_fpclass_ps_512; 1985 else if (VecWidth == 128 && EltWidth == 64) 1986 IID = Intrinsic::x86_avx512_fpclass_pd_128; 1987 else if (VecWidth == 256 && EltWidth == 64) 1988 IID = Intrinsic::x86_avx512_fpclass_pd_256; 1989 else if (VecWidth == 512 && EltWidth == 64) 1990 IID = Intrinsic::x86_avx512_fpclass_pd_512; 1991 else 1992 llvm_unreachable("Unexpected intrinsic"); 1993 1994 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1995 { CI->getOperand(0), CI->getArgOperand(1) }); 1996 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1997 } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) { 1998 Type *OpTy = CI->getArgOperand(0)->getType(); 1999 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2000 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2001 Intrinsic::ID IID; 2002 if (VecWidth == 128 && EltWidth == 32) 2003 IID = Intrinsic::x86_avx512_cmp_ps_128; 2004 else if (VecWidth == 256 && EltWidth == 32) 2005 IID = Intrinsic::x86_avx512_cmp_ps_256; 2006 else if (VecWidth == 512 && EltWidth == 32) 2007 IID = Intrinsic::x86_avx512_cmp_ps_512; 2008 else if (VecWidth == 128 && EltWidth == 64) 2009 IID = Intrinsic::x86_avx512_cmp_pd_128; 2010 else if (VecWidth == 256 && EltWidth == 64) 2011 IID = Intrinsic::x86_avx512_cmp_pd_256; 2012 else if (VecWidth == 512 && EltWidth == 64) 2013 IID = Intrinsic::x86_avx512_cmp_pd_512; 2014 else 2015 llvm_unreachable("Unexpected intrinsic"); 2016 2017 SmallVector<Value *, 4> Args; 2018 Args.push_back(CI->getArgOperand(0)); 2019 Args.push_back(CI->getArgOperand(1)); 2020 Args.push_back(CI->getArgOperand(2)); 2021 if (CI->getNumArgOperands() == 5) 2022 Args.push_back(CI->getArgOperand(4)); 2023 2024 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2025 Args); 2026 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3)); 2027 } else if (IsX86 && Name.startswith("avx512.mask.cmp.") && 2028 Name[16] != 'p') { 2029 // Integer compare intrinsics. 2030 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2031 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 2032 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 2033 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2034 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 2035 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 2036 Name.startswith("avx512.cvtw2mask.") || 2037 Name.startswith("avx512.cvtd2mask.") || 2038 Name.startswith("avx512.cvtq2mask."))) { 2039 Value *Op = CI->getArgOperand(0); 2040 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 2041 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 2042 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 2043 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 2044 Name == "ssse3.pabs.w.128" || 2045 Name == "ssse3.pabs.d.128" || 2046 Name.startswith("avx2.pabs") || 2047 Name.startswith("avx512.mask.pabs"))) { 2048 Rep = upgradeAbs(Builder, *CI); 2049 } else if (IsX86 && (Name == "sse41.pmaxsb" || 2050 Name == "sse2.pmaxs.w" || 2051 Name == "sse41.pmaxsd" || 2052 Name.startswith("avx2.pmaxs") || 2053 Name.startswith("avx512.mask.pmaxs"))) { 2054 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 2055 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 2056 Name == "sse41.pmaxuw" || 2057 Name == "sse41.pmaxud" || 2058 Name.startswith("avx2.pmaxu") || 2059 Name.startswith("avx512.mask.pmaxu"))) { 2060 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 2061 } else if (IsX86 && (Name == "sse41.pminsb" || 2062 Name == "sse2.pmins.w" || 2063 Name == "sse41.pminsd" || 2064 Name.startswith("avx2.pmins") || 2065 Name.startswith("avx512.mask.pmins"))) { 2066 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 2067 } else if (IsX86 && (Name == "sse2.pminu.b" || 2068 Name == "sse41.pminuw" || 2069 Name == "sse41.pminud" || 2070 Name.startswith("avx2.pminu") || 2071 Name.startswith("avx512.mask.pminu"))) { 2072 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 2073 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 2074 Name == "avx2.pmulu.dq" || 2075 Name == "avx512.pmulu.dq.512" || 2076 Name.startswith("avx512.mask.pmulu.dq."))) { 2077 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 2078 } else if (IsX86 && (Name == "sse41.pmuldq" || 2079 Name == "avx2.pmul.dq" || 2080 Name == "avx512.pmul.dq.512" || 2081 Name.startswith("avx512.mask.pmul.dq."))) { 2082 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 2083 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 2084 Name == "sse2.cvtsi2sd" || 2085 Name == "sse.cvtsi642ss" || 2086 Name == "sse2.cvtsi642sd")) { 2087 Rep = Builder.CreateSIToFP(CI->getArgOperand(1), 2088 CI->getType()->getVectorElementType()); 2089 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2090 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 2091 Rep = Builder.CreateUIToFP(CI->getArgOperand(1), 2092 CI->getType()->getVectorElementType()); 2093 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2094 } else if (IsX86 && Name == "sse2.cvtss2sd") { 2095 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 2096 Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType()); 2097 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2098 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 2099 Name == "sse2.cvtdq2ps" || 2100 Name == "avx.cvtdq2.pd.256" || 2101 Name == "avx.cvtdq2.ps.256" || 2102 Name.startswith("avx512.mask.cvtdq2pd.") || 2103 Name.startswith("avx512.mask.cvtudq2pd.") || 2104 Name.startswith("avx512.mask.cvtdq2ps.") || 2105 Name.startswith("avx512.mask.cvtudq2ps.") || 2106 Name.startswith("avx512.mask.cvtqq2pd.") || 2107 Name.startswith("avx512.mask.cvtuqq2pd.") || 2108 Name == "avx512.mask.cvtqq2ps.256" || 2109 Name == "avx512.mask.cvtqq2ps.512" || 2110 Name == "avx512.mask.cvtuqq2ps.256" || 2111 Name == "avx512.mask.cvtuqq2ps.512" || 2112 Name == "sse2.cvtps2pd" || 2113 Name == "avx.cvt.ps2.pd.256" || 2114 Name == "avx512.mask.cvtps2pd.128" || 2115 Name == "avx512.mask.cvtps2pd.256")) { 2116 Type *DstTy = CI->getType(); 2117 Rep = CI->getArgOperand(0); 2118 Type *SrcTy = Rep->getType(); 2119 2120 unsigned NumDstElts = DstTy->getVectorNumElements(); 2121 if (NumDstElts < SrcTy->getVectorNumElements()) { 2122 assert(NumDstElts == 2 && "Unexpected vector size"); 2123 uint32_t ShuffleMask[2] = { 0, 1 }; 2124 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 2125 } 2126 2127 bool IsPS2PD = SrcTy->getVectorElementType()->isFloatTy(); 2128 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 2129 if (IsPS2PD) 2130 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 2131 else if (CI->getNumArgOperands() == 4 && 2132 (!isa<ConstantInt>(CI->getArgOperand(3)) || 2133 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 2134 Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round 2135 : Intrinsic::x86_avx512_sitofp_round; 2136 Function *F = Intrinsic::getDeclaration(CI->getModule(), IID, 2137 { DstTy, SrcTy }); 2138 Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) }); 2139 } else { 2140 Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt") 2141 : Builder.CreateSIToFP(Rep, DstTy, "cvt"); 2142 } 2143 2144 if (CI->getNumArgOperands() >= 3) 2145 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2146 CI->getArgOperand(1)); 2147 } else if (IsX86 && (Name.startswith("avx512.mask.vcvtph2ps.") || 2148 Name.startswith("vcvtph2ps."))) { 2149 Type *DstTy = CI->getType(); 2150 Rep = CI->getArgOperand(0); 2151 Type *SrcTy = Rep->getType(); 2152 unsigned NumDstElts = DstTy->getVectorNumElements(); 2153 if (NumDstElts != SrcTy->getVectorNumElements()) { 2154 assert(NumDstElts == 4 && "Unexpected vector size"); 2155 uint32_t ShuffleMask[4] = {0, 1, 2, 3}; 2156 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 2157 } 2158 Rep = Builder.CreateBitCast( 2159 Rep, VectorType::get(Type::getHalfTy(C), NumDstElts)); 2160 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtph2ps"); 2161 if (CI->getNumArgOperands() >= 3) 2162 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2163 CI->getArgOperand(1)); 2164 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 2165 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2166 CI->getArgOperand(1), CI->getArgOperand(2), 2167 /*Aligned*/false); 2168 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 2169 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2170 CI->getArgOperand(1),CI->getArgOperand(2), 2171 /*Aligned*/true); 2172 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 2173 Type *ResultTy = CI->getType(); 2174 Type *PtrTy = ResultTy->getVectorElementType(); 2175 2176 // Cast the pointer to element type. 2177 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2178 llvm::PointerType::getUnqual(PtrTy)); 2179 2180 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2181 ResultTy->getVectorNumElements()); 2182 2183 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 2184 Intrinsic::masked_expandload, 2185 ResultTy); 2186 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 2187 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 2188 Type *ResultTy = CI->getArgOperand(1)->getType(); 2189 Type *PtrTy = ResultTy->getVectorElementType(); 2190 2191 // Cast the pointer to element type. 2192 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2193 llvm::PointerType::getUnqual(PtrTy)); 2194 2195 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2196 ResultTy->getVectorNumElements()); 2197 2198 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 2199 Intrinsic::masked_compressstore, 2200 ResultTy); 2201 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 2202 } else if (IsX86 && (Name.startswith("avx512.mask.compress.") || 2203 Name.startswith("avx512.mask.expand."))) { 2204 Type *ResultTy = CI->getType(); 2205 2206 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2207 ResultTy->getVectorNumElements()); 2208 2209 bool IsCompress = Name[12] == 'c'; 2210 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 2211 : Intrinsic::x86_avx512_mask_expand; 2212 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); 2213 Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1), 2214 MaskVec }); 2215 } else if (IsX86 && Name.startswith("xop.vpcom")) { 2216 bool IsSigned; 2217 if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") || 2218 Name.endswith("uq")) 2219 IsSigned = false; 2220 else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") || 2221 Name.endswith("q")) 2222 IsSigned = true; 2223 else 2224 llvm_unreachable("Unknown suffix"); 2225 2226 unsigned Imm; 2227 if (CI->getNumArgOperands() == 3) { 2228 Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2229 } else { 2230 Name = Name.substr(9); // strip off "xop.vpcom" 2231 if (Name.startswith("lt")) 2232 Imm = 0; 2233 else if (Name.startswith("le")) 2234 Imm = 1; 2235 else if (Name.startswith("gt")) 2236 Imm = 2; 2237 else if (Name.startswith("ge")) 2238 Imm = 3; 2239 else if (Name.startswith("eq")) 2240 Imm = 4; 2241 else if (Name.startswith("ne")) 2242 Imm = 5; 2243 else if (Name.startswith("false")) 2244 Imm = 6; 2245 else if (Name.startswith("true")) 2246 Imm = 7; 2247 else 2248 llvm_unreachable("Unknown condition"); 2249 } 2250 2251 Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned); 2252 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2253 Value *Sel = CI->getArgOperand(2); 2254 Value *NotSel = Builder.CreateNot(Sel); 2255 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2256 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2257 Rep = Builder.CreateOr(Sel0, Sel1); 2258 } else if (IsX86 && (Name.startswith("xop.vprot") || 2259 Name.startswith("avx512.prol") || 2260 Name.startswith("avx512.mask.prol"))) { 2261 Rep = upgradeX86Rotate(Builder, *CI, false); 2262 } else if (IsX86 && (Name.startswith("avx512.pror") || 2263 Name.startswith("avx512.mask.pror"))) { 2264 Rep = upgradeX86Rotate(Builder, *CI, true); 2265 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2266 Name.startswith("avx512.mask.vpshld") || 2267 Name.startswith("avx512.maskz.vpshld"))) { 2268 bool ZeroMask = Name[11] == 'z'; 2269 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2270 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2271 Name.startswith("avx512.mask.vpshrd") || 2272 Name.startswith("avx512.maskz.vpshrd"))) { 2273 bool ZeroMask = Name[11] == 'z'; 2274 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2275 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2276 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2277 Intrinsic::x86_sse42_crc32_32_8); 2278 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2279 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2280 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2281 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2282 Name.startswith("avx512.vbroadcast.s"))) { 2283 // Replace broadcasts with a series of insertelements. 2284 Type *VecTy = CI->getType(); 2285 Type *EltTy = VecTy->getVectorElementType(); 2286 unsigned EltNum = VecTy->getVectorNumElements(); 2287 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2288 EltTy->getPointerTo()); 2289 Value *Load = Builder.CreateLoad(EltTy, Cast); 2290 Type *I32Ty = Type::getInt32Ty(C); 2291 Rep = UndefValue::get(VecTy); 2292 for (unsigned I = 0; I < EltNum; ++I) 2293 Rep = Builder.CreateInsertElement(Rep, Load, 2294 ConstantInt::get(I32Ty, I)); 2295 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2296 Name.startswith("sse41.pmovzx") || 2297 Name.startswith("avx2.pmovsx") || 2298 Name.startswith("avx2.pmovzx") || 2299 Name.startswith("avx512.mask.pmovsx") || 2300 Name.startswith("avx512.mask.pmovzx"))) { 2301 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 2302 VectorType *DstTy = cast<VectorType>(CI->getType()); 2303 unsigned NumDstElts = DstTy->getNumElements(); 2304 2305 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2306 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 2307 for (unsigned i = 0; i != NumDstElts; ++i) 2308 ShuffleMask[i] = i; 2309 2310 Value *SV = Builder.CreateShuffleVector( 2311 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2312 2313 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2314 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2315 : Builder.CreateZExt(SV, DstTy); 2316 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2317 if (CI->getNumArgOperands() == 3) 2318 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2319 CI->getArgOperand(1)); 2320 } else if (Name == "avx512.mask.pmov.qd.256" || 2321 Name == "avx512.mask.pmov.qd.512" || 2322 Name == "avx512.mask.pmov.wb.256" || 2323 Name == "avx512.mask.pmov.wb.512") { 2324 Type *Ty = CI->getArgOperand(1)->getType(); 2325 Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty); 2326 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2327 CI->getArgOperand(1)); 2328 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2329 Name == "avx2.vbroadcasti128")) { 2330 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2331 Type *EltTy = CI->getType()->getVectorElementType(); 2332 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2333 Type *VT = VectorType::get(EltTy, NumSrcElts); 2334 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2335 PointerType::getUnqual(VT)); 2336 Value *Load = Builder.CreateAlignedLoad(VT, Op, Align(1)); 2337 if (NumSrcElts == 2) 2338 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2339 { 0, 1, 0, 1 }); 2340 else 2341 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2342 { 0, 1, 2, 3, 0, 1, 2, 3 }); 2343 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2344 Name.startswith("avx512.mask.shuf.f"))) { 2345 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2346 Type *VT = CI->getType(); 2347 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2348 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2349 unsigned ControlBitsMask = NumLanes - 1; 2350 unsigned NumControlBits = NumLanes / 2; 2351 SmallVector<uint32_t, 8> ShuffleMask(0); 2352 2353 for (unsigned l = 0; l != NumLanes; ++l) { 2354 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2355 // We actually need the other source. 2356 if (l >= NumLanes / 2) 2357 LaneMask += NumLanes; 2358 for (unsigned i = 0; i != NumElementsInLane; ++i) 2359 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2360 } 2361 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2362 CI->getArgOperand(1), ShuffleMask); 2363 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2364 CI->getArgOperand(3)); 2365 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2366 Name.startswith("avx512.mask.broadcasti"))) { 2367 unsigned NumSrcElts = 2368 CI->getArgOperand(0)->getType()->getVectorNumElements(); 2369 unsigned NumDstElts = CI->getType()->getVectorNumElements(); 2370 2371 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 2372 for (unsigned i = 0; i != NumDstElts; ++i) 2373 ShuffleMask[i] = i % NumSrcElts; 2374 2375 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2376 CI->getArgOperand(0), 2377 ShuffleMask); 2378 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2379 CI->getArgOperand(1)); 2380 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2381 Name.startswith("avx2.vbroadcast") || 2382 Name.startswith("avx512.pbroadcast") || 2383 Name.startswith("avx512.mask.broadcast.s"))) { 2384 // Replace vp?broadcasts with a vector shuffle. 2385 Value *Op = CI->getArgOperand(0); 2386 unsigned NumElts = CI->getType()->getVectorNumElements(); 2387 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); 2388 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2389 Constant::getNullValue(MaskTy)); 2390 2391 if (CI->getNumArgOperands() == 3) 2392 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2393 CI->getArgOperand(1)); 2394 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2395 Name.startswith("sse2.psubs.") || 2396 Name.startswith("avx2.padds.") || 2397 Name.startswith("avx2.psubs.") || 2398 Name.startswith("avx512.padds.") || 2399 Name.startswith("avx512.psubs.") || 2400 Name.startswith("avx512.mask.padds.") || 2401 Name.startswith("avx512.mask.psubs."))) { 2402 bool IsAdd = Name.contains(".padds"); 2403 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); 2404 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2405 Name.startswith("sse2.psubus.") || 2406 Name.startswith("avx2.paddus.") || 2407 Name.startswith("avx2.psubus.") || 2408 Name.startswith("avx512.mask.paddus.") || 2409 Name.startswith("avx512.mask.psubus."))) { 2410 bool IsAdd = Name.contains(".paddus"); 2411 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); 2412 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2413 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2414 CI->getArgOperand(1), 2415 CI->getArgOperand(2), 2416 CI->getArgOperand(3), 2417 CI->getArgOperand(4), 2418 false); 2419 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2420 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2421 CI->getArgOperand(1), 2422 CI->getArgOperand(2), 2423 CI->getArgOperand(3), 2424 CI->getArgOperand(4), 2425 true); 2426 } else if (IsX86 && (Name == "sse2.psll.dq" || 2427 Name == "avx2.psll.dq")) { 2428 // 128/256-bit shift left specified in bits. 2429 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2430 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2431 Shift / 8); // Shift is in bits. 2432 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2433 Name == "avx2.psrl.dq")) { 2434 // 128/256-bit shift right specified in bits. 2435 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2436 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2437 Shift / 8); // Shift is in bits. 2438 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2439 Name == "avx2.psll.dq.bs" || 2440 Name == "avx512.psll.dq.512")) { 2441 // 128/256/512-bit shift left specified in bytes. 2442 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2443 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2444 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2445 Name == "avx2.psrl.dq.bs" || 2446 Name == "avx512.psrl.dq.512")) { 2447 // 128/256/512-bit shift right specified in bytes. 2448 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2449 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2450 } else if (IsX86 && (Name == "sse41.pblendw" || 2451 Name.startswith("sse41.blendp") || 2452 Name.startswith("avx.blend.p") || 2453 Name == "avx2.pblendw" || 2454 Name.startswith("avx2.pblendd."))) { 2455 Value *Op0 = CI->getArgOperand(0); 2456 Value *Op1 = CI->getArgOperand(1); 2457 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2458 VectorType *VecTy = cast<VectorType>(CI->getType()); 2459 unsigned NumElts = VecTy->getNumElements(); 2460 2461 SmallVector<uint32_t, 16> Idxs(NumElts); 2462 for (unsigned i = 0; i != NumElts; ++i) 2463 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2464 2465 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2466 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2467 Name == "avx2.vinserti128" || 2468 Name.startswith("avx512.mask.insert"))) { 2469 Value *Op0 = CI->getArgOperand(0); 2470 Value *Op1 = CI->getArgOperand(1); 2471 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2472 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 2473 unsigned SrcNumElts = Op1->getType()->getVectorNumElements(); 2474 unsigned Scale = DstNumElts / SrcNumElts; 2475 2476 // Mask off the high bits of the immediate value; hardware ignores those. 2477 Imm = Imm % Scale; 2478 2479 // Extend the second operand into a vector the size of the destination. 2480 Value *UndefV = UndefValue::get(Op1->getType()); 2481 SmallVector<uint32_t, 8> Idxs(DstNumElts); 2482 for (unsigned i = 0; i != SrcNumElts; ++i) 2483 Idxs[i] = i; 2484 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2485 Idxs[i] = SrcNumElts; 2486 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2487 2488 // Insert the second operand into the first operand. 2489 2490 // Note that there is no guarantee that instruction lowering will actually 2491 // produce a vinsertf128 instruction for the created shuffles. In 2492 // particular, the 0 immediate case involves no lane changes, so it can 2493 // be handled as a blend. 2494 2495 // Example of shuffle mask for 32-bit elements: 2496 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2497 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2498 2499 // First fill with identify mask. 2500 for (unsigned i = 0; i != DstNumElts; ++i) 2501 Idxs[i] = i; 2502 // Then replace the elements where we need to insert. 2503 for (unsigned i = 0; i != SrcNumElts; ++i) 2504 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2505 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2506 2507 // If the intrinsic has a mask operand, handle that. 2508 if (CI->getNumArgOperands() == 5) 2509 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2510 CI->getArgOperand(3)); 2511 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2512 Name == "avx2.vextracti128" || 2513 Name.startswith("avx512.mask.vextract"))) { 2514 Value *Op0 = CI->getArgOperand(0); 2515 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2516 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 2517 unsigned SrcNumElts = Op0->getType()->getVectorNumElements(); 2518 unsigned Scale = SrcNumElts / DstNumElts; 2519 2520 // Mask off the high bits of the immediate value; hardware ignores those. 2521 Imm = Imm % Scale; 2522 2523 // Get indexes for the subvector of the input vector. 2524 SmallVector<uint32_t, 8> Idxs(DstNumElts); 2525 for (unsigned i = 0; i != DstNumElts; ++i) { 2526 Idxs[i] = i + (Imm * DstNumElts); 2527 } 2528 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2529 2530 // If the intrinsic has a mask operand, handle that. 2531 if (CI->getNumArgOperands() == 4) 2532 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2533 CI->getArgOperand(2)); 2534 } else if (!IsX86 && Name == "stackprotectorcheck") { 2535 Rep = nullptr; 2536 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2537 Name.startswith("avx512.mask.perm.di."))) { 2538 Value *Op0 = CI->getArgOperand(0); 2539 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2540 VectorType *VecTy = cast<VectorType>(CI->getType()); 2541 unsigned NumElts = VecTy->getNumElements(); 2542 2543 SmallVector<uint32_t, 8> Idxs(NumElts); 2544 for (unsigned i = 0; i != NumElts; ++i) 2545 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2546 2547 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2548 2549 if (CI->getNumArgOperands() == 4) 2550 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2551 CI->getArgOperand(2)); 2552 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2553 Name == "avx2.vperm2i128")) { 2554 // The immediate permute control byte looks like this: 2555 // [1:0] - select 128 bits from sources for low half of destination 2556 // [2] - ignore 2557 // [3] - zero low half of destination 2558 // [5:4] - select 128 bits from sources for high half of destination 2559 // [6] - ignore 2560 // [7] - zero high half of destination 2561 2562 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2563 2564 unsigned NumElts = CI->getType()->getVectorNumElements(); 2565 unsigned HalfSize = NumElts / 2; 2566 SmallVector<uint32_t, 8> ShuffleMask(NumElts); 2567 2568 // Determine which operand(s) are actually in use for this instruction. 2569 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2570 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2571 2572 // If needed, replace operands based on zero mask. 2573 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2574 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2575 2576 // Permute low half of result. 2577 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2578 for (unsigned i = 0; i < HalfSize; ++i) 2579 ShuffleMask[i] = StartIndex + i; 2580 2581 // Permute high half of result. 2582 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2583 for (unsigned i = 0; i < HalfSize; ++i) 2584 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2585 2586 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2587 2588 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2589 Name == "sse2.pshuf.d" || 2590 Name.startswith("avx512.mask.vpermil.p") || 2591 Name.startswith("avx512.mask.pshuf.d."))) { 2592 Value *Op0 = CI->getArgOperand(0); 2593 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2594 VectorType *VecTy = cast<VectorType>(CI->getType()); 2595 unsigned NumElts = VecTy->getNumElements(); 2596 // Calculate the size of each index in the immediate. 2597 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2598 unsigned IdxMask = ((1 << IdxSize) - 1); 2599 2600 SmallVector<uint32_t, 8> Idxs(NumElts); 2601 // Lookup the bits for this element, wrapping around the immediate every 2602 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2603 // to offset by the first index of each group. 2604 for (unsigned i = 0; i != NumElts; ++i) 2605 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2606 2607 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2608 2609 if (CI->getNumArgOperands() == 4) 2610 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2611 CI->getArgOperand(2)); 2612 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2613 Name.startswith("avx512.mask.pshufl.w."))) { 2614 Value *Op0 = CI->getArgOperand(0); 2615 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2616 unsigned NumElts = CI->getType()->getVectorNumElements(); 2617 2618 SmallVector<uint32_t, 16> Idxs(NumElts); 2619 for (unsigned l = 0; l != NumElts; l += 8) { 2620 for (unsigned i = 0; i != 4; ++i) 2621 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2622 for (unsigned i = 4; i != 8; ++i) 2623 Idxs[i + l] = i + l; 2624 } 2625 2626 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2627 2628 if (CI->getNumArgOperands() == 4) 2629 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2630 CI->getArgOperand(2)); 2631 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2632 Name.startswith("avx512.mask.pshufh.w."))) { 2633 Value *Op0 = CI->getArgOperand(0); 2634 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2635 unsigned NumElts = CI->getType()->getVectorNumElements(); 2636 2637 SmallVector<uint32_t, 16> Idxs(NumElts); 2638 for (unsigned l = 0; l != NumElts; l += 8) { 2639 for (unsigned i = 0; i != 4; ++i) 2640 Idxs[i + l] = i + l; 2641 for (unsigned i = 0; i != 4; ++i) 2642 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2643 } 2644 2645 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2646 2647 if (CI->getNumArgOperands() == 4) 2648 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2649 CI->getArgOperand(2)); 2650 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2651 Value *Op0 = CI->getArgOperand(0); 2652 Value *Op1 = CI->getArgOperand(1); 2653 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2654 unsigned NumElts = CI->getType()->getVectorNumElements(); 2655 2656 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2657 unsigned HalfLaneElts = NumLaneElts / 2; 2658 2659 SmallVector<uint32_t, 16> Idxs(NumElts); 2660 for (unsigned i = 0; i != NumElts; ++i) { 2661 // Base index is the starting element of the lane. 2662 Idxs[i] = i - (i % NumLaneElts); 2663 // If we are half way through the lane switch to the other source. 2664 if ((i % NumLaneElts) >= HalfLaneElts) 2665 Idxs[i] += NumElts; 2666 // Now select the specific element. By adding HalfLaneElts bits from 2667 // the immediate. Wrapping around the immediate every 8-bits. 2668 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2669 } 2670 2671 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2672 2673 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2674 CI->getArgOperand(3)); 2675 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2676 Name.startswith("avx512.mask.movshdup") || 2677 Name.startswith("avx512.mask.movsldup"))) { 2678 Value *Op0 = CI->getArgOperand(0); 2679 unsigned NumElts = CI->getType()->getVectorNumElements(); 2680 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2681 2682 unsigned Offset = 0; 2683 if (Name.startswith("avx512.mask.movshdup.")) 2684 Offset = 1; 2685 2686 SmallVector<uint32_t, 16> Idxs(NumElts); 2687 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2688 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2689 Idxs[i + l + 0] = i + l + Offset; 2690 Idxs[i + l + 1] = i + l + Offset; 2691 } 2692 2693 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2694 2695 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2696 CI->getArgOperand(1)); 2697 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2698 Name.startswith("avx512.mask.unpckl."))) { 2699 Value *Op0 = CI->getArgOperand(0); 2700 Value *Op1 = CI->getArgOperand(1); 2701 int NumElts = CI->getType()->getVectorNumElements(); 2702 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2703 2704 SmallVector<uint32_t, 64> Idxs(NumElts); 2705 for (int l = 0; l != NumElts; l += NumLaneElts) 2706 for (int i = 0; i != NumLaneElts; ++i) 2707 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2708 2709 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2710 2711 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2712 CI->getArgOperand(2)); 2713 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2714 Name.startswith("avx512.mask.unpckh."))) { 2715 Value *Op0 = CI->getArgOperand(0); 2716 Value *Op1 = CI->getArgOperand(1); 2717 int NumElts = CI->getType()->getVectorNumElements(); 2718 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2719 2720 SmallVector<uint32_t, 64> Idxs(NumElts); 2721 for (int l = 0; l != NumElts; l += NumLaneElts) 2722 for (int i = 0; i != NumLaneElts; ++i) 2723 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2724 2725 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2726 2727 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2728 CI->getArgOperand(2)); 2729 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2730 Name.startswith("avx512.mask.pand."))) { 2731 VectorType *FTy = cast<VectorType>(CI->getType()); 2732 VectorType *ITy = VectorType::getInteger(FTy); 2733 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2734 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2735 Rep = Builder.CreateBitCast(Rep, FTy); 2736 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2737 CI->getArgOperand(2)); 2738 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2739 Name.startswith("avx512.mask.pandn."))) { 2740 VectorType *FTy = cast<VectorType>(CI->getType()); 2741 VectorType *ITy = VectorType::getInteger(FTy); 2742 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2743 Rep = Builder.CreateAnd(Rep, 2744 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2745 Rep = Builder.CreateBitCast(Rep, FTy); 2746 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2747 CI->getArgOperand(2)); 2748 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2749 Name.startswith("avx512.mask.por."))) { 2750 VectorType *FTy = cast<VectorType>(CI->getType()); 2751 VectorType *ITy = VectorType::getInteger(FTy); 2752 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2753 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2754 Rep = Builder.CreateBitCast(Rep, FTy); 2755 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2756 CI->getArgOperand(2)); 2757 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2758 Name.startswith("avx512.mask.pxor."))) { 2759 VectorType *FTy = cast<VectorType>(CI->getType()); 2760 VectorType *ITy = VectorType::getInteger(FTy); 2761 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2762 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2763 Rep = Builder.CreateBitCast(Rep, FTy); 2764 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2765 CI->getArgOperand(2)); 2766 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2767 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2768 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2769 CI->getArgOperand(2)); 2770 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2771 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2772 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2773 CI->getArgOperand(2)); 2774 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2775 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2776 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2777 CI->getArgOperand(2)); 2778 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2779 if (Name.endswith(".512")) { 2780 Intrinsic::ID IID; 2781 if (Name[17] == 's') 2782 IID = Intrinsic::x86_avx512_add_ps_512; 2783 else 2784 IID = Intrinsic::x86_avx512_add_pd_512; 2785 2786 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2787 { CI->getArgOperand(0), CI->getArgOperand(1), 2788 CI->getArgOperand(4) }); 2789 } else { 2790 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2791 } 2792 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2793 CI->getArgOperand(2)); 2794 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2795 if (Name.endswith(".512")) { 2796 Intrinsic::ID IID; 2797 if (Name[17] == 's') 2798 IID = Intrinsic::x86_avx512_div_ps_512; 2799 else 2800 IID = Intrinsic::x86_avx512_div_pd_512; 2801 2802 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2803 { CI->getArgOperand(0), CI->getArgOperand(1), 2804 CI->getArgOperand(4) }); 2805 } else { 2806 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2807 } 2808 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2809 CI->getArgOperand(2)); 2810 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2811 if (Name.endswith(".512")) { 2812 Intrinsic::ID IID; 2813 if (Name[17] == 's') 2814 IID = Intrinsic::x86_avx512_mul_ps_512; 2815 else 2816 IID = Intrinsic::x86_avx512_mul_pd_512; 2817 2818 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2819 { CI->getArgOperand(0), CI->getArgOperand(1), 2820 CI->getArgOperand(4) }); 2821 } else { 2822 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2823 } 2824 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2825 CI->getArgOperand(2)); 2826 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2827 if (Name.endswith(".512")) { 2828 Intrinsic::ID IID; 2829 if (Name[17] == 's') 2830 IID = Intrinsic::x86_avx512_sub_ps_512; 2831 else 2832 IID = Intrinsic::x86_avx512_sub_pd_512; 2833 2834 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2835 { CI->getArgOperand(0), CI->getArgOperand(1), 2836 CI->getArgOperand(4) }); 2837 } else { 2838 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2839 } 2840 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2841 CI->getArgOperand(2)); 2842 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2843 Name.startswith("avx512.mask.min.p")) && 2844 Name.drop_front(18) == ".512") { 2845 bool IsDouble = Name[17] == 'd'; 2846 bool IsMin = Name[13] == 'i'; 2847 static const Intrinsic::ID MinMaxTbl[2][2] = { 2848 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2849 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2850 }; 2851 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2852 2853 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2854 { CI->getArgOperand(0), CI->getArgOperand(1), 2855 CI->getArgOperand(4) }); 2856 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2857 CI->getArgOperand(2)); 2858 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2859 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2860 Intrinsic::ctlz, 2861 CI->getType()), 2862 { CI->getArgOperand(0), Builder.getInt1(false) }); 2863 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2864 CI->getArgOperand(1)); 2865 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2866 bool IsImmediate = Name[16] == 'i' || 2867 (Name.size() > 18 && Name[18] == 'i'); 2868 bool IsVariable = Name[16] == 'v'; 2869 char Size = Name[16] == '.' ? Name[17] : 2870 Name[17] == '.' ? Name[18] : 2871 Name[18] == '.' ? Name[19] : 2872 Name[20]; 2873 2874 Intrinsic::ID IID; 2875 if (IsVariable && Name[17] != '.') { 2876 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2877 IID = Intrinsic::x86_avx2_psllv_q; 2878 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2879 IID = Intrinsic::x86_avx2_psllv_q_256; 2880 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2881 IID = Intrinsic::x86_avx2_psllv_d; 2882 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2883 IID = Intrinsic::x86_avx2_psllv_d_256; 2884 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2885 IID = Intrinsic::x86_avx512_psllv_w_128; 2886 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2887 IID = Intrinsic::x86_avx512_psllv_w_256; 2888 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2889 IID = Intrinsic::x86_avx512_psllv_w_512; 2890 else 2891 llvm_unreachable("Unexpected size"); 2892 } else if (Name.endswith(".128")) { 2893 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2894 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2895 : Intrinsic::x86_sse2_psll_d; 2896 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2897 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2898 : Intrinsic::x86_sse2_psll_q; 2899 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2900 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2901 : Intrinsic::x86_sse2_psll_w; 2902 else 2903 llvm_unreachable("Unexpected size"); 2904 } else if (Name.endswith(".256")) { 2905 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2906 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2907 : Intrinsic::x86_avx2_psll_d; 2908 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2909 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2910 : Intrinsic::x86_avx2_psll_q; 2911 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2912 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2913 : Intrinsic::x86_avx2_psll_w; 2914 else 2915 llvm_unreachable("Unexpected size"); 2916 } else { 2917 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2918 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2919 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2920 Intrinsic::x86_avx512_psll_d_512; 2921 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2922 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2923 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2924 Intrinsic::x86_avx512_psll_q_512; 2925 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2926 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2927 : Intrinsic::x86_avx512_psll_w_512; 2928 else 2929 llvm_unreachable("Unexpected size"); 2930 } 2931 2932 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2933 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2934 bool IsImmediate = Name[16] == 'i' || 2935 (Name.size() > 18 && Name[18] == 'i'); 2936 bool IsVariable = Name[16] == 'v'; 2937 char Size = Name[16] == '.' ? Name[17] : 2938 Name[17] == '.' ? Name[18] : 2939 Name[18] == '.' ? Name[19] : 2940 Name[20]; 2941 2942 Intrinsic::ID IID; 2943 if (IsVariable && Name[17] != '.') { 2944 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2945 IID = Intrinsic::x86_avx2_psrlv_q; 2946 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2947 IID = Intrinsic::x86_avx2_psrlv_q_256; 2948 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2949 IID = Intrinsic::x86_avx2_psrlv_d; 2950 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2951 IID = Intrinsic::x86_avx2_psrlv_d_256; 2952 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2953 IID = Intrinsic::x86_avx512_psrlv_w_128; 2954 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2955 IID = Intrinsic::x86_avx512_psrlv_w_256; 2956 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2957 IID = Intrinsic::x86_avx512_psrlv_w_512; 2958 else 2959 llvm_unreachable("Unexpected size"); 2960 } else if (Name.endswith(".128")) { 2961 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2962 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2963 : Intrinsic::x86_sse2_psrl_d; 2964 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2965 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2966 : Intrinsic::x86_sse2_psrl_q; 2967 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2968 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2969 : Intrinsic::x86_sse2_psrl_w; 2970 else 2971 llvm_unreachable("Unexpected size"); 2972 } else if (Name.endswith(".256")) { 2973 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2974 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2975 : Intrinsic::x86_avx2_psrl_d; 2976 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2977 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2978 : Intrinsic::x86_avx2_psrl_q; 2979 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2980 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2981 : Intrinsic::x86_avx2_psrl_w; 2982 else 2983 llvm_unreachable("Unexpected size"); 2984 } else { 2985 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2986 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2987 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2988 Intrinsic::x86_avx512_psrl_d_512; 2989 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2990 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2991 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2992 Intrinsic::x86_avx512_psrl_q_512; 2993 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 2994 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 2995 : Intrinsic::x86_avx512_psrl_w_512; 2996 else 2997 llvm_unreachable("Unexpected size"); 2998 } 2999 3000 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3001 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 3002 bool IsImmediate = Name[16] == 'i' || 3003 (Name.size() > 18 && Name[18] == 'i'); 3004 bool IsVariable = Name[16] == 'v'; 3005 char Size = Name[16] == '.' ? Name[17] : 3006 Name[17] == '.' ? Name[18] : 3007 Name[18] == '.' ? Name[19] : 3008 Name[20]; 3009 3010 Intrinsic::ID IID; 3011 if (IsVariable && Name[17] != '.') { 3012 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 3013 IID = Intrinsic::x86_avx2_psrav_d; 3014 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 3015 IID = Intrinsic::x86_avx2_psrav_d_256; 3016 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 3017 IID = Intrinsic::x86_avx512_psrav_w_128; 3018 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 3019 IID = Intrinsic::x86_avx512_psrav_w_256; 3020 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 3021 IID = Intrinsic::x86_avx512_psrav_w_512; 3022 else 3023 llvm_unreachable("Unexpected size"); 3024 } else if (Name.endswith(".128")) { 3025 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 3026 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 3027 : Intrinsic::x86_sse2_psra_d; 3028 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 3029 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 3030 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 3031 Intrinsic::x86_avx512_psra_q_128; 3032 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 3033 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 3034 : Intrinsic::x86_sse2_psra_w; 3035 else 3036 llvm_unreachable("Unexpected size"); 3037 } else if (Name.endswith(".256")) { 3038 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 3039 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 3040 : Intrinsic::x86_avx2_psra_d; 3041 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 3042 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 3043 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 3044 Intrinsic::x86_avx512_psra_q_256; 3045 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 3046 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 3047 : Intrinsic::x86_avx2_psra_w; 3048 else 3049 llvm_unreachable("Unexpected size"); 3050 } else { 3051 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 3052 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 3053 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 3054 Intrinsic::x86_avx512_psra_d_512; 3055 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 3056 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 3057 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 3058 Intrinsic::x86_avx512_psra_q_512; 3059 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 3060 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 3061 : Intrinsic::x86_avx512_psra_w_512; 3062 else 3063 llvm_unreachable("Unexpected size"); 3064 } 3065 3066 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3067 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 3068 Rep = upgradeMaskedMove(Builder, *CI); 3069 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 3070 Rep = UpgradeMaskToInt(Builder, *CI); 3071 } else if (IsX86 && Name.endswith(".movntdqa")) { 3072 Module *M = F->getParent(); 3073 MDNode *Node = MDNode::get( 3074 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 3075 3076 Value *Ptr = CI->getArgOperand(0); 3077 VectorType *VTy = cast<VectorType>(CI->getType()); 3078 3079 // Convert the type of the pointer to a pointer to the stored type. 3080 Value *BC = 3081 Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast"); 3082 LoadInst *LI = 3083 Builder.CreateAlignedLoad(VTy, BC, Align(VTy->getBitWidth() / 8)); 3084 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 3085 Rep = LI; 3086 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 3087 Name.startswith("fma.vfmsub.") || 3088 Name.startswith("fma.vfnmadd.") || 3089 Name.startswith("fma.vfnmsub."))) { 3090 bool NegMul = Name[6] == 'n'; 3091 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 3092 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 3093 3094 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3095 CI->getArgOperand(2) }; 3096 3097 if (IsScalar) { 3098 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3099 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3100 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3101 } 3102 3103 if (NegMul && !IsScalar) 3104 Ops[0] = Builder.CreateFNeg(Ops[0]); 3105 if (NegMul && IsScalar) 3106 Ops[1] = Builder.CreateFNeg(Ops[1]); 3107 if (NegAcc) 3108 Ops[2] = Builder.CreateFNeg(Ops[2]); 3109 3110 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3111 Intrinsic::fma, 3112 Ops[0]->getType()), 3113 Ops); 3114 3115 if (IsScalar) 3116 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 3117 (uint64_t)0); 3118 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 3119 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3120 CI->getArgOperand(2) }; 3121 3122 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3123 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3124 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3125 3126 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3127 Intrinsic::fma, 3128 Ops[0]->getType()), 3129 Ops); 3130 3131 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 3132 Rep, (uint64_t)0); 3133 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 3134 Name.startswith("avx512.maskz.vfmadd.s") || 3135 Name.startswith("avx512.mask3.vfmadd.s") || 3136 Name.startswith("avx512.mask3.vfmsub.s") || 3137 Name.startswith("avx512.mask3.vfnmsub.s"))) { 3138 bool IsMask3 = Name[11] == '3'; 3139 bool IsMaskZ = Name[11] == 'z'; 3140 // Drop the "avx512.mask." to make it easier. 3141 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3142 bool NegMul = Name[2] == 'n'; 3143 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3144 3145 Value *A = CI->getArgOperand(0); 3146 Value *B = CI->getArgOperand(1); 3147 Value *C = CI->getArgOperand(2); 3148 3149 if (NegMul && (IsMask3 || IsMaskZ)) 3150 A = Builder.CreateFNeg(A); 3151 if (NegMul && !(IsMask3 || IsMaskZ)) 3152 B = Builder.CreateFNeg(B); 3153 if (NegAcc) 3154 C = Builder.CreateFNeg(C); 3155 3156 A = Builder.CreateExtractElement(A, (uint64_t)0); 3157 B = Builder.CreateExtractElement(B, (uint64_t)0); 3158 C = Builder.CreateExtractElement(C, (uint64_t)0); 3159 3160 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 3161 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 3162 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 3163 3164 Intrinsic::ID IID; 3165 if (Name.back() == 'd') 3166 IID = Intrinsic::x86_avx512_vfmadd_f64; 3167 else 3168 IID = Intrinsic::x86_avx512_vfmadd_f32; 3169 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 3170 Rep = Builder.CreateCall(FMA, Ops); 3171 } else { 3172 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3173 Intrinsic::fma, 3174 A->getType()); 3175 Rep = Builder.CreateCall(FMA, { A, B, C }); 3176 } 3177 3178 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 3179 IsMask3 ? C : A; 3180 3181 // For Mask3 with NegAcc, we need to create a new extractelement that 3182 // avoids the negation above. 3183 if (NegAcc && IsMask3) 3184 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 3185 (uint64_t)0); 3186 3187 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 3188 Rep, PassThru); 3189 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 3190 Rep, (uint64_t)0); 3191 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 3192 Name.startswith("avx512.mask.vfnmadd.p") || 3193 Name.startswith("avx512.mask.vfnmsub.p") || 3194 Name.startswith("avx512.mask3.vfmadd.p") || 3195 Name.startswith("avx512.mask3.vfmsub.p") || 3196 Name.startswith("avx512.mask3.vfnmsub.p") || 3197 Name.startswith("avx512.maskz.vfmadd.p"))) { 3198 bool IsMask3 = Name[11] == '3'; 3199 bool IsMaskZ = Name[11] == 'z'; 3200 // Drop the "avx512.mask." to make it easier. 3201 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3202 bool NegMul = Name[2] == 'n'; 3203 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3204 3205 Value *A = CI->getArgOperand(0); 3206 Value *B = CI->getArgOperand(1); 3207 Value *C = CI->getArgOperand(2); 3208 3209 if (NegMul && (IsMask3 || IsMaskZ)) 3210 A = Builder.CreateFNeg(A); 3211 if (NegMul && !(IsMask3 || IsMaskZ)) 3212 B = Builder.CreateFNeg(B); 3213 if (NegAcc) 3214 C = Builder.CreateFNeg(C); 3215 3216 if (CI->getNumArgOperands() == 5 && 3217 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3218 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3219 Intrinsic::ID IID; 3220 // Check the character before ".512" in string. 3221 if (Name[Name.size()-5] == 's') 3222 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 3223 else 3224 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 3225 3226 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3227 { A, B, C, CI->getArgOperand(4) }); 3228 } else { 3229 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3230 Intrinsic::fma, 3231 A->getType()); 3232 Rep = Builder.CreateCall(FMA, { A, B, C }); 3233 } 3234 3235 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3236 IsMask3 ? CI->getArgOperand(2) : 3237 CI->getArgOperand(0); 3238 3239 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3240 } else if (IsX86 && Name.startswith("fma.vfmsubadd.p")) { 3241 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3242 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3243 Intrinsic::ID IID; 3244 if (VecWidth == 128 && EltWidth == 32) 3245 IID = Intrinsic::x86_fma_vfmaddsub_ps; 3246 else if (VecWidth == 256 && EltWidth == 32) 3247 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 3248 else if (VecWidth == 128 && EltWidth == 64) 3249 IID = Intrinsic::x86_fma_vfmaddsub_pd; 3250 else if (VecWidth == 256 && EltWidth == 64) 3251 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 3252 else 3253 llvm_unreachable("Unexpected intrinsic"); 3254 3255 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3256 CI->getArgOperand(2) }; 3257 Ops[2] = Builder.CreateFNeg(Ops[2]); 3258 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3259 Ops); 3260 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3261 Name.startswith("avx512.mask3.vfmaddsub.p") || 3262 Name.startswith("avx512.maskz.vfmaddsub.p") || 3263 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3264 bool IsMask3 = Name[11] == '3'; 3265 bool IsMaskZ = Name[11] == 'z'; 3266 // Drop the "avx512.mask." to make it easier. 3267 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3268 bool IsSubAdd = Name[3] == 's'; 3269 if (CI->getNumArgOperands() == 5) { 3270 Intrinsic::ID IID; 3271 // Check the character before ".512" in string. 3272 if (Name[Name.size()-5] == 's') 3273 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3274 else 3275 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3276 3277 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3278 CI->getArgOperand(2), CI->getArgOperand(4) }; 3279 if (IsSubAdd) 3280 Ops[2] = Builder.CreateFNeg(Ops[2]); 3281 3282 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3283 Ops); 3284 } else { 3285 int NumElts = CI->getType()->getVectorNumElements(); 3286 3287 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3288 CI->getArgOperand(2) }; 3289 3290 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3291 Ops[0]->getType()); 3292 Value *Odd = Builder.CreateCall(FMA, Ops); 3293 Ops[2] = Builder.CreateFNeg(Ops[2]); 3294 Value *Even = Builder.CreateCall(FMA, Ops); 3295 3296 if (IsSubAdd) 3297 std::swap(Even, Odd); 3298 3299 SmallVector<uint32_t, 32> Idxs(NumElts); 3300 for (int i = 0; i != NumElts; ++i) 3301 Idxs[i] = i + (i % 2) * NumElts; 3302 3303 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3304 } 3305 3306 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3307 IsMask3 ? CI->getArgOperand(2) : 3308 CI->getArgOperand(0); 3309 3310 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3311 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3312 Name.startswith("avx512.maskz.pternlog."))) { 3313 bool ZeroMask = Name[11] == 'z'; 3314 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3315 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3316 Intrinsic::ID IID; 3317 if (VecWidth == 128 && EltWidth == 32) 3318 IID = Intrinsic::x86_avx512_pternlog_d_128; 3319 else if (VecWidth == 256 && EltWidth == 32) 3320 IID = Intrinsic::x86_avx512_pternlog_d_256; 3321 else if (VecWidth == 512 && EltWidth == 32) 3322 IID = Intrinsic::x86_avx512_pternlog_d_512; 3323 else if (VecWidth == 128 && EltWidth == 64) 3324 IID = Intrinsic::x86_avx512_pternlog_q_128; 3325 else if (VecWidth == 256 && EltWidth == 64) 3326 IID = Intrinsic::x86_avx512_pternlog_q_256; 3327 else if (VecWidth == 512 && EltWidth == 64) 3328 IID = Intrinsic::x86_avx512_pternlog_q_512; 3329 else 3330 llvm_unreachable("Unexpected intrinsic"); 3331 3332 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3333 CI->getArgOperand(2), CI->getArgOperand(3) }; 3334 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3335 Args); 3336 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3337 : CI->getArgOperand(0); 3338 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3339 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3340 Name.startswith("avx512.maskz.vpmadd52"))) { 3341 bool ZeroMask = Name[11] == 'z'; 3342 bool High = Name[20] == 'h' || Name[21] == 'h'; 3343 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3344 Intrinsic::ID IID; 3345 if (VecWidth == 128 && !High) 3346 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3347 else if (VecWidth == 256 && !High) 3348 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3349 else if (VecWidth == 512 && !High) 3350 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3351 else if (VecWidth == 128 && High) 3352 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3353 else if (VecWidth == 256 && High) 3354 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3355 else if (VecWidth == 512 && High) 3356 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3357 else 3358 llvm_unreachable("Unexpected intrinsic"); 3359 3360 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3361 CI->getArgOperand(2) }; 3362 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3363 Args); 3364 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3365 : CI->getArgOperand(0); 3366 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3367 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3368 Name.startswith("avx512.mask.vpermt2var.") || 3369 Name.startswith("avx512.maskz.vpermt2var."))) { 3370 bool ZeroMask = Name[11] == 'z'; 3371 bool IndexForm = Name[17] == 'i'; 3372 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3373 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3374 Name.startswith("avx512.maskz.vpdpbusd.") || 3375 Name.startswith("avx512.mask.vpdpbusds.") || 3376 Name.startswith("avx512.maskz.vpdpbusds."))) { 3377 bool ZeroMask = Name[11] == 'z'; 3378 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3379 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3380 Intrinsic::ID IID; 3381 if (VecWidth == 128 && !IsSaturating) 3382 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3383 else if (VecWidth == 256 && !IsSaturating) 3384 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3385 else if (VecWidth == 512 && !IsSaturating) 3386 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3387 else if (VecWidth == 128 && IsSaturating) 3388 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3389 else if (VecWidth == 256 && IsSaturating) 3390 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3391 else if (VecWidth == 512 && IsSaturating) 3392 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3393 else 3394 llvm_unreachable("Unexpected intrinsic"); 3395 3396 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3397 CI->getArgOperand(2) }; 3398 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3399 Args); 3400 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3401 : CI->getArgOperand(0); 3402 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3403 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3404 Name.startswith("avx512.maskz.vpdpwssd.") || 3405 Name.startswith("avx512.mask.vpdpwssds.") || 3406 Name.startswith("avx512.maskz.vpdpwssds."))) { 3407 bool ZeroMask = Name[11] == 'z'; 3408 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3409 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3410 Intrinsic::ID IID; 3411 if (VecWidth == 128 && !IsSaturating) 3412 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3413 else if (VecWidth == 256 && !IsSaturating) 3414 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3415 else if (VecWidth == 512 && !IsSaturating) 3416 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3417 else if (VecWidth == 128 && IsSaturating) 3418 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3419 else if (VecWidth == 256 && IsSaturating) 3420 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3421 else if (VecWidth == 512 && IsSaturating) 3422 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3423 else 3424 llvm_unreachable("Unexpected intrinsic"); 3425 3426 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3427 CI->getArgOperand(2) }; 3428 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3429 Args); 3430 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3431 : CI->getArgOperand(0); 3432 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3433 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3434 Name == "addcarry.u32" || Name == "addcarry.u64" || 3435 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3436 Intrinsic::ID IID; 3437 if (Name[0] == 'a' && Name.back() == '2') 3438 IID = Intrinsic::x86_addcarry_32; 3439 else if (Name[0] == 'a' && Name.back() == '4') 3440 IID = Intrinsic::x86_addcarry_64; 3441 else if (Name[0] == 's' && Name.back() == '2') 3442 IID = Intrinsic::x86_subborrow_32; 3443 else if (Name[0] == 's' && Name.back() == '4') 3444 IID = Intrinsic::x86_subborrow_64; 3445 else 3446 llvm_unreachable("Unexpected intrinsic"); 3447 3448 // Make a call with 3 operands. 3449 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3450 CI->getArgOperand(2)}; 3451 Value *NewCall = Builder.CreateCall( 3452 Intrinsic::getDeclaration(CI->getModule(), IID), 3453 Args); 3454 3455 // Extract the second result and store it. 3456 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3457 // Cast the pointer to the right type. 3458 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3459 llvm::PointerType::getUnqual(Data->getType())); 3460 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3461 // Replace the original call result with the first result of the new call. 3462 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3463 3464 CI->replaceAllUsesWith(CF); 3465 Rep = nullptr; 3466 } else if (IsX86 && Name.startswith("avx512.mask.") && 3467 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3468 // Rep will be updated by the call in the condition. 3469 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3470 Value *Arg = CI->getArgOperand(0); 3471 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3472 Value *Cmp = Builder.CreateICmpSGE( 3473 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3474 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3475 } else if (IsNVVM && (Name.startswith("atomic.load.add.f32.p") || 3476 Name.startswith("atomic.load.add.f64.p"))) { 3477 Value *Ptr = CI->getArgOperand(0); 3478 Value *Val = CI->getArgOperand(1); 3479 Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, 3480 AtomicOrdering::SequentiallyConsistent); 3481 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3482 Name == "max.ui" || Name == "max.ull")) { 3483 Value *Arg0 = CI->getArgOperand(0); 3484 Value *Arg1 = CI->getArgOperand(1); 3485 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3486 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3487 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3488 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3489 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3490 Name == "min.ui" || Name == "min.ull")) { 3491 Value *Arg0 = CI->getArgOperand(0); 3492 Value *Arg1 = CI->getArgOperand(1); 3493 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3494 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3495 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3496 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3497 } else if (IsNVVM && Name == "clz.ll") { 3498 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3499 Value *Arg = CI->getArgOperand(0); 3500 Value *Ctlz = Builder.CreateCall( 3501 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3502 {Arg->getType()}), 3503 {Arg, Builder.getFalse()}, "ctlz"); 3504 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3505 } else if (IsNVVM && Name == "popc.ll") { 3506 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3507 // i64. 3508 Value *Arg = CI->getArgOperand(0); 3509 Value *Popc = Builder.CreateCall( 3510 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3511 {Arg->getType()}), 3512 Arg, "ctpop"); 3513 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3514 } else if (IsNVVM && Name == "h2f") { 3515 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3516 F->getParent(), Intrinsic::convert_from_fp16, 3517 {Builder.getFloatTy()}), 3518 CI->getArgOperand(0), "h2f"); 3519 } else { 3520 llvm_unreachable("Unknown function for CallInst upgrade."); 3521 } 3522 3523 if (Rep) 3524 CI->replaceAllUsesWith(Rep); 3525 CI->eraseFromParent(); 3526 return; 3527 } 3528 3529 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3530 // Handle generic mangling change, but nothing else 3531 assert( 3532 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3533 "Unknown function for CallInst upgrade and isn't just a name change"); 3534 CI->setCalledFunction(NewFn); 3535 }; 3536 CallInst *NewCall = nullptr; 3537 switch (NewFn->getIntrinsicID()) { 3538 default: { 3539 DefaultCase(); 3540 return; 3541 } 3542 case Intrinsic::experimental_vector_reduce_v2_fmul: { 3543 SmallVector<Value *, 2> Args; 3544 if (CI->isFast()) 3545 Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0)); 3546 else 3547 Args.push_back(CI->getOperand(0)); 3548 Args.push_back(CI->getOperand(1)); 3549 NewCall = Builder.CreateCall(NewFn, Args); 3550 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3551 break; 3552 } 3553 case Intrinsic::experimental_vector_reduce_v2_fadd: { 3554 SmallVector<Value *, 2> Args; 3555 if (CI->isFast()) 3556 Args.push_back(Constant::getNullValue(CI->getOperand(0)->getType())); 3557 else 3558 Args.push_back(CI->getOperand(0)); 3559 Args.push_back(CI->getOperand(1)); 3560 NewCall = Builder.CreateCall(NewFn, Args); 3561 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3562 break; 3563 } 3564 case Intrinsic::arm_neon_vld1: 3565 case Intrinsic::arm_neon_vld2: 3566 case Intrinsic::arm_neon_vld3: 3567 case Intrinsic::arm_neon_vld4: 3568 case Intrinsic::arm_neon_vld2lane: 3569 case Intrinsic::arm_neon_vld3lane: 3570 case Intrinsic::arm_neon_vld4lane: 3571 case Intrinsic::arm_neon_vst1: 3572 case Intrinsic::arm_neon_vst2: 3573 case Intrinsic::arm_neon_vst3: 3574 case Intrinsic::arm_neon_vst4: 3575 case Intrinsic::arm_neon_vst2lane: 3576 case Intrinsic::arm_neon_vst3lane: 3577 case Intrinsic::arm_neon_vst4lane: { 3578 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3579 CI->arg_operands().end()); 3580 NewCall = Builder.CreateCall(NewFn, Args); 3581 break; 3582 } 3583 3584 case Intrinsic::bitreverse: 3585 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3586 break; 3587 3588 case Intrinsic::ctlz: 3589 case Intrinsic::cttz: 3590 assert(CI->getNumArgOperands() == 1 && 3591 "Mismatch between function args and call args"); 3592 NewCall = 3593 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3594 break; 3595 3596 case Intrinsic::objectsize: { 3597 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3598 ? Builder.getFalse() 3599 : CI->getArgOperand(2); 3600 Value *Dynamic = 3601 CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3); 3602 NewCall = Builder.CreateCall( 3603 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic}); 3604 break; 3605 } 3606 3607 case Intrinsic::ctpop: 3608 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3609 break; 3610 3611 case Intrinsic::convert_from_fp16: 3612 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3613 break; 3614 3615 case Intrinsic::dbg_value: 3616 // Upgrade from the old version that had an extra offset argument. 3617 assert(CI->getNumArgOperands() == 4); 3618 // Drop nonzero offsets instead of attempting to upgrade them. 3619 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3620 if (Offset->isZeroValue()) { 3621 NewCall = Builder.CreateCall( 3622 NewFn, 3623 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3624 break; 3625 } 3626 CI->eraseFromParent(); 3627 return; 3628 3629 case Intrinsic::x86_xop_vfrcz_ss: 3630 case Intrinsic::x86_xop_vfrcz_sd: 3631 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3632 break; 3633 3634 case Intrinsic::x86_xop_vpermil2pd: 3635 case Intrinsic::x86_xop_vpermil2ps: 3636 case Intrinsic::x86_xop_vpermil2pd_256: 3637 case Intrinsic::x86_xop_vpermil2ps_256: { 3638 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3639 CI->arg_operands().end()); 3640 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3641 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3642 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3643 NewCall = Builder.CreateCall(NewFn, Args); 3644 break; 3645 } 3646 3647 case Intrinsic::x86_sse41_ptestc: 3648 case Intrinsic::x86_sse41_ptestz: 3649 case Intrinsic::x86_sse41_ptestnzc: { 3650 // The arguments for these intrinsics used to be v4f32, and changed 3651 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3652 // So, the only thing required is a bitcast for both arguments. 3653 // First, check the arguments have the old type. 3654 Value *Arg0 = CI->getArgOperand(0); 3655 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 3656 return; 3657 3658 // Old intrinsic, add bitcasts 3659 Value *Arg1 = CI->getArgOperand(1); 3660 3661 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 3662 3663 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3664 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3665 3666 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3667 break; 3668 } 3669 3670 case Intrinsic::x86_rdtscp: { 3671 // This used to take 1 arguments. If we have no arguments, it is already 3672 // upgraded. 3673 if (CI->getNumOperands() == 0) 3674 return; 3675 3676 NewCall = Builder.CreateCall(NewFn); 3677 // Extract the second result and store it. 3678 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3679 // Cast the pointer to the right type. 3680 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3681 llvm::PointerType::getUnqual(Data->getType())); 3682 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3683 // Replace the original call result with the first result of the new call. 3684 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3685 3686 std::string Name = std::string(CI->getName()); 3687 if (!Name.empty()) { 3688 CI->setName(Name + ".old"); 3689 NewCall->setName(Name); 3690 } 3691 CI->replaceAllUsesWith(TSC); 3692 CI->eraseFromParent(); 3693 return; 3694 } 3695 3696 case Intrinsic::x86_sse41_insertps: 3697 case Intrinsic::x86_sse41_dppd: 3698 case Intrinsic::x86_sse41_dpps: 3699 case Intrinsic::x86_sse41_mpsadbw: 3700 case Intrinsic::x86_avx_dp_ps_256: 3701 case Intrinsic::x86_avx2_mpsadbw: { 3702 // Need to truncate the last argument from i32 to i8 -- this argument models 3703 // an inherently 8-bit immediate operand to these x86 instructions. 3704 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3705 CI->arg_operands().end()); 3706 3707 // Replace the last argument with a trunc. 3708 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3709 NewCall = Builder.CreateCall(NewFn, Args); 3710 break; 3711 } 3712 3713 case Intrinsic::thread_pointer: { 3714 NewCall = Builder.CreateCall(NewFn, {}); 3715 break; 3716 } 3717 3718 case Intrinsic::invariant_start: 3719 case Intrinsic::invariant_end: 3720 case Intrinsic::masked_load: 3721 case Intrinsic::masked_store: 3722 case Intrinsic::masked_gather: 3723 case Intrinsic::masked_scatter: { 3724 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3725 CI->arg_operands().end()); 3726 NewCall = Builder.CreateCall(NewFn, Args); 3727 break; 3728 } 3729 3730 case Intrinsic::memcpy: 3731 case Intrinsic::memmove: 3732 case Intrinsic::memset: { 3733 // We have to make sure that the call signature is what we're expecting. 3734 // We only want to change the old signatures by removing the alignment arg: 3735 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3736 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3737 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3738 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3739 // Note: i8*'s in the above can be any pointer type 3740 if (CI->getNumArgOperands() != 5) { 3741 DefaultCase(); 3742 return; 3743 } 3744 // Remove alignment argument (3), and add alignment attributes to the 3745 // dest/src pointers. 3746 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3747 CI->getArgOperand(2), CI->getArgOperand(4)}; 3748 NewCall = Builder.CreateCall(NewFn, Args); 3749 auto *MemCI = cast<MemIntrinsic>(NewCall); 3750 // All mem intrinsics support dest alignment. 3751 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3752 MemCI->setDestAlignment(Align->getZExtValue()); 3753 // Memcpy/Memmove also support source alignment. 3754 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3755 MTI->setSourceAlignment(Align->getZExtValue()); 3756 break; 3757 } 3758 } 3759 assert(NewCall && "Should have either set this variable or returned through " 3760 "the default case"); 3761 std::string Name = std::string(CI->getName()); 3762 if (!Name.empty()) { 3763 CI->setName(Name + ".old"); 3764 NewCall->setName(Name); 3765 } 3766 CI->replaceAllUsesWith(NewCall); 3767 CI->eraseFromParent(); 3768 } 3769 3770 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3771 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3772 3773 // Check if this function should be upgraded and get the replacement function 3774 // if there is one. 3775 Function *NewFn; 3776 if (UpgradeIntrinsicFunction(F, NewFn)) { 3777 // Replace all users of the old function with the new function or new 3778 // instructions. This is not a range loop because the call is deleted. 3779 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3780 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3781 UpgradeIntrinsicCall(CI, NewFn); 3782 3783 // Remove old function, no longer used, from the module. 3784 F->eraseFromParent(); 3785 } 3786 } 3787 3788 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3789 // Check if the tag uses struct-path aware TBAA format. 3790 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3791 return &MD; 3792 3793 auto &Context = MD.getContext(); 3794 if (MD.getNumOperands() == 3) { 3795 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3796 MDNode *ScalarType = MDNode::get(Context, Elts); 3797 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3798 Metadata *Elts2[] = {ScalarType, ScalarType, 3799 ConstantAsMetadata::get( 3800 Constant::getNullValue(Type::getInt64Ty(Context))), 3801 MD.getOperand(2)}; 3802 return MDNode::get(Context, Elts2); 3803 } 3804 // Create a MDNode <MD, MD, offset 0> 3805 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3806 Type::getInt64Ty(Context)))}; 3807 return MDNode::get(Context, Elts); 3808 } 3809 3810 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3811 Instruction *&Temp) { 3812 if (Opc != Instruction::BitCast) 3813 return nullptr; 3814 3815 Temp = nullptr; 3816 Type *SrcTy = V->getType(); 3817 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3818 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3819 LLVMContext &Context = V->getContext(); 3820 3821 // We have no information about target data layout, so we assume that 3822 // the maximum pointer size is 64bit. 3823 Type *MidTy = Type::getInt64Ty(Context); 3824 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3825 3826 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3827 } 3828 3829 return nullptr; 3830 } 3831 3832 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3833 if (Opc != Instruction::BitCast) 3834 return nullptr; 3835 3836 Type *SrcTy = C->getType(); 3837 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3838 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3839 LLVMContext &Context = C->getContext(); 3840 3841 // We have no information about target data layout, so we assume that 3842 // the maximum pointer size is 64bit. 3843 Type *MidTy = Type::getInt64Ty(Context); 3844 3845 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3846 DestTy); 3847 } 3848 3849 return nullptr; 3850 } 3851 3852 /// Check the debug info version number, if it is out-dated, drop the debug 3853 /// info. Return true if module is modified. 3854 bool llvm::UpgradeDebugInfo(Module &M) { 3855 unsigned Version = getDebugMetadataVersionFromModule(M); 3856 if (Version == DEBUG_METADATA_VERSION) { 3857 bool BrokenDebugInfo = false; 3858 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3859 report_fatal_error("Broken module found, compilation aborted!"); 3860 if (!BrokenDebugInfo) 3861 // Everything is ok. 3862 return false; 3863 else { 3864 // Diagnose malformed debug info. 3865 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3866 M.getContext().diagnose(Diag); 3867 } 3868 } 3869 bool Modified = StripDebugInfo(M); 3870 if (Modified && Version != DEBUG_METADATA_VERSION) { 3871 // Diagnose a version mismatch. 3872 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3873 M.getContext().diagnose(DiagVersion); 3874 } 3875 return Modified; 3876 } 3877 3878 /// This checks for objc retain release marker which should be upgraded. It 3879 /// returns true if module is modified. 3880 static bool UpgradeRetainReleaseMarker(Module &M) { 3881 bool Changed = false; 3882 const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker"; 3883 NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey); 3884 if (ModRetainReleaseMarker) { 3885 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3886 if (Op) { 3887 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3888 if (ID) { 3889 SmallVector<StringRef, 4> ValueComp; 3890 ID->getString().split(ValueComp, "#"); 3891 if (ValueComp.size() == 2) { 3892 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3893 ID = MDString::get(M.getContext(), NewValue); 3894 } 3895 M.addModuleFlag(Module::Error, MarkerKey, ID); 3896 M.eraseNamedMetadata(ModRetainReleaseMarker); 3897 Changed = true; 3898 } 3899 } 3900 } 3901 return Changed; 3902 } 3903 3904 void llvm::UpgradeARCRuntime(Module &M) { 3905 // This lambda converts normal function calls to ARC runtime functions to 3906 // intrinsic calls. 3907 auto UpgradeToIntrinsic = [&](const char *OldFunc, 3908 llvm::Intrinsic::ID IntrinsicFunc) { 3909 Function *Fn = M.getFunction(OldFunc); 3910 3911 if (!Fn) 3912 return; 3913 3914 Function *NewFn = llvm::Intrinsic::getDeclaration(&M, IntrinsicFunc); 3915 3916 for (auto I = Fn->user_begin(), E = Fn->user_end(); I != E;) { 3917 CallInst *CI = dyn_cast<CallInst>(*I++); 3918 if (!CI || CI->getCalledFunction() != Fn) 3919 continue; 3920 3921 IRBuilder<> Builder(CI->getParent(), CI->getIterator()); 3922 FunctionType *NewFuncTy = NewFn->getFunctionType(); 3923 SmallVector<Value *, 2> Args; 3924 3925 // Don't upgrade the intrinsic if it's not valid to bitcast the return 3926 // value to the return type of the old function. 3927 if (NewFuncTy->getReturnType() != CI->getType() && 3928 !CastInst::castIsValid(Instruction::BitCast, CI, 3929 NewFuncTy->getReturnType())) 3930 continue; 3931 3932 bool InvalidCast = false; 3933 3934 for (unsigned I = 0, E = CI->getNumArgOperands(); I != E; ++I) { 3935 Value *Arg = CI->getArgOperand(I); 3936 3937 // Bitcast argument to the parameter type of the new function if it's 3938 // not a variadic argument. 3939 if (I < NewFuncTy->getNumParams()) { 3940 // Don't upgrade the intrinsic if it's not valid to bitcast the argument 3941 // to the parameter type of the new function. 3942 if (!CastInst::castIsValid(Instruction::BitCast, Arg, 3943 NewFuncTy->getParamType(I))) { 3944 InvalidCast = true; 3945 break; 3946 } 3947 Arg = Builder.CreateBitCast(Arg, NewFuncTy->getParamType(I)); 3948 } 3949 Args.push_back(Arg); 3950 } 3951 3952 if (InvalidCast) 3953 continue; 3954 3955 // Create a call instruction that calls the new function. 3956 CallInst *NewCall = Builder.CreateCall(NewFuncTy, NewFn, Args); 3957 NewCall->setTailCallKind(cast<CallInst>(CI)->getTailCallKind()); 3958 NewCall->setName(CI->getName()); 3959 3960 // Bitcast the return value back to the type of the old call. 3961 Value *NewRetVal = Builder.CreateBitCast(NewCall, CI->getType()); 3962 3963 if (!CI->use_empty()) 3964 CI->replaceAllUsesWith(NewRetVal); 3965 CI->eraseFromParent(); 3966 } 3967 3968 if (Fn->use_empty()) 3969 Fn->eraseFromParent(); 3970 }; 3971 3972 // Unconditionally convert a call to "clang.arc.use" to a call to 3973 // "llvm.objc.clang.arc.use". 3974 UpgradeToIntrinsic("clang.arc.use", llvm::Intrinsic::objc_clang_arc_use); 3975 3976 // Upgrade the retain release marker. If there is no need to upgrade 3977 // the marker, that means either the module is already new enough to contain 3978 // new intrinsics or it is not ARC. There is no need to upgrade runtime call. 3979 if (!UpgradeRetainReleaseMarker(M)) 3980 return; 3981 3982 std::pair<const char *, llvm::Intrinsic::ID> RuntimeFuncs[] = { 3983 {"objc_autorelease", llvm::Intrinsic::objc_autorelease}, 3984 {"objc_autoreleasePoolPop", llvm::Intrinsic::objc_autoreleasePoolPop}, 3985 {"objc_autoreleasePoolPush", llvm::Intrinsic::objc_autoreleasePoolPush}, 3986 {"objc_autoreleaseReturnValue", 3987 llvm::Intrinsic::objc_autoreleaseReturnValue}, 3988 {"objc_copyWeak", llvm::Intrinsic::objc_copyWeak}, 3989 {"objc_destroyWeak", llvm::Intrinsic::objc_destroyWeak}, 3990 {"objc_initWeak", llvm::Intrinsic::objc_initWeak}, 3991 {"objc_loadWeak", llvm::Intrinsic::objc_loadWeak}, 3992 {"objc_loadWeakRetained", llvm::Intrinsic::objc_loadWeakRetained}, 3993 {"objc_moveWeak", llvm::Intrinsic::objc_moveWeak}, 3994 {"objc_release", llvm::Intrinsic::objc_release}, 3995 {"objc_retain", llvm::Intrinsic::objc_retain}, 3996 {"objc_retainAutorelease", llvm::Intrinsic::objc_retainAutorelease}, 3997 {"objc_retainAutoreleaseReturnValue", 3998 llvm::Intrinsic::objc_retainAutoreleaseReturnValue}, 3999 {"objc_retainAutoreleasedReturnValue", 4000 llvm::Intrinsic::objc_retainAutoreleasedReturnValue}, 4001 {"objc_retainBlock", llvm::Intrinsic::objc_retainBlock}, 4002 {"objc_storeStrong", llvm::Intrinsic::objc_storeStrong}, 4003 {"objc_storeWeak", llvm::Intrinsic::objc_storeWeak}, 4004 {"objc_unsafeClaimAutoreleasedReturnValue", 4005 llvm::Intrinsic::objc_unsafeClaimAutoreleasedReturnValue}, 4006 {"objc_retainedObject", llvm::Intrinsic::objc_retainedObject}, 4007 {"objc_unretainedObject", llvm::Intrinsic::objc_unretainedObject}, 4008 {"objc_unretainedPointer", llvm::Intrinsic::objc_unretainedPointer}, 4009 {"objc_retain_autorelease", llvm::Intrinsic::objc_retain_autorelease}, 4010 {"objc_sync_enter", llvm::Intrinsic::objc_sync_enter}, 4011 {"objc_sync_exit", llvm::Intrinsic::objc_sync_exit}, 4012 {"objc_arc_annotation_topdown_bbstart", 4013 llvm::Intrinsic::objc_arc_annotation_topdown_bbstart}, 4014 {"objc_arc_annotation_topdown_bbend", 4015 llvm::Intrinsic::objc_arc_annotation_topdown_bbend}, 4016 {"objc_arc_annotation_bottomup_bbstart", 4017 llvm::Intrinsic::objc_arc_annotation_bottomup_bbstart}, 4018 {"objc_arc_annotation_bottomup_bbend", 4019 llvm::Intrinsic::objc_arc_annotation_bottomup_bbend}}; 4020 4021 for (auto &I : RuntimeFuncs) 4022 UpgradeToIntrinsic(I.first, I.second); 4023 } 4024 4025 bool llvm::UpgradeModuleFlags(Module &M) { 4026 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 4027 if (!ModFlags) 4028 return false; 4029 4030 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 4031 bool HasSwiftVersionFlag = false; 4032 uint8_t SwiftMajorVersion, SwiftMinorVersion; 4033 uint32_t SwiftABIVersion; 4034 auto Int8Ty = Type::getInt8Ty(M.getContext()); 4035 auto Int32Ty = Type::getInt32Ty(M.getContext()); 4036 4037 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 4038 MDNode *Op = ModFlags->getOperand(I); 4039 if (Op->getNumOperands() != 3) 4040 continue; 4041 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 4042 if (!ID) 4043 continue; 4044 if (ID->getString() == "Objective-C Image Info Version") 4045 HasObjCFlag = true; 4046 if (ID->getString() == "Objective-C Class Properties") 4047 HasClassProperties = true; 4048 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 4049 // field was Error and now they are Max. 4050 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 4051 if (auto *Behavior = 4052 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 4053 if (Behavior->getLimitedValue() == Module::Error) { 4054 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 4055 Metadata *Ops[3] = { 4056 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 4057 MDString::get(M.getContext(), ID->getString()), 4058 Op->getOperand(2)}; 4059 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4060 Changed = true; 4061 } 4062 } 4063 } 4064 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 4065 // section name so that llvm-lto will not complain about mismatching 4066 // module flags that is functionally the same. 4067 if (ID->getString() == "Objective-C Image Info Section") { 4068 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 4069 SmallVector<StringRef, 4> ValueComp; 4070 Value->getString().split(ValueComp, " "); 4071 if (ValueComp.size() != 1) { 4072 std::string NewValue; 4073 for (auto &S : ValueComp) 4074 NewValue += S.str(); 4075 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 4076 MDString::get(M.getContext(), NewValue)}; 4077 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4078 Changed = true; 4079 } 4080 } 4081 } 4082 4083 // IRUpgrader turns a i32 type "Objective-C Garbage Collection" into i8 value. 4084 // If the higher bits are set, it adds new module flag for swift info. 4085 if (ID->getString() == "Objective-C Garbage Collection") { 4086 auto Md = dyn_cast<ConstantAsMetadata>(Op->getOperand(2)); 4087 if (Md) { 4088 assert(Md->getValue() && "Expected non-empty metadata"); 4089 auto Type = Md->getValue()->getType(); 4090 if (Type == Int8Ty) 4091 continue; 4092 unsigned Val = Md->getValue()->getUniqueInteger().getZExtValue(); 4093 if ((Val & 0xff) != Val) { 4094 HasSwiftVersionFlag = true; 4095 SwiftABIVersion = (Val & 0xff00) >> 8; 4096 SwiftMajorVersion = (Val & 0xff000000) >> 24; 4097 SwiftMinorVersion = (Val & 0xff0000) >> 16; 4098 } 4099 Metadata *Ops[3] = { 4100 ConstantAsMetadata::get(ConstantInt::get(Int32Ty,Module::Error)), 4101 Op->getOperand(1), 4102 ConstantAsMetadata::get(ConstantInt::get(Int8Ty,Val & 0xff))}; 4103 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4104 Changed = true; 4105 } 4106 } 4107 } 4108 4109 // "Objective-C Class Properties" is recently added for Objective-C. We 4110 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 4111 // flag of value 0, so we can correclty downgrade this flag when trying to 4112 // link an ObjC bitcode without this module flag with an ObjC bitcode with 4113 // this module flag. 4114 if (HasObjCFlag && !HasClassProperties) { 4115 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 4116 (uint32_t)0); 4117 Changed = true; 4118 } 4119 4120 if (HasSwiftVersionFlag) { 4121 M.addModuleFlag(Module::Error, "Swift ABI Version", 4122 SwiftABIVersion); 4123 M.addModuleFlag(Module::Error, "Swift Major Version", 4124 ConstantInt::get(Int8Ty, SwiftMajorVersion)); 4125 M.addModuleFlag(Module::Error, "Swift Minor Version", 4126 ConstantInt::get(Int8Ty, SwiftMinorVersion)); 4127 Changed = true; 4128 } 4129 4130 return Changed; 4131 } 4132 4133 void llvm::UpgradeSectionAttributes(Module &M) { 4134 auto TrimSpaces = [](StringRef Section) -> std::string { 4135 SmallVector<StringRef, 5> Components; 4136 Section.split(Components, ','); 4137 4138 SmallString<32> Buffer; 4139 raw_svector_ostream OS(Buffer); 4140 4141 for (auto Component : Components) 4142 OS << ',' << Component.trim(); 4143 4144 return std::string(OS.str().substr(1)); 4145 }; 4146 4147 for (auto &GV : M.globals()) { 4148 if (!GV.hasSection()) 4149 continue; 4150 4151 StringRef Section = GV.getSection(); 4152 4153 if (!Section.startswith("__DATA, __objc_catlist")) 4154 continue; 4155 4156 // __DATA, __objc_catlist, regular, no_dead_strip 4157 // __DATA,__objc_catlist,regular,no_dead_strip 4158 GV.setSection(TrimSpaces(Section)); 4159 } 4160 } 4161 4162 static bool isOldLoopArgument(Metadata *MD) { 4163 auto *T = dyn_cast_or_null<MDTuple>(MD); 4164 if (!T) 4165 return false; 4166 if (T->getNumOperands() < 1) 4167 return false; 4168 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 4169 if (!S) 4170 return false; 4171 return S->getString().startswith("llvm.vectorizer."); 4172 } 4173 4174 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 4175 StringRef OldPrefix = "llvm.vectorizer."; 4176 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 4177 4178 if (OldTag == "llvm.vectorizer.unroll") 4179 return MDString::get(C, "llvm.loop.interleave.count"); 4180 4181 return MDString::get( 4182 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 4183 .str()); 4184 } 4185 4186 static Metadata *upgradeLoopArgument(Metadata *MD) { 4187 auto *T = dyn_cast_or_null<MDTuple>(MD); 4188 if (!T) 4189 return MD; 4190 if (T->getNumOperands() < 1) 4191 return MD; 4192 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 4193 if (!OldTag) 4194 return MD; 4195 if (!OldTag->getString().startswith("llvm.vectorizer.")) 4196 return MD; 4197 4198 // This has an old tag. Upgrade it. 4199 SmallVector<Metadata *, 8> Ops; 4200 Ops.reserve(T->getNumOperands()); 4201 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 4202 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 4203 Ops.push_back(T->getOperand(I)); 4204 4205 return MDTuple::get(T->getContext(), Ops); 4206 } 4207 4208 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 4209 auto *T = dyn_cast<MDTuple>(&N); 4210 if (!T) 4211 return &N; 4212 4213 if (none_of(T->operands(), isOldLoopArgument)) 4214 return &N; 4215 4216 SmallVector<Metadata *, 8> Ops; 4217 Ops.reserve(T->getNumOperands()); 4218 for (Metadata *MD : T->operands()) 4219 Ops.push_back(upgradeLoopArgument(MD)); 4220 4221 return MDTuple::get(T->getContext(), Ops); 4222 } 4223 4224 std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { 4225 std::string AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64"; 4226 4227 // If X86, and the datalayout matches the expected format, add pointer size 4228 // address spaces to the datalayout. 4229 if (!Triple(TT).isX86() || DL.contains(AddrSpaces)) 4230 return std::string(DL); 4231 4232 SmallVector<StringRef, 4> Groups; 4233 Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)"); 4234 if (!R.match(DL, &Groups)) 4235 return std::string(DL); 4236 4237 SmallString<1024> Buf; 4238 std::string Res = (Groups[1] + AddrSpaces + Groups[3]).toStringRef(Buf).str(); 4239 return Res; 4240 } 4241 4242 void llvm::UpgradeFramePointerAttributes(AttrBuilder &B) { 4243 StringRef FramePointer; 4244 if (B.contains("no-frame-pointer-elim")) { 4245 // The value can be "true" or "false". 4246 for (const auto &I : B.td_attrs()) 4247 if (I.first == "no-frame-pointer-elim") 4248 FramePointer = I.second == "true" ? "all" : "none"; 4249 B.removeAttribute("no-frame-pointer-elim"); 4250 } 4251 if (B.contains("no-frame-pointer-elim-non-leaf")) { 4252 // The value is ignored. "no-frame-pointer-elim"="true" takes priority. 4253 if (FramePointer != "all") 4254 FramePointer = "non-leaf"; 4255 B.removeAttribute("no-frame-pointer-elim-non-leaf"); 4256 } 4257 4258 if (!FramePointer.empty()) 4259 B.addAttribute("frame-pointer", FramePointer); 4260 } 4261