1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the auto-upgrade helper functions. 11 // This is where deprecated IR intrinsics and other IR features are updated to 12 // current specifications. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "llvm/IR/AutoUpgrade.h" 17 #include "llvm/IR/CFG.h" 18 #include "llvm/IR/CallSite.h" 19 #include "llvm/IR/Constants.h" 20 #include "llvm/IR/DIBuilder.h" 21 #include "llvm/IR/DebugInfo.h" 22 #include "llvm/IR/DiagnosticInfo.h" 23 #include "llvm/IR/Function.h" 24 #include "llvm/IR/IRBuilder.h" 25 #include "llvm/IR/Instruction.h" 26 #include "llvm/IR/IntrinsicInst.h" 27 #include "llvm/IR/LLVMContext.h" 28 #include "llvm/IR/Module.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Support/Regex.h" 31 #include <cstring> 32 using namespace llvm; 33 34 // Upgrade the declarations of the SSE4.1 functions whose arguments have 35 // changed their type from v4f32 to v2i64. 36 static bool UpgradeSSE41Function(Function* F, Intrinsic::ID IID, 37 Function *&NewFn) { 38 // Check whether this is an old version of the function, which received 39 // v4f32 arguments. 40 Type *Arg0Type = F->getFunctionType()->getParamType(0); 41 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 42 return false; 43 44 // Yes, it's old, replace it with new version. 45 F->setName(F->getName() + ".old"); 46 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 47 return true; 48 } 49 50 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 51 // arguments have changed their type from i32 to i8. 52 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 53 Function *&NewFn) { 54 // Check that the last argument is an i32. 55 Type *LastArgType = F->getFunctionType()->getParamType( 56 F->getFunctionType()->getNumParams() - 1); 57 if (!LastArgType->isIntegerTy(32)) 58 return false; 59 60 // Move this function aside and map down. 61 F->setName(F->getName() + ".old"); 62 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 63 return true; 64 } 65 66 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 67 assert(F && "Illegal to upgrade a non-existent Function."); 68 69 // Quickly eliminate it, if it's not a candidate. 70 StringRef Name = F->getName(); 71 if (Name.size() <= 8 || !Name.startswith("llvm.")) 72 return false; 73 Name = Name.substr(5); // Strip off "llvm." 74 75 switch (Name[0]) { 76 default: break; 77 case 'a': { 78 if (Name.startswith("arm.neon.vclz")) { 79 Type* args[2] = { 80 F->arg_begin()->getType(), 81 Type::getInt1Ty(F->getContext()) 82 }; 83 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 84 // the end of the name. Change name from llvm.arm.neon.vclz.* to 85 // llvm.ctlz.* 86 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 87 NewFn = Function::Create(fType, F->getLinkage(), 88 "llvm.ctlz." + Name.substr(14), F->getParent()); 89 return true; 90 } 91 if (Name.startswith("arm.neon.vcnt")) { 92 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 93 F->arg_begin()->getType()); 94 return true; 95 } 96 Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 97 if (vldRegex.match(Name)) { 98 auto fArgs = F->getFunctionType()->params(); 99 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 100 // Can't use Intrinsic::getDeclaration here as the return types might 101 // then only be structurally equal. 102 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 103 NewFn = Function::Create(fType, F->getLinkage(), 104 "llvm." + Name + ".p0i8", F->getParent()); 105 return true; 106 } 107 Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 108 if (vstRegex.match(Name)) { 109 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 110 Intrinsic::arm_neon_vst2, 111 Intrinsic::arm_neon_vst3, 112 Intrinsic::arm_neon_vst4}; 113 114 static const Intrinsic::ID StoreLaneInts[] = { 115 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 116 Intrinsic::arm_neon_vst4lane 117 }; 118 119 auto fArgs = F->getFunctionType()->params(); 120 Type *Tys[] = {fArgs[0], fArgs[1]}; 121 if (Name.find("lane") == StringRef::npos) 122 NewFn = Intrinsic::getDeclaration(F->getParent(), 123 StoreInts[fArgs.size() - 3], Tys); 124 else 125 NewFn = Intrinsic::getDeclaration(F->getParent(), 126 StoreLaneInts[fArgs.size() - 5], Tys); 127 return true; 128 } 129 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 130 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 131 return true; 132 } 133 break; 134 } 135 136 case 'c': { 137 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 138 F->setName(Name + ".old"); 139 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 140 F->arg_begin()->getType()); 141 return true; 142 } 143 if (Name.startswith("cttz.") && F->arg_size() == 1) { 144 F->setName(Name + ".old"); 145 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 146 F->arg_begin()->getType()); 147 return true; 148 } 149 break; 150 } 151 152 case 'o': 153 // We only need to change the name to match the mangling including the 154 // address space. 155 if (F->arg_size() == 2 && Name.startswith("objectsize.")) { 156 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 157 if (F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 158 F->setName(Name + ".old"); 159 NewFn = Intrinsic::getDeclaration(F->getParent(), 160 Intrinsic::objectsize, Tys); 161 return true; 162 } 163 } 164 break; 165 166 case 's': 167 if (Name == "stackprotectorcheck") { 168 NewFn = nullptr; 169 return true; 170 } 171 172 case 'x': { 173 if (Name.startswith("x86.sse2.pcmpeq.") || 174 Name.startswith("x86.sse2.pcmpgt.") || 175 Name.startswith("x86.avx2.pcmpeq.") || 176 Name.startswith("x86.avx2.pcmpgt.") || 177 Name.startswith("x86.avx2.vbroadcast") || 178 Name.startswith("x86.avx2.pbroadcast") || 179 Name.startswith("x86.avx.vpermil.") || 180 Name.startswith("x86.sse41.pmovsx") || 181 Name == "x86.sse2.cvtdq2pd" || 182 Name == "x86.sse2.cvtps2pd" || 183 Name == "x86.avx.cvtdq2.pd.256" || 184 Name == "x86.avx.cvt.ps2.pd.256" || 185 Name == "x86.avx.vinsertf128.pd.256" || 186 Name == "x86.avx.vinsertf128.ps.256" || 187 Name == "x86.avx.vinsertf128.si.256" || 188 Name == "x86.avx2.vinserti128" || 189 Name == "x86.avx.vextractf128.pd.256" || 190 Name == "x86.avx.vextractf128.ps.256" || 191 Name == "x86.avx.vextractf128.si.256" || 192 Name == "x86.avx2.vextracti128" || 193 Name == "x86.avx.movnt.dq.256" || 194 Name == "x86.avx.movnt.pd.256" || 195 Name == "x86.avx.movnt.ps.256" || 196 Name == "x86.sse2.storel.dq" || 197 Name == "x86.sse42.crc32.64.8" || 198 Name == "x86.avx.vbroadcast.ss" || 199 Name == "x86.avx.vbroadcast.ss.256" || 200 Name == "x86.avx.vbroadcast.sd.256" || 201 Name == "x86.sse2.psll.dq" || 202 Name == "x86.sse2.psrl.dq" || 203 Name == "x86.avx2.psll.dq" || 204 Name == "x86.avx2.psrl.dq" || 205 Name == "x86.sse2.psll.dq.bs" || 206 Name == "x86.sse2.psrl.dq.bs" || 207 Name == "x86.avx2.psll.dq.bs" || 208 Name == "x86.avx2.psrl.dq.bs" || 209 Name == "x86.sse41.pblendw" || 210 Name == "x86.sse41.blendpd" || 211 Name == "x86.sse41.blendps" || 212 Name == "x86.avx.blend.pd.256" || 213 Name == "x86.avx.blend.ps.256" || 214 Name == "x86.avx2.pblendw" || 215 Name == "x86.avx2.pblendd.128" || 216 Name == "x86.avx2.pblendd.256" || 217 Name == "x86.avx2.vbroadcasti128" || 218 Name == "x86.xop.vpcmov" || 219 (Name.startswith("x86.xop.vpcom") && F->arg_size() == 2)) { 220 NewFn = nullptr; 221 return true; 222 } 223 // SSE4.1 ptest functions may have an old signature. 224 if (Name.startswith("x86.sse41.ptest")) { 225 if (Name == "x86.sse41.ptestc") 226 return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestc, NewFn); 227 if (Name == "x86.sse41.ptestz") 228 return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestz, NewFn); 229 if (Name == "x86.sse41.ptestnzc") 230 return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 231 } 232 // Several blend and other instructions with masks used the wrong number of 233 // bits. 234 if (Name == "x86.sse41.insertps") 235 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 236 NewFn); 237 if (Name == "x86.sse41.dppd") 238 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 239 NewFn); 240 if (Name == "x86.sse41.dpps") 241 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 242 NewFn); 243 if (Name == "x86.sse41.mpsadbw") 244 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 245 NewFn); 246 if (Name == "x86.avx.dp.ps.256") 247 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 248 NewFn); 249 if (Name == "x86.avx2.mpsadbw") 250 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 251 NewFn); 252 253 // frcz.ss/sd may need to have an argument dropped 254 if (Name.startswith("x86.xop.vfrcz.ss") && F->arg_size() == 2) { 255 F->setName(Name + ".old"); 256 NewFn = Intrinsic::getDeclaration(F->getParent(), 257 Intrinsic::x86_xop_vfrcz_ss); 258 return true; 259 } 260 if (Name.startswith("x86.xop.vfrcz.sd") && F->arg_size() == 2) { 261 F->setName(Name + ".old"); 262 NewFn = Intrinsic::getDeclaration(F->getParent(), 263 Intrinsic::x86_xop_vfrcz_sd); 264 return true; 265 } 266 // Fix the FMA4 intrinsics to remove the 4 267 if (Name.startswith("x86.fma4.")) { 268 F->setName("llvm.x86.fma" + Name.substr(8)); 269 NewFn = F; 270 return true; 271 } 272 break; 273 } 274 } 275 276 // This may not belong here. This function is effectively being overloaded 277 // to both detect an intrinsic which needs upgrading, and to provide the 278 // upgraded form of the intrinsic. We should perhaps have two separate 279 // functions for this. 280 return false; 281 } 282 283 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 284 NewFn = nullptr; 285 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 286 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 287 288 // Upgrade intrinsic attributes. This does not change the function. 289 if (NewFn) 290 F = NewFn; 291 if (Intrinsic::ID id = F->getIntrinsicID()) 292 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 293 return Upgraded; 294 } 295 296 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 297 // Nothing to do yet. 298 return false; 299 } 300 301 // Handles upgrading SSE2 and AVX2 PSLLDQ intrinsics by converting them 302 // to byte shuffles. 303 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, 304 Value *Op, unsigned NumLanes, 305 unsigned Shift) { 306 // Each lane is 16 bytes. 307 unsigned NumElts = NumLanes * 16; 308 309 // Bitcast from a 64-bit element type to a byte element type. 310 Op = Builder.CreateBitCast(Op, 311 VectorType::get(Type::getInt8Ty(C), NumElts), 312 "cast"); 313 // We'll be shuffling in zeroes. 314 Value *Res = ConstantVector::getSplat(NumElts, Builder.getInt8(0)); 315 316 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 317 // we'll just return the zero vector. 318 if (Shift < 16) { 319 SmallVector<Constant*, 32> Idxs; 320 // 256-bit version is split into two 16-byte lanes. 321 for (unsigned l = 0; l != NumElts; l += 16) 322 for (unsigned i = 0; i != 16; ++i) { 323 unsigned Idx = NumElts + i - Shift; 324 if (Idx < NumElts) 325 Idx -= NumElts - 16; // end of lane, switch operand. 326 Idxs.push_back(Builder.getInt32(Idx + l)); 327 } 328 329 Res = Builder.CreateShuffleVector(Res, Op, ConstantVector::get(Idxs)); 330 } 331 332 // Bitcast back to a 64-bit element type. 333 return Builder.CreateBitCast(Res, 334 VectorType::get(Type::getInt64Ty(C), 2*NumLanes), 335 "cast"); 336 } 337 338 // Handles upgrading SSE2 and AVX2 PSRLDQ intrinsics by converting them 339 // to byte shuffles. 340 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C, 341 Value *Op, unsigned NumLanes, 342 unsigned Shift) { 343 // Each lane is 16 bytes. 344 unsigned NumElts = NumLanes * 16; 345 346 // Bitcast from a 64-bit element type to a byte element type. 347 Op = Builder.CreateBitCast(Op, 348 VectorType::get(Type::getInt8Ty(C), NumElts), 349 "cast"); 350 // We'll be shuffling in zeroes. 351 Value *Res = ConstantVector::getSplat(NumElts, Builder.getInt8(0)); 352 353 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 354 // we'll just return the zero vector. 355 if (Shift < 16) { 356 SmallVector<Constant*, 32> Idxs; 357 // 256-bit version is split into two 16-byte lanes. 358 for (unsigned l = 0; l != NumElts; l += 16) 359 for (unsigned i = 0; i != 16; ++i) { 360 unsigned Idx = i + Shift; 361 if (Idx >= 16) 362 Idx += NumElts - 16; // end of lane, switch operand. 363 Idxs.push_back(Builder.getInt32(Idx + l)); 364 } 365 366 Res = Builder.CreateShuffleVector(Op, Res, ConstantVector::get(Idxs)); 367 } 368 369 // Bitcast back to a 64-bit element type. 370 return Builder.CreateBitCast(Res, 371 VectorType::get(Type::getInt64Ty(C), 2*NumLanes), 372 "cast"); 373 } 374 375 // UpgradeIntrinsicCall - Upgrade a call to an old intrinsic to be a call the 376 // upgraded intrinsic. All argument and return casting must be provided in 377 // order to seamlessly integrate with existing context. 378 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 379 Function *F = CI->getCalledFunction(); 380 LLVMContext &C = CI->getContext(); 381 IRBuilder<> Builder(C); 382 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 383 384 assert(F && "Intrinsic call is not direct?"); 385 386 if (!NewFn) { 387 // Get the Function's name. 388 StringRef Name = F->getName(); 389 390 Value *Rep; 391 // Upgrade packed integer vector compares intrinsics to compare instructions 392 if (Name.startswith("llvm.x86.sse2.pcmpeq.") || 393 Name.startswith("llvm.x86.avx2.pcmpeq.")) { 394 Rep = Builder.CreateICmpEQ(CI->getArgOperand(0), CI->getArgOperand(1), 395 "pcmpeq"); 396 // need to sign extend since icmp returns vector of i1 397 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 398 } else if (Name.startswith("llvm.x86.sse2.pcmpgt.") || 399 Name.startswith("llvm.x86.avx2.pcmpgt.")) { 400 Rep = Builder.CreateICmpSGT(CI->getArgOperand(0), CI->getArgOperand(1), 401 "pcmpgt"); 402 // need to sign extend since icmp returns vector of i1 403 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 404 } else if (Name == "llvm.x86.sse2.cvtdq2pd" || 405 Name == "llvm.x86.sse2.cvtps2pd" || 406 Name == "llvm.x86.avx.cvtdq2.pd.256" || 407 Name == "llvm.x86.avx.cvt.ps2.pd.256") { 408 // Lossless i32/float to double conversion. 409 // Extract the bottom elements if necessary and convert to double vector. 410 Value *Src = CI->getArgOperand(0); 411 VectorType *SrcTy = cast<VectorType>(Src->getType()); 412 VectorType *DstTy = cast<VectorType>(CI->getType()); 413 Rep = CI->getArgOperand(0); 414 415 unsigned NumDstElts = DstTy->getNumElements(); 416 if (NumDstElts < SrcTy->getNumElements()) { 417 assert(NumDstElts == 2 && "Unexpected vector size"); 418 const int ShuffleMask[2] = { 0, 1 }; 419 Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy), ShuffleMask); 420 } 421 422 bool Int2Double = (StringRef::npos != Name.find("cvtdq2")); 423 if (Int2Double) 424 Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd"); 425 else 426 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 427 } else if (Name == "llvm.x86.avx.movnt.dq.256" || 428 Name == "llvm.x86.avx.movnt.ps.256" || 429 Name == "llvm.x86.avx.movnt.pd.256") { 430 IRBuilder<> Builder(C); 431 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 432 433 Module *M = F->getParent(); 434 SmallVector<Metadata *, 1> Elts; 435 Elts.push_back( 436 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 437 MDNode *Node = MDNode::get(C, Elts); 438 439 Value *Arg0 = CI->getArgOperand(0); 440 Value *Arg1 = CI->getArgOperand(1); 441 442 // Convert the type of the pointer to a pointer to the stored type. 443 Value *BC = Builder.CreateBitCast(Arg0, 444 PointerType::getUnqual(Arg1->getType()), 445 "cast"); 446 StoreInst *SI = Builder.CreateStore(Arg1, BC); 447 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 448 SI->setAlignment(32); 449 450 // Remove intrinsic. 451 CI->eraseFromParent(); 452 return; 453 } else if (Name == "llvm.x86.sse2.storel.dq") { 454 IRBuilder<> Builder(C); 455 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 456 457 Value *Arg0 = CI->getArgOperand(0); 458 Value *Arg1 = CI->getArgOperand(1); 459 460 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 461 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 462 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 463 Value *BC = Builder.CreateBitCast(Arg0, 464 PointerType::getUnqual(Elt->getType()), 465 "cast"); 466 StoreInst *SI = Builder.CreateStore(Elt, BC); 467 SI->setAlignment(1); 468 469 // Remove intrinsic. 470 CI->eraseFromParent(); 471 return; 472 } else if (Name.startswith("llvm.x86.xop.vpcom")) { 473 Intrinsic::ID intID; 474 if (Name.endswith("ub")) 475 intID = Intrinsic::x86_xop_vpcomub; 476 else if (Name.endswith("uw")) 477 intID = Intrinsic::x86_xop_vpcomuw; 478 else if (Name.endswith("ud")) 479 intID = Intrinsic::x86_xop_vpcomud; 480 else if (Name.endswith("uq")) 481 intID = Intrinsic::x86_xop_vpcomuq; 482 else if (Name.endswith("b")) 483 intID = Intrinsic::x86_xop_vpcomb; 484 else if (Name.endswith("w")) 485 intID = Intrinsic::x86_xop_vpcomw; 486 else if (Name.endswith("d")) 487 intID = Intrinsic::x86_xop_vpcomd; 488 else if (Name.endswith("q")) 489 intID = Intrinsic::x86_xop_vpcomq; 490 else 491 llvm_unreachable("Unknown suffix"); 492 493 Name = Name.substr(18); // strip off "llvm.x86.xop.vpcom" 494 unsigned Imm; 495 if (Name.startswith("lt")) 496 Imm = 0; 497 else if (Name.startswith("le")) 498 Imm = 1; 499 else if (Name.startswith("gt")) 500 Imm = 2; 501 else if (Name.startswith("ge")) 502 Imm = 3; 503 else if (Name.startswith("eq")) 504 Imm = 4; 505 else if (Name.startswith("ne")) 506 Imm = 5; 507 else if (Name.startswith("false")) 508 Imm = 6; 509 else if (Name.startswith("true")) 510 Imm = 7; 511 else 512 llvm_unreachable("Unknown condition"); 513 514 Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID); 515 Rep = 516 Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1), 517 Builder.getInt8(Imm)}); 518 } else if (Name == "llvm.x86.xop.vpcmov") { 519 Value *Arg0 = CI->getArgOperand(0); 520 Value *Arg1 = CI->getArgOperand(1); 521 Value *Sel = CI->getArgOperand(2); 522 unsigned NumElts = CI->getType()->getVectorNumElements(); 523 Constant *MinusOne = ConstantVector::getSplat(NumElts, Builder.getInt64(-1)); 524 Value *NotSel = Builder.CreateXor(Sel, MinusOne); 525 Value *Sel0 = Builder.CreateAnd(Arg0, Sel); 526 Value *Sel1 = Builder.CreateAnd(Arg1, NotSel); 527 Rep = Builder.CreateOr(Sel0, Sel1); 528 } else if (Name == "llvm.x86.sse42.crc32.64.8") { 529 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 530 Intrinsic::x86_sse42_crc32_32_8); 531 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 532 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 533 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 534 } else if (Name.startswith("llvm.x86.avx.vbroadcast")) { 535 // Replace broadcasts with a series of insertelements. 536 Type *VecTy = CI->getType(); 537 Type *EltTy = VecTy->getVectorElementType(); 538 unsigned EltNum = VecTy->getVectorNumElements(); 539 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 540 EltTy->getPointerTo()); 541 Value *Load = Builder.CreateLoad(EltTy, Cast); 542 Type *I32Ty = Type::getInt32Ty(C); 543 Rep = UndefValue::get(VecTy); 544 for (unsigned I = 0; I < EltNum; ++I) 545 Rep = Builder.CreateInsertElement(Rep, Load, 546 ConstantInt::get(I32Ty, I)); 547 } else if (Name.startswith("llvm.x86.sse41.pmovsx")) { 548 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 549 VectorType *DstTy = cast<VectorType>(CI->getType()); 550 unsigned NumDstElts = DstTy->getNumElements(); 551 552 // Extract a subvector of the first NumDstElts lanes and sign extend. 553 SmallVector<int, 8> ShuffleMask; 554 for (int i = 0; i != (int)NumDstElts; ++i) 555 ShuffleMask.push_back(i); 556 557 Value *SV = Builder.CreateShuffleVector( 558 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 559 Rep = Builder.CreateSExt(SV, DstTy); 560 } else if (Name == "llvm.x86.avx2.vbroadcasti128") { 561 // Replace vbroadcasts with a vector shuffle. 562 Type *VT = VectorType::get(Type::getInt64Ty(C), 2); 563 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 564 PointerType::getUnqual(VT)); 565 Value *Load = Builder.CreateLoad(VT, Op); 566 const int Idxs[4] = { 0, 1, 0, 1 }; 567 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 568 Idxs); 569 } else if (Name.startswith("llvm.x86.avx2.pbroadcast") || 570 Name.startswith("llvm.x86.avx2.vbroadcast")) { 571 // Replace vp?broadcasts with a vector shuffle. 572 Value *Op = CI->getArgOperand(0); 573 unsigned NumElts = CI->getType()->getVectorNumElements(); 574 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); 575 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 576 Constant::getNullValue(MaskTy)); 577 } else if (Name == "llvm.x86.sse2.psll.dq") { 578 // 128-bit shift left specified in bits. 579 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 580 Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1, 581 Shift / 8); // Shift is in bits. 582 } else if (Name == "llvm.x86.sse2.psrl.dq") { 583 // 128-bit shift right specified in bits. 584 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 585 Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1, 586 Shift / 8); // Shift is in bits. 587 } else if (Name == "llvm.x86.avx2.psll.dq") { 588 // 256-bit shift left specified in bits. 589 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 590 Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2, 591 Shift / 8); // Shift is in bits. 592 } else if (Name == "llvm.x86.avx2.psrl.dq") { 593 // 256-bit shift right specified in bits. 594 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 595 Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2, 596 Shift / 8); // Shift is in bits. 597 } else if (Name == "llvm.x86.sse2.psll.dq.bs") { 598 // 128-bit shift left specified in bytes. 599 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 600 Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1, 601 Shift); 602 } else if (Name == "llvm.x86.sse2.psrl.dq.bs") { 603 // 128-bit shift right specified in bytes. 604 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 605 Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 1, 606 Shift); 607 } else if (Name == "llvm.x86.avx2.psll.dq.bs") { 608 // 256-bit shift left specified in bytes. 609 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 610 Rep = UpgradeX86PSLLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2, 611 Shift); 612 } else if (Name == "llvm.x86.avx2.psrl.dq.bs") { 613 // 256-bit shift right specified in bytes. 614 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 615 Rep = UpgradeX86PSRLDQIntrinsics(Builder, C, CI->getArgOperand(0), 2, 616 Shift); 617 } else if (Name == "llvm.x86.sse41.pblendw" || 618 Name == "llvm.x86.sse41.blendpd" || 619 Name == "llvm.x86.sse41.blendps" || 620 Name == "llvm.x86.avx.blend.pd.256" || 621 Name == "llvm.x86.avx.blend.ps.256" || 622 Name == "llvm.x86.avx2.pblendw" || 623 Name == "llvm.x86.avx2.pblendd.128" || 624 Name == "llvm.x86.avx2.pblendd.256") { 625 Value *Op0 = CI->getArgOperand(0); 626 Value *Op1 = CI->getArgOperand(1); 627 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 628 VectorType *VecTy = cast<VectorType>(CI->getType()); 629 unsigned NumElts = VecTy->getNumElements(); 630 631 SmallVector<Constant*, 16> Idxs; 632 for (unsigned i = 0; i != NumElts; ++i) { 633 unsigned Idx = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 634 Idxs.push_back(Builder.getInt32(Idx)); 635 } 636 637 Rep = Builder.CreateShuffleVector(Op0, Op1, ConstantVector::get(Idxs)); 638 } else if (Name == "llvm.x86.avx.vinsertf128.pd.256" || 639 Name == "llvm.x86.avx.vinsertf128.ps.256" || 640 Name == "llvm.x86.avx.vinsertf128.si.256" || 641 Name == "llvm.x86.avx2.vinserti128") { 642 Value *Op0 = CI->getArgOperand(0); 643 Value *Op1 = CI->getArgOperand(1); 644 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 645 VectorType *VecTy = cast<VectorType>(CI->getType()); 646 unsigned NumElts = VecTy->getNumElements(); 647 648 // Mask off the high bits of the immediate value; hardware ignores those. 649 Imm = Imm & 1; 650 651 // Extend the second operand into a vector that is twice as big. 652 Value *UndefV = UndefValue::get(Op1->getType()); 653 SmallVector<Constant*, 8> Idxs; 654 for (unsigned i = 0; i != NumElts; ++i) { 655 Idxs.push_back(Builder.getInt32(i)); 656 } 657 Rep = Builder.CreateShuffleVector(Op1, UndefV, ConstantVector::get(Idxs)); 658 659 // Insert the second operand into the first operand. 660 661 // Note that there is no guarantee that instruction lowering will actually 662 // produce a vinsertf128 instruction for the created shuffles. In 663 // particular, the 0 immediate case involves no lane changes, so it can 664 // be handled as a blend. 665 666 // Example of shuffle mask for 32-bit elements: 667 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 668 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 669 670 SmallVector<Constant*, 8> Idxs2; 671 // The low half of the result is either the low half of the 1st operand 672 // or the low half of the 2nd operand (the inserted vector). 673 for (unsigned i = 0; i != NumElts / 2; ++i) { 674 unsigned Idx = Imm ? i : (i + NumElts); 675 Idxs2.push_back(Builder.getInt32(Idx)); 676 } 677 // The high half of the result is either the low half of the 2nd operand 678 // (the inserted vector) or the high half of the 1st operand. 679 for (unsigned i = NumElts / 2; i != NumElts; ++i) { 680 unsigned Idx = Imm ? (i + NumElts / 2) : i; 681 Idxs2.push_back(Builder.getInt32(Idx)); 682 } 683 Rep = Builder.CreateShuffleVector(Op0, Rep, ConstantVector::get(Idxs2)); 684 } else if (Name == "llvm.x86.avx.vextractf128.pd.256" || 685 Name == "llvm.x86.avx.vextractf128.ps.256" || 686 Name == "llvm.x86.avx.vextractf128.si.256" || 687 Name == "llvm.x86.avx2.vextracti128") { 688 Value *Op0 = CI->getArgOperand(0); 689 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 690 VectorType *VecTy = cast<VectorType>(CI->getType()); 691 unsigned NumElts = VecTy->getNumElements(); 692 693 // Mask off the high bits of the immediate value; hardware ignores those. 694 Imm = Imm & 1; 695 696 // Get indexes for either the high half or low half of the input vector. 697 SmallVector<Constant*, 4> Idxs(NumElts); 698 for (unsigned i = 0; i != NumElts; ++i) { 699 unsigned Idx = Imm ? (i + NumElts) : i; 700 Idxs[i] = Builder.getInt32(Idx); 701 } 702 703 Value *UndefV = UndefValue::get(Op0->getType()); 704 Rep = Builder.CreateShuffleVector(Op0, UndefV, ConstantVector::get(Idxs)); 705 } else if (Name == "llvm.stackprotectorcheck") { 706 Rep = nullptr; 707 } else { 708 bool PD128 = false, PD256 = false, PS128 = false, PS256 = false; 709 if (Name == "llvm.x86.avx.vpermil.pd.256") 710 PD256 = true; 711 else if (Name == "llvm.x86.avx.vpermil.pd") 712 PD128 = true; 713 else if (Name == "llvm.x86.avx.vpermil.ps.256") 714 PS256 = true; 715 else if (Name == "llvm.x86.avx.vpermil.ps") 716 PS128 = true; 717 718 if (PD256 || PD128 || PS256 || PS128) { 719 Value *Op0 = CI->getArgOperand(0); 720 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 721 SmallVector<Constant*, 8> Idxs; 722 723 if (PD128) 724 for (unsigned i = 0; i != 2; ++i) 725 Idxs.push_back(Builder.getInt32((Imm >> i) & 0x1)); 726 else if (PD256) 727 for (unsigned l = 0; l != 4; l+=2) 728 for (unsigned i = 0; i != 2; ++i) 729 Idxs.push_back(Builder.getInt32(((Imm >> (l+i)) & 0x1) + l)); 730 else if (PS128) 731 for (unsigned i = 0; i != 4; ++i) 732 Idxs.push_back(Builder.getInt32((Imm >> (2 * i)) & 0x3)); 733 else if (PS256) 734 for (unsigned l = 0; l != 8; l+=4) 735 for (unsigned i = 0; i != 4; ++i) 736 Idxs.push_back(Builder.getInt32(((Imm >> (2 * i)) & 0x3) + l)); 737 else 738 llvm_unreachable("Unexpected function"); 739 740 Rep = Builder.CreateShuffleVector(Op0, Op0, ConstantVector::get(Idxs)); 741 } else { 742 llvm_unreachable("Unknown function for CallInst upgrade."); 743 } 744 } 745 746 if (Rep) 747 CI->replaceAllUsesWith(Rep); 748 CI->eraseFromParent(); 749 return; 750 } 751 752 std::string Name = CI->getName(); 753 if (!Name.empty()) 754 CI->setName(Name + ".old"); 755 756 switch (NewFn->getIntrinsicID()) { 757 default: 758 llvm_unreachable("Unknown function for CallInst upgrade."); 759 760 case Intrinsic::arm_neon_vld1: 761 case Intrinsic::arm_neon_vld2: 762 case Intrinsic::arm_neon_vld3: 763 case Intrinsic::arm_neon_vld4: 764 case Intrinsic::arm_neon_vld2lane: 765 case Intrinsic::arm_neon_vld3lane: 766 case Intrinsic::arm_neon_vld4lane: 767 case Intrinsic::arm_neon_vst1: 768 case Intrinsic::arm_neon_vst2: 769 case Intrinsic::arm_neon_vst3: 770 case Intrinsic::arm_neon_vst4: 771 case Intrinsic::arm_neon_vst2lane: 772 case Intrinsic::arm_neon_vst3lane: 773 case Intrinsic::arm_neon_vst4lane: { 774 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 775 CI->arg_operands().end()); 776 CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args)); 777 CI->eraseFromParent(); 778 return; 779 } 780 781 case Intrinsic::ctlz: 782 case Intrinsic::cttz: 783 assert(CI->getNumArgOperands() == 1 && 784 "Mismatch between function args and call args"); 785 CI->replaceAllUsesWith(Builder.CreateCall( 786 NewFn, {CI->getArgOperand(0), Builder.getFalse()}, Name)); 787 CI->eraseFromParent(); 788 return; 789 790 case Intrinsic::objectsize: 791 CI->replaceAllUsesWith(Builder.CreateCall( 792 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1)}, Name)); 793 CI->eraseFromParent(); 794 return; 795 796 case Intrinsic::ctpop: { 797 CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)})); 798 CI->eraseFromParent(); 799 return; 800 } 801 802 case Intrinsic::x86_xop_vfrcz_ss: 803 case Intrinsic::x86_xop_vfrcz_sd: 804 CI->replaceAllUsesWith( 805 Builder.CreateCall(NewFn, {CI->getArgOperand(1)}, Name)); 806 CI->eraseFromParent(); 807 return; 808 809 case Intrinsic::x86_sse41_ptestc: 810 case Intrinsic::x86_sse41_ptestz: 811 case Intrinsic::x86_sse41_ptestnzc: { 812 // The arguments for these intrinsics used to be v4f32, and changed 813 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 814 // So, the only thing required is a bitcast for both arguments. 815 // First, check the arguments have the old type. 816 Value *Arg0 = CI->getArgOperand(0); 817 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 818 return; 819 820 // Old intrinsic, add bitcasts 821 Value *Arg1 = CI->getArgOperand(1); 822 823 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 824 825 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 826 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 827 828 CallInst *NewCall = Builder.CreateCall(NewFn, {BC0, BC1}, Name); 829 CI->replaceAllUsesWith(NewCall); 830 CI->eraseFromParent(); 831 return; 832 } 833 834 case Intrinsic::x86_sse41_insertps: 835 case Intrinsic::x86_sse41_dppd: 836 case Intrinsic::x86_sse41_dpps: 837 case Intrinsic::x86_sse41_mpsadbw: 838 case Intrinsic::x86_avx_dp_ps_256: 839 case Intrinsic::x86_avx2_mpsadbw: { 840 // Need to truncate the last argument from i32 to i8 -- this argument models 841 // an inherently 8-bit immediate operand to these x86 instructions. 842 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 843 CI->arg_operands().end()); 844 845 // Replace the last argument with a trunc. 846 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 847 848 CallInst *NewCall = Builder.CreateCall(NewFn, Args); 849 CI->replaceAllUsesWith(NewCall); 850 CI->eraseFromParent(); 851 return; 852 } 853 854 case Intrinsic::thread_pointer: { 855 CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {})); 856 CI->eraseFromParent(); 857 return; 858 } 859 } 860 } 861 862 void llvm::UpgradeCallsToIntrinsic(Function *F) { 863 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 864 865 // Check if this function should be upgraded and get the replacement function 866 // if there is one. 867 Function *NewFn; 868 if (UpgradeIntrinsicFunction(F, NewFn)) { 869 // Replace all users of the old function with the new function or new 870 // instructions. This is not a range loop because the call is deleted. 871 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 872 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 873 UpgradeIntrinsicCall(CI, NewFn); 874 875 // Remove old function, no longer used, from the module. 876 F->eraseFromParent(); 877 } 878 } 879 880 void llvm::UpgradeInstWithTBAATag(Instruction *I) { 881 MDNode *MD = I->getMetadata(LLVMContext::MD_tbaa); 882 assert(MD && "UpgradeInstWithTBAATag should have a TBAA tag"); 883 // Check if the tag uses struct-path aware TBAA format. 884 if (isa<MDNode>(MD->getOperand(0)) && MD->getNumOperands() >= 3) 885 return; 886 887 if (MD->getNumOperands() == 3) { 888 Metadata *Elts[] = {MD->getOperand(0), MD->getOperand(1)}; 889 MDNode *ScalarType = MDNode::get(I->getContext(), Elts); 890 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 891 Metadata *Elts2[] = {ScalarType, ScalarType, 892 ConstantAsMetadata::get(Constant::getNullValue( 893 Type::getInt64Ty(I->getContext()))), 894 MD->getOperand(2)}; 895 I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts2)); 896 } else { 897 // Create a MDNode <MD, MD, offset 0> 898 Metadata *Elts[] = {MD, MD, ConstantAsMetadata::get(Constant::getNullValue( 899 Type::getInt64Ty(I->getContext())))}; 900 I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts)); 901 } 902 } 903 904 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 905 Instruction *&Temp) { 906 if (Opc != Instruction::BitCast) 907 return nullptr; 908 909 Temp = nullptr; 910 Type *SrcTy = V->getType(); 911 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 912 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 913 LLVMContext &Context = V->getContext(); 914 915 // We have no information about target data layout, so we assume that 916 // the maximum pointer size is 64bit. 917 Type *MidTy = Type::getInt64Ty(Context); 918 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 919 920 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 921 } 922 923 return nullptr; 924 } 925 926 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 927 if (Opc != Instruction::BitCast) 928 return nullptr; 929 930 Type *SrcTy = C->getType(); 931 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 932 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 933 LLVMContext &Context = C->getContext(); 934 935 // We have no information about target data layout, so we assume that 936 // the maximum pointer size is 64bit. 937 Type *MidTy = Type::getInt64Ty(Context); 938 939 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 940 DestTy); 941 } 942 943 return nullptr; 944 } 945 946 /// Check the debug info version number, if it is out-dated, drop the debug 947 /// info. Return true if module is modified. 948 bool llvm::UpgradeDebugInfo(Module &M) { 949 unsigned Version = getDebugMetadataVersionFromModule(M); 950 if (Version == DEBUG_METADATA_VERSION) 951 return false; 952 953 bool RetCode = StripDebugInfo(M); 954 if (RetCode) { 955 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 956 M.getContext().diagnose(DiagVersion); 957 } 958 return RetCode; 959 } 960 961 bool llvm::UpgradeModuleFlags(Module &M) { 962 const NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 963 if (!ModFlags) 964 return false; 965 966 bool HasObjCFlag = false, HasClassProperties = false; 967 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 968 MDNode *Op = ModFlags->getOperand(I); 969 if (Op->getNumOperands() < 2) 970 continue; 971 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 972 if (!ID) 973 continue; 974 if (ID->getString() == "Objective-C Image Info Version") 975 HasObjCFlag = true; 976 if (ID->getString() == "Objective-C Class Properties") 977 HasClassProperties = true; 978 } 979 // "Objective-C Class Properties" is recently added for Objective-C. We 980 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 981 // flag of value 0, so we can correclty report error when trying to link 982 // an ObjC bitcode without this module flag with an ObjC bitcode with this 983 // module flag. 984 if (HasObjCFlag && !HasClassProperties) { 985 M.addModuleFlag(llvm::Module::Error, "Objective-C Class Properties", 986 (uint32_t)0); 987 return true; 988 } 989 return false; 990 } 991 992 static bool isOldLoopArgument(Metadata *MD) { 993 auto *T = dyn_cast_or_null<MDTuple>(MD); 994 if (!T) 995 return false; 996 if (T->getNumOperands() < 1) 997 return false; 998 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 999 if (!S) 1000 return false; 1001 return S->getString().startswith("llvm.vectorizer."); 1002 } 1003 1004 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 1005 StringRef OldPrefix = "llvm.vectorizer."; 1006 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 1007 1008 if (OldTag == "llvm.vectorizer.unroll") 1009 return MDString::get(C, "llvm.loop.interleave.count"); 1010 1011 return MDString::get( 1012 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 1013 .str()); 1014 } 1015 1016 static Metadata *upgradeLoopArgument(Metadata *MD) { 1017 auto *T = dyn_cast_or_null<MDTuple>(MD); 1018 if (!T) 1019 return MD; 1020 if (T->getNumOperands() < 1) 1021 return MD; 1022 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 1023 if (!OldTag) 1024 return MD; 1025 if (!OldTag->getString().startswith("llvm.vectorizer.")) 1026 return MD; 1027 1028 // This has an old tag. Upgrade it. 1029 SmallVector<Metadata *, 8> Ops; 1030 Ops.reserve(T->getNumOperands()); 1031 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 1032 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 1033 Ops.push_back(T->getOperand(I)); 1034 1035 return MDTuple::get(T->getContext(), Ops); 1036 } 1037 1038 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 1039 auto *T = dyn_cast<MDTuple>(&N); 1040 if (!T) 1041 return &N; 1042 1043 if (!llvm::any_of(T->operands(), isOldLoopArgument)) 1044 return &N; 1045 1046 SmallVector<Metadata *, 8> Ops; 1047 Ops.reserve(T->getNumOperands()); 1048 for (Metadata *MD : T->operands()) 1049 Ops.push_back(upgradeLoopArgument(MD)); 1050 1051 return MDTuple::get(T->getContext(), Ops); 1052 } 1053