1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the auto-upgrade helper functions. 10 // This is where deprecated IR intrinsics and other IR features are updated to 11 // current specifications. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/IR/AutoUpgrade.h" 16 #include "llvm/ADT/StringSwitch.h" 17 #include "llvm/IR/Constants.h" 18 #include "llvm/IR/DIBuilder.h" 19 #include "llvm/IR/DebugInfo.h" 20 #include "llvm/IR/DiagnosticInfo.h" 21 #include "llvm/IR/Function.h" 22 #include "llvm/IR/IRBuilder.h" 23 #include "llvm/IR/Instruction.h" 24 #include "llvm/IR/InstVisitor.h" 25 #include "llvm/IR/IntrinsicInst.h" 26 #include "llvm/IR/IntrinsicsAArch64.h" 27 #include "llvm/IR/IntrinsicsARM.h" 28 #include "llvm/IR/IntrinsicsX86.h" 29 #include "llvm/IR/LLVMContext.h" 30 #include "llvm/IR/Module.h" 31 #include "llvm/IR/Verifier.h" 32 #include "llvm/Support/ErrorHandling.h" 33 #include "llvm/Support/Regex.h" 34 #include <cstring> 35 using namespace llvm; 36 37 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 38 39 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 40 // changed their type from v4f32 to v2i64. 41 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 42 Function *&NewFn) { 43 // Check whether this is an old version of the function, which received 44 // v4f32 arguments. 45 Type *Arg0Type = F->getFunctionType()->getParamType(0); 46 if (Arg0Type != FixedVectorType::get(Type::getFloatTy(F->getContext()), 4)) 47 return false; 48 49 // Yes, it's old, replace it with new version. 50 rename(F); 51 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 52 return true; 53 } 54 55 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 56 // arguments have changed their type from i32 to i8. 57 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 58 Function *&NewFn) { 59 // Check that the last argument is an i32. 60 Type *LastArgType = F->getFunctionType()->getParamType( 61 F->getFunctionType()->getNumParams() - 1); 62 if (!LastArgType->isIntegerTy(32)) 63 return false; 64 65 // Move this function aside and map down. 66 rename(F); 67 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 68 return true; 69 } 70 71 // Upgrade the declaration of fp compare intrinsics that change return type 72 // from scalar to vXi1 mask. 73 static bool UpgradeX86MaskedFPCompare(Function *F, Intrinsic::ID IID, 74 Function *&NewFn) { 75 // Check if the return type is a vector. 76 if (F->getReturnType()->isVectorTy()) 77 return false; 78 79 rename(F); 80 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 81 return true; 82 } 83 84 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 85 // All of the intrinsics matches below should be marked with which llvm 86 // version started autoupgrading them. At some point in the future we would 87 // like to use this information to remove upgrade code for some older 88 // intrinsics. It is currently undecided how we will determine that future 89 // point. 90 if (Name == "addcarryx.u32" || // Added in 8.0 91 Name == "addcarryx.u64" || // Added in 8.0 92 Name == "addcarry.u32" || // Added in 8.0 93 Name == "addcarry.u64" || // Added in 8.0 94 Name == "subborrow.u32" || // Added in 8.0 95 Name == "subborrow.u64" || // Added in 8.0 96 Name.startswith("sse2.padds.") || // Added in 8.0 97 Name.startswith("sse2.psubs.") || // Added in 8.0 98 Name.startswith("sse2.paddus.") || // Added in 8.0 99 Name.startswith("sse2.psubus.") || // Added in 8.0 100 Name.startswith("avx2.padds.") || // Added in 8.0 101 Name.startswith("avx2.psubs.") || // Added in 8.0 102 Name.startswith("avx2.paddus.") || // Added in 8.0 103 Name.startswith("avx2.psubus.") || // Added in 8.0 104 Name.startswith("avx512.padds.") || // Added in 8.0 105 Name.startswith("avx512.psubs.") || // Added in 8.0 106 Name.startswith("avx512.mask.padds.") || // Added in 8.0 107 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 108 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 109 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 110 Name=="ssse3.pabs.b.128" || // Added in 6.0 111 Name=="ssse3.pabs.w.128" || // Added in 6.0 112 Name=="ssse3.pabs.d.128" || // Added in 6.0 113 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 114 Name.startswith("fma.vfmadd.") || // Added in 7.0 115 Name.startswith("fma.vfmsub.") || // Added in 7.0 116 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 117 Name.startswith("fma.vfnmadd.") || // Added in 7.0 118 Name.startswith("fma.vfnmsub.") || // Added in 7.0 119 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 120 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 121 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 122 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 123 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 124 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 125 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 126 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 127 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 128 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 129 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 130 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 131 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 132 Name.startswith("avx512.kunpck") || //added in 6.0 133 Name.startswith("avx2.pabs.") || // Added in 6.0 134 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 135 Name.startswith("avx512.broadcastm") || // Added in 6.0 136 Name == "sse.sqrt.ss" || // Added in 7.0 137 Name == "sse2.sqrt.sd" || // Added in 7.0 138 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 139 Name.startswith("avx.sqrt.p") || // Added in 7.0 140 Name.startswith("sse2.sqrt.p") || // Added in 7.0 141 Name.startswith("sse.sqrt.p") || // Added in 7.0 142 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 143 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 144 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 145 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 146 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 147 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 148 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 149 Name.startswith("avx.vperm2f128.") || // Added in 6.0 150 Name == "avx2.vperm2i128" || // Added in 6.0 151 Name == "sse.add.ss" || // Added in 4.0 152 Name == "sse2.add.sd" || // Added in 4.0 153 Name == "sse.sub.ss" || // Added in 4.0 154 Name == "sse2.sub.sd" || // Added in 4.0 155 Name == "sse.mul.ss" || // Added in 4.0 156 Name == "sse2.mul.sd" || // Added in 4.0 157 Name == "sse.div.ss" || // Added in 4.0 158 Name == "sse2.div.sd" || // Added in 4.0 159 Name == "sse41.pmaxsb" || // Added in 3.9 160 Name == "sse2.pmaxs.w" || // Added in 3.9 161 Name == "sse41.pmaxsd" || // Added in 3.9 162 Name == "sse2.pmaxu.b" || // Added in 3.9 163 Name == "sse41.pmaxuw" || // Added in 3.9 164 Name == "sse41.pmaxud" || // Added in 3.9 165 Name == "sse41.pminsb" || // Added in 3.9 166 Name == "sse2.pmins.w" || // Added in 3.9 167 Name == "sse41.pminsd" || // Added in 3.9 168 Name == "sse2.pminu.b" || // Added in 3.9 169 Name == "sse41.pminuw" || // Added in 3.9 170 Name == "sse41.pminud" || // Added in 3.9 171 Name == "avx512.kand.w" || // Added in 7.0 172 Name == "avx512.kandn.w" || // Added in 7.0 173 Name == "avx512.knot.w" || // Added in 7.0 174 Name == "avx512.kor.w" || // Added in 7.0 175 Name == "avx512.kxor.w" || // Added in 7.0 176 Name == "avx512.kxnor.w" || // Added in 7.0 177 Name == "avx512.kortestc.w" || // Added in 7.0 178 Name == "avx512.kortestz.w" || // Added in 7.0 179 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 180 Name.startswith("avx2.pmax") || // Added in 3.9 181 Name.startswith("avx2.pmin") || // Added in 3.9 182 Name.startswith("avx512.mask.pmax") || // Added in 4.0 183 Name.startswith("avx512.mask.pmin") || // Added in 4.0 184 Name.startswith("avx2.vbroadcast") || // Added in 3.8 185 Name.startswith("avx2.pbroadcast") || // Added in 3.8 186 Name.startswith("avx.vpermil.") || // Added in 3.1 187 Name.startswith("sse2.pshuf") || // Added in 3.9 188 Name.startswith("avx512.pbroadcast") || // Added in 3.9 189 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 190 Name.startswith("avx512.mask.movddup") || // Added in 3.9 191 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 192 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 193 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 194 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 195 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 196 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 197 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 198 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 199 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 200 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 201 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 202 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 203 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 204 Name.startswith("avx512.mask.pand.") || // Added in 3.9 205 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 206 Name.startswith("avx512.mask.por.") || // Added in 3.9 207 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 208 Name.startswith("avx512.mask.and.") || // Added in 3.9 209 Name.startswith("avx512.mask.andn.") || // Added in 3.9 210 Name.startswith("avx512.mask.or.") || // Added in 3.9 211 Name.startswith("avx512.mask.xor.") || // Added in 3.9 212 Name.startswith("avx512.mask.padd.") || // Added in 4.0 213 Name.startswith("avx512.mask.psub.") || // Added in 4.0 214 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 215 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 216 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 217 Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0 218 Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0 219 Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0 220 Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0 221 Name == "avx512.mask.vcvtph2ps.128" || // Added in 11.0 222 Name == "avx512.mask.vcvtph2ps.256" || // Added in 11.0 223 Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0 224 Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0 225 Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0 226 Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0 227 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 228 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 229 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 230 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 231 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 232 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 233 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 234 Name == "avx512.cvtusi2sd" || // Added in 7.0 235 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 236 Name == "sse2.pmulu.dq" || // Added in 7.0 237 Name == "sse41.pmuldq" || // Added in 7.0 238 Name == "avx2.pmulu.dq" || // Added in 7.0 239 Name == "avx2.pmul.dq" || // Added in 7.0 240 Name == "avx512.pmulu.dq.512" || // Added in 7.0 241 Name == "avx512.pmul.dq.512" || // Added in 7.0 242 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 243 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 244 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 245 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 246 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 247 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 248 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 249 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 250 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 251 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 252 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 253 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 254 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 255 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 256 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 257 Name.startswith("avx512.cmp.p") || // Added in 12.0 258 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 259 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 260 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 261 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 262 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 263 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 264 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 265 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 266 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 267 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 268 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 269 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 270 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 271 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 272 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 273 Name.startswith("avx512.mask.pslli") || // Added in 4.0 274 Name.startswith("avx512.mask.psrai") || // Added in 4.0 275 Name.startswith("avx512.mask.psrli") || // Added in 4.0 276 Name.startswith("avx512.mask.psllv") || // Added in 4.0 277 Name.startswith("avx512.mask.psrav") || // Added in 4.0 278 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 279 Name.startswith("sse41.pmovsx") || // Added in 3.8 280 Name.startswith("sse41.pmovzx") || // Added in 3.9 281 Name.startswith("avx2.pmovsx") || // Added in 3.9 282 Name.startswith("avx2.pmovzx") || // Added in 3.9 283 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 284 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 285 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 286 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 287 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 289 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 290 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 291 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 292 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 293 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 294 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 295 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 296 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 297 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 298 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 299 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 300 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 301 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 302 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 303 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 304 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 305 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 306 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 307 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 308 Name.startswith("avx512.vpshld.") || // Added in 8.0 309 Name.startswith("avx512.vpshrd.") || // Added in 8.0 310 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 311 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 312 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 313 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 314 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 315 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 316 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 317 Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0 318 Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0 319 Name.startswith("avx512.mask.conflict.") || // Added in 9.0 320 Name == "avx512.mask.pmov.qd.256" || // Added in 9.0 321 Name == "avx512.mask.pmov.qd.512" || // Added in 9.0 322 Name == "avx512.mask.pmov.wb.256" || // Added in 9.0 323 Name == "avx512.mask.pmov.wb.512" || // Added in 9.0 324 Name == "sse.cvtsi2ss" || // Added in 7.0 325 Name == "sse.cvtsi642ss" || // Added in 7.0 326 Name == "sse2.cvtsi2sd" || // Added in 7.0 327 Name == "sse2.cvtsi642sd" || // Added in 7.0 328 Name == "sse2.cvtss2sd" || // Added in 7.0 329 Name == "sse2.cvtdq2pd" || // Added in 3.9 330 Name == "sse2.cvtdq2ps" || // Added in 7.0 331 Name == "sse2.cvtps2pd" || // Added in 3.9 332 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 333 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 334 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 335 Name.startswith("vcvtph2ps.") || // Added in 11.0 336 Name.startswith("avx.vinsertf128.") || // Added in 3.7 337 Name == "avx2.vinserti128" || // Added in 3.7 338 Name.startswith("avx512.mask.insert") || // Added in 4.0 339 Name.startswith("avx.vextractf128.") || // Added in 3.7 340 Name == "avx2.vextracti128" || // Added in 3.7 341 Name.startswith("avx512.mask.vextract") || // Added in 4.0 342 Name.startswith("sse4a.movnt.") || // Added in 3.9 343 Name.startswith("avx.movnt.") || // Added in 3.2 344 Name.startswith("avx512.storent.") || // Added in 3.9 345 Name == "sse41.movntdqa" || // Added in 5.0 346 Name == "avx2.movntdqa" || // Added in 5.0 347 Name == "avx512.movntdqa" || // Added in 5.0 348 Name == "sse2.storel.dq" || // Added in 3.9 349 Name.startswith("sse.storeu.") || // Added in 3.9 350 Name.startswith("sse2.storeu.") || // Added in 3.9 351 Name.startswith("avx.storeu.") || // Added in 3.9 352 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 353 Name.startswith("avx512.mask.store.p") || // Added in 3.9 354 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 355 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 356 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 357 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 358 Name == "avx512.mask.store.ss" || // Added in 7.0 359 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 360 Name.startswith("avx512.mask.load.") || // Added in 3.9 361 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 362 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 363 Name.startswith("avx512.mask.expand.b") || // Added in 9.0 364 Name.startswith("avx512.mask.expand.w") || // Added in 9.0 365 Name.startswith("avx512.mask.expand.d") || // Added in 9.0 366 Name.startswith("avx512.mask.expand.q") || // Added in 9.0 367 Name.startswith("avx512.mask.expand.p") || // Added in 9.0 368 Name.startswith("avx512.mask.compress.b") || // Added in 9.0 369 Name.startswith("avx512.mask.compress.w") || // Added in 9.0 370 Name.startswith("avx512.mask.compress.d") || // Added in 9.0 371 Name.startswith("avx512.mask.compress.q") || // Added in 9.0 372 Name.startswith("avx512.mask.compress.p") || // Added in 9.0 373 Name == "sse42.crc32.64.8" || // Added in 3.4 374 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 375 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 376 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 377 Name.startswith("avx512.mask.valign.") || // Added in 4.0 378 Name.startswith("sse2.psll.dq") || // Added in 3.7 379 Name.startswith("sse2.psrl.dq") || // Added in 3.7 380 Name.startswith("avx2.psll.dq") || // Added in 3.7 381 Name.startswith("avx2.psrl.dq") || // Added in 3.7 382 Name.startswith("avx512.psll.dq") || // Added in 3.9 383 Name.startswith("avx512.psrl.dq") || // Added in 3.9 384 Name == "sse41.pblendw" || // Added in 3.7 385 Name.startswith("sse41.blendp") || // Added in 3.7 386 Name.startswith("avx.blend.p") || // Added in 3.7 387 Name == "avx2.pblendw" || // Added in 3.7 388 Name.startswith("avx2.pblendd.") || // Added in 3.7 389 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 390 Name == "avx2.vbroadcasti128" || // Added in 3.7 391 Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0 392 Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0 393 Name.startswith("avx512.mask.broadcastf32x8.") || // Added in 6.0 394 Name.startswith("avx512.mask.broadcastf64x4.") || // Added in 6.0 395 Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0 396 Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0 397 Name.startswith("avx512.mask.broadcasti32x8.") || // Added in 6.0 398 Name.startswith("avx512.mask.broadcasti64x4.") || // Added in 6.0 399 Name == "xop.vpcmov" || // Added in 3.8 400 Name == "xop.vpcmov.256" || // Added in 5.0 401 Name.startswith("avx512.mask.move.s") || // Added in 4.0 402 Name.startswith("avx512.cvtmask2") || // Added in 5.0 403 Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0 404 Name.startswith("xop.vprot") || // Added in 8.0 405 Name.startswith("avx512.prol") || // Added in 8.0 406 Name.startswith("avx512.pror") || // Added in 8.0 407 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 408 Name.startswith("avx512.mask.pror.") || // Added in 8.0 409 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 410 Name.startswith("avx512.mask.prol.") || // Added in 8.0 411 Name.startswith("avx512.ptestm") || //Added in 6.0 412 Name.startswith("avx512.ptestnm") || //Added in 6.0 413 Name.startswith("avx512.mask.pavg")) // Added in 6.0 414 return true; 415 416 return false; 417 } 418 419 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 420 Function *&NewFn) { 421 // Only handle intrinsics that start with "x86.". 422 if (!Name.startswith("x86.")) 423 return false; 424 // Remove "x86." prefix. 425 Name = Name.substr(4); 426 427 if (ShouldUpgradeX86Intrinsic(F, Name)) { 428 NewFn = nullptr; 429 return true; 430 } 431 432 if (Name == "rdtscp") { // Added in 8.0 433 // If this intrinsic has 0 operands, it's the new version. 434 if (F->getFunctionType()->getNumParams() == 0) 435 return false; 436 437 rename(F); 438 NewFn = Intrinsic::getDeclaration(F->getParent(), 439 Intrinsic::x86_rdtscp); 440 return true; 441 } 442 443 // SSE4.1 ptest functions may have an old signature. 444 if (Name.startswith("sse41.ptest")) { // Added in 3.2 445 if (Name.substr(11) == "c") 446 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 447 if (Name.substr(11) == "z") 448 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 449 if (Name.substr(11) == "nzc") 450 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 451 } 452 // Several blend and other instructions with masks used the wrong number of 453 // bits. 454 if (Name == "sse41.insertps") // Added in 3.6 455 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 456 NewFn); 457 if (Name == "sse41.dppd") // Added in 3.6 458 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 459 NewFn); 460 if (Name == "sse41.dpps") // Added in 3.6 461 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 462 NewFn); 463 if (Name == "sse41.mpsadbw") // Added in 3.6 464 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 465 NewFn); 466 if (Name == "avx.dp.ps.256") // Added in 3.6 467 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 468 NewFn); 469 if (Name == "avx2.mpsadbw") // Added in 3.6 470 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 471 NewFn); 472 if (Name == "avx512.mask.cmp.pd.128") // Added in 7.0 473 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_128, 474 NewFn); 475 if (Name == "avx512.mask.cmp.pd.256") // Added in 7.0 476 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_256, 477 NewFn); 478 if (Name == "avx512.mask.cmp.pd.512") // Added in 7.0 479 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_512, 480 NewFn); 481 if (Name == "avx512.mask.cmp.ps.128") // Added in 7.0 482 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_128, 483 NewFn); 484 if (Name == "avx512.mask.cmp.ps.256") // Added in 7.0 485 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_256, 486 NewFn); 487 if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0 488 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_512, 489 NewFn); 490 491 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 492 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 493 rename(F); 494 NewFn = Intrinsic::getDeclaration(F->getParent(), 495 Intrinsic::x86_xop_vfrcz_ss); 496 return true; 497 } 498 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 499 rename(F); 500 NewFn = Intrinsic::getDeclaration(F->getParent(), 501 Intrinsic::x86_xop_vfrcz_sd); 502 return true; 503 } 504 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 505 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 506 auto Idx = F->getFunctionType()->getParamType(2); 507 if (Idx->isFPOrFPVectorTy()) { 508 rename(F); 509 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 510 unsigned EltSize = Idx->getScalarSizeInBits(); 511 Intrinsic::ID Permil2ID; 512 if (EltSize == 64 && IdxSize == 128) 513 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 514 else if (EltSize == 32 && IdxSize == 128) 515 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 516 else if (EltSize == 64 && IdxSize == 256) 517 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 518 else 519 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 520 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 521 return true; 522 } 523 } 524 525 if (Name == "seh.recoverfp") { 526 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp); 527 return true; 528 } 529 530 return false; 531 } 532 533 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 534 assert(F && "Illegal to upgrade a non-existent Function."); 535 536 // Quickly eliminate it, if it's not a candidate. 537 StringRef Name = F->getName(); 538 if (Name.size() <= 8 || !Name.startswith("llvm.")) 539 return false; 540 Name = Name.substr(5); // Strip off "llvm." 541 542 switch (Name[0]) { 543 default: break; 544 case 'a': { 545 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 546 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 547 F->arg_begin()->getType()); 548 return true; 549 } 550 if (Name.startswith("arm.neon.vclz")) { 551 Type* args[2] = { 552 F->arg_begin()->getType(), 553 Type::getInt1Ty(F->getContext()) 554 }; 555 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 556 // the end of the name. Change name from llvm.arm.neon.vclz.* to 557 // llvm.ctlz.* 558 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 559 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 560 "llvm.ctlz." + Name.substr(14), F->getParent()); 561 return true; 562 } 563 if (Name.startswith("arm.neon.vcnt")) { 564 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 565 F->arg_begin()->getType()); 566 return true; 567 } 568 static const Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 569 if (vldRegex.match(Name)) { 570 auto fArgs = F->getFunctionType()->params(); 571 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 572 // Can't use Intrinsic::getDeclaration here as the return types might 573 // then only be structurally equal. 574 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 575 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 576 "llvm." + Name + ".p0i8", F->getParent()); 577 return true; 578 } 579 static const Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 580 if (vstRegex.match(Name)) { 581 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 582 Intrinsic::arm_neon_vst2, 583 Intrinsic::arm_neon_vst3, 584 Intrinsic::arm_neon_vst4}; 585 586 static const Intrinsic::ID StoreLaneInts[] = { 587 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 588 Intrinsic::arm_neon_vst4lane 589 }; 590 591 auto fArgs = F->getFunctionType()->params(); 592 Type *Tys[] = {fArgs[0], fArgs[1]}; 593 if (Name.find("lane") == StringRef::npos) 594 NewFn = Intrinsic::getDeclaration(F->getParent(), 595 StoreInts[fArgs.size() - 3], Tys); 596 else 597 NewFn = Intrinsic::getDeclaration(F->getParent(), 598 StoreLaneInts[fArgs.size() - 5], Tys); 599 return true; 600 } 601 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 602 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 603 return true; 604 } 605 if (Name.startswith("arm.neon.vqadds.")) { 606 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sadd_sat, 607 F->arg_begin()->getType()); 608 return true; 609 } 610 if (Name.startswith("arm.neon.vqaddu.")) { 611 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::uadd_sat, 612 F->arg_begin()->getType()); 613 return true; 614 } 615 if (Name.startswith("arm.neon.vqsubs.")) { 616 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ssub_sat, 617 F->arg_begin()->getType()); 618 return true; 619 } 620 if (Name.startswith("arm.neon.vqsubu.")) { 621 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::usub_sat, 622 F->arg_begin()->getType()); 623 return true; 624 } 625 if (Name.startswith("aarch64.neon.addp")) { 626 if (F->arg_size() != 2) 627 break; // Invalid IR. 628 VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); 629 if (Ty && Ty->getElementType()->isFloatingPointTy()) { 630 NewFn = Intrinsic::getDeclaration(F->getParent(), 631 Intrinsic::aarch64_neon_faddp, Ty); 632 return true; 633 } 634 } 635 636 // Changed in 12.0: bfdot accept v4bf16 and v8bf16 instead of v8i8 and v16i8 637 // respectively 638 if ((Name.startswith("arm.neon.bfdot.") || 639 Name.startswith("aarch64.neon.bfdot.")) && 640 Name.endswith("i8")) { 641 Intrinsic::ID IID = 642 StringSwitch<Intrinsic::ID>(Name) 643 .Cases("arm.neon.bfdot.v2f32.v8i8", 644 "arm.neon.bfdot.v4f32.v16i8", 645 Intrinsic::arm_neon_bfdot) 646 .Cases("aarch64.neon.bfdot.v2f32.v8i8", 647 "aarch64.neon.bfdot.v4f32.v16i8", 648 Intrinsic::aarch64_neon_bfdot) 649 .Default(Intrinsic::not_intrinsic); 650 if (IID == Intrinsic::not_intrinsic) 651 break; 652 653 size_t OperandWidth = F->getReturnType()->getPrimitiveSizeInBits(); 654 assert((OperandWidth == 64 || OperandWidth == 128) && 655 "Unexpected operand width"); 656 LLVMContext &Ctx = F->getParent()->getContext(); 657 std::array<Type *, 2> Tys {{ 658 F->getReturnType(), 659 FixedVectorType::get(Type::getBFloatTy(Ctx), OperandWidth / 16) 660 }}; 661 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, Tys); 662 return true; 663 } 664 665 // Changed in 12.0: bfmmla, bfmlalb and bfmlalt are not polymorphic anymore 666 // and accept v8bf16 instead of v16i8 667 if ((Name.startswith("arm.neon.bfm") || 668 Name.startswith("aarch64.neon.bfm")) && 669 Name.endswith(".v4f32.v16i8")) { 670 Intrinsic::ID IID = 671 StringSwitch<Intrinsic::ID>(Name) 672 .Case("arm.neon.bfmmla.v4f32.v16i8", 673 Intrinsic::arm_neon_bfmmla) 674 .Case("arm.neon.bfmlalb.v4f32.v16i8", 675 Intrinsic::arm_neon_bfmlalb) 676 .Case("arm.neon.bfmlalt.v4f32.v16i8", 677 Intrinsic::arm_neon_bfmlalt) 678 .Case("aarch64.neon.bfmmla.v4f32.v16i8", 679 Intrinsic::aarch64_neon_bfmmla) 680 .Case("aarch64.neon.bfmlalb.v4f32.v16i8", 681 Intrinsic::aarch64_neon_bfmlalb) 682 .Case("aarch64.neon.bfmlalt.v4f32.v16i8", 683 Intrinsic::aarch64_neon_bfmlalt) 684 .Default(Intrinsic::not_intrinsic); 685 if (IID == Intrinsic::not_intrinsic) 686 break; 687 688 std::array<Type *, 0> Tys; 689 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, Tys); 690 return true; 691 } 692 break; 693 } 694 695 case 'c': { 696 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 697 rename(F); 698 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 699 F->arg_begin()->getType()); 700 return true; 701 } 702 if (Name.startswith("cttz.") && F->arg_size() == 1) { 703 rename(F); 704 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 705 F->arg_begin()->getType()); 706 return true; 707 } 708 break; 709 } 710 case 'd': { 711 if (Name == "dbg.value" && F->arg_size() == 4) { 712 rename(F); 713 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 714 return true; 715 } 716 break; 717 } 718 case 'e': { 719 SmallVector<StringRef, 2> Groups; 720 static const Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+"); 721 if (R.match(Name, &Groups)) { 722 Intrinsic::ID ID = Intrinsic::not_intrinsic; 723 if (Groups[1] == "fadd") 724 ID = Intrinsic::experimental_vector_reduce_v2_fadd; 725 if (Groups[1] == "fmul") 726 ID = Intrinsic::experimental_vector_reduce_v2_fmul; 727 728 if (ID != Intrinsic::not_intrinsic) { 729 rename(F); 730 auto Args = F->getFunctionType()->params(); 731 Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]}; 732 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys); 733 return true; 734 } 735 } 736 break; 737 } 738 case 'i': 739 case 'l': { 740 bool IsLifetimeStart = Name.startswith("lifetime.start"); 741 if (IsLifetimeStart || Name.startswith("invariant.start")) { 742 Intrinsic::ID ID = IsLifetimeStart ? 743 Intrinsic::lifetime_start : Intrinsic::invariant_start; 744 auto Args = F->getFunctionType()->params(); 745 Type* ObjectPtr[1] = {Args[1]}; 746 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 747 rename(F); 748 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 749 return true; 750 } 751 } 752 753 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 754 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 755 Intrinsic::ID ID = IsLifetimeEnd ? 756 Intrinsic::lifetime_end : Intrinsic::invariant_end; 757 758 auto Args = F->getFunctionType()->params(); 759 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 760 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 761 rename(F); 762 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 763 return true; 764 } 765 } 766 if (Name.startswith("invariant.group.barrier")) { 767 // Rename invariant.group.barrier to launder.invariant.group 768 auto Args = F->getFunctionType()->params(); 769 Type* ObjectPtr[1] = {Args[0]}; 770 rename(F); 771 NewFn = Intrinsic::getDeclaration(F->getParent(), 772 Intrinsic::launder_invariant_group, ObjectPtr); 773 return true; 774 775 } 776 777 break; 778 } 779 case 'm': { 780 if (Name.startswith("masked.load.")) { 781 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 782 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 783 rename(F); 784 NewFn = Intrinsic::getDeclaration(F->getParent(), 785 Intrinsic::masked_load, 786 Tys); 787 return true; 788 } 789 } 790 if (Name.startswith("masked.store.")) { 791 auto Args = F->getFunctionType()->params(); 792 Type *Tys[] = { Args[0], Args[1] }; 793 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 794 rename(F); 795 NewFn = Intrinsic::getDeclaration(F->getParent(), 796 Intrinsic::masked_store, 797 Tys); 798 return true; 799 } 800 } 801 // Renaming gather/scatter intrinsics with no address space overloading 802 // to the new overload which includes an address space 803 if (Name.startswith("masked.gather.")) { 804 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 805 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 806 rename(F); 807 NewFn = Intrinsic::getDeclaration(F->getParent(), 808 Intrinsic::masked_gather, Tys); 809 return true; 810 } 811 } 812 if (Name.startswith("masked.scatter.")) { 813 auto Args = F->getFunctionType()->params(); 814 Type *Tys[] = {Args[0], Args[1]}; 815 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 816 rename(F); 817 NewFn = Intrinsic::getDeclaration(F->getParent(), 818 Intrinsic::masked_scatter, Tys); 819 return true; 820 } 821 } 822 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 823 // alignment parameter to embedding the alignment as an attribute of 824 // the pointer args. 825 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 826 rename(F); 827 // Get the types of dest, src, and len 828 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 829 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 830 ParamTypes); 831 return true; 832 } 833 if (Name.startswith("memmove.") && F->arg_size() == 5) { 834 rename(F); 835 // Get the types of dest, src, and len 836 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 837 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 838 ParamTypes); 839 return true; 840 } 841 if (Name.startswith("memset.") && F->arg_size() == 5) { 842 rename(F); 843 // Get the types of dest, and len 844 const auto *FT = F->getFunctionType(); 845 Type *ParamTypes[2] = { 846 FT->getParamType(0), // Dest 847 FT->getParamType(2) // len 848 }; 849 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 850 ParamTypes); 851 return true; 852 } 853 break; 854 } 855 case 'n': { 856 if (Name.startswith("nvvm.")) { 857 Name = Name.substr(5); 858 859 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 860 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 861 .Cases("brev32", "brev64", Intrinsic::bitreverse) 862 .Case("clz.i", Intrinsic::ctlz) 863 .Case("popc.i", Intrinsic::ctpop) 864 .Default(Intrinsic::not_intrinsic); 865 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 866 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 867 {F->getReturnType()}); 868 return true; 869 } 870 871 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 872 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 873 // 874 // TODO: We could add lohi.i2d. 875 bool Expand = StringSwitch<bool>(Name) 876 .Cases("abs.i", "abs.ll", true) 877 .Cases("clz.ll", "popc.ll", "h2f", true) 878 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 879 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 880 .StartsWith("atomic.load.add.f32.p", true) 881 .StartsWith("atomic.load.add.f64.p", true) 882 .Default(false); 883 if (Expand) { 884 NewFn = nullptr; 885 return true; 886 } 887 } 888 break; 889 } 890 case 'o': 891 // We only need to change the name to match the mangling including the 892 // address space. 893 if (Name.startswith("objectsize.")) { 894 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 895 if (F->arg_size() == 2 || F->arg_size() == 3 || 896 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 897 rename(F); 898 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 899 Tys); 900 return true; 901 } 902 } 903 break; 904 905 case 'p': 906 if (Name == "prefetch") { 907 // Handle address space overloading. 908 Type *Tys[] = {F->arg_begin()->getType()}; 909 if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { 910 rename(F); 911 NewFn = 912 Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); 913 return true; 914 } 915 } 916 break; 917 918 case 's': 919 if (Name == "stackprotectorcheck") { 920 NewFn = nullptr; 921 return true; 922 } 923 break; 924 925 case 'x': 926 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 927 return true; 928 } 929 // Remangle our intrinsic since we upgrade the mangling 930 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 931 if (Result != None) { 932 NewFn = Result.getValue(); 933 return true; 934 } 935 936 // This may not belong here. This function is effectively being overloaded 937 // to both detect an intrinsic which needs upgrading, and to provide the 938 // upgraded form of the intrinsic. We should perhaps have two separate 939 // functions for this. 940 return false; 941 } 942 943 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 944 NewFn = nullptr; 945 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 946 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 947 948 // Upgrade intrinsic attributes. This does not change the function. 949 if (NewFn) 950 F = NewFn; 951 if (Intrinsic::ID id = F->getIntrinsicID()) 952 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 953 return Upgraded; 954 } 955 956 GlobalVariable *llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 957 if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" || 958 GV->getName() == "llvm.global_dtors")) || 959 !GV->hasInitializer()) 960 return nullptr; 961 ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType()); 962 if (!ATy) 963 return nullptr; 964 StructType *STy = dyn_cast<StructType>(ATy->getElementType()); 965 if (!STy || STy->getNumElements() != 2) 966 return nullptr; 967 968 LLVMContext &C = GV->getContext(); 969 IRBuilder<> IRB(C); 970 auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1), 971 IRB.getInt8PtrTy()); 972 Constant *Init = GV->getInitializer(); 973 unsigned N = Init->getNumOperands(); 974 std::vector<Constant *> NewCtors(N); 975 for (unsigned i = 0; i != N; ++i) { 976 auto Ctor = cast<Constant>(Init->getOperand(i)); 977 NewCtors[i] = ConstantStruct::get( 978 EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1), 979 Constant::getNullValue(IRB.getInt8PtrTy())); 980 } 981 Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors); 982 983 return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(), 984 NewInit, GV->getName()); 985 } 986 987 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 988 // to byte shuffles. 989 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 990 Value *Op, unsigned Shift) { 991 auto *ResultTy = cast<FixedVectorType>(Op->getType()); 992 unsigned NumElts = ResultTy->getNumElements() * 8; 993 994 // Bitcast from a 64-bit element type to a byte element type. 995 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts); 996 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 997 998 // We'll be shuffling in zeroes. 999 Value *Res = Constant::getNullValue(VecTy); 1000 1001 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 1002 // we'll just return the zero vector. 1003 if (Shift < 16) { 1004 int Idxs[64]; 1005 // 256/512-bit version is split into 2/4 16-byte lanes. 1006 for (unsigned l = 0; l != NumElts; l += 16) 1007 for (unsigned i = 0; i != 16; ++i) { 1008 unsigned Idx = NumElts + i - Shift; 1009 if (Idx < NumElts) 1010 Idx -= NumElts - 16; // end of lane, switch operand. 1011 Idxs[l + i] = Idx + l; 1012 } 1013 1014 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 1015 } 1016 1017 // Bitcast back to a 64-bit element type. 1018 return Builder.CreateBitCast(Res, ResultTy, "cast"); 1019 } 1020 1021 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 1022 // to byte shuffles. 1023 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 1024 unsigned Shift) { 1025 auto *ResultTy = cast<FixedVectorType>(Op->getType()); 1026 unsigned NumElts = ResultTy->getNumElements() * 8; 1027 1028 // Bitcast from a 64-bit element type to a byte element type. 1029 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts); 1030 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 1031 1032 // We'll be shuffling in zeroes. 1033 Value *Res = Constant::getNullValue(VecTy); 1034 1035 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 1036 // we'll just return the zero vector. 1037 if (Shift < 16) { 1038 int Idxs[64]; 1039 // 256/512-bit version is split into 2/4 16-byte lanes. 1040 for (unsigned l = 0; l != NumElts; l += 16) 1041 for (unsigned i = 0; i != 16; ++i) { 1042 unsigned Idx = i + Shift; 1043 if (Idx >= 16) 1044 Idx += NumElts - 16; // end of lane, switch operand. 1045 Idxs[l + i] = Idx + l; 1046 } 1047 1048 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 1049 } 1050 1051 // Bitcast back to a 64-bit element type. 1052 return Builder.CreateBitCast(Res, ResultTy, "cast"); 1053 } 1054 1055 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 1056 unsigned NumElts) { 1057 assert(isPowerOf2_32(NumElts) && "Expected power-of-2 mask elements"); 1058 llvm::VectorType *MaskTy = FixedVectorType::get( 1059 Builder.getInt1Ty(), cast<IntegerType>(Mask->getType())->getBitWidth()); 1060 Mask = Builder.CreateBitCast(Mask, MaskTy); 1061 1062 // If we have less than 8 elements (1, 2 or 4), then the starting mask was an 1063 // i8 and we need to extract down to the right number of elements. 1064 if (NumElts <= 4) { 1065 int Indices[4]; 1066 for (unsigned i = 0; i != NumElts; ++i) 1067 Indices[i] = i; 1068 Mask = Builder.CreateShuffleVector( 1069 Mask, Mask, makeArrayRef(Indices, NumElts), "extract"); 1070 } 1071 1072 return Mask; 1073 } 1074 1075 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 1076 Value *Op0, Value *Op1) { 1077 // If the mask is all ones just emit the first operation. 1078 if (const auto *C = dyn_cast<Constant>(Mask)) 1079 if (C->isAllOnesValue()) 1080 return Op0; 1081 1082 Mask = getX86MaskVec(Builder, Mask, 1083 cast<FixedVectorType>(Op0->getType())->getNumElements()); 1084 return Builder.CreateSelect(Mask, Op0, Op1); 1085 } 1086 1087 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 1088 Value *Op0, Value *Op1) { 1089 // If the mask is all ones just emit the first operation. 1090 if (const auto *C = dyn_cast<Constant>(Mask)) 1091 if (C->isAllOnesValue()) 1092 return Op0; 1093 1094 auto *MaskTy = FixedVectorType::get(Builder.getInt1Ty(), 1095 Mask->getType()->getIntegerBitWidth()); 1096 Mask = Builder.CreateBitCast(Mask, MaskTy); 1097 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 1098 return Builder.CreateSelect(Mask, Op0, Op1); 1099 } 1100 1101 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 1102 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 1103 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 1104 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 1105 Value *Op1, Value *Shift, 1106 Value *Passthru, Value *Mask, 1107 bool IsVALIGN) { 1108 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 1109 1110 unsigned NumElts = cast<FixedVectorType>(Op0->getType())->getNumElements(); 1111 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 1112 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 1113 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 1114 1115 // Mask the immediate for VALIGN. 1116 if (IsVALIGN) 1117 ShiftVal &= (NumElts - 1); 1118 1119 // If palignr is shifting the pair of vectors more than the size of two 1120 // lanes, emit zero. 1121 if (ShiftVal >= 32) 1122 return llvm::Constant::getNullValue(Op0->getType()); 1123 1124 // If palignr is shifting the pair of input vectors more than one lane, 1125 // but less than two lanes, convert to shifting in zeroes. 1126 if (ShiftVal > 16) { 1127 ShiftVal -= 16; 1128 Op1 = Op0; 1129 Op0 = llvm::Constant::getNullValue(Op0->getType()); 1130 } 1131 1132 int Indices[64]; 1133 // 256-bit palignr operates on 128-bit lanes so we need to handle that 1134 for (unsigned l = 0; l < NumElts; l += 16) { 1135 for (unsigned i = 0; i != 16; ++i) { 1136 unsigned Idx = ShiftVal + i; 1137 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 1138 Idx += NumElts - 16; // End of lane, switch operand. 1139 Indices[l + i] = Idx + l; 1140 } 1141 } 1142 1143 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 1144 makeArrayRef(Indices, NumElts), 1145 "palignr"); 1146 1147 return EmitX86Select(Builder, Mask, Align, Passthru); 1148 } 1149 1150 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 1151 bool ZeroMask, bool IndexForm) { 1152 Type *Ty = CI.getType(); 1153 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 1154 unsigned EltWidth = Ty->getScalarSizeInBits(); 1155 bool IsFloat = Ty->isFPOrFPVectorTy(); 1156 Intrinsic::ID IID; 1157 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 1158 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 1159 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 1160 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 1161 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 1162 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 1163 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 1164 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 1165 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1166 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 1167 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1168 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 1169 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1170 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 1171 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1172 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 1173 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1174 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 1175 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1176 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 1177 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1178 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 1179 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1180 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 1181 else if (VecWidth == 128 && EltWidth == 16) 1182 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 1183 else if (VecWidth == 256 && EltWidth == 16) 1184 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 1185 else if (VecWidth == 512 && EltWidth == 16) 1186 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 1187 else if (VecWidth == 128 && EltWidth == 8) 1188 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 1189 else if (VecWidth == 256 && EltWidth == 8) 1190 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 1191 else if (VecWidth == 512 && EltWidth == 8) 1192 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 1193 else 1194 llvm_unreachable("Unexpected intrinsic"); 1195 1196 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 1197 CI.getArgOperand(2) }; 1198 1199 // If this isn't index form we need to swap operand 0 and 1. 1200 if (!IndexForm) 1201 std::swap(Args[0], Args[1]); 1202 1203 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1204 Args); 1205 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 1206 : Builder.CreateBitCast(CI.getArgOperand(1), 1207 Ty); 1208 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1209 } 1210 1211 static Value *UpgradeX86BinaryIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1212 Intrinsic::ID IID) { 1213 Type *Ty = CI.getType(); 1214 Value *Op0 = CI.getOperand(0); 1215 Value *Op1 = CI.getOperand(1); 1216 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1217 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1218 1219 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1220 Value *VecSrc = CI.getOperand(2); 1221 Value *Mask = CI.getOperand(3); 1222 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1223 } 1224 return Res; 1225 } 1226 1227 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1228 bool IsRotateRight) { 1229 Type *Ty = CI.getType(); 1230 Value *Src = CI.getArgOperand(0); 1231 Value *Amt = CI.getArgOperand(1); 1232 1233 // Amount may be scalar immediate, in which case create a splat vector. 1234 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1235 // we only care about the lowest log2 bits anyway. 1236 if (Amt->getType() != Ty) { 1237 unsigned NumElts = cast<FixedVectorType>(Ty)->getNumElements(); 1238 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1239 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1240 } 1241 1242 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1243 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1244 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1245 1246 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1247 Value *VecSrc = CI.getOperand(2); 1248 Value *Mask = CI.getOperand(3); 1249 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1250 } 1251 return Res; 1252 } 1253 1254 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, 1255 bool IsSigned) { 1256 Type *Ty = CI.getType(); 1257 Value *LHS = CI.getArgOperand(0); 1258 Value *RHS = CI.getArgOperand(1); 1259 1260 CmpInst::Predicate Pred; 1261 switch (Imm) { 1262 case 0x0: 1263 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 1264 break; 1265 case 0x1: 1266 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 1267 break; 1268 case 0x2: 1269 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 1270 break; 1271 case 0x3: 1272 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 1273 break; 1274 case 0x4: 1275 Pred = ICmpInst::ICMP_EQ; 1276 break; 1277 case 0x5: 1278 Pred = ICmpInst::ICMP_NE; 1279 break; 1280 case 0x6: 1281 return Constant::getNullValue(Ty); // FALSE 1282 case 0x7: 1283 return Constant::getAllOnesValue(Ty); // TRUE 1284 default: 1285 llvm_unreachable("Unknown XOP vpcom/vpcomu predicate"); 1286 } 1287 1288 Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS); 1289 Value *Ext = Builder.CreateSExt(Cmp, Ty); 1290 return Ext; 1291 } 1292 1293 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1294 bool IsShiftRight, bool ZeroMask) { 1295 Type *Ty = CI.getType(); 1296 Value *Op0 = CI.getArgOperand(0); 1297 Value *Op1 = CI.getArgOperand(1); 1298 Value *Amt = CI.getArgOperand(2); 1299 1300 if (IsShiftRight) 1301 std::swap(Op0, Op1); 1302 1303 // Amount may be scalar immediate, in which case create a splat vector. 1304 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1305 // we only care about the lowest log2 bits anyway. 1306 if (Amt->getType() != Ty) { 1307 unsigned NumElts = cast<FixedVectorType>(Ty)->getNumElements(); 1308 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1309 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1310 } 1311 1312 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1313 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1314 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1315 1316 unsigned NumArgs = CI.getNumArgOperands(); 1317 if (NumArgs >= 4) { // For masked intrinsics. 1318 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1319 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1320 CI.getArgOperand(0); 1321 Value *Mask = CI.getOperand(NumArgs - 1); 1322 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1323 } 1324 return Res; 1325 } 1326 1327 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1328 Value *Ptr, Value *Data, Value *Mask, 1329 bool Aligned) { 1330 // Cast the pointer to the right type. 1331 Ptr = Builder.CreateBitCast(Ptr, 1332 llvm::PointerType::getUnqual(Data->getType())); 1333 const Align Alignment = 1334 Aligned 1335 ? Align(Data->getType()->getPrimitiveSizeInBits().getFixedSize() / 8) 1336 : Align(1); 1337 1338 // If the mask is all ones just emit a regular store. 1339 if (const auto *C = dyn_cast<Constant>(Mask)) 1340 if (C->isAllOnesValue()) 1341 return Builder.CreateAlignedStore(Data, Ptr, Alignment); 1342 1343 // Convert the mask from an integer type to a vector of i1. 1344 unsigned NumElts = cast<FixedVectorType>(Data->getType())->getNumElements(); 1345 Mask = getX86MaskVec(Builder, Mask, NumElts); 1346 return Builder.CreateMaskedStore(Data, Ptr, Alignment, Mask); 1347 } 1348 1349 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1350 Value *Ptr, Value *Passthru, Value *Mask, 1351 bool Aligned) { 1352 Type *ValTy = Passthru->getType(); 1353 // Cast the pointer to the right type. 1354 Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); 1355 const Align Alignment = 1356 Aligned 1357 ? Align(Passthru->getType()->getPrimitiveSizeInBits().getFixedSize() / 1358 8) 1359 : Align(1); 1360 1361 // If the mask is all ones just emit a regular store. 1362 if (const auto *C = dyn_cast<Constant>(Mask)) 1363 if (C->isAllOnesValue()) 1364 return Builder.CreateAlignedLoad(ValTy, Ptr, Alignment); 1365 1366 // Convert the mask from an integer type to a vector of i1. 1367 unsigned NumElts = 1368 cast<FixedVectorType>(Passthru->getType())->getNumElements(); 1369 Mask = getX86MaskVec(Builder, Mask, NumElts); 1370 return Builder.CreateMaskedLoad(Ptr, Alignment, Mask, Passthru); 1371 } 1372 1373 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1374 Type *Ty = CI.getType(); 1375 Value *Op0 = CI.getArgOperand(0); 1376 Function *F = Intrinsic::getDeclaration(CI.getModule(), Intrinsic::abs, Ty); 1377 Value *Res = Builder.CreateCall(F, {Op0, Builder.getInt1(false)}); 1378 if (CI.getNumArgOperands() == 3) 1379 Res = EmitX86Select(Builder, CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1380 return Res; 1381 } 1382 1383 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1384 ICmpInst::Predicate Pred) { 1385 Value *Op0 = CI.getArgOperand(0); 1386 Value *Op1 = CI.getArgOperand(1); 1387 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1388 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1389 1390 if (CI.getNumArgOperands() == 4) 1391 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1392 1393 return Res; 1394 } 1395 1396 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1397 Type *Ty = CI.getType(); 1398 1399 // Arguments have a vXi32 type so cast to vXi64. 1400 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1401 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1402 1403 if (IsSigned) { 1404 // Shift left then arithmetic shift right. 1405 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1406 LHS = Builder.CreateShl(LHS, ShiftAmt); 1407 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1408 RHS = Builder.CreateShl(RHS, ShiftAmt); 1409 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1410 } else { 1411 // Clear the upper bits. 1412 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1413 LHS = Builder.CreateAnd(LHS, Mask); 1414 RHS = Builder.CreateAnd(RHS, Mask); 1415 } 1416 1417 Value *Res = Builder.CreateMul(LHS, RHS); 1418 1419 if (CI.getNumArgOperands() == 4) 1420 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1421 1422 return Res; 1423 } 1424 1425 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1426 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1427 Value *Mask) { 1428 unsigned NumElts = cast<FixedVectorType>(Vec->getType())->getNumElements(); 1429 if (Mask) { 1430 const auto *C = dyn_cast<Constant>(Mask); 1431 if (!C || !C->isAllOnesValue()) 1432 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1433 } 1434 1435 if (NumElts < 8) { 1436 int Indices[8]; 1437 for (unsigned i = 0; i != NumElts; ++i) 1438 Indices[i] = i; 1439 for (unsigned i = NumElts; i != 8; ++i) 1440 Indices[i] = NumElts + i % NumElts; 1441 Vec = Builder.CreateShuffleVector(Vec, 1442 Constant::getNullValue(Vec->getType()), 1443 Indices); 1444 } 1445 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1446 } 1447 1448 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1449 unsigned CC, bool Signed) { 1450 Value *Op0 = CI.getArgOperand(0); 1451 unsigned NumElts = cast<FixedVectorType>(Op0->getType())->getNumElements(); 1452 1453 Value *Cmp; 1454 if (CC == 3) { 1455 Cmp = Constant::getNullValue( 1456 FixedVectorType::get(Builder.getInt1Ty(), NumElts)); 1457 } else if (CC == 7) { 1458 Cmp = Constant::getAllOnesValue( 1459 FixedVectorType::get(Builder.getInt1Ty(), NumElts)); 1460 } else { 1461 ICmpInst::Predicate Pred; 1462 switch (CC) { 1463 default: llvm_unreachable("Unknown condition code"); 1464 case 0: Pred = ICmpInst::ICMP_EQ; break; 1465 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1466 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1467 case 4: Pred = ICmpInst::ICMP_NE; break; 1468 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1469 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1470 } 1471 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1472 } 1473 1474 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1475 1476 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1477 } 1478 1479 // Replace a masked intrinsic with an older unmasked intrinsic. 1480 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1481 Intrinsic::ID IID) { 1482 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1483 Value *Rep = Builder.CreateCall(Intrin, 1484 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1485 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1486 } 1487 1488 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1489 Value* A = CI.getArgOperand(0); 1490 Value* B = CI.getArgOperand(1); 1491 Value* Src = CI.getArgOperand(2); 1492 Value* Mask = CI.getArgOperand(3); 1493 1494 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1495 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1496 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1497 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1498 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1499 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1500 } 1501 1502 1503 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1504 Value* Op = CI.getArgOperand(0); 1505 Type* ReturnOp = CI.getType(); 1506 unsigned NumElts = cast<FixedVectorType>(CI.getType())->getNumElements(); 1507 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1508 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1509 } 1510 1511 // Replace intrinsic with unmasked version and a select. 1512 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1513 CallInst &CI, Value *&Rep) { 1514 Name = Name.substr(12); // Remove avx512.mask. 1515 1516 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1517 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1518 Intrinsic::ID IID; 1519 if (Name.startswith("max.p")) { 1520 if (VecWidth == 128 && EltWidth == 32) 1521 IID = Intrinsic::x86_sse_max_ps; 1522 else if (VecWidth == 128 && EltWidth == 64) 1523 IID = Intrinsic::x86_sse2_max_pd; 1524 else if (VecWidth == 256 && EltWidth == 32) 1525 IID = Intrinsic::x86_avx_max_ps_256; 1526 else if (VecWidth == 256 && EltWidth == 64) 1527 IID = Intrinsic::x86_avx_max_pd_256; 1528 else 1529 llvm_unreachable("Unexpected intrinsic"); 1530 } else if (Name.startswith("min.p")) { 1531 if (VecWidth == 128 && EltWidth == 32) 1532 IID = Intrinsic::x86_sse_min_ps; 1533 else if (VecWidth == 128 && EltWidth == 64) 1534 IID = Intrinsic::x86_sse2_min_pd; 1535 else if (VecWidth == 256 && EltWidth == 32) 1536 IID = Intrinsic::x86_avx_min_ps_256; 1537 else if (VecWidth == 256 && EltWidth == 64) 1538 IID = Intrinsic::x86_avx_min_pd_256; 1539 else 1540 llvm_unreachable("Unexpected intrinsic"); 1541 } else if (Name.startswith("pshuf.b.")) { 1542 if (VecWidth == 128) 1543 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1544 else if (VecWidth == 256) 1545 IID = Intrinsic::x86_avx2_pshuf_b; 1546 else if (VecWidth == 512) 1547 IID = Intrinsic::x86_avx512_pshuf_b_512; 1548 else 1549 llvm_unreachable("Unexpected intrinsic"); 1550 } else if (Name.startswith("pmul.hr.sw.")) { 1551 if (VecWidth == 128) 1552 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1553 else if (VecWidth == 256) 1554 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1555 else if (VecWidth == 512) 1556 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1557 else 1558 llvm_unreachable("Unexpected intrinsic"); 1559 } else if (Name.startswith("pmulh.w.")) { 1560 if (VecWidth == 128) 1561 IID = Intrinsic::x86_sse2_pmulh_w; 1562 else if (VecWidth == 256) 1563 IID = Intrinsic::x86_avx2_pmulh_w; 1564 else if (VecWidth == 512) 1565 IID = Intrinsic::x86_avx512_pmulh_w_512; 1566 else 1567 llvm_unreachable("Unexpected intrinsic"); 1568 } else if (Name.startswith("pmulhu.w.")) { 1569 if (VecWidth == 128) 1570 IID = Intrinsic::x86_sse2_pmulhu_w; 1571 else if (VecWidth == 256) 1572 IID = Intrinsic::x86_avx2_pmulhu_w; 1573 else if (VecWidth == 512) 1574 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1575 else 1576 llvm_unreachable("Unexpected intrinsic"); 1577 } else if (Name.startswith("pmaddw.d.")) { 1578 if (VecWidth == 128) 1579 IID = Intrinsic::x86_sse2_pmadd_wd; 1580 else if (VecWidth == 256) 1581 IID = Intrinsic::x86_avx2_pmadd_wd; 1582 else if (VecWidth == 512) 1583 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1584 else 1585 llvm_unreachable("Unexpected intrinsic"); 1586 } else if (Name.startswith("pmaddubs.w.")) { 1587 if (VecWidth == 128) 1588 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1589 else if (VecWidth == 256) 1590 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1591 else if (VecWidth == 512) 1592 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1593 else 1594 llvm_unreachable("Unexpected intrinsic"); 1595 } else if (Name.startswith("packsswb.")) { 1596 if (VecWidth == 128) 1597 IID = Intrinsic::x86_sse2_packsswb_128; 1598 else if (VecWidth == 256) 1599 IID = Intrinsic::x86_avx2_packsswb; 1600 else if (VecWidth == 512) 1601 IID = Intrinsic::x86_avx512_packsswb_512; 1602 else 1603 llvm_unreachable("Unexpected intrinsic"); 1604 } else if (Name.startswith("packssdw.")) { 1605 if (VecWidth == 128) 1606 IID = Intrinsic::x86_sse2_packssdw_128; 1607 else if (VecWidth == 256) 1608 IID = Intrinsic::x86_avx2_packssdw; 1609 else if (VecWidth == 512) 1610 IID = Intrinsic::x86_avx512_packssdw_512; 1611 else 1612 llvm_unreachable("Unexpected intrinsic"); 1613 } else if (Name.startswith("packuswb.")) { 1614 if (VecWidth == 128) 1615 IID = Intrinsic::x86_sse2_packuswb_128; 1616 else if (VecWidth == 256) 1617 IID = Intrinsic::x86_avx2_packuswb; 1618 else if (VecWidth == 512) 1619 IID = Intrinsic::x86_avx512_packuswb_512; 1620 else 1621 llvm_unreachable("Unexpected intrinsic"); 1622 } else if (Name.startswith("packusdw.")) { 1623 if (VecWidth == 128) 1624 IID = Intrinsic::x86_sse41_packusdw; 1625 else if (VecWidth == 256) 1626 IID = Intrinsic::x86_avx2_packusdw; 1627 else if (VecWidth == 512) 1628 IID = Intrinsic::x86_avx512_packusdw_512; 1629 else 1630 llvm_unreachable("Unexpected intrinsic"); 1631 } else if (Name.startswith("vpermilvar.")) { 1632 if (VecWidth == 128 && EltWidth == 32) 1633 IID = Intrinsic::x86_avx_vpermilvar_ps; 1634 else if (VecWidth == 128 && EltWidth == 64) 1635 IID = Intrinsic::x86_avx_vpermilvar_pd; 1636 else if (VecWidth == 256 && EltWidth == 32) 1637 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1638 else if (VecWidth == 256 && EltWidth == 64) 1639 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1640 else if (VecWidth == 512 && EltWidth == 32) 1641 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1642 else if (VecWidth == 512 && EltWidth == 64) 1643 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1644 else 1645 llvm_unreachable("Unexpected intrinsic"); 1646 } else if (Name == "cvtpd2dq.256") { 1647 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1648 } else if (Name == "cvtpd2ps.256") { 1649 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1650 } else if (Name == "cvttpd2dq.256") { 1651 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1652 } else if (Name == "cvttps2dq.128") { 1653 IID = Intrinsic::x86_sse2_cvttps2dq; 1654 } else if (Name == "cvttps2dq.256") { 1655 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1656 } else if (Name.startswith("permvar.")) { 1657 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1658 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1659 IID = Intrinsic::x86_avx2_permps; 1660 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1661 IID = Intrinsic::x86_avx2_permd; 1662 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1663 IID = Intrinsic::x86_avx512_permvar_df_256; 1664 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1665 IID = Intrinsic::x86_avx512_permvar_di_256; 1666 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1667 IID = Intrinsic::x86_avx512_permvar_sf_512; 1668 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1669 IID = Intrinsic::x86_avx512_permvar_si_512; 1670 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1671 IID = Intrinsic::x86_avx512_permvar_df_512; 1672 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1673 IID = Intrinsic::x86_avx512_permvar_di_512; 1674 else if (VecWidth == 128 && EltWidth == 16) 1675 IID = Intrinsic::x86_avx512_permvar_hi_128; 1676 else if (VecWidth == 256 && EltWidth == 16) 1677 IID = Intrinsic::x86_avx512_permvar_hi_256; 1678 else if (VecWidth == 512 && EltWidth == 16) 1679 IID = Intrinsic::x86_avx512_permvar_hi_512; 1680 else if (VecWidth == 128 && EltWidth == 8) 1681 IID = Intrinsic::x86_avx512_permvar_qi_128; 1682 else if (VecWidth == 256 && EltWidth == 8) 1683 IID = Intrinsic::x86_avx512_permvar_qi_256; 1684 else if (VecWidth == 512 && EltWidth == 8) 1685 IID = Intrinsic::x86_avx512_permvar_qi_512; 1686 else 1687 llvm_unreachable("Unexpected intrinsic"); 1688 } else if (Name.startswith("dbpsadbw.")) { 1689 if (VecWidth == 128) 1690 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1691 else if (VecWidth == 256) 1692 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1693 else if (VecWidth == 512) 1694 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1695 else 1696 llvm_unreachable("Unexpected intrinsic"); 1697 } else if (Name.startswith("pmultishift.qb.")) { 1698 if (VecWidth == 128) 1699 IID = Intrinsic::x86_avx512_pmultishift_qb_128; 1700 else if (VecWidth == 256) 1701 IID = Intrinsic::x86_avx512_pmultishift_qb_256; 1702 else if (VecWidth == 512) 1703 IID = Intrinsic::x86_avx512_pmultishift_qb_512; 1704 else 1705 llvm_unreachable("Unexpected intrinsic"); 1706 } else if (Name.startswith("conflict.")) { 1707 if (Name[9] == 'd' && VecWidth == 128) 1708 IID = Intrinsic::x86_avx512_conflict_d_128; 1709 else if (Name[9] == 'd' && VecWidth == 256) 1710 IID = Intrinsic::x86_avx512_conflict_d_256; 1711 else if (Name[9] == 'd' && VecWidth == 512) 1712 IID = Intrinsic::x86_avx512_conflict_d_512; 1713 else if (Name[9] == 'q' && VecWidth == 128) 1714 IID = Intrinsic::x86_avx512_conflict_q_128; 1715 else if (Name[9] == 'q' && VecWidth == 256) 1716 IID = Intrinsic::x86_avx512_conflict_q_256; 1717 else if (Name[9] == 'q' && VecWidth == 512) 1718 IID = Intrinsic::x86_avx512_conflict_q_512; 1719 else 1720 llvm_unreachable("Unexpected intrinsic"); 1721 } else if (Name.startswith("pavg.")) { 1722 if (Name[5] == 'b' && VecWidth == 128) 1723 IID = Intrinsic::x86_sse2_pavg_b; 1724 else if (Name[5] == 'b' && VecWidth == 256) 1725 IID = Intrinsic::x86_avx2_pavg_b; 1726 else if (Name[5] == 'b' && VecWidth == 512) 1727 IID = Intrinsic::x86_avx512_pavg_b_512; 1728 else if (Name[5] == 'w' && VecWidth == 128) 1729 IID = Intrinsic::x86_sse2_pavg_w; 1730 else if (Name[5] == 'w' && VecWidth == 256) 1731 IID = Intrinsic::x86_avx2_pavg_w; 1732 else if (Name[5] == 'w' && VecWidth == 512) 1733 IID = Intrinsic::x86_avx512_pavg_w_512; 1734 else 1735 llvm_unreachable("Unexpected intrinsic"); 1736 } else 1737 return false; 1738 1739 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1740 CI.arg_operands().end()); 1741 Args.pop_back(); 1742 Args.pop_back(); 1743 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1744 Args); 1745 unsigned NumArgs = CI.getNumArgOperands(); 1746 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1747 CI.getArgOperand(NumArgs - 2)); 1748 return true; 1749 } 1750 1751 /// Upgrade comment in call to inline asm that represents an objc retain release 1752 /// marker. 1753 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1754 size_t Pos; 1755 if (AsmStr->find("mov\tfp") == 0 && 1756 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1757 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1758 AsmStr->replace(Pos, 1, ";"); 1759 } 1760 return; 1761 } 1762 1763 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1764 /// provided to seamlessly integrate with existing context. 1765 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1766 Function *F = CI->getCalledFunction(); 1767 LLVMContext &C = CI->getContext(); 1768 IRBuilder<> Builder(C); 1769 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1770 1771 assert(F && "Intrinsic call is not direct?"); 1772 1773 if (!NewFn) { 1774 // Get the Function's name. 1775 StringRef Name = F->getName(); 1776 1777 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1778 Name = Name.substr(5); 1779 1780 bool IsX86 = Name.startswith("x86."); 1781 if (IsX86) 1782 Name = Name.substr(4); 1783 bool IsNVVM = Name.startswith("nvvm."); 1784 if (IsNVVM) 1785 Name = Name.substr(5); 1786 1787 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1788 Module *M = F->getParent(); 1789 SmallVector<Metadata *, 1> Elts; 1790 Elts.push_back( 1791 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1792 MDNode *Node = MDNode::get(C, Elts); 1793 1794 Value *Arg0 = CI->getArgOperand(0); 1795 Value *Arg1 = CI->getArgOperand(1); 1796 1797 // Nontemporal (unaligned) store of the 0'th element of the float/double 1798 // vector. 1799 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1800 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1801 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1802 Value *Extract = 1803 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1804 1805 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, Align(1)); 1806 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1807 1808 // Remove intrinsic. 1809 CI->eraseFromParent(); 1810 return; 1811 } 1812 1813 if (IsX86 && (Name.startswith("avx.movnt.") || 1814 Name.startswith("avx512.storent."))) { 1815 Module *M = F->getParent(); 1816 SmallVector<Metadata *, 1> Elts; 1817 Elts.push_back( 1818 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1819 MDNode *Node = MDNode::get(C, Elts); 1820 1821 Value *Arg0 = CI->getArgOperand(0); 1822 Value *Arg1 = CI->getArgOperand(1); 1823 1824 // Convert the type of the pointer to a pointer to the stored type. 1825 Value *BC = Builder.CreateBitCast(Arg0, 1826 PointerType::getUnqual(Arg1->getType()), 1827 "cast"); 1828 StoreInst *SI = Builder.CreateAlignedStore( 1829 Arg1, BC, 1830 Align(Arg1->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 1831 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1832 1833 // Remove intrinsic. 1834 CI->eraseFromParent(); 1835 return; 1836 } 1837 1838 if (IsX86 && Name == "sse2.storel.dq") { 1839 Value *Arg0 = CI->getArgOperand(0); 1840 Value *Arg1 = CI->getArgOperand(1); 1841 1842 auto *NewVecTy = FixedVectorType::get(Type::getInt64Ty(C), 2); 1843 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1844 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1845 Value *BC = Builder.CreateBitCast(Arg0, 1846 PointerType::getUnqual(Elt->getType()), 1847 "cast"); 1848 Builder.CreateAlignedStore(Elt, BC, Align(1)); 1849 1850 // Remove intrinsic. 1851 CI->eraseFromParent(); 1852 return; 1853 } 1854 1855 if (IsX86 && (Name.startswith("sse.storeu.") || 1856 Name.startswith("sse2.storeu.") || 1857 Name.startswith("avx.storeu."))) { 1858 Value *Arg0 = CI->getArgOperand(0); 1859 Value *Arg1 = CI->getArgOperand(1); 1860 1861 Arg0 = Builder.CreateBitCast(Arg0, 1862 PointerType::getUnqual(Arg1->getType()), 1863 "cast"); 1864 Builder.CreateAlignedStore(Arg1, Arg0, Align(1)); 1865 1866 // Remove intrinsic. 1867 CI->eraseFromParent(); 1868 return; 1869 } 1870 1871 if (IsX86 && Name == "avx512.mask.store.ss") { 1872 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1873 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1874 Mask, false); 1875 1876 // Remove intrinsic. 1877 CI->eraseFromParent(); 1878 return; 1879 } 1880 1881 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1882 // "avx512.mask.storeu." or "avx512.mask.store." 1883 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1884 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1885 CI->getArgOperand(2), Aligned); 1886 1887 // Remove intrinsic. 1888 CI->eraseFromParent(); 1889 return; 1890 } 1891 1892 Value *Rep; 1893 // Upgrade packed integer vector compare intrinsics to compare instructions. 1894 if (IsX86 && (Name.startswith("sse2.pcmp") || 1895 Name.startswith("avx2.pcmp"))) { 1896 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1897 bool CmpEq = Name[9] == 'e'; 1898 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1899 CI->getArgOperand(0), CI->getArgOperand(1)); 1900 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1901 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1902 Type *ExtTy = Type::getInt32Ty(C); 1903 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1904 ExtTy = Type::getInt64Ty(C); 1905 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1906 ExtTy->getPrimitiveSizeInBits(); 1907 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1908 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1909 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1910 Name == "sse2.sqrt.sd")) { 1911 Value *Vec = CI->getArgOperand(0); 1912 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1913 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1914 Intrinsic::sqrt, Elt0->getType()); 1915 Elt0 = Builder.CreateCall(Intr, Elt0); 1916 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1917 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1918 Name.startswith("sse2.sqrt.p") || 1919 Name.startswith("sse.sqrt.p"))) { 1920 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1921 Intrinsic::sqrt, 1922 CI->getType()), 1923 {CI->getArgOperand(0)}); 1924 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1925 if (CI->getNumArgOperands() == 4 && 1926 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1927 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1928 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1929 : Intrinsic::x86_avx512_sqrt_pd_512; 1930 1931 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1932 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1933 IID), Args); 1934 } else { 1935 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1936 Intrinsic::sqrt, 1937 CI->getType()), 1938 {CI->getArgOperand(0)}); 1939 } 1940 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1941 CI->getArgOperand(1)); 1942 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1943 Name.startswith("avx512.ptestnm"))) { 1944 Value *Op0 = CI->getArgOperand(0); 1945 Value *Op1 = CI->getArgOperand(1); 1946 Value *Mask = CI->getArgOperand(2); 1947 Rep = Builder.CreateAnd(Op0, Op1); 1948 llvm::Type *Ty = Op0->getType(); 1949 Value *Zero = llvm::Constant::getNullValue(Ty); 1950 ICmpInst::Predicate Pred = 1951 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1952 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1953 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1954 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1955 unsigned NumElts = cast<FixedVectorType>(CI->getArgOperand(1)->getType()) 1956 ->getNumElements(); 1957 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1958 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1959 CI->getArgOperand(1)); 1960 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1961 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1962 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1963 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1964 int Indices[64]; 1965 for (unsigned i = 0; i != NumElts; ++i) 1966 Indices[i] = i; 1967 1968 // First extract half of each vector. This gives better codegen than 1969 // doing it in a single shuffle. 1970 LHS = Builder.CreateShuffleVector(LHS, LHS, 1971 makeArrayRef(Indices, NumElts / 2)); 1972 RHS = Builder.CreateShuffleVector(RHS, RHS, 1973 makeArrayRef(Indices, NumElts / 2)); 1974 // Concat the vectors. 1975 // NOTE: Operands have to be swapped to match intrinsic definition. 1976 Rep = Builder.CreateShuffleVector(RHS, LHS, 1977 makeArrayRef(Indices, NumElts)); 1978 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1979 } else if (IsX86 && Name == "avx512.kand.w") { 1980 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1981 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1982 Rep = Builder.CreateAnd(LHS, RHS); 1983 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1984 } else if (IsX86 && Name == "avx512.kandn.w") { 1985 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1986 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1987 LHS = Builder.CreateNot(LHS); 1988 Rep = Builder.CreateAnd(LHS, RHS); 1989 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1990 } else if (IsX86 && Name == "avx512.kor.w") { 1991 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1992 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1993 Rep = Builder.CreateOr(LHS, RHS); 1994 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1995 } else if (IsX86 && Name == "avx512.kxor.w") { 1996 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1997 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1998 Rep = Builder.CreateXor(LHS, RHS); 1999 Rep = Builder.CreateBitCast(Rep, CI->getType()); 2000 } else if (IsX86 && Name == "avx512.kxnor.w") { 2001 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 2002 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 2003 LHS = Builder.CreateNot(LHS); 2004 Rep = Builder.CreateXor(LHS, RHS); 2005 Rep = Builder.CreateBitCast(Rep, CI->getType()); 2006 } else if (IsX86 && Name == "avx512.knot.w") { 2007 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 2008 Rep = Builder.CreateNot(Rep); 2009 Rep = Builder.CreateBitCast(Rep, CI->getType()); 2010 } else if (IsX86 && 2011 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 2012 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 2013 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 2014 Rep = Builder.CreateOr(LHS, RHS); 2015 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 2016 Value *C; 2017 if (Name[14] == 'c') 2018 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 2019 else 2020 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 2021 Rep = Builder.CreateICmpEQ(Rep, C); 2022 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 2023 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 2024 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 2025 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 2026 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 2027 Type *I32Ty = Type::getInt32Ty(C); 2028 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 2029 ConstantInt::get(I32Ty, 0)); 2030 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 2031 ConstantInt::get(I32Ty, 0)); 2032 Value *EltOp; 2033 if (Name.contains(".add.")) 2034 EltOp = Builder.CreateFAdd(Elt0, Elt1); 2035 else if (Name.contains(".sub.")) 2036 EltOp = Builder.CreateFSub(Elt0, Elt1); 2037 else if (Name.contains(".mul.")) 2038 EltOp = Builder.CreateFMul(Elt0, Elt1); 2039 else 2040 EltOp = Builder.CreateFDiv(Elt0, Elt1); 2041 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 2042 ConstantInt::get(I32Ty, 0)); 2043 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 2044 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 2045 bool CmpEq = Name[16] == 'e'; 2046 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 2047 } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) { 2048 Type *OpTy = CI->getArgOperand(0)->getType(); 2049 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2050 Intrinsic::ID IID; 2051 switch (VecWidth) { 2052 default: llvm_unreachable("Unexpected intrinsic"); 2053 case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break; 2054 case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break; 2055 case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break; 2056 } 2057 2058 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2059 { CI->getOperand(0), CI->getArgOperand(1) }); 2060 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 2061 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 2062 Type *OpTy = CI->getArgOperand(0)->getType(); 2063 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2064 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2065 Intrinsic::ID IID; 2066 if (VecWidth == 128 && EltWidth == 32) 2067 IID = Intrinsic::x86_avx512_fpclass_ps_128; 2068 else if (VecWidth == 256 && EltWidth == 32) 2069 IID = Intrinsic::x86_avx512_fpclass_ps_256; 2070 else if (VecWidth == 512 && EltWidth == 32) 2071 IID = Intrinsic::x86_avx512_fpclass_ps_512; 2072 else if (VecWidth == 128 && EltWidth == 64) 2073 IID = Intrinsic::x86_avx512_fpclass_pd_128; 2074 else if (VecWidth == 256 && EltWidth == 64) 2075 IID = Intrinsic::x86_avx512_fpclass_pd_256; 2076 else if (VecWidth == 512 && EltWidth == 64) 2077 IID = Intrinsic::x86_avx512_fpclass_pd_512; 2078 else 2079 llvm_unreachable("Unexpected intrinsic"); 2080 2081 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2082 { CI->getOperand(0), CI->getArgOperand(1) }); 2083 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 2084 } else if (IsX86 && Name.startswith("avx512.cmp.p")) { 2085 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2086 CI->arg_operands().end()); 2087 Type *OpTy = Args[0]->getType(); 2088 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2089 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2090 Intrinsic::ID IID; 2091 if (VecWidth == 128 && EltWidth == 32) 2092 IID = Intrinsic::x86_avx512_mask_cmp_ps_128; 2093 else if (VecWidth == 256 && EltWidth == 32) 2094 IID = Intrinsic::x86_avx512_mask_cmp_ps_256; 2095 else if (VecWidth == 512 && EltWidth == 32) 2096 IID = Intrinsic::x86_avx512_mask_cmp_ps_512; 2097 else if (VecWidth == 128 && EltWidth == 64) 2098 IID = Intrinsic::x86_avx512_mask_cmp_pd_128; 2099 else if (VecWidth == 256 && EltWidth == 64) 2100 IID = Intrinsic::x86_avx512_mask_cmp_pd_256; 2101 else if (VecWidth == 512 && EltWidth == 64) 2102 IID = Intrinsic::x86_avx512_mask_cmp_pd_512; 2103 else 2104 llvm_unreachable("Unexpected intrinsic"); 2105 2106 Value *Mask = Constant::getAllOnesValue(CI->getType()); 2107 if (VecWidth == 512) 2108 std::swap(Mask, Args.back()); 2109 Args.push_back(Mask); 2110 2111 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2112 Args); 2113 } else if (IsX86 && Name.startswith("avx512.mask.cmp.")) { 2114 // Integer compare intrinsics. 2115 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2116 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 2117 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 2118 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2119 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 2120 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 2121 Name.startswith("avx512.cvtw2mask.") || 2122 Name.startswith("avx512.cvtd2mask.") || 2123 Name.startswith("avx512.cvtq2mask."))) { 2124 Value *Op = CI->getArgOperand(0); 2125 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 2126 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 2127 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 2128 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 2129 Name == "ssse3.pabs.w.128" || 2130 Name == "ssse3.pabs.d.128" || 2131 Name.startswith("avx2.pabs") || 2132 Name.startswith("avx512.mask.pabs"))) { 2133 Rep = upgradeAbs(Builder, *CI); 2134 } else if (IsX86 && (Name == "sse41.pmaxsb" || 2135 Name == "sse2.pmaxs.w" || 2136 Name == "sse41.pmaxsd" || 2137 Name.startswith("avx2.pmaxs") || 2138 Name.startswith("avx512.mask.pmaxs"))) { 2139 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 2140 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 2141 Name == "sse41.pmaxuw" || 2142 Name == "sse41.pmaxud" || 2143 Name.startswith("avx2.pmaxu") || 2144 Name.startswith("avx512.mask.pmaxu"))) { 2145 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 2146 } else if (IsX86 && (Name == "sse41.pminsb" || 2147 Name == "sse2.pmins.w" || 2148 Name == "sse41.pminsd" || 2149 Name.startswith("avx2.pmins") || 2150 Name.startswith("avx512.mask.pmins"))) { 2151 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 2152 } else if (IsX86 && (Name == "sse2.pminu.b" || 2153 Name == "sse41.pminuw" || 2154 Name == "sse41.pminud" || 2155 Name.startswith("avx2.pminu") || 2156 Name.startswith("avx512.mask.pminu"))) { 2157 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 2158 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 2159 Name == "avx2.pmulu.dq" || 2160 Name == "avx512.pmulu.dq.512" || 2161 Name.startswith("avx512.mask.pmulu.dq."))) { 2162 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 2163 } else if (IsX86 && (Name == "sse41.pmuldq" || 2164 Name == "avx2.pmul.dq" || 2165 Name == "avx512.pmul.dq.512" || 2166 Name.startswith("avx512.mask.pmul.dq."))) { 2167 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 2168 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 2169 Name == "sse2.cvtsi2sd" || 2170 Name == "sse.cvtsi642ss" || 2171 Name == "sse2.cvtsi642sd")) { 2172 Rep = Builder.CreateSIToFP( 2173 CI->getArgOperand(1), 2174 cast<VectorType>(CI->getType())->getElementType()); 2175 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2176 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 2177 Rep = Builder.CreateUIToFP( 2178 CI->getArgOperand(1), 2179 cast<VectorType>(CI->getType())->getElementType()); 2180 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2181 } else if (IsX86 && Name == "sse2.cvtss2sd") { 2182 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 2183 Rep = Builder.CreateFPExt( 2184 Rep, cast<VectorType>(CI->getType())->getElementType()); 2185 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2186 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 2187 Name == "sse2.cvtdq2ps" || 2188 Name == "avx.cvtdq2.pd.256" || 2189 Name == "avx.cvtdq2.ps.256" || 2190 Name.startswith("avx512.mask.cvtdq2pd.") || 2191 Name.startswith("avx512.mask.cvtudq2pd.") || 2192 Name.startswith("avx512.mask.cvtdq2ps.") || 2193 Name.startswith("avx512.mask.cvtudq2ps.") || 2194 Name.startswith("avx512.mask.cvtqq2pd.") || 2195 Name.startswith("avx512.mask.cvtuqq2pd.") || 2196 Name == "avx512.mask.cvtqq2ps.256" || 2197 Name == "avx512.mask.cvtqq2ps.512" || 2198 Name == "avx512.mask.cvtuqq2ps.256" || 2199 Name == "avx512.mask.cvtuqq2ps.512" || 2200 Name == "sse2.cvtps2pd" || 2201 Name == "avx.cvt.ps2.pd.256" || 2202 Name == "avx512.mask.cvtps2pd.128" || 2203 Name == "avx512.mask.cvtps2pd.256")) { 2204 auto *DstTy = cast<FixedVectorType>(CI->getType()); 2205 Rep = CI->getArgOperand(0); 2206 auto *SrcTy = cast<FixedVectorType>(Rep->getType()); 2207 2208 unsigned NumDstElts = DstTy->getNumElements(); 2209 if (NumDstElts < SrcTy->getNumElements()) { 2210 assert(NumDstElts == 2 && "Unexpected vector size"); 2211 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1}); 2212 } 2213 2214 bool IsPS2PD = SrcTy->getElementType()->isFloatTy(); 2215 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 2216 if (IsPS2PD) 2217 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 2218 else if (CI->getNumArgOperands() == 4 && 2219 (!isa<ConstantInt>(CI->getArgOperand(3)) || 2220 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 2221 Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round 2222 : Intrinsic::x86_avx512_sitofp_round; 2223 Function *F = Intrinsic::getDeclaration(CI->getModule(), IID, 2224 { DstTy, SrcTy }); 2225 Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) }); 2226 } else { 2227 Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt") 2228 : Builder.CreateSIToFP(Rep, DstTy, "cvt"); 2229 } 2230 2231 if (CI->getNumArgOperands() >= 3) 2232 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2233 CI->getArgOperand(1)); 2234 } else if (IsX86 && (Name.startswith("avx512.mask.vcvtph2ps.") || 2235 Name.startswith("vcvtph2ps."))) { 2236 auto *DstTy = cast<FixedVectorType>(CI->getType()); 2237 Rep = CI->getArgOperand(0); 2238 auto *SrcTy = cast<FixedVectorType>(Rep->getType()); 2239 unsigned NumDstElts = DstTy->getNumElements(); 2240 if (NumDstElts != SrcTy->getNumElements()) { 2241 assert(NumDstElts == 4 && "Unexpected vector size"); 2242 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1, 2, 3}); 2243 } 2244 Rep = Builder.CreateBitCast( 2245 Rep, FixedVectorType::get(Type::getHalfTy(C), NumDstElts)); 2246 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtph2ps"); 2247 if (CI->getNumArgOperands() >= 3) 2248 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2249 CI->getArgOperand(1)); 2250 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 2251 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2252 CI->getArgOperand(1), CI->getArgOperand(2), 2253 /*Aligned*/false); 2254 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 2255 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2256 CI->getArgOperand(1),CI->getArgOperand(2), 2257 /*Aligned*/true); 2258 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 2259 auto *ResultTy = cast<FixedVectorType>(CI->getType()); 2260 Type *PtrTy = ResultTy->getElementType(); 2261 2262 // Cast the pointer to element type. 2263 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2264 llvm::PointerType::getUnqual(PtrTy)); 2265 2266 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2267 ResultTy->getNumElements()); 2268 2269 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 2270 Intrinsic::masked_expandload, 2271 ResultTy); 2272 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 2273 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 2274 auto *ResultTy = cast<VectorType>(CI->getArgOperand(1)->getType()); 2275 Type *PtrTy = ResultTy->getElementType(); 2276 2277 // Cast the pointer to element type. 2278 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2279 llvm::PointerType::getUnqual(PtrTy)); 2280 2281 Value *MaskVec = 2282 getX86MaskVec(Builder, CI->getArgOperand(2), 2283 cast<FixedVectorType>(ResultTy)->getNumElements()); 2284 2285 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 2286 Intrinsic::masked_compressstore, 2287 ResultTy); 2288 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 2289 } else if (IsX86 && (Name.startswith("avx512.mask.compress.") || 2290 Name.startswith("avx512.mask.expand."))) { 2291 auto *ResultTy = cast<FixedVectorType>(CI->getType()); 2292 2293 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2294 ResultTy->getNumElements()); 2295 2296 bool IsCompress = Name[12] == 'c'; 2297 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 2298 : Intrinsic::x86_avx512_mask_expand; 2299 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); 2300 Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1), 2301 MaskVec }); 2302 } else if (IsX86 && Name.startswith("xop.vpcom")) { 2303 bool IsSigned; 2304 if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") || 2305 Name.endswith("uq")) 2306 IsSigned = false; 2307 else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") || 2308 Name.endswith("q")) 2309 IsSigned = true; 2310 else 2311 llvm_unreachable("Unknown suffix"); 2312 2313 unsigned Imm; 2314 if (CI->getNumArgOperands() == 3) { 2315 Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2316 } else { 2317 Name = Name.substr(9); // strip off "xop.vpcom" 2318 if (Name.startswith("lt")) 2319 Imm = 0; 2320 else if (Name.startswith("le")) 2321 Imm = 1; 2322 else if (Name.startswith("gt")) 2323 Imm = 2; 2324 else if (Name.startswith("ge")) 2325 Imm = 3; 2326 else if (Name.startswith("eq")) 2327 Imm = 4; 2328 else if (Name.startswith("ne")) 2329 Imm = 5; 2330 else if (Name.startswith("false")) 2331 Imm = 6; 2332 else if (Name.startswith("true")) 2333 Imm = 7; 2334 else 2335 llvm_unreachable("Unknown condition"); 2336 } 2337 2338 Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned); 2339 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2340 Value *Sel = CI->getArgOperand(2); 2341 Value *NotSel = Builder.CreateNot(Sel); 2342 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2343 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2344 Rep = Builder.CreateOr(Sel0, Sel1); 2345 } else if (IsX86 && (Name.startswith("xop.vprot") || 2346 Name.startswith("avx512.prol") || 2347 Name.startswith("avx512.mask.prol"))) { 2348 Rep = upgradeX86Rotate(Builder, *CI, false); 2349 } else if (IsX86 && (Name.startswith("avx512.pror") || 2350 Name.startswith("avx512.mask.pror"))) { 2351 Rep = upgradeX86Rotate(Builder, *CI, true); 2352 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2353 Name.startswith("avx512.mask.vpshld") || 2354 Name.startswith("avx512.maskz.vpshld"))) { 2355 bool ZeroMask = Name[11] == 'z'; 2356 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2357 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2358 Name.startswith("avx512.mask.vpshrd") || 2359 Name.startswith("avx512.maskz.vpshrd"))) { 2360 bool ZeroMask = Name[11] == 'z'; 2361 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2362 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2363 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2364 Intrinsic::x86_sse42_crc32_32_8); 2365 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2366 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2367 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2368 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2369 Name.startswith("avx512.vbroadcast.s"))) { 2370 // Replace broadcasts with a series of insertelements. 2371 auto *VecTy = cast<FixedVectorType>(CI->getType()); 2372 Type *EltTy = VecTy->getElementType(); 2373 unsigned EltNum = VecTy->getNumElements(); 2374 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2375 EltTy->getPointerTo()); 2376 Value *Load = Builder.CreateLoad(EltTy, Cast); 2377 Type *I32Ty = Type::getInt32Ty(C); 2378 Rep = UndefValue::get(VecTy); 2379 for (unsigned I = 0; I < EltNum; ++I) 2380 Rep = Builder.CreateInsertElement(Rep, Load, 2381 ConstantInt::get(I32Ty, I)); 2382 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2383 Name.startswith("sse41.pmovzx") || 2384 Name.startswith("avx2.pmovsx") || 2385 Name.startswith("avx2.pmovzx") || 2386 Name.startswith("avx512.mask.pmovsx") || 2387 Name.startswith("avx512.mask.pmovzx"))) { 2388 auto *SrcTy = cast<FixedVectorType>(CI->getArgOperand(0)->getType()); 2389 auto *DstTy = cast<FixedVectorType>(CI->getType()); 2390 unsigned NumDstElts = DstTy->getNumElements(); 2391 2392 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2393 SmallVector<int, 8> ShuffleMask(NumDstElts); 2394 for (unsigned i = 0; i != NumDstElts; ++i) 2395 ShuffleMask[i] = i; 2396 2397 Value *SV = Builder.CreateShuffleVector( 2398 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2399 2400 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2401 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2402 : Builder.CreateZExt(SV, DstTy); 2403 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2404 if (CI->getNumArgOperands() == 3) 2405 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2406 CI->getArgOperand(1)); 2407 } else if (Name == "avx512.mask.pmov.qd.256" || 2408 Name == "avx512.mask.pmov.qd.512" || 2409 Name == "avx512.mask.pmov.wb.256" || 2410 Name == "avx512.mask.pmov.wb.512") { 2411 Type *Ty = CI->getArgOperand(1)->getType(); 2412 Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty); 2413 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2414 CI->getArgOperand(1)); 2415 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2416 Name == "avx2.vbroadcasti128")) { 2417 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2418 Type *EltTy = cast<VectorType>(CI->getType())->getElementType(); 2419 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2420 auto *VT = FixedVectorType::get(EltTy, NumSrcElts); 2421 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2422 PointerType::getUnqual(VT)); 2423 Value *Load = Builder.CreateAlignedLoad(VT, Op, Align(1)); 2424 if (NumSrcElts == 2) 2425 Rep = Builder.CreateShuffleVector( 2426 Load, UndefValue::get(Load->getType()), ArrayRef<int>{0, 1, 0, 1}); 2427 else 2428 Rep = 2429 Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2430 ArrayRef<int>{0, 1, 2, 3, 0, 1, 2, 3}); 2431 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2432 Name.startswith("avx512.mask.shuf.f"))) { 2433 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2434 Type *VT = CI->getType(); 2435 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2436 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2437 unsigned ControlBitsMask = NumLanes - 1; 2438 unsigned NumControlBits = NumLanes / 2; 2439 SmallVector<int, 8> ShuffleMask(0); 2440 2441 for (unsigned l = 0; l != NumLanes; ++l) { 2442 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2443 // We actually need the other source. 2444 if (l >= NumLanes / 2) 2445 LaneMask += NumLanes; 2446 for (unsigned i = 0; i != NumElementsInLane; ++i) 2447 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2448 } 2449 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2450 CI->getArgOperand(1), ShuffleMask); 2451 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2452 CI->getArgOperand(3)); 2453 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2454 Name.startswith("avx512.mask.broadcasti"))) { 2455 unsigned NumSrcElts = 2456 cast<FixedVectorType>(CI->getArgOperand(0)->getType()) 2457 ->getNumElements(); 2458 unsigned NumDstElts = 2459 cast<FixedVectorType>(CI->getType())->getNumElements(); 2460 2461 SmallVector<int, 8> ShuffleMask(NumDstElts); 2462 for (unsigned i = 0; i != NumDstElts; ++i) 2463 ShuffleMask[i] = i % NumSrcElts; 2464 2465 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2466 CI->getArgOperand(0), 2467 ShuffleMask); 2468 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2469 CI->getArgOperand(1)); 2470 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2471 Name.startswith("avx2.vbroadcast") || 2472 Name.startswith("avx512.pbroadcast") || 2473 Name.startswith("avx512.mask.broadcast.s"))) { 2474 // Replace vp?broadcasts with a vector shuffle. 2475 Value *Op = CI->getArgOperand(0); 2476 ElementCount EC = cast<VectorType>(CI->getType())->getElementCount(); 2477 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), EC); 2478 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2479 Constant::getNullValue(MaskTy)); 2480 2481 if (CI->getNumArgOperands() == 3) 2482 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2483 CI->getArgOperand(1)); 2484 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2485 Name.startswith("avx2.padds.") || 2486 Name.startswith("avx512.padds.") || 2487 Name.startswith("avx512.mask.padds."))) { 2488 Rep = UpgradeX86BinaryIntrinsics(Builder, *CI, Intrinsic::sadd_sat); 2489 } else if (IsX86 && (Name.startswith("sse2.psubs.") || 2490 Name.startswith("avx2.psubs.") || 2491 Name.startswith("avx512.psubs.") || 2492 Name.startswith("avx512.mask.psubs."))) { 2493 Rep = UpgradeX86BinaryIntrinsics(Builder, *CI, Intrinsic::ssub_sat); 2494 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2495 Name.startswith("avx2.paddus.") || 2496 Name.startswith("avx512.mask.paddus."))) { 2497 Rep = UpgradeX86BinaryIntrinsics(Builder, *CI, Intrinsic::uadd_sat); 2498 } else if (IsX86 && (Name.startswith("sse2.psubus.") || 2499 Name.startswith("avx2.psubus.") || 2500 Name.startswith("avx512.mask.psubus."))) { 2501 Rep = UpgradeX86BinaryIntrinsics(Builder, *CI, Intrinsic::usub_sat); 2502 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2503 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2504 CI->getArgOperand(1), 2505 CI->getArgOperand(2), 2506 CI->getArgOperand(3), 2507 CI->getArgOperand(4), 2508 false); 2509 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2510 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2511 CI->getArgOperand(1), 2512 CI->getArgOperand(2), 2513 CI->getArgOperand(3), 2514 CI->getArgOperand(4), 2515 true); 2516 } else if (IsX86 && (Name == "sse2.psll.dq" || 2517 Name == "avx2.psll.dq")) { 2518 // 128/256-bit shift left specified in bits. 2519 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2520 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2521 Shift / 8); // Shift is in bits. 2522 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2523 Name == "avx2.psrl.dq")) { 2524 // 128/256-bit shift right specified in bits. 2525 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2526 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2527 Shift / 8); // Shift is in bits. 2528 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2529 Name == "avx2.psll.dq.bs" || 2530 Name == "avx512.psll.dq.512")) { 2531 // 128/256/512-bit shift left specified in bytes. 2532 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2533 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2534 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2535 Name == "avx2.psrl.dq.bs" || 2536 Name == "avx512.psrl.dq.512")) { 2537 // 128/256/512-bit shift right specified in bytes. 2538 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2539 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2540 } else if (IsX86 && (Name == "sse41.pblendw" || 2541 Name.startswith("sse41.blendp") || 2542 Name.startswith("avx.blend.p") || 2543 Name == "avx2.pblendw" || 2544 Name.startswith("avx2.pblendd."))) { 2545 Value *Op0 = CI->getArgOperand(0); 2546 Value *Op1 = CI->getArgOperand(1); 2547 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2548 auto *VecTy = cast<FixedVectorType>(CI->getType()); 2549 unsigned NumElts = VecTy->getNumElements(); 2550 2551 SmallVector<int, 16> Idxs(NumElts); 2552 for (unsigned i = 0; i != NumElts; ++i) 2553 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2554 2555 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2556 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2557 Name == "avx2.vinserti128" || 2558 Name.startswith("avx512.mask.insert"))) { 2559 Value *Op0 = CI->getArgOperand(0); 2560 Value *Op1 = CI->getArgOperand(1); 2561 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2562 unsigned DstNumElts = 2563 cast<FixedVectorType>(CI->getType())->getNumElements(); 2564 unsigned SrcNumElts = 2565 cast<FixedVectorType>(Op1->getType())->getNumElements(); 2566 unsigned Scale = DstNumElts / SrcNumElts; 2567 2568 // Mask off the high bits of the immediate value; hardware ignores those. 2569 Imm = Imm % Scale; 2570 2571 // Extend the second operand into a vector the size of the destination. 2572 Value *UndefV = UndefValue::get(Op1->getType()); 2573 SmallVector<int, 8> Idxs(DstNumElts); 2574 for (unsigned i = 0; i != SrcNumElts; ++i) 2575 Idxs[i] = i; 2576 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2577 Idxs[i] = SrcNumElts; 2578 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2579 2580 // Insert the second operand into the first operand. 2581 2582 // Note that there is no guarantee that instruction lowering will actually 2583 // produce a vinsertf128 instruction for the created shuffles. In 2584 // particular, the 0 immediate case involves no lane changes, so it can 2585 // be handled as a blend. 2586 2587 // Example of shuffle mask for 32-bit elements: 2588 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2589 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2590 2591 // First fill with identify mask. 2592 for (unsigned i = 0; i != DstNumElts; ++i) 2593 Idxs[i] = i; 2594 // Then replace the elements where we need to insert. 2595 for (unsigned i = 0; i != SrcNumElts; ++i) 2596 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2597 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2598 2599 // If the intrinsic has a mask operand, handle that. 2600 if (CI->getNumArgOperands() == 5) 2601 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2602 CI->getArgOperand(3)); 2603 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2604 Name == "avx2.vextracti128" || 2605 Name.startswith("avx512.mask.vextract"))) { 2606 Value *Op0 = CI->getArgOperand(0); 2607 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2608 unsigned DstNumElts = 2609 cast<FixedVectorType>(CI->getType())->getNumElements(); 2610 unsigned SrcNumElts = 2611 cast<FixedVectorType>(Op0->getType())->getNumElements(); 2612 unsigned Scale = SrcNumElts / DstNumElts; 2613 2614 // Mask off the high bits of the immediate value; hardware ignores those. 2615 Imm = Imm % Scale; 2616 2617 // Get indexes for the subvector of the input vector. 2618 SmallVector<int, 8> Idxs(DstNumElts); 2619 for (unsigned i = 0; i != DstNumElts; ++i) { 2620 Idxs[i] = i + (Imm * DstNumElts); 2621 } 2622 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2623 2624 // If the intrinsic has a mask operand, handle that. 2625 if (CI->getNumArgOperands() == 4) 2626 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2627 CI->getArgOperand(2)); 2628 } else if (!IsX86 && Name == "stackprotectorcheck") { 2629 Rep = nullptr; 2630 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2631 Name.startswith("avx512.mask.perm.di."))) { 2632 Value *Op0 = CI->getArgOperand(0); 2633 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2634 auto *VecTy = cast<FixedVectorType>(CI->getType()); 2635 unsigned NumElts = VecTy->getNumElements(); 2636 2637 SmallVector<int, 8> Idxs(NumElts); 2638 for (unsigned i = 0; i != NumElts; ++i) 2639 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2640 2641 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2642 2643 if (CI->getNumArgOperands() == 4) 2644 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2645 CI->getArgOperand(2)); 2646 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2647 Name == "avx2.vperm2i128")) { 2648 // The immediate permute control byte looks like this: 2649 // [1:0] - select 128 bits from sources for low half of destination 2650 // [2] - ignore 2651 // [3] - zero low half of destination 2652 // [5:4] - select 128 bits from sources for high half of destination 2653 // [6] - ignore 2654 // [7] - zero high half of destination 2655 2656 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2657 2658 unsigned NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2659 unsigned HalfSize = NumElts / 2; 2660 SmallVector<int, 8> ShuffleMask(NumElts); 2661 2662 // Determine which operand(s) are actually in use for this instruction. 2663 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2664 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2665 2666 // If needed, replace operands based on zero mask. 2667 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2668 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2669 2670 // Permute low half of result. 2671 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2672 for (unsigned i = 0; i < HalfSize; ++i) 2673 ShuffleMask[i] = StartIndex + i; 2674 2675 // Permute high half of result. 2676 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2677 for (unsigned i = 0; i < HalfSize; ++i) 2678 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2679 2680 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2681 2682 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2683 Name == "sse2.pshuf.d" || 2684 Name.startswith("avx512.mask.vpermil.p") || 2685 Name.startswith("avx512.mask.pshuf.d."))) { 2686 Value *Op0 = CI->getArgOperand(0); 2687 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2688 auto *VecTy = cast<FixedVectorType>(CI->getType()); 2689 unsigned NumElts = VecTy->getNumElements(); 2690 // Calculate the size of each index in the immediate. 2691 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2692 unsigned IdxMask = ((1 << IdxSize) - 1); 2693 2694 SmallVector<int, 8> Idxs(NumElts); 2695 // Lookup the bits for this element, wrapping around the immediate every 2696 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2697 // to offset by the first index of each group. 2698 for (unsigned i = 0; i != NumElts; ++i) 2699 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2700 2701 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2702 2703 if (CI->getNumArgOperands() == 4) 2704 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2705 CI->getArgOperand(2)); 2706 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2707 Name.startswith("avx512.mask.pshufl.w."))) { 2708 Value *Op0 = CI->getArgOperand(0); 2709 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2710 unsigned NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2711 2712 SmallVector<int, 16> Idxs(NumElts); 2713 for (unsigned l = 0; l != NumElts; l += 8) { 2714 for (unsigned i = 0; i != 4; ++i) 2715 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2716 for (unsigned i = 4; i != 8; ++i) 2717 Idxs[i + l] = i + l; 2718 } 2719 2720 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2721 2722 if (CI->getNumArgOperands() == 4) 2723 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2724 CI->getArgOperand(2)); 2725 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2726 Name.startswith("avx512.mask.pshufh.w."))) { 2727 Value *Op0 = CI->getArgOperand(0); 2728 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2729 unsigned NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2730 2731 SmallVector<int, 16> Idxs(NumElts); 2732 for (unsigned l = 0; l != NumElts; l += 8) { 2733 for (unsigned i = 0; i != 4; ++i) 2734 Idxs[i + l] = i + l; 2735 for (unsigned i = 0; i != 4; ++i) 2736 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2737 } 2738 2739 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2740 2741 if (CI->getNumArgOperands() == 4) 2742 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2743 CI->getArgOperand(2)); 2744 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2745 Value *Op0 = CI->getArgOperand(0); 2746 Value *Op1 = CI->getArgOperand(1); 2747 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2748 unsigned NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2749 2750 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2751 unsigned HalfLaneElts = NumLaneElts / 2; 2752 2753 SmallVector<int, 16> Idxs(NumElts); 2754 for (unsigned i = 0; i != NumElts; ++i) { 2755 // Base index is the starting element of the lane. 2756 Idxs[i] = i - (i % NumLaneElts); 2757 // If we are half way through the lane switch to the other source. 2758 if ((i % NumLaneElts) >= HalfLaneElts) 2759 Idxs[i] += NumElts; 2760 // Now select the specific element. By adding HalfLaneElts bits from 2761 // the immediate. Wrapping around the immediate every 8-bits. 2762 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2763 } 2764 2765 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2766 2767 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2768 CI->getArgOperand(3)); 2769 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2770 Name.startswith("avx512.mask.movshdup") || 2771 Name.startswith("avx512.mask.movsldup"))) { 2772 Value *Op0 = CI->getArgOperand(0); 2773 unsigned NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2774 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2775 2776 unsigned Offset = 0; 2777 if (Name.startswith("avx512.mask.movshdup.")) 2778 Offset = 1; 2779 2780 SmallVector<int, 16> Idxs(NumElts); 2781 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2782 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2783 Idxs[i + l + 0] = i + l + Offset; 2784 Idxs[i + l + 1] = i + l + Offset; 2785 } 2786 2787 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2788 2789 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2790 CI->getArgOperand(1)); 2791 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2792 Name.startswith("avx512.mask.unpckl."))) { 2793 Value *Op0 = CI->getArgOperand(0); 2794 Value *Op1 = CI->getArgOperand(1); 2795 int NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2796 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2797 2798 SmallVector<int, 64> Idxs(NumElts); 2799 for (int l = 0; l != NumElts; l += NumLaneElts) 2800 for (int i = 0; i != NumLaneElts; ++i) 2801 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2802 2803 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2804 2805 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2806 CI->getArgOperand(2)); 2807 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2808 Name.startswith("avx512.mask.unpckh."))) { 2809 Value *Op0 = CI->getArgOperand(0); 2810 Value *Op1 = CI->getArgOperand(1); 2811 int NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 2812 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2813 2814 SmallVector<int, 64> Idxs(NumElts); 2815 for (int l = 0; l != NumElts; l += NumLaneElts) 2816 for (int i = 0; i != NumLaneElts; ++i) 2817 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2818 2819 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2820 2821 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2822 CI->getArgOperand(2)); 2823 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2824 Name.startswith("avx512.mask.pand."))) { 2825 VectorType *FTy = cast<VectorType>(CI->getType()); 2826 VectorType *ITy = VectorType::getInteger(FTy); 2827 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2828 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2829 Rep = Builder.CreateBitCast(Rep, FTy); 2830 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2831 CI->getArgOperand(2)); 2832 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2833 Name.startswith("avx512.mask.pandn."))) { 2834 VectorType *FTy = cast<VectorType>(CI->getType()); 2835 VectorType *ITy = VectorType::getInteger(FTy); 2836 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2837 Rep = Builder.CreateAnd(Rep, 2838 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2839 Rep = Builder.CreateBitCast(Rep, FTy); 2840 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2841 CI->getArgOperand(2)); 2842 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2843 Name.startswith("avx512.mask.por."))) { 2844 VectorType *FTy = cast<VectorType>(CI->getType()); 2845 VectorType *ITy = VectorType::getInteger(FTy); 2846 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2847 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2848 Rep = Builder.CreateBitCast(Rep, FTy); 2849 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2850 CI->getArgOperand(2)); 2851 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2852 Name.startswith("avx512.mask.pxor."))) { 2853 VectorType *FTy = cast<VectorType>(CI->getType()); 2854 VectorType *ITy = VectorType::getInteger(FTy); 2855 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2856 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2857 Rep = Builder.CreateBitCast(Rep, FTy); 2858 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2859 CI->getArgOperand(2)); 2860 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2861 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2862 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2863 CI->getArgOperand(2)); 2864 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2865 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2866 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2867 CI->getArgOperand(2)); 2868 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2869 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2870 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2871 CI->getArgOperand(2)); 2872 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2873 if (Name.endswith(".512")) { 2874 Intrinsic::ID IID; 2875 if (Name[17] == 's') 2876 IID = Intrinsic::x86_avx512_add_ps_512; 2877 else 2878 IID = Intrinsic::x86_avx512_add_pd_512; 2879 2880 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2881 { CI->getArgOperand(0), CI->getArgOperand(1), 2882 CI->getArgOperand(4) }); 2883 } else { 2884 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2885 } 2886 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2887 CI->getArgOperand(2)); 2888 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2889 if (Name.endswith(".512")) { 2890 Intrinsic::ID IID; 2891 if (Name[17] == 's') 2892 IID = Intrinsic::x86_avx512_div_ps_512; 2893 else 2894 IID = Intrinsic::x86_avx512_div_pd_512; 2895 2896 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2897 { CI->getArgOperand(0), CI->getArgOperand(1), 2898 CI->getArgOperand(4) }); 2899 } else { 2900 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2901 } 2902 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2903 CI->getArgOperand(2)); 2904 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2905 if (Name.endswith(".512")) { 2906 Intrinsic::ID IID; 2907 if (Name[17] == 's') 2908 IID = Intrinsic::x86_avx512_mul_ps_512; 2909 else 2910 IID = Intrinsic::x86_avx512_mul_pd_512; 2911 2912 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2913 { CI->getArgOperand(0), CI->getArgOperand(1), 2914 CI->getArgOperand(4) }); 2915 } else { 2916 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2917 } 2918 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2919 CI->getArgOperand(2)); 2920 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2921 if (Name.endswith(".512")) { 2922 Intrinsic::ID IID; 2923 if (Name[17] == 's') 2924 IID = Intrinsic::x86_avx512_sub_ps_512; 2925 else 2926 IID = Intrinsic::x86_avx512_sub_pd_512; 2927 2928 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2929 { CI->getArgOperand(0), CI->getArgOperand(1), 2930 CI->getArgOperand(4) }); 2931 } else { 2932 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2933 } 2934 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2935 CI->getArgOperand(2)); 2936 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2937 Name.startswith("avx512.mask.min.p")) && 2938 Name.drop_front(18) == ".512") { 2939 bool IsDouble = Name[17] == 'd'; 2940 bool IsMin = Name[13] == 'i'; 2941 static const Intrinsic::ID MinMaxTbl[2][2] = { 2942 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2943 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2944 }; 2945 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2946 2947 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2948 { CI->getArgOperand(0), CI->getArgOperand(1), 2949 CI->getArgOperand(4) }); 2950 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2951 CI->getArgOperand(2)); 2952 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2953 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2954 Intrinsic::ctlz, 2955 CI->getType()), 2956 { CI->getArgOperand(0), Builder.getInt1(false) }); 2957 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2958 CI->getArgOperand(1)); 2959 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2960 bool IsImmediate = Name[16] == 'i' || 2961 (Name.size() > 18 && Name[18] == 'i'); 2962 bool IsVariable = Name[16] == 'v'; 2963 char Size = Name[16] == '.' ? Name[17] : 2964 Name[17] == '.' ? Name[18] : 2965 Name[18] == '.' ? Name[19] : 2966 Name[20]; 2967 2968 Intrinsic::ID IID; 2969 if (IsVariable && Name[17] != '.') { 2970 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2971 IID = Intrinsic::x86_avx2_psllv_q; 2972 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2973 IID = Intrinsic::x86_avx2_psllv_q_256; 2974 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2975 IID = Intrinsic::x86_avx2_psllv_d; 2976 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2977 IID = Intrinsic::x86_avx2_psllv_d_256; 2978 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2979 IID = Intrinsic::x86_avx512_psllv_w_128; 2980 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2981 IID = Intrinsic::x86_avx512_psllv_w_256; 2982 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2983 IID = Intrinsic::x86_avx512_psllv_w_512; 2984 else 2985 llvm_unreachable("Unexpected size"); 2986 } else if (Name.endswith(".128")) { 2987 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2988 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2989 : Intrinsic::x86_sse2_psll_d; 2990 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2991 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2992 : Intrinsic::x86_sse2_psll_q; 2993 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2994 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2995 : Intrinsic::x86_sse2_psll_w; 2996 else 2997 llvm_unreachable("Unexpected size"); 2998 } else if (Name.endswith(".256")) { 2999 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 3000 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 3001 : Intrinsic::x86_avx2_psll_d; 3002 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 3003 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 3004 : Intrinsic::x86_avx2_psll_q; 3005 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 3006 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 3007 : Intrinsic::x86_avx2_psll_w; 3008 else 3009 llvm_unreachable("Unexpected size"); 3010 } else { 3011 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 3012 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 3013 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 3014 Intrinsic::x86_avx512_psll_d_512; 3015 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 3016 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 3017 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 3018 Intrinsic::x86_avx512_psll_q_512; 3019 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 3020 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 3021 : Intrinsic::x86_avx512_psll_w_512; 3022 else 3023 llvm_unreachable("Unexpected size"); 3024 } 3025 3026 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3027 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 3028 bool IsImmediate = Name[16] == 'i' || 3029 (Name.size() > 18 && Name[18] == 'i'); 3030 bool IsVariable = Name[16] == 'v'; 3031 char Size = Name[16] == '.' ? Name[17] : 3032 Name[17] == '.' ? Name[18] : 3033 Name[18] == '.' ? Name[19] : 3034 Name[20]; 3035 3036 Intrinsic::ID IID; 3037 if (IsVariable && Name[17] != '.') { 3038 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 3039 IID = Intrinsic::x86_avx2_psrlv_q; 3040 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 3041 IID = Intrinsic::x86_avx2_psrlv_q_256; 3042 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 3043 IID = Intrinsic::x86_avx2_psrlv_d; 3044 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 3045 IID = Intrinsic::x86_avx2_psrlv_d_256; 3046 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 3047 IID = Intrinsic::x86_avx512_psrlv_w_128; 3048 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 3049 IID = Intrinsic::x86_avx512_psrlv_w_256; 3050 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 3051 IID = Intrinsic::x86_avx512_psrlv_w_512; 3052 else 3053 llvm_unreachable("Unexpected size"); 3054 } else if (Name.endswith(".128")) { 3055 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 3056 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 3057 : Intrinsic::x86_sse2_psrl_d; 3058 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 3059 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 3060 : Intrinsic::x86_sse2_psrl_q; 3061 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 3062 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 3063 : Intrinsic::x86_sse2_psrl_w; 3064 else 3065 llvm_unreachable("Unexpected size"); 3066 } else if (Name.endswith(".256")) { 3067 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 3068 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 3069 : Intrinsic::x86_avx2_psrl_d; 3070 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 3071 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 3072 : Intrinsic::x86_avx2_psrl_q; 3073 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 3074 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 3075 : Intrinsic::x86_avx2_psrl_w; 3076 else 3077 llvm_unreachable("Unexpected size"); 3078 } else { 3079 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 3080 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 3081 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 3082 Intrinsic::x86_avx512_psrl_d_512; 3083 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 3084 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 3085 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 3086 Intrinsic::x86_avx512_psrl_q_512; 3087 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 3088 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 3089 : Intrinsic::x86_avx512_psrl_w_512; 3090 else 3091 llvm_unreachable("Unexpected size"); 3092 } 3093 3094 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3095 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 3096 bool IsImmediate = Name[16] == 'i' || 3097 (Name.size() > 18 && Name[18] == 'i'); 3098 bool IsVariable = Name[16] == 'v'; 3099 char Size = Name[16] == '.' ? Name[17] : 3100 Name[17] == '.' ? Name[18] : 3101 Name[18] == '.' ? Name[19] : 3102 Name[20]; 3103 3104 Intrinsic::ID IID; 3105 if (IsVariable && Name[17] != '.') { 3106 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 3107 IID = Intrinsic::x86_avx2_psrav_d; 3108 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 3109 IID = Intrinsic::x86_avx2_psrav_d_256; 3110 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 3111 IID = Intrinsic::x86_avx512_psrav_w_128; 3112 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 3113 IID = Intrinsic::x86_avx512_psrav_w_256; 3114 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 3115 IID = Intrinsic::x86_avx512_psrav_w_512; 3116 else 3117 llvm_unreachable("Unexpected size"); 3118 } else if (Name.endswith(".128")) { 3119 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 3120 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 3121 : Intrinsic::x86_sse2_psra_d; 3122 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 3123 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 3124 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 3125 Intrinsic::x86_avx512_psra_q_128; 3126 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 3127 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 3128 : Intrinsic::x86_sse2_psra_w; 3129 else 3130 llvm_unreachable("Unexpected size"); 3131 } else if (Name.endswith(".256")) { 3132 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 3133 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 3134 : Intrinsic::x86_avx2_psra_d; 3135 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 3136 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 3137 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 3138 Intrinsic::x86_avx512_psra_q_256; 3139 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 3140 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 3141 : Intrinsic::x86_avx2_psra_w; 3142 else 3143 llvm_unreachable("Unexpected size"); 3144 } else { 3145 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 3146 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 3147 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 3148 Intrinsic::x86_avx512_psra_d_512; 3149 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 3150 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 3151 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 3152 Intrinsic::x86_avx512_psra_q_512; 3153 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 3154 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 3155 : Intrinsic::x86_avx512_psra_w_512; 3156 else 3157 llvm_unreachable("Unexpected size"); 3158 } 3159 3160 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3161 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 3162 Rep = upgradeMaskedMove(Builder, *CI); 3163 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 3164 Rep = UpgradeMaskToInt(Builder, *CI); 3165 } else if (IsX86 && Name.endswith(".movntdqa")) { 3166 Module *M = F->getParent(); 3167 MDNode *Node = MDNode::get( 3168 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 3169 3170 Value *Ptr = CI->getArgOperand(0); 3171 3172 // Convert the type of the pointer to a pointer to the stored type. 3173 Value *BC = Builder.CreateBitCast( 3174 Ptr, PointerType::getUnqual(CI->getType()), "cast"); 3175 LoadInst *LI = Builder.CreateAlignedLoad( 3176 CI->getType(), BC, 3177 Align(CI->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 3178 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 3179 Rep = LI; 3180 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 3181 Name.startswith("fma.vfmsub.") || 3182 Name.startswith("fma.vfnmadd.") || 3183 Name.startswith("fma.vfnmsub."))) { 3184 bool NegMul = Name[6] == 'n'; 3185 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 3186 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 3187 3188 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3189 CI->getArgOperand(2) }; 3190 3191 if (IsScalar) { 3192 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3193 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3194 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3195 } 3196 3197 if (NegMul && !IsScalar) 3198 Ops[0] = Builder.CreateFNeg(Ops[0]); 3199 if (NegMul && IsScalar) 3200 Ops[1] = Builder.CreateFNeg(Ops[1]); 3201 if (NegAcc) 3202 Ops[2] = Builder.CreateFNeg(Ops[2]); 3203 3204 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3205 Intrinsic::fma, 3206 Ops[0]->getType()), 3207 Ops); 3208 3209 if (IsScalar) 3210 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 3211 (uint64_t)0); 3212 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 3213 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3214 CI->getArgOperand(2) }; 3215 3216 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3217 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3218 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3219 3220 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3221 Intrinsic::fma, 3222 Ops[0]->getType()), 3223 Ops); 3224 3225 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 3226 Rep, (uint64_t)0); 3227 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 3228 Name.startswith("avx512.maskz.vfmadd.s") || 3229 Name.startswith("avx512.mask3.vfmadd.s") || 3230 Name.startswith("avx512.mask3.vfmsub.s") || 3231 Name.startswith("avx512.mask3.vfnmsub.s"))) { 3232 bool IsMask3 = Name[11] == '3'; 3233 bool IsMaskZ = Name[11] == 'z'; 3234 // Drop the "avx512.mask." to make it easier. 3235 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3236 bool NegMul = Name[2] == 'n'; 3237 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3238 3239 Value *A = CI->getArgOperand(0); 3240 Value *B = CI->getArgOperand(1); 3241 Value *C = CI->getArgOperand(2); 3242 3243 if (NegMul && (IsMask3 || IsMaskZ)) 3244 A = Builder.CreateFNeg(A); 3245 if (NegMul && !(IsMask3 || IsMaskZ)) 3246 B = Builder.CreateFNeg(B); 3247 if (NegAcc) 3248 C = Builder.CreateFNeg(C); 3249 3250 A = Builder.CreateExtractElement(A, (uint64_t)0); 3251 B = Builder.CreateExtractElement(B, (uint64_t)0); 3252 C = Builder.CreateExtractElement(C, (uint64_t)0); 3253 3254 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 3255 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 3256 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 3257 3258 Intrinsic::ID IID; 3259 if (Name.back() == 'd') 3260 IID = Intrinsic::x86_avx512_vfmadd_f64; 3261 else 3262 IID = Intrinsic::x86_avx512_vfmadd_f32; 3263 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 3264 Rep = Builder.CreateCall(FMA, Ops); 3265 } else { 3266 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3267 Intrinsic::fma, 3268 A->getType()); 3269 Rep = Builder.CreateCall(FMA, { A, B, C }); 3270 } 3271 3272 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 3273 IsMask3 ? C : A; 3274 3275 // For Mask3 with NegAcc, we need to create a new extractelement that 3276 // avoids the negation above. 3277 if (NegAcc && IsMask3) 3278 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 3279 (uint64_t)0); 3280 3281 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 3282 Rep, PassThru); 3283 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 3284 Rep, (uint64_t)0); 3285 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 3286 Name.startswith("avx512.mask.vfnmadd.p") || 3287 Name.startswith("avx512.mask.vfnmsub.p") || 3288 Name.startswith("avx512.mask3.vfmadd.p") || 3289 Name.startswith("avx512.mask3.vfmsub.p") || 3290 Name.startswith("avx512.mask3.vfnmsub.p") || 3291 Name.startswith("avx512.maskz.vfmadd.p"))) { 3292 bool IsMask3 = Name[11] == '3'; 3293 bool IsMaskZ = Name[11] == 'z'; 3294 // Drop the "avx512.mask." to make it easier. 3295 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3296 bool NegMul = Name[2] == 'n'; 3297 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3298 3299 Value *A = CI->getArgOperand(0); 3300 Value *B = CI->getArgOperand(1); 3301 Value *C = CI->getArgOperand(2); 3302 3303 if (NegMul && (IsMask3 || IsMaskZ)) 3304 A = Builder.CreateFNeg(A); 3305 if (NegMul && !(IsMask3 || IsMaskZ)) 3306 B = Builder.CreateFNeg(B); 3307 if (NegAcc) 3308 C = Builder.CreateFNeg(C); 3309 3310 if (CI->getNumArgOperands() == 5 && 3311 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3312 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3313 Intrinsic::ID IID; 3314 // Check the character before ".512" in string. 3315 if (Name[Name.size()-5] == 's') 3316 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 3317 else 3318 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 3319 3320 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3321 { A, B, C, CI->getArgOperand(4) }); 3322 } else { 3323 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3324 Intrinsic::fma, 3325 A->getType()); 3326 Rep = Builder.CreateCall(FMA, { A, B, C }); 3327 } 3328 3329 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3330 IsMask3 ? CI->getArgOperand(2) : 3331 CI->getArgOperand(0); 3332 3333 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3334 } else if (IsX86 && Name.startswith("fma.vfmsubadd.p")) { 3335 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3336 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3337 Intrinsic::ID IID; 3338 if (VecWidth == 128 && EltWidth == 32) 3339 IID = Intrinsic::x86_fma_vfmaddsub_ps; 3340 else if (VecWidth == 256 && EltWidth == 32) 3341 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 3342 else if (VecWidth == 128 && EltWidth == 64) 3343 IID = Intrinsic::x86_fma_vfmaddsub_pd; 3344 else if (VecWidth == 256 && EltWidth == 64) 3345 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 3346 else 3347 llvm_unreachable("Unexpected intrinsic"); 3348 3349 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3350 CI->getArgOperand(2) }; 3351 Ops[2] = Builder.CreateFNeg(Ops[2]); 3352 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3353 Ops); 3354 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3355 Name.startswith("avx512.mask3.vfmaddsub.p") || 3356 Name.startswith("avx512.maskz.vfmaddsub.p") || 3357 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3358 bool IsMask3 = Name[11] == '3'; 3359 bool IsMaskZ = Name[11] == 'z'; 3360 // Drop the "avx512.mask." to make it easier. 3361 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3362 bool IsSubAdd = Name[3] == 's'; 3363 if (CI->getNumArgOperands() == 5) { 3364 Intrinsic::ID IID; 3365 // Check the character before ".512" in string. 3366 if (Name[Name.size()-5] == 's') 3367 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3368 else 3369 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3370 3371 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3372 CI->getArgOperand(2), CI->getArgOperand(4) }; 3373 if (IsSubAdd) 3374 Ops[2] = Builder.CreateFNeg(Ops[2]); 3375 3376 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3377 Ops); 3378 } else { 3379 int NumElts = cast<FixedVectorType>(CI->getType())->getNumElements(); 3380 3381 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3382 CI->getArgOperand(2) }; 3383 3384 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3385 Ops[0]->getType()); 3386 Value *Odd = Builder.CreateCall(FMA, Ops); 3387 Ops[2] = Builder.CreateFNeg(Ops[2]); 3388 Value *Even = Builder.CreateCall(FMA, Ops); 3389 3390 if (IsSubAdd) 3391 std::swap(Even, Odd); 3392 3393 SmallVector<int, 32> Idxs(NumElts); 3394 for (int i = 0; i != NumElts; ++i) 3395 Idxs[i] = i + (i % 2) * NumElts; 3396 3397 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3398 } 3399 3400 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3401 IsMask3 ? CI->getArgOperand(2) : 3402 CI->getArgOperand(0); 3403 3404 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3405 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3406 Name.startswith("avx512.maskz.pternlog."))) { 3407 bool ZeroMask = Name[11] == 'z'; 3408 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3409 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3410 Intrinsic::ID IID; 3411 if (VecWidth == 128 && EltWidth == 32) 3412 IID = Intrinsic::x86_avx512_pternlog_d_128; 3413 else if (VecWidth == 256 && EltWidth == 32) 3414 IID = Intrinsic::x86_avx512_pternlog_d_256; 3415 else if (VecWidth == 512 && EltWidth == 32) 3416 IID = Intrinsic::x86_avx512_pternlog_d_512; 3417 else if (VecWidth == 128 && EltWidth == 64) 3418 IID = Intrinsic::x86_avx512_pternlog_q_128; 3419 else if (VecWidth == 256 && EltWidth == 64) 3420 IID = Intrinsic::x86_avx512_pternlog_q_256; 3421 else if (VecWidth == 512 && EltWidth == 64) 3422 IID = Intrinsic::x86_avx512_pternlog_q_512; 3423 else 3424 llvm_unreachable("Unexpected intrinsic"); 3425 3426 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3427 CI->getArgOperand(2), CI->getArgOperand(3) }; 3428 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3429 Args); 3430 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3431 : CI->getArgOperand(0); 3432 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3433 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3434 Name.startswith("avx512.maskz.vpmadd52"))) { 3435 bool ZeroMask = Name[11] == 'z'; 3436 bool High = Name[20] == 'h' || Name[21] == 'h'; 3437 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3438 Intrinsic::ID IID; 3439 if (VecWidth == 128 && !High) 3440 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3441 else if (VecWidth == 256 && !High) 3442 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3443 else if (VecWidth == 512 && !High) 3444 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3445 else if (VecWidth == 128 && High) 3446 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3447 else if (VecWidth == 256 && High) 3448 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3449 else if (VecWidth == 512 && High) 3450 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3451 else 3452 llvm_unreachable("Unexpected intrinsic"); 3453 3454 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3455 CI->getArgOperand(2) }; 3456 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3457 Args); 3458 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3459 : CI->getArgOperand(0); 3460 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3461 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3462 Name.startswith("avx512.mask.vpermt2var.") || 3463 Name.startswith("avx512.maskz.vpermt2var."))) { 3464 bool ZeroMask = Name[11] == 'z'; 3465 bool IndexForm = Name[17] == 'i'; 3466 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3467 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3468 Name.startswith("avx512.maskz.vpdpbusd.") || 3469 Name.startswith("avx512.mask.vpdpbusds.") || 3470 Name.startswith("avx512.maskz.vpdpbusds."))) { 3471 bool ZeroMask = Name[11] == 'z'; 3472 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3473 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3474 Intrinsic::ID IID; 3475 if (VecWidth == 128 && !IsSaturating) 3476 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3477 else if (VecWidth == 256 && !IsSaturating) 3478 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3479 else if (VecWidth == 512 && !IsSaturating) 3480 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3481 else if (VecWidth == 128 && IsSaturating) 3482 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3483 else if (VecWidth == 256 && IsSaturating) 3484 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3485 else if (VecWidth == 512 && IsSaturating) 3486 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3487 else 3488 llvm_unreachable("Unexpected intrinsic"); 3489 3490 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3491 CI->getArgOperand(2) }; 3492 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3493 Args); 3494 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3495 : CI->getArgOperand(0); 3496 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3497 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3498 Name.startswith("avx512.maskz.vpdpwssd.") || 3499 Name.startswith("avx512.mask.vpdpwssds.") || 3500 Name.startswith("avx512.maskz.vpdpwssds."))) { 3501 bool ZeroMask = Name[11] == 'z'; 3502 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3503 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3504 Intrinsic::ID IID; 3505 if (VecWidth == 128 && !IsSaturating) 3506 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3507 else if (VecWidth == 256 && !IsSaturating) 3508 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3509 else if (VecWidth == 512 && !IsSaturating) 3510 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3511 else if (VecWidth == 128 && IsSaturating) 3512 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3513 else if (VecWidth == 256 && IsSaturating) 3514 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3515 else if (VecWidth == 512 && IsSaturating) 3516 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3517 else 3518 llvm_unreachable("Unexpected intrinsic"); 3519 3520 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3521 CI->getArgOperand(2) }; 3522 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3523 Args); 3524 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3525 : CI->getArgOperand(0); 3526 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3527 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3528 Name == "addcarry.u32" || Name == "addcarry.u64" || 3529 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3530 Intrinsic::ID IID; 3531 if (Name[0] == 'a' && Name.back() == '2') 3532 IID = Intrinsic::x86_addcarry_32; 3533 else if (Name[0] == 'a' && Name.back() == '4') 3534 IID = Intrinsic::x86_addcarry_64; 3535 else if (Name[0] == 's' && Name.back() == '2') 3536 IID = Intrinsic::x86_subborrow_32; 3537 else if (Name[0] == 's' && Name.back() == '4') 3538 IID = Intrinsic::x86_subborrow_64; 3539 else 3540 llvm_unreachable("Unexpected intrinsic"); 3541 3542 // Make a call with 3 operands. 3543 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3544 CI->getArgOperand(2)}; 3545 Value *NewCall = Builder.CreateCall( 3546 Intrinsic::getDeclaration(CI->getModule(), IID), 3547 Args); 3548 3549 // Extract the second result and store it. 3550 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3551 // Cast the pointer to the right type. 3552 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3553 llvm::PointerType::getUnqual(Data->getType())); 3554 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3555 // Replace the original call result with the first result of the new call. 3556 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3557 3558 CI->replaceAllUsesWith(CF); 3559 Rep = nullptr; 3560 } else if (IsX86 && Name.startswith("avx512.mask.") && 3561 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3562 // Rep will be updated by the call in the condition. 3563 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3564 Value *Arg = CI->getArgOperand(0); 3565 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3566 Value *Cmp = Builder.CreateICmpSGE( 3567 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3568 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3569 } else if (IsNVVM && (Name.startswith("atomic.load.add.f32.p") || 3570 Name.startswith("atomic.load.add.f64.p"))) { 3571 Value *Ptr = CI->getArgOperand(0); 3572 Value *Val = CI->getArgOperand(1); 3573 Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, 3574 AtomicOrdering::SequentiallyConsistent); 3575 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3576 Name == "max.ui" || Name == "max.ull")) { 3577 Value *Arg0 = CI->getArgOperand(0); 3578 Value *Arg1 = CI->getArgOperand(1); 3579 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3580 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3581 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3582 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3583 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3584 Name == "min.ui" || Name == "min.ull")) { 3585 Value *Arg0 = CI->getArgOperand(0); 3586 Value *Arg1 = CI->getArgOperand(1); 3587 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3588 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3589 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3590 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3591 } else if (IsNVVM && Name == "clz.ll") { 3592 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3593 Value *Arg = CI->getArgOperand(0); 3594 Value *Ctlz = Builder.CreateCall( 3595 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3596 {Arg->getType()}), 3597 {Arg, Builder.getFalse()}, "ctlz"); 3598 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3599 } else if (IsNVVM && Name == "popc.ll") { 3600 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3601 // i64. 3602 Value *Arg = CI->getArgOperand(0); 3603 Value *Popc = Builder.CreateCall( 3604 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3605 {Arg->getType()}), 3606 Arg, "ctpop"); 3607 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3608 } else if (IsNVVM && Name == "h2f") { 3609 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3610 F->getParent(), Intrinsic::convert_from_fp16, 3611 {Builder.getFloatTy()}), 3612 CI->getArgOperand(0), "h2f"); 3613 } else { 3614 llvm_unreachable("Unknown function for CallInst upgrade."); 3615 } 3616 3617 if (Rep) 3618 CI->replaceAllUsesWith(Rep); 3619 CI->eraseFromParent(); 3620 return; 3621 } 3622 3623 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3624 // Handle generic mangling change, but nothing else 3625 assert( 3626 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3627 "Unknown function for CallInst upgrade and isn't just a name change"); 3628 CI->setCalledFunction(NewFn); 3629 }; 3630 CallInst *NewCall = nullptr; 3631 switch (NewFn->getIntrinsicID()) { 3632 default: { 3633 DefaultCase(); 3634 return; 3635 } 3636 case Intrinsic::experimental_vector_reduce_v2_fmul: { 3637 SmallVector<Value *, 2> Args; 3638 if (CI->isFast()) 3639 Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0)); 3640 else 3641 Args.push_back(CI->getOperand(0)); 3642 Args.push_back(CI->getOperand(1)); 3643 NewCall = Builder.CreateCall(NewFn, Args); 3644 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3645 break; 3646 } 3647 case Intrinsic::experimental_vector_reduce_v2_fadd: { 3648 SmallVector<Value *, 2> Args; 3649 if (CI->isFast()) 3650 Args.push_back(Constant::getNullValue(CI->getOperand(0)->getType())); 3651 else 3652 Args.push_back(CI->getOperand(0)); 3653 Args.push_back(CI->getOperand(1)); 3654 NewCall = Builder.CreateCall(NewFn, Args); 3655 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3656 break; 3657 } 3658 case Intrinsic::arm_neon_vld1: 3659 case Intrinsic::arm_neon_vld2: 3660 case Intrinsic::arm_neon_vld3: 3661 case Intrinsic::arm_neon_vld4: 3662 case Intrinsic::arm_neon_vld2lane: 3663 case Intrinsic::arm_neon_vld3lane: 3664 case Intrinsic::arm_neon_vld4lane: 3665 case Intrinsic::arm_neon_vst1: 3666 case Intrinsic::arm_neon_vst2: 3667 case Intrinsic::arm_neon_vst3: 3668 case Intrinsic::arm_neon_vst4: 3669 case Intrinsic::arm_neon_vst2lane: 3670 case Intrinsic::arm_neon_vst3lane: 3671 case Intrinsic::arm_neon_vst4lane: { 3672 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3673 CI->arg_operands().end()); 3674 NewCall = Builder.CreateCall(NewFn, Args); 3675 break; 3676 } 3677 3678 case Intrinsic::arm_neon_bfdot: 3679 case Intrinsic::arm_neon_bfmmla: 3680 case Intrinsic::arm_neon_bfmlalb: 3681 case Intrinsic::arm_neon_bfmlalt: 3682 case Intrinsic::aarch64_neon_bfdot: 3683 case Intrinsic::aarch64_neon_bfmmla: 3684 case Intrinsic::aarch64_neon_bfmlalb: 3685 case Intrinsic::aarch64_neon_bfmlalt: { 3686 SmallVector<Value *, 3> Args; 3687 assert(CI->getNumArgOperands() == 3 && 3688 "Mismatch between function args and call args"); 3689 size_t OperandWidth = 3690 CI->getArgOperand(1)->getType()->getPrimitiveSizeInBits(); 3691 assert((OperandWidth == 64 || OperandWidth == 128) && 3692 "Unexpected operand width"); 3693 Type *NewTy = FixedVectorType::get(Type::getBFloatTy(C), OperandWidth / 16); 3694 auto Iter = CI->arg_operands().begin(); 3695 Args.push_back(*Iter++); 3696 Args.push_back(Builder.CreateBitCast(*Iter++, NewTy)); 3697 Args.push_back(Builder.CreateBitCast(*Iter++, NewTy)); 3698 NewCall = Builder.CreateCall(NewFn, Args); 3699 break; 3700 } 3701 3702 case Intrinsic::bitreverse: 3703 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3704 break; 3705 3706 case Intrinsic::ctlz: 3707 case Intrinsic::cttz: 3708 assert(CI->getNumArgOperands() == 1 && 3709 "Mismatch between function args and call args"); 3710 NewCall = 3711 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3712 break; 3713 3714 case Intrinsic::objectsize: { 3715 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3716 ? Builder.getFalse() 3717 : CI->getArgOperand(2); 3718 Value *Dynamic = 3719 CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3); 3720 NewCall = Builder.CreateCall( 3721 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic}); 3722 break; 3723 } 3724 3725 case Intrinsic::ctpop: 3726 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3727 break; 3728 3729 case Intrinsic::convert_from_fp16: 3730 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3731 break; 3732 3733 case Intrinsic::dbg_value: 3734 // Upgrade from the old version that had an extra offset argument. 3735 assert(CI->getNumArgOperands() == 4); 3736 // Drop nonzero offsets instead of attempting to upgrade them. 3737 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3738 if (Offset->isZeroValue()) { 3739 NewCall = Builder.CreateCall( 3740 NewFn, 3741 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3742 break; 3743 } 3744 CI->eraseFromParent(); 3745 return; 3746 3747 case Intrinsic::x86_xop_vfrcz_ss: 3748 case Intrinsic::x86_xop_vfrcz_sd: 3749 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3750 break; 3751 3752 case Intrinsic::x86_xop_vpermil2pd: 3753 case Intrinsic::x86_xop_vpermil2ps: 3754 case Intrinsic::x86_xop_vpermil2pd_256: 3755 case Intrinsic::x86_xop_vpermil2ps_256: { 3756 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3757 CI->arg_operands().end()); 3758 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3759 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3760 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3761 NewCall = Builder.CreateCall(NewFn, Args); 3762 break; 3763 } 3764 3765 case Intrinsic::x86_sse41_ptestc: 3766 case Intrinsic::x86_sse41_ptestz: 3767 case Intrinsic::x86_sse41_ptestnzc: { 3768 // The arguments for these intrinsics used to be v4f32, and changed 3769 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3770 // So, the only thing required is a bitcast for both arguments. 3771 // First, check the arguments have the old type. 3772 Value *Arg0 = CI->getArgOperand(0); 3773 if (Arg0->getType() != FixedVectorType::get(Type::getFloatTy(C), 4)) 3774 return; 3775 3776 // Old intrinsic, add bitcasts 3777 Value *Arg1 = CI->getArgOperand(1); 3778 3779 auto *NewVecTy = FixedVectorType::get(Type::getInt64Ty(C), 2); 3780 3781 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3782 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3783 3784 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3785 break; 3786 } 3787 3788 case Intrinsic::x86_rdtscp: { 3789 // This used to take 1 arguments. If we have no arguments, it is already 3790 // upgraded. 3791 if (CI->getNumOperands() == 0) 3792 return; 3793 3794 NewCall = Builder.CreateCall(NewFn); 3795 // Extract the second result and store it. 3796 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3797 // Cast the pointer to the right type. 3798 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3799 llvm::PointerType::getUnqual(Data->getType())); 3800 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3801 // Replace the original call result with the first result of the new call. 3802 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3803 3804 NewCall->takeName(CI); 3805 CI->replaceAllUsesWith(TSC); 3806 CI->eraseFromParent(); 3807 return; 3808 } 3809 3810 case Intrinsic::x86_sse41_insertps: 3811 case Intrinsic::x86_sse41_dppd: 3812 case Intrinsic::x86_sse41_dpps: 3813 case Intrinsic::x86_sse41_mpsadbw: 3814 case Intrinsic::x86_avx_dp_ps_256: 3815 case Intrinsic::x86_avx2_mpsadbw: { 3816 // Need to truncate the last argument from i32 to i8 -- this argument models 3817 // an inherently 8-bit immediate operand to these x86 instructions. 3818 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3819 CI->arg_operands().end()); 3820 3821 // Replace the last argument with a trunc. 3822 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3823 NewCall = Builder.CreateCall(NewFn, Args); 3824 break; 3825 } 3826 3827 case Intrinsic::x86_avx512_mask_cmp_pd_128: 3828 case Intrinsic::x86_avx512_mask_cmp_pd_256: 3829 case Intrinsic::x86_avx512_mask_cmp_pd_512: 3830 case Intrinsic::x86_avx512_mask_cmp_ps_128: 3831 case Intrinsic::x86_avx512_mask_cmp_ps_256: 3832 case Intrinsic::x86_avx512_mask_cmp_ps_512: { 3833 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3834 CI->arg_operands().end()); 3835 unsigned NumElts = 3836 cast<FixedVectorType>(Args[0]->getType())->getNumElements(); 3837 Args[3] = getX86MaskVec(Builder, Args[3], NumElts); 3838 3839 NewCall = Builder.CreateCall(NewFn, Args); 3840 Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall, nullptr); 3841 3842 NewCall->takeName(CI); 3843 CI->replaceAllUsesWith(Res); 3844 CI->eraseFromParent(); 3845 return; 3846 } 3847 3848 case Intrinsic::thread_pointer: { 3849 NewCall = Builder.CreateCall(NewFn, {}); 3850 break; 3851 } 3852 3853 case Intrinsic::invariant_start: 3854 case Intrinsic::invariant_end: 3855 case Intrinsic::masked_load: 3856 case Intrinsic::masked_store: 3857 case Intrinsic::masked_gather: 3858 case Intrinsic::masked_scatter: { 3859 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3860 CI->arg_operands().end()); 3861 NewCall = Builder.CreateCall(NewFn, Args); 3862 break; 3863 } 3864 3865 case Intrinsic::memcpy: 3866 case Intrinsic::memmove: 3867 case Intrinsic::memset: { 3868 // We have to make sure that the call signature is what we're expecting. 3869 // We only want to change the old signatures by removing the alignment arg: 3870 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3871 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3872 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3873 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3874 // Note: i8*'s in the above can be any pointer type 3875 if (CI->getNumArgOperands() != 5) { 3876 DefaultCase(); 3877 return; 3878 } 3879 // Remove alignment argument (3), and add alignment attributes to the 3880 // dest/src pointers. 3881 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3882 CI->getArgOperand(2), CI->getArgOperand(4)}; 3883 NewCall = Builder.CreateCall(NewFn, Args); 3884 auto *MemCI = cast<MemIntrinsic>(NewCall); 3885 // All mem intrinsics support dest alignment. 3886 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3887 MemCI->setDestAlignment(Align->getMaybeAlignValue()); 3888 // Memcpy/Memmove also support source alignment. 3889 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3890 MTI->setSourceAlignment(Align->getMaybeAlignValue()); 3891 break; 3892 } 3893 } 3894 assert(NewCall && "Should have either set this variable or returned through " 3895 "the default case"); 3896 NewCall->takeName(CI); 3897 CI->replaceAllUsesWith(NewCall); 3898 CI->eraseFromParent(); 3899 } 3900 3901 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3902 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3903 3904 // Check if this function should be upgraded and get the replacement function 3905 // if there is one. 3906 Function *NewFn; 3907 if (UpgradeIntrinsicFunction(F, NewFn)) { 3908 // Replace all users of the old function with the new function or new 3909 // instructions. This is not a range loop because the call is deleted. 3910 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3911 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3912 UpgradeIntrinsicCall(CI, NewFn); 3913 3914 // Remove old function, no longer used, from the module. 3915 F->eraseFromParent(); 3916 } 3917 } 3918 3919 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3920 // Check if the tag uses struct-path aware TBAA format. 3921 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3922 return &MD; 3923 3924 auto &Context = MD.getContext(); 3925 if (MD.getNumOperands() == 3) { 3926 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3927 MDNode *ScalarType = MDNode::get(Context, Elts); 3928 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3929 Metadata *Elts2[] = {ScalarType, ScalarType, 3930 ConstantAsMetadata::get( 3931 Constant::getNullValue(Type::getInt64Ty(Context))), 3932 MD.getOperand(2)}; 3933 return MDNode::get(Context, Elts2); 3934 } 3935 // Create a MDNode <MD, MD, offset 0> 3936 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3937 Type::getInt64Ty(Context)))}; 3938 return MDNode::get(Context, Elts); 3939 } 3940 3941 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3942 Instruction *&Temp) { 3943 if (Opc != Instruction::BitCast) 3944 return nullptr; 3945 3946 Temp = nullptr; 3947 Type *SrcTy = V->getType(); 3948 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3949 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3950 LLVMContext &Context = V->getContext(); 3951 3952 // We have no information about target data layout, so we assume that 3953 // the maximum pointer size is 64bit. 3954 Type *MidTy = Type::getInt64Ty(Context); 3955 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3956 3957 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3958 } 3959 3960 return nullptr; 3961 } 3962 3963 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3964 if (Opc != Instruction::BitCast) 3965 return nullptr; 3966 3967 Type *SrcTy = C->getType(); 3968 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3969 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3970 LLVMContext &Context = C->getContext(); 3971 3972 // We have no information about target data layout, so we assume that 3973 // the maximum pointer size is 64bit. 3974 Type *MidTy = Type::getInt64Ty(Context); 3975 3976 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3977 DestTy); 3978 } 3979 3980 return nullptr; 3981 } 3982 3983 /// Check the debug info version number, if it is out-dated, drop the debug 3984 /// info. Return true if module is modified. 3985 bool llvm::UpgradeDebugInfo(Module &M) { 3986 unsigned Version = getDebugMetadataVersionFromModule(M); 3987 if (Version == DEBUG_METADATA_VERSION) { 3988 bool BrokenDebugInfo = false; 3989 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3990 report_fatal_error("Broken module found, compilation aborted!"); 3991 if (!BrokenDebugInfo) 3992 // Everything is ok. 3993 return false; 3994 else { 3995 // Diagnose malformed debug info. 3996 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3997 M.getContext().diagnose(Diag); 3998 } 3999 } 4000 bool Modified = StripDebugInfo(M); 4001 if (Modified && Version != DEBUG_METADATA_VERSION) { 4002 // Diagnose a version mismatch. 4003 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 4004 M.getContext().diagnose(DiagVersion); 4005 } 4006 return Modified; 4007 } 4008 4009 /// This checks for objc retain release marker which should be upgraded. It 4010 /// returns true if module is modified. 4011 static bool UpgradeRetainReleaseMarker(Module &M) { 4012 bool Changed = false; 4013 const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker"; 4014 NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey); 4015 if (ModRetainReleaseMarker) { 4016 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 4017 if (Op) { 4018 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 4019 if (ID) { 4020 SmallVector<StringRef, 4> ValueComp; 4021 ID->getString().split(ValueComp, "#"); 4022 if (ValueComp.size() == 2) { 4023 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 4024 ID = MDString::get(M.getContext(), NewValue); 4025 } 4026 M.addModuleFlag(Module::Error, MarkerKey, ID); 4027 M.eraseNamedMetadata(ModRetainReleaseMarker); 4028 Changed = true; 4029 } 4030 } 4031 } 4032 return Changed; 4033 } 4034 4035 void llvm::UpgradeARCRuntime(Module &M) { 4036 // This lambda converts normal function calls to ARC runtime functions to 4037 // intrinsic calls. 4038 auto UpgradeToIntrinsic = [&](const char *OldFunc, 4039 llvm::Intrinsic::ID IntrinsicFunc) { 4040 Function *Fn = M.getFunction(OldFunc); 4041 4042 if (!Fn) 4043 return; 4044 4045 Function *NewFn = llvm::Intrinsic::getDeclaration(&M, IntrinsicFunc); 4046 4047 for (auto I = Fn->user_begin(), E = Fn->user_end(); I != E;) { 4048 CallInst *CI = dyn_cast<CallInst>(*I++); 4049 if (!CI || CI->getCalledFunction() != Fn) 4050 continue; 4051 4052 IRBuilder<> Builder(CI->getParent(), CI->getIterator()); 4053 FunctionType *NewFuncTy = NewFn->getFunctionType(); 4054 SmallVector<Value *, 2> Args; 4055 4056 // Don't upgrade the intrinsic if it's not valid to bitcast the return 4057 // value to the return type of the old function. 4058 if (NewFuncTy->getReturnType() != CI->getType() && 4059 !CastInst::castIsValid(Instruction::BitCast, CI, 4060 NewFuncTy->getReturnType())) 4061 continue; 4062 4063 bool InvalidCast = false; 4064 4065 for (unsigned I = 0, E = CI->getNumArgOperands(); I != E; ++I) { 4066 Value *Arg = CI->getArgOperand(I); 4067 4068 // Bitcast argument to the parameter type of the new function if it's 4069 // not a variadic argument. 4070 if (I < NewFuncTy->getNumParams()) { 4071 // Don't upgrade the intrinsic if it's not valid to bitcast the argument 4072 // to the parameter type of the new function. 4073 if (!CastInst::castIsValid(Instruction::BitCast, Arg, 4074 NewFuncTy->getParamType(I))) { 4075 InvalidCast = true; 4076 break; 4077 } 4078 Arg = Builder.CreateBitCast(Arg, NewFuncTy->getParamType(I)); 4079 } 4080 Args.push_back(Arg); 4081 } 4082 4083 if (InvalidCast) 4084 continue; 4085 4086 // Create a call instruction that calls the new function. 4087 CallInst *NewCall = Builder.CreateCall(NewFuncTy, NewFn, Args); 4088 NewCall->setTailCallKind(cast<CallInst>(CI)->getTailCallKind()); 4089 NewCall->takeName(CI); 4090 4091 // Bitcast the return value back to the type of the old call. 4092 Value *NewRetVal = Builder.CreateBitCast(NewCall, CI->getType()); 4093 4094 if (!CI->use_empty()) 4095 CI->replaceAllUsesWith(NewRetVal); 4096 CI->eraseFromParent(); 4097 } 4098 4099 if (Fn->use_empty()) 4100 Fn->eraseFromParent(); 4101 }; 4102 4103 // Unconditionally convert a call to "clang.arc.use" to a call to 4104 // "llvm.objc.clang.arc.use". 4105 UpgradeToIntrinsic("clang.arc.use", llvm::Intrinsic::objc_clang_arc_use); 4106 4107 // Upgrade the retain release marker. If there is no need to upgrade 4108 // the marker, that means either the module is already new enough to contain 4109 // new intrinsics or it is not ARC. There is no need to upgrade runtime call. 4110 if (!UpgradeRetainReleaseMarker(M)) 4111 return; 4112 4113 std::pair<const char *, llvm::Intrinsic::ID> RuntimeFuncs[] = { 4114 {"objc_autorelease", llvm::Intrinsic::objc_autorelease}, 4115 {"objc_autoreleasePoolPop", llvm::Intrinsic::objc_autoreleasePoolPop}, 4116 {"objc_autoreleasePoolPush", llvm::Intrinsic::objc_autoreleasePoolPush}, 4117 {"objc_autoreleaseReturnValue", 4118 llvm::Intrinsic::objc_autoreleaseReturnValue}, 4119 {"objc_copyWeak", llvm::Intrinsic::objc_copyWeak}, 4120 {"objc_destroyWeak", llvm::Intrinsic::objc_destroyWeak}, 4121 {"objc_initWeak", llvm::Intrinsic::objc_initWeak}, 4122 {"objc_loadWeak", llvm::Intrinsic::objc_loadWeak}, 4123 {"objc_loadWeakRetained", llvm::Intrinsic::objc_loadWeakRetained}, 4124 {"objc_moveWeak", llvm::Intrinsic::objc_moveWeak}, 4125 {"objc_release", llvm::Intrinsic::objc_release}, 4126 {"objc_retain", llvm::Intrinsic::objc_retain}, 4127 {"objc_retainAutorelease", llvm::Intrinsic::objc_retainAutorelease}, 4128 {"objc_retainAutoreleaseReturnValue", 4129 llvm::Intrinsic::objc_retainAutoreleaseReturnValue}, 4130 {"objc_retainAutoreleasedReturnValue", 4131 llvm::Intrinsic::objc_retainAutoreleasedReturnValue}, 4132 {"objc_retainBlock", llvm::Intrinsic::objc_retainBlock}, 4133 {"objc_storeStrong", llvm::Intrinsic::objc_storeStrong}, 4134 {"objc_storeWeak", llvm::Intrinsic::objc_storeWeak}, 4135 {"objc_unsafeClaimAutoreleasedReturnValue", 4136 llvm::Intrinsic::objc_unsafeClaimAutoreleasedReturnValue}, 4137 {"objc_retainedObject", llvm::Intrinsic::objc_retainedObject}, 4138 {"objc_unretainedObject", llvm::Intrinsic::objc_unretainedObject}, 4139 {"objc_unretainedPointer", llvm::Intrinsic::objc_unretainedPointer}, 4140 {"objc_retain_autorelease", llvm::Intrinsic::objc_retain_autorelease}, 4141 {"objc_sync_enter", llvm::Intrinsic::objc_sync_enter}, 4142 {"objc_sync_exit", llvm::Intrinsic::objc_sync_exit}, 4143 {"objc_arc_annotation_topdown_bbstart", 4144 llvm::Intrinsic::objc_arc_annotation_topdown_bbstart}, 4145 {"objc_arc_annotation_topdown_bbend", 4146 llvm::Intrinsic::objc_arc_annotation_topdown_bbend}, 4147 {"objc_arc_annotation_bottomup_bbstart", 4148 llvm::Intrinsic::objc_arc_annotation_bottomup_bbstart}, 4149 {"objc_arc_annotation_bottomup_bbend", 4150 llvm::Intrinsic::objc_arc_annotation_bottomup_bbend}}; 4151 4152 for (auto &I : RuntimeFuncs) 4153 UpgradeToIntrinsic(I.first, I.second); 4154 } 4155 4156 bool llvm::UpgradeModuleFlags(Module &M) { 4157 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 4158 if (!ModFlags) 4159 return false; 4160 4161 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 4162 bool HasSwiftVersionFlag = false; 4163 uint8_t SwiftMajorVersion, SwiftMinorVersion; 4164 uint32_t SwiftABIVersion; 4165 auto Int8Ty = Type::getInt8Ty(M.getContext()); 4166 auto Int32Ty = Type::getInt32Ty(M.getContext()); 4167 4168 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 4169 MDNode *Op = ModFlags->getOperand(I); 4170 if (Op->getNumOperands() != 3) 4171 continue; 4172 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 4173 if (!ID) 4174 continue; 4175 if (ID->getString() == "Objective-C Image Info Version") 4176 HasObjCFlag = true; 4177 if (ID->getString() == "Objective-C Class Properties") 4178 HasClassProperties = true; 4179 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 4180 // field was Error and now they are Max. 4181 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 4182 if (auto *Behavior = 4183 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 4184 if (Behavior->getLimitedValue() == Module::Error) { 4185 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 4186 Metadata *Ops[3] = { 4187 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 4188 MDString::get(M.getContext(), ID->getString()), 4189 Op->getOperand(2)}; 4190 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4191 Changed = true; 4192 } 4193 } 4194 } 4195 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 4196 // section name so that llvm-lto will not complain about mismatching 4197 // module flags that is functionally the same. 4198 if (ID->getString() == "Objective-C Image Info Section") { 4199 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 4200 SmallVector<StringRef, 4> ValueComp; 4201 Value->getString().split(ValueComp, " "); 4202 if (ValueComp.size() != 1) { 4203 std::string NewValue; 4204 for (auto &S : ValueComp) 4205 NewValue += S.str(); 4206 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 4207 MDString::get(M.getContext(), NewValue)}; 4208 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4209 Changed = true; 4210 } 4211 } 4212 } 4213 4214 // IRUpgrader turns a i32 type "Objective-C Garbage Collection" into i8 value. 4215 // If the higher bits are set, it adds new module flag for swift info. 4216 if (ID->getString() == "Objective-C Garbage Collection") { 4217 auto Md = dyn_cast<ConstantAsMetadata>(Op->getOperand(2)); 4218 if (Md) { 4219 assert(Md->getValue() && "Expected non-empty metadata"); 4220 auto Type = Md->getValue()->getType(); 4221 if (Type == Int8Ty) 4222 continue; 4223 unsigned Val = Md->getValue()->getUniqueInteger().getZExtValue(); 4224 if ((Val & 0xff) != Val) { 4225 HasSwiftVersionFlag = true; 4226 SwiftABIVersion = (Val & 0xff00) >> 8; 4227 SwiftMajorVersion = (Val & 0xff000000) >> 24; 4228 SwiftMinorVersion = (Val & 0xff0000) >> 16; 4229 } 4230 Metadata *Ops[3] = { 4231 ConstantAsMetadata::get(ConstantInt::get(Int32Ty,Module::Error)), 4232 Op->getOperand(1), 4233 ConstantAsMetadata::get(ConstantInt::get(Int8Ty,Val & 0xff))}; 4234 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4235 Changed = true; 4236 } 4237 } 4238 } 4239 4240 // "Objective-C Class Properties" is recently added for Objective-C. We 4241 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 4242 // flag of value 0, so we can correclty downgrade this flag when trying to 4243 // link an ObjC bitcode without this module flag with an ObjC bitcode with 4244 // this module flag. 4245 if (HasObjCFlag && !HasClassProperties) { 4246 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 4247 (uint32_t)0); 4248 Changed = true; 4249 } 4250 4251 if (HasSwiftVersionFlag) { 4252 M.addModuleFlag(Module::Error, "Swift ABI Version", 4253 SwiftABIVersion); 4254 M.addModuleFlag(Module::Error, "Swift Major Version", 4255 ConstantInt::get(Int8Ty, SwiftMajorVersion)); 4256 M.addModuleFlag(Module::Error, "Swift Minor Version", 4257 ConstantInt::get(Int8Ty, SwiftMinorVersion)); 4258 Changed = true; 4259 } 4260 4261 return Changed; 4262 } 4263 4264 void llvm::UpgradeSectionAttributes(Module &M) { 4265 auto TrimSpaces = [](StringRef Section) -> std::string { 4266 SmallVector<StringRef, 5> Components; 4267 Section.split(Components, ','); 4268 4269 SmallString<32> Buffer; 4270 raw_svector_ostream OS(Buffer); 4271 4272 for (auto Component : Components) 4273 OS << ',' << Component.trim(); 4274 4275 return std::string(OS.str().substr(1)); 4276 }; 4277 4278 for (auto &GV : M.globals()) { 4279 if (!GV.hasSection()) 4280 continue; 4281 4282 StringRef Section = GV.getSection(); 4283 4284 if (!Section.startswith("__DATA, __objc_catlist")) 4285 continue; 4286 4287 // __DATA, __objc_catlist, regular, no_dead_strip 4288 // __DATA,__objc_catlist,regular,no_dead_strip 4289 GV.setSection(TrimSpaces(Section)); 4290 } 4291 } 4292 4293 namespace { 4294 // Prior to LLVM 10.0, the strictfp attribute could be used on individual 4295 // callsites within a function that did not also have the strictfp attribute. 4296 // Since 10.0, if strict FP semantics are needed within a function, the 4297 // function must have the strictfp attribute and all calls within the function 4298 // must also have the strictfp attribute. This latter restriction is 4299 // necessary to prevent unwanted libcall simplification when a function is 4300 // being cloned (such as for inlining). 4301 // 4302 // The "dangling" strictfp attribute usage was only used to prevent constant 4303 // folding and other libcall simplification. The nobuiltin attribute on the 4304 // callsite has the same effect. 4305 struct StrictFPUpgradeVisitor : public InstVisitor<StrictFPUpgradeVisitor> { 4306 StrictFPUpgradeVisitor() {} 4307 4308 void visitCallBase(CallBase &Call) { 4309 if (!Call.isStrictFP()) 4310 return; 4311 if (isa<ConstrainedFPIntrinsic>(&Call)) 4312 return; 4313 // If we get here, the caller doesn't have the strictfp attribute 4314 // but this callsite does. Replace the strictfp attribute with nobuiltin. 4315 Call.removeAttribute(AttributeList::FunctionIndex, Attribute::StrictFP); 4316 Call.addAttribute(AttributeList::FunctionIndex, Attribute::NoBuiltin); 4317 } 4318 }; 4319 } // namespace 4320 4321 void llvm::UpgradeFunctionAttributes(Function &F) { 4322 // If a function definition doesn't have the strictfp attribute, 4323 // convert any callsite strictfp attributes to nobuiltin. 4324 if (!F.isDeclaration() && !F.hasFnAttribute(Attribute::StrictFP)) { 4325 StrictFPUpgradeVisitor SFPV; 4326 SFPV.visit(F); 4327 } 4328 } 4329 4330 static bool isOldLoopArgument(Metadata *MD) { 4331 auto *T = dyn_cast_or_null<MDTuple>(MD); 4332 if (!T) 4333 return false; 4334 if (T->getNumOperands() < 1) 4335 return false; 4336 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 4337 if (!S) 4338 return false; 4339 return S->getString().startswith("llvm.vectorizer."); 4340 } 4341 4342 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 4343 StringRef OldPrefix = "llvm.vectorizer."; 4344 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 4345 4346 if (OldTag == "llvm.vectorizer.unroll") 4347 return MDString::get(C, "llvm.loop.interleave.count"); 4348 4349 return MDString::get( 4350 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 4351 .str()); 4352 } 4353 4354 static Metadata *upgradeLoopArgument(Metadata *MD) { 4355 auto *T = dyn_cast_or_null<MDTuple>(MD); 4356 if (!T) 4357 return MD; 4358 if (T->getNumOperands() < 1) 4359 return MD; 4360 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 4361 if (!OldTag) 4362 return MD; 4363 if (!OldTag->getString().startswith("llvm.vectorizer.")) 4364 return MD; 4365 4366 // This has an old tag. Upgrade it. 4367 SmallVector<Metadata *, 8> Ops; 4368 Ops.reserve(T->getNumOperands()); 4369 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 4370 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 4371 Ops.push_back(T->getOperand(I)); 4372 4373 return MDTuple::get(T->getContext(), Ops); 4374 } 4375 4376 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 4377 auto *T = dyn_cast<MDTuple>(&N); 4378 if (!T) 4379 return &N; 4380 4381 if (none_of(T->operands(), isOldLoopArgument)) 4382 return &N; 4383 4384 SmallVector<Metadata *, 8> Ops; 4385 Ops.reserve(T->getNumOperands()); 4386 for (Metadata *MD : T->operands()) 4387 Ops.push_back(upgradeLoopArgument(MD)); 4388 4389 return MDTuple::get(T->getContext(), Ops); 4390 } 4391 4392 std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { 4393 StringRef AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64"; 4394 4395 // If X86, and the datalayout matches the expected format, add pointer size 4396 // address spaces to the datalayout. 4397 if (!Triple(TT).isX86() || DL.contains(AddrSpaces)) 4398 return std::string(DL); 4399 4400 SmallVector<StringRef, 4> Groups; 4401 Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)"); 4402 if (!R.match(DL, &Groups)) 4403 return std::string(DL); 4404 4405 return (Groups[1] + AddrSpaces + Groups[3]).str(); 4406 } 4407 4408 void llvm::UpgradeAttributes(AttrBuilder &B) { 4409 StringRef FramePointer; 4410 if (B.contains("no-frame-pointer-elim")) { 4411 // The value can be "true" or "false". 4412 for (const auto &I : B.td_attrs()) 4413 if (I.first == "no-frame-pointer-elim") 4414 FramePointer = I.second == "true" ? "all" : "none"; 4415 B.removeAttribute("no-frame-pointer-elim"); 4416 } 4417 if (B.contains("no-frame-pointer-elim-non-leaf")) { 4418 // The value is ignored. "no-frame-pointer-elim"="true" takes priority. 4419 if (FramePointer != "all") 4420 FramePointer = "non-leaf"; 4421 B.removeAttribute("no-frame-pointer-elim-non-leaf"); 4422 } 4423 if (!FramePointer.empty()) 4424 B.addAttribute("frame-pointer", FramePointer); 4425 4426 if (B.contains("null-pointer-is-valid")) { 4427 // The value can be "true" or "false". 4428 bool NullPointerIsValid = false; 4429 for (const auto &I : B.td_attrs()) 4430 if (I.first == "null-pointer-is-valid") 4431 NullPointerIsValid = I.second == "true"; 4432 B.removeAttribute("null-pointer-is-valid"); 4433 if (NullPointerIsValid) 4434 B.addAttribute(Attribute::NullPointerIsValid); 4435 } 4436 } 4437